Light detection device and electronic apparatus

Abstract

A light detection device according to an embodiment of the present disclosure includes: a first substrate provided with a photoelectric conversion element that converts light into an electric charge, and a readout circuit capable of outputting a first signal based on the converted electric charge; and a second substrate including a signal processing circuit capable of processing the first signal, the second substrate being laminated on the first substrate. The first substrate has a semiconductor layer and a wiring layer. The readout circuit has a first transistor provided in the wiring layer.

Description

Technical Field

[0001] The present disclosure relates to a light detection device and an electronic device. Background Art

[0002] An imaging device having a stacked structure formed by bonding three substrates, namely, a sensor substrate, a pixel transistor substrate, and a logic substrate, has been proposed (PTL 1). List of citations Patent Literature

[0003] Patent Document 1: International Publication No. WO 2020 / 262582 Summary of the Invention

[0004] A device for detecting light is desired so as to enable miniaturization.

[0005] It is desirable to provide a light detecting device that is advantageous in miniaturization.

[0006] According to an embodiment of the present disclosure, a light detection device includes a first substrate and a second substrate. The first substrate includes a photoelectric conversion element and a readout circuit. The photoelectric conversion element performs photoelectric conversion on light. The readout circuit is configured to output a first signal based on the charge converted by the photoelectric conversion element. The second substrate includes a signal processing circuit configured to perform signal processing on the first signal. The second substrate is stacked on the first substrate. The first substrate includes a semiconductor layer and a wiring layer. The readout circuit includes a first transistor disposed in the wiring layer. An electronic device according to an embodiment of the present disclosure includes an optical system and a light detecting device that receives light transmitted through the optical system. The light detecting device includes a first substrate and a second substrate. The first substrate includes a photoelectric conversion element and a readout circuit. The photoelectric conversion element performs photoelectric conversion on light. The readout circuit is configured to output a first signal based on the charge converted by the photoelectric conversion element. The second substrate includes a signal processing circuit configured to perform signal processing on the first signal. The second substrate is stacked on the first substrate. The first substrate includes a semiconductor layer and a wiring layer. The readout circuit includes a first transistor arranged in the wiring layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 : is a block diagram showing an example of a schematic configuration of an imaging device as an example of a light detection device according to the first embodiment of the present disclosure. Figure 2 is a diagram illustrating an example of a pixel portion of an imaging device according to the first embodiment of the present disclosure. Figure 3It is an explanatory diagram of an example of the circuit configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. Figure 4 It is an explanatory diagram of an example of a cross-sectional configuration of an imaging device according to a first embodiment of the present disclosure. Figure 5 : is a diagram illustrating an example of a cross-sectional configuration of an imaging device according to a first embodiment of the present disclosure. Figure 6 It is an explanatory diagram of an example of a planar configuration of an imaging device according to the first embodiment of the present disclosure. Figure 7 It is an explanatory diagram of an example of a planar configuration of an imaging device according to the first embodiment of the present disclosure. Figure 8 is an explanatory diagram of another example of the planar configuration of the imaging device according to the first embodiment of the present disclosure. Figure 9A It is an explanatory diagram of a configuration example of an imaging device according to Modification 1 of the present disclosure. Figure 9B It is an explanatory diagram of a configuration example of an imaging device according to Modification 1 of the present disclosure. Figure 10 It is an explanatory diagram of a configuration example of an imaging device according to Modification 2 of the present disclosure. Figure 11 It is an explanatory diagram of a configuration example of an imaging device according to Modification 2 of the present disclosure. Figure 12 It is an explanatory diagram of an example of a cross-sectional configuration of an imaging device according to a second embodiment of the present disclosure. Figure 13 It is an explanatory diagram of an example of a planar configuration of an imaging device according to a second embodiment of the present disclosure. Figure 14 It is an explanatory diagram of a configuration example of an imaging device according to Modification 4 of the present disclosure. Figure 15 It is an explanatory diagram of a configuration example of an imaging device according to Modification 4 of the present disclosure. Figure 16 It is an explanatory diagram of another configuration example of the imaging device according to Modification 4 of the present disclosure. Figure 17 It is an explanatory diagram of another configuration example of the imaging device according to Modification 4 of the present disclosure. Figure 18 It is an explanatory diagram of a configuration example of an imaging device according to Modification 5 of the present disclosure. Figure 19 It is an explanatory diagram of another configuration example of the imaging device according to Modification 5 of the present disclosure. Figure 20 is a block diagram showing a configuration example of an electronic device including an imaging device. Figure 21 is a block diagram showing an example of a schematic configuration of a vehicle control system. Figure 22 1 and 2 are diagrams for assisting in explaining examples of installation positions of the vehicle exterior information detection unit and the imaging portion. Figure 23 : is a diagram showing an example of a schematic configuration of an endoscopic surgery system. Figure 24 is a block diagram illustrating an example of the functional configuration of a camera head and a camera control unit (CCU). DETAILED DESCRIPTION

[0008] Next, the details of the embodiment of the present disclosure will be described with reference to the accompanying drawings. Note that the description will be given in the following order. 1. First Implementation Plan 2. Modification 3. Second Implementation Plan 4. Modifications 5. Application Examples 6. Practical Application Examples

[0009] <1. First Implementation Plan> Figure 1 : is a block diagram showing an example of a schematic configuration of an imaging device as an example of a light detection device according to the first embodiment of the present disclosure. Figure 2 This figure illustrates an example of a pixel section of an imaging device according to the first embodiment. A light detection device is a device capable of detecting incident light. An imaging device 1 serving as a light detection device includes a plurality of pixels P having a photoelectric conversion unit (photoelectric conversion element) and is configured to photoelectrically convert incident light and generate a signal. The imaging device (light detection device) can receive light transmitted through an optical system including an optical lens (not shown) and generate a signal.

[0010] For example, the imaging device 1 includes a semiconductor substrate (for example, a silicon substrate) provided with a plurality of pixels P. The imaging device 1 includes the pixels P, each of which includes a photoelectric conversion portion that is a photodiode and is capable of photoelectrically converting light. Figure 2 As shown, the imaging device 1 includes an imaging region (pixel portion 100 ) in which a plurality of pixels P are two-dimensionally arranged in a matrix. The pixel portion 100 is a pixel array in which a plurality of pixels P are arranged. The pixel portion 100 is also referred to as a light receiving region.

[0011] Imaging device 1 captures incident light (image light) from a subject through an optical system including an optical lens. Imaging device 1 captures an image of the subject formed by the optical lens. Imaging device 1 performs photoelectric conversion on the received light and generates pixel signals. For example, imaging device 1 is a complementary metal oxide semiconductor (CMOS) image sensor. Imaging device 1 can be used in electronic devices such as digital cameras, video cameras, and mobile phones.

[0012] like Figure 2 As shown, it should be noted that the Z-axis direction is the incident direction of light from the subject, the X-axis direction is the left-right direction on the paper that is orthogonal to the Z-axis direction, and the Y-axis direction is the up-down direction on the paper that is orthogonal to the Z-axis and the X-axis. Figure 2 The arrows shown are for directions.

[0013] For example, Figure 1 As shown in the example in FIG, the imaging device 1 includes a pixel driving section 111, a signal processing section 112, a control section 113, a processing section 114, etc. in an area around the pixel section 100 (pixel array). The imaging device 1 is also provided with a plurality of control lines Lread and a plurality of signal lines VSL.

[0014] The control line Lread is a signal line capable of transmitting a signal to drive the pixel P, and is connected to the pixel driving section 111 and the pixel P in the pixel section 100. Figure 1 In the example shown, the pixel portion 100 is connected to a plurality of control lines Lread provided for respective pixel rows including a plurality of pixels P arranged in a horizontal direction (row direction). The control lines Lread are configured to transmit control signals for reading signals from the pixels P.

[0015] For example, each of the multiple control lines Lread provided for each pixel row in the imaging device 1 includes wiring for transmitting a signal for controlling a transfer transistor, wiring for transmitting a signal for controlling a select transistor, wiring for transmitting a signal for controlling a reset transistor, etc. In other words, the control line Lread is a drive line (pixel drive line) that transmits a signal for driving the pixel P.

[0016] The signal line VSL is a signal line capable of transmitting a signal from the pixel P, and is connected to the signal processing section 112 and the pixel P of the pixel section 100. For example, the pixel section 100 is connected to one or more signal lines VSL provided for each pixel column including a plurality of pixels P arranged in the vertical direction (column direction).

[0017] The signal line VSL is a vertical signal line and is configured to transmit a signal output from the pixel P. The imaging device 1 may also be provided with a plurality of signal lines VSL provided for one of the pixel columns. The imaging device 1 may include a plurality of signal lines VSL for each pixel column.

[0018] The pixel driving section 111 is configured to drive each pixel P of the pixel section 100. For example, the pixel driving section 111 is a driving circuit and is implemented by multiple circuits including a buffer, a shift register, an address decoder, and the like. The pixel driving section 111 (pixel driving circuit) generates a signal for driving the pixel P and outputs this signal to each pixel P of the pixel section 100 via a control line Lread. The pixel driving section 111 controls the pixels P of the pixel section 100 under the control of the control section 113.

[0019] For example, the pixel driving section 111 generates signals for controlling the pixels P, such as signals for controlling the transfer transistors of the pixels P, signals for controlling the selection transistors, or signals for controlling the reset transistors, and supplies these signals to each pixel P via the control line Lread. The pixel driving section 111 can control to read out pixel signals from each pixel P. The pixel driving section 111 may also be referred to as a pixel control section configured to control each pixel P. It should be noted that the group of the pixel driving section 111 and the control section 113 may be referred to as a pixel control section.

[0020] The signal processing unit 112 is configured to perform signal processing on the signal of the pixel to be input. The signal processing unit 112 is a signal processing circuit and includes, for example, a load circuit unit, an AD conversion unit, a horizontal selection switch, etc. As an example, the load circuit unit is implemented by a current source that can supply current to the amplifier transistor of the pixel P. For example, the load circuit unit and the amplifier transistor of the pixel P constitute a source follower circuit. It should be noted that the signal processing unit 112 may include an amplifier circuit unit that is configured to amplify the signal read from the pixel P via the signal line VSL.

[0021] The signal processing unit 112 may include multiple AD converters (AD conversion circuits) and output pixel signals converted by the AD converters into digital signals. The AD converter 40 is an analog-to-digital converter (ADC). For example, an AD converter 40 may be provided for each signal line VSL. An AD converter 40 may also be provided for each pixel column in the pixel unit 100.

[0022] The AD converter 40 is configured to convert an input analog signal into a digital signal. The AD converter 40 performs AD conversion processing on the pixel signal, which is an analog signal input from each pixel P via the signal line VSL. For example, the AD converter 40 (AD conversion circuit) may include a comparison circuit (comparator circuit) and a counter to convert the input pixel signal into a digital signal of a predetermined number of bits.

[0023] The signals selected and scanned by the pixel driving section 111 and output from the respective pixels P are input to the signal processing section 112 via the signal lines VSL. For example, the signal processing section 112 may perform signal processing such as AD conversion or correlated double sampling (CDS) on the signals of the pixels P. The signals of the respective pixels P transmitted via the respective signal lines VSL are processed by the signal processing section 112 and output to the processing section 114.

[0024] The processing unit 114 is configured to perform signal processing on the input signals. For example, the processing unit 114 is a processing circuit and is implemented by circuits that perform various types of signal processing on the pixel signals. The processing unit 114 may include a processor and a memory. The processing unit 114 performs signal processing on the pixel signals input from the signal processing unit 112 and outputs the processed pixel signals. For example, the processing unit 114 may perform various types of signal processing such as noise reduction or gamma correction.

[0025] The control section 113 is configured to control various parts of the imaging device 1. The control section 113 can receive a clock supplied from the outside, data for controlling an operation mode, and the like, and can also output data such as internal information of the imaging device 1. For example, the control section 113 is a control circuit and includes a timing generator configured to generate various types of timing signals.

[0026] The control section 113 controls the driving of the pixel driving section 111, the signal processing section 112, etc. based on various types of timing signals (pulse signals, clock signals, etc.) generated by the timing generator. Note that the processing section 114 and the control section 113 may be partially or entirely integrated.

[0027] Figure 3 This figure illustrates an example of the circuit configuration of a pixel of an imaging device according to the first embodiment of the present disclosure. The pixel P of the imaging device 1 includes a photoelectric converter 12 (photoelectric conversion element), a transfer transistor TG, a floating diffusion FD, and a readout circuit 20. The photoelectric converter 12 is configured to receive light and generate a signal. The photoelectric converter 12 is a light receiving unit (light receiving element) capable of generating charge through photoelectric conversion.

[0028] The readout circuit 20 is configured to output a signal based on the photoelectrically converted charge. As an example, the imaging device 1 includes the readout circuit 20 provided for a plurality of pixels P. The imaging device 1 has a configuration in which a plurality of pixels P share one readout circuit 20 .

[0029] exist Figure 3 In the example shown, a readout circuit 20 is configured for every four pixels P (referred to as pixels Pa to Pd). Pixels Pa, Pb, Pc, and Pd share one readout circuit 20. For example, 2×2 pixels including adjacent pixels Pa to Pd share one readout circuit 20.

[0030] The imaging device 1 can read out pixel signals from each of the 2 × 2 pixels by operating the readout circuit 20 in a time-division manner. Furthermore, the imaging device 1 can also read out a pixel signal obtained by summing the pixel signals from each of the 2 × 2 pixels. It should be noted that the imaging device 1 may have a configuration in which five or more pixels P, for example, eight pixels P, share a single readout circuit 20.

[0031] exist Figure 3 In the example shown, the photoelectric conversion unit 12 is a photodiode (PD), and converts incident light into electric charges. Figure 3 In the embodiment, a photodiode PD of each of the pixels Pa to Pd performs photoelectric conversion to generate electric charge corresponding to the amount of received light.

[0032] The pass transistor TG (in Figure 3 In the embodiment of the present invention, transfer transistors TG1 of pixel Pa through TG4 of pixel Pd are configured to transfer charge photoelectrically converted by photoelectric converter 12 to floating diffusion FD. Under the control of signal STG, transfer transistor TG connects or disconnects photoelectric converter 12 from floating diffusion FD. Transfer transistor TG can transfer charge photoelectrically converted and accumulated in photoelectric converter 12 to floating diffusion FD.

[0033] exist Figure 3 In the example shown, the transfer transistors TG of each of pixels Pa to Pd are controlled on / off by different signals. The transfer transistor TG1 of pixel Pa is controlled by signal STG1, and the transfer transistor TG2 of pixel Pb is controlled by signal STG2. In addition, the transfer transistor TG3 of pixel Pc is controlled by signal STG3, and the transfer transistor TG4 of pixel Pd is controlled by signal STG4.

[0034] The floating diffusion FD is an accumulator configured to accumulate transferred charge. The floating diffusion FD can accumulate charge photoelectrically converted by the photoelectric converter 12. The floating diffusion FD can also be referred to as a retention unit capable of retaining the transferred charge. The floating diffusion FD accumulates the transferred charge and converts it into a voltage that depends on the capacitance of the floating diffusion FD.

[0035] As an example, Figure 3 As shown, the readout circuit 20 includes an amplifier transistor AMP, a selection transistor SEL, a transistor FDG, and a reset transistor RST. The amplifier transistor AMP is configured to generate and output a signal based on the charge accumulated in the floating diffusion portion FD. Figure 3 As shown, the amplification transistor AMP has a gate electrically connected to the floating diffusion FD and receiving an input of a voltage converted by the floating diffusion FD.

[0036] The drain of the amplifier transistor AMP is connected to a power supply line supplied with a power supply voltage VDD, and the source of the amplifier transistor AMP is connected to a signal line VSL via a select transistor SEL. The amplifier transistor AMP can generate a signal based on the charge accumulated in the floating diffusion FD, that is, a signal based on the voltage of the floating diffusion FD, and can output the generated signal to the signal line VSL. The amplifier transistor AMP is configured to generate a signal based on the charge converted by the photoelectric converter 12.

[0037] The selection transistor SEL is configured to control the output of a signal from the pixel. The selection transistor SEL is configured to output a signal from the amplifier transistor AMP to the signal line VSL under the control of the signal SSEL. The selection transistor SEL can control the output timing of the pixel signal. The selection transistor SEL is configured to output a signal based on the charge converted by the photoelectric conversion unit 12. It should be noted that the selection transistor SEL can be installed between the amplifier transistor AMP and a power supply line supplied with the power supply voltage VDD. Alternatively, the selection transistor SEL can be omitted if desired.

[0038] As an example, transistor FDG is installed between floating diffusion FD and reset transistor RST. Transistor FDG is configured to electrically connect floating diffusion FD and capacitor C1. For example, under the control of signal SFDG, transistor FDG electrically connects or disconnects floating diffusion FD and capacitor C1.

[0039] When transistor FDG is turned on, a larger capacitance is added to the floating diffusion FD of pixel P, thereby changing the conversion efficiency (gain) when converting charge to voltage. Transistor FDG is a switching transistor that changes the conversion efficiency by switching the capacitance connected to the gate of amplifier transistor AMP.

[0040] The reset transistor RST is configured to reset the voltage of the floating diffusion FD. Figure 3 In the illustrated example, the reset transistor RST is configured to be electrically connected to a power supply line supplied with a power supply voltage VDD, and to reset the charge of the pixel P.

[0041] The reset transistor RST can reset the charge accumulated in the floating diffusion FD and reset the voltage of the floating diffusion FD under the control of the signal SRST. Note that the reset transistor RST can discharge the charge accumulated in the photoelectric conversion unit 12 through the transistor FDG and the transfer transistor TG.

[0042] Each of the transfer transistor TG, the amplification transistor AMP, the selection transistor SEL, the transistor FDG (switching transistor), and the reset transistor RST is a MOS transistor (MOSFET) having gate, source, and drain terminals.

[0043] exist Figure 3 In the example shown, each of the transfer transistor TG, the amplifying transistor AMP, the selecting transistor SEL, the transistor FDG, and the reset transistor RST is implemented by an NMOS transistor. It should be noted that the transistors of the pixel P may also be implemented by a PMOS transistor.

[0044] Pixel driving unit 111 (see Figure 1 ) supplies control signals to the gates of the transfer transistor TG, selection transistor SEL, transistor FDG, reset transistor RST, etc. of each pixel P through the above-mentioned control line Lread, and puts these transistors into an on state (conductive state) or an off state (non-conductive state).

[0045] The multiple control lines Lread of the imaging device 1 include wiring for transmitting a signal STG for controlling the transfer transistor TG, wiring for transmitting a signal SSEL for controlling the selection transistor SEL, wiring for transmitting a signal SFDG for controlling the transistor FDG, wiring for transmitting a signal SRST for controlling the reset transistor RST, and the like.

[0046] The pixel driver 111 controls the on / off state of the transfer transistor TG, the select transistor SEL, the transistor FDG, the reset transistor RST, and the like. The pixel driver 111 controls the readout circuit 20 of each pixel P so that the pixel P outputs a pixel signal to the signal line VSL. The pixel driver 111 can control the pixel signal from each pixel P to be read out to the signal line VSL.

[0047] Figure 4 1 is an explanatory diagram of an example of a cross-sectional configuration of an imaging device according to a first embodiment of the present disclosure. For example, each pixel P of the imaging device 1 has a Figure 4 The imaging device 1 is realized by a substrate 101 including a semiconductor layer 110 and a wiring layer 210. For example, the above-mentioned photoelectric conversion unit 12, the readout circuit 20, etc. are formed in the substrate 101.

[0048] The semiconductor layer 110 is implemented by a semiconductor substrate such as a silicon (Si) substrate. It should be noted that the semiconductor layer 110 can be implemented by a silicon-on-insulator (SOI) substrate, a silicon-germanium (SiGe) substrate, or other compound semiconductor materials.

[0049] like Figure 4 As shown, semiconductor layer 110 includes a first surface 11S1 and a second surface 11S2 that are opposite to each other. Second surface 11S2 is a surface on the side opposite to first surface 11S1. First surface 11S1 of semiconductor layer 110 is a component formation surface on which components such as transistors are formed. First surface 11S1 of semiconductor layer 110 is provided with a gate electrode, a gate insulating film (e.g., a gate oxide film), and the like. Second surface 11S2 of semiconductor layer 110 is a light-receiving surface (light-incident surface).

[0050] The semiconductor layer 110 is provided with a plurality of photoelectric conversion units 12 (photoelectric conversion elements) along the first surface 11S1 and the second surface 11S2 of the semiconductor layer 110. For example, the plurality of photoelectric conversion units 12 are buried in the semiconductor layer 110. The photoelectric conversion units 12 are provided between the first surface 11S1 and the second surface 11S2 of the semiconductor layer 110.

[0051] like Figure 4 As shown, the semiconductor layer 110 has a well 25. For example, the well 25 is an n-type semiconductor region and is an n-type well (n-well). Figure 4 In the illustrated example, the semiconductor layer 110 is provided with a well 25 as an n-type well region. The photoelectric conversion unit 12 includes a portion of the well 25.

[0052] A transfer transistor TG, a floating diffusion portion FD, and the like are provided on the first surface 11S1 side of the semiconductor layer 110. Figure 4 As shown, for example, the floating diffusion FD includes an n+ type semiconductor region.

[0053] For example, the wiring layer 210 includes a conductive film and an insulating film, and also includes a plurality of wirings, through-holes (VIAs), an interlayer insulating film, and the like. For example, the wirings of the wiring layer 210 are formed using a metal material such as aluminum (Al), copper (Cu), or tungsten (W). The wirings of the wiring layer 210 may also be formed using other conductive materials. For example, the interlayer insulating film may be formed using silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), or the like.

[0054] At least a portion of the readout circuit 20 is provided in the wiring layer 210. The wiring layer 210 has an element formation region in which the transistors of the readout circuit 20 are formed. For example, the transistors of the readout circuit 20 are provided in the wiring layer 210 as thin film transistors (TFTs).

[0055] In the imaging device 1, some or all of the transistors in the readout circuit 20 may be configured as thin film transistors and may be arranged in the wiring layer 210. For example, among the plurality of transistors in the readout circuit 20, some transistors may be arranged in the wiring layer 210, while other transistors may be arranged in the semiconductor layer 110.

[0056] exist Figure 4 In the illustrated example, among the plurality of transistors of the readout circuit 20 , the transistor FDG, the reset transistor RST, and the selection transistor SEL are provided in the wiring layer 210 . In addition, the amplifier transistor AMP is provided on the first surface 11S1 side of the semiconductor layer 110 .

[0057] The transistor FDG includes a semiconductor region 31a, an electrode 32a, an electrode 32b, a gate insulating film 41a, and a gate electrode 42a. The reset transistor RST includes a semiconductor region 31b, an electrode 32b, an electrode 32c, a gate insulating film 41b, and a gate electrode 42b. The select transistor SEL includes a semiconductor region 31c, an electrode 32d, an electrode 32e, a gate insulating film 41c, and a gate electrode 42c.

[0058] The wiring layer 210 includes a semiconductor region 31a, a semiconductor region 31b, and a semiconductor region 31c provided on an insulating film (interlayer insulating film) serving as a base film in the wiring layer 210. Alternatively, the semiconductor region 31a, the semiconductor region 31b, and the semiconductor region 31c may be provided to replace a portion of the wiring layer 210.

[0059] For example, the insulating film (interlayer insulating film) of the wiring layer 210 is formed using TEOS, silicon nitride (SiN), silicon oxide (SiO), or the like. Alternatively, for example, the insulating film of the wiring layer 210 can be formed using SiCN, SiCON, HfO2, Al2O3, ZrO2, or the like. Note that the insulating film of the wiring layer 210 can also be formed using other insulating materials. The insulating film of the wiring layer 210 also serves as a passivation film (protective film) for the thin film transistors and is formed so as to surround each thin film transistor.

[0060] Each of the semiconductor regions 31a, 31b, and 31c is a region in which a channel is formed (channel region). Each of the semiconductor regions 31a, 31b, and 31c is formed using a two-dimensional material (e.g., MoS2, WS2, MoSe2, WSe2, or HfS2), an oxide semiconductor (e.g., InGaZnO, InZnO, ZnO, SnO, or TiO2), or the like.

[0061] It should be noted that each of the semiconductor regions 31a, 31b and 31c can be formed by using an organic semiconductor (e.g., fullerene, pentacene or rubrene), carbon nanotubes, hydrogenated amorphous silicon, low-temperature polysilicon, etc. as a channel material.

[0062] The electrode 32a and the electrode 32b are the source electrode and the drain electrode of the transistor FDG. One of the electrodes 32a and 32b is the source electrode of the transistor FDG. The other of the electrodes 32a and 32b is the drain electrode of the transistor FDG.

[0063] In addition, the electrode 32b and the electrode 32c are the source electrode and the drain electrode of the reset transistor RST. One of the electrodes 32b and 32c is the source electrode of the reset transistor RST. The other of the electrodes 32b and 32c is the drain electrode of the reset transistor RST.

[0064] The electrode 32d and the electrode 32e are the source electrode and the drain electrode of the selection transistor SEL. One of the electrodes 32d and 32e is the source electrode of the selection transistor SEL. The other of the electrodes 32d and 32e is the drain electrode of the selection transistor SEL.

[0065] For example, each of the electrodes 32a, 32b, 32c, 32d, and 32e is formed using a metal material such as copper (Cu), tungsten (W), ruthenium (Ru), or cobalt (Co). It should be noted that the electrodes 32a, 32b, 32c, 32d, and 32e can be formed using other conductive materials. The electrodes 32a to 32e can be implemented using a low-resistance conductive material.

[0066] The electrode 32 a of the transistor FDG is connected to a through-hole 51 (also referred to as a contact) provided in the wiring layer 210, and is electrically connected to the floating diffusion FD through the through-hole 51. The electrode 32 a of the transistor FDG is also connected to a through-hole 52 (contact) provided in the wiring layer 210, and is electrically connected to the gate electrode 45 of the amplifier transistor AMP through the through-hole 52.

[0067] The electrode 32d of the selection transistor SEL is connected to a through-hole 53 (contact portion) provided in the wiring layer 210, and is electrically connected to the semiconductor region 35 of the amplifier transistor AMP through the through-hole 53. The semiconductor region 35 is, for example, an n+ type semiconductor region formed by using an n-type impurity, and is a source region of the amplifier transistor AMP.

[0068] For example, each of the through holes 51, 52, and 53 is formed using a metal material such as gold (Au), platinum (Pt), palladium (Pd), copper (Cu), titanium (Ti), tungsten (W), titanium nitride (TiN), tantalum nitride (TaN), titanium aluminide (TiAl), bismuth (Bi), indium (In), aluminum (Al), scandium (Sc), cobalt (Co), or molybdenum (Mo). Note that the through holes 51, 52, and 53 may be formed using other conductive materials.

[0069] For example, each of the gate insulating films 41a, 41b, and 41c is implemented by silicon oxide (SiO), silicon nitride (SiN), or the like. Alternatively, for example, each of the gate insulating films 41a, 41b, and 41c is formed by using an insulating material such as Al2O3, HfO2, ZrO2, LaO2, HfSiO, Y2O3, or SiON. Note that the gate insulating films 41a to 41c may be implemented by other insulating materials.

[0070] For example, each of the gate electrodes 42 a, 42 b, and 42 c is formed using a metal material such as Au, Pt, Cu, Ti, W, Pd, TiN, TaN, TiAl, Bi, In, Al, Sc, Co, or Mo. The gate electrodes 42 a, 42 b, and 42 c can be formed using other conductive materials. Note that the vias (contact portions) connected to the respective gate electrodes 42 a to 42 c can be formed using the same type of material as the vias 51 to 53.

[0071] As described above, the wiring layer 210 of the imaging device 1 according to this embodiment is provided with transistors of at least a portion of the pixels P. The transfer transistor TG, the amplifying transistor AMP, the selecting transistor SEL, the transistor FDG, the reset transistor RST, and the like are distributed to different layers including the semiconductor layer 110 and the wiring layer 210. This allows the imaging device 1 to have a configuration that is advantageous in terms of miniaturization.

[0072] According to this embodiment, at least some of the transistors in readout circuit 20 are provided as thin-film transistors (TFTs) in wiring layer 210. This reduces the footprint of each transistor in readout circuit 20. Consequently, an area for forming photoelectric converter 12 can be reserved, and its quantum efficiency can be improved.

[0073] Furthermore, compared to a case where all transistors of the pixel P are provided in a semiconductor layer, the area of ​​the region for arranging transistors in the pixel P can be increased. This makes it possible to increase the size of the transistors of the pixel P. The area (for example, gate width or gate length) of transistors such as the amplifier transistor AMP of the readout circuit 20 can be increased, and noise mixed into the pixel signal can be reduced.

[0074] The characteristics of the transistors of the readout circuit 20 (e.g., the amplifier transistor AMP, the select transistor SEL, the transistor FDG, and the reset transistor RST) can be improved. Therefore, it is possible to suppress degradation in the quality of the pixel signal. This makes it possible to suppress degradation in the image quality of an image generated using the pixel signal.

[0075] In addition, compared to a case where the transistors of the pixel P are stacked in a manner such that the transistors are distributed to different semiconductor substrates, the number of steps in the manufacturing process can be reduced, and an increase in the manufacturing cost of the imaging device 1 can be prevented. It is also possible to prevent the semiconductor layer 110 including the photoelectric conversion unit 12 from being subjected to unnecessary high-temperature processing.

[0076] Furthermore, the imaging device 1 can electrically connect the transistors provided in the semiconductor layer 110 to the transistors provided in the wiring layer 210 via the wiring of the wiring layer 210. This can improve the degree of freedom in layout. Compared to a case where the transistors of the pixels P are connected via through electrodes that penetrate the semiconductor substrate, this can prevent unnecessary parasitic resistance or parasitic capacitance from being added to the signal path. This can suppress degradation of signal quality.

[0077] Figure 5 1 is a diagram showing an example of a cross-sectional configuration of an imaging device according to the first embodiment. Figure 5 As shown, the imaging device 1 includes a substrate 101 and a substrate 102. The substrate 101 includes a light guide portion 80, a semiconductor layer 110, and a wiring layer 210. The substrate 102 includes a semiconductor layer 120 and a wiring layer 220.

[0078] The imaging device 1 has a structure in which a light guide 80, a semiconductor layer 110, a wiring layer 210, a wiring layer 220, and a semiconductor layer 120 are stacked in the Z-axis direction. The light guide 80, the semiconductor layer 110, the wiring layer 210, the wiring layer 220, and the semiconductor layer 120 are arranged from the light incident side. The semiconductor layer 110 and the semiconductor layer 120 are implemented by respective semiconductor substrates (e.g., a silicon substrate or an SOI substrate).

[0079] exist Figure 5In the illustrated example, the light guide 80 is provided on the second surface 11S2 side of the semiconductor layer 110. The wiring layer 210 is provided on the first surface 11S1 side of the semiconductor layer 110. The light guide 80 is provided on the side where light enters from the optical system, and the wiring layer 210 is provided on the side opposite to the light entrance side. The imaging device 1 is a so-called back-illuminated imaging device.

[0080] The wiring layer 210 is a multilayer wiring layer including a first wiring layer 211 and a second wiring layer 212. For example, each of the first wiring layer 211 and the second wiring layer 212 includes a conductive film and an insulating film, and also includes a plurality of wiring lines, vias, an interlayer insulating film, and the like. The wiring layer 210 (multilayer wiring layer) is provided with transistors of at least a portion of the readout circuit 20 described above as thin film transistors.

[0081] For example, the first wiring layer 211 is a wiring layer formed using a middle-of-line (MOL) process. The first wiring layer 211 includes a contact interlayer film and may also be referred to as an MOL layer (or MOL wiring layer). Furthermore, for example, the second wiring layer 212 is a wiring layer formed using a back-end-of-line (BEOL) process and may also be referred to as a BEOL layer (or BEOL wiring layer).

[0082] Light guide 80 is stacked on semiconductor layer 110 in a thickness direction perpendicular to second surface 11S2 of semiconductor layer 110. Light guide 80 includes lens 81 and filter 82, and guides incident light toward semiconductor layer 110. Photoelectric converter 12 performs photoelectric conversion on light incident through lens 81 and filter 82.

[0083] For example, a lens (lens portion) 81 is provided on the second surface 11S2 side of the semiconductor layer 110 for each pixel P or for a plurality of pixels P. The lens 81 is an optical component also called an on-chip lens. The lens 81 receives light incident from an object through an optical system such as an imaging lens.

[0084] The filter 82 is configured to selectively transmit light of a specific wavelength band among incident light. The filter 82 is a color filter (R, G, or B), a complementary color filter, an infrared light transmitting filter, or other filter, and is provided between the lens 81 and the semiconductor layer 110 .

[0085] For example, a filter 82 is provided on the second surface 11S2 side of the semiconductor layer 110 for each pixel P or for a plurality of pixels P. It should be noted that the filter 82 can be omitted from the imaging device 1 if necessary. The filter 82 does not need to be provided for some or all of the pixels P of the imaging device 1. For example, the filter 82 does not need to be provided for the pixels P that receive white light (W) and perform photoelectric conversion.

[0086] In addition, if Figure 5 As shown in the example of FIG. 1 , the imaging device 1 is provided with a partition 70. The partition 70 is provided between adjacent photoelectric conversion sections 12 in the semiconductor layer 110 to separate the photoelectric conversion sections 12 from each other. The partition 70 is formed by using a groove (groove section) provided at the boundary between adjacent pixels P.

[0087] As an example, the separator 70 is provided so as to penetrate the semiconductor layer 110. For example, the separator 70 is provided so as to surround each photoelectric conversion unit 12 in the semiconductor layer 110. As an example, an insulating film such as an oxide film (e.g., a silicon dioxide film) or a nitride film (e.g., a silicon nitride film) is provided within the trench of the separator 70. It should be noted that polysilicon, a metal material, or the like may be embedded in the trench of the separator 70.

[0088] The partition 70 can suppress the charge photoelectrically converted by the photoelectric converter 12 of the pixel P from leaking into the surrounding pixels P. It can also suppress the leakage of light into the surrounding pixels P. It should be noted that a partition forming a potential barrier can be arranged between a plurality of adjacent photoelectric converters 12 as the partition 70 to electrically separate the adjacent photoelectric converters 12 from each other.

[0089] For example, the wiring layer 220 includes a conductive film and an insulating film, and also includes a plurality of wirings, through-holes, an interlayer insulating film, and the like. The wiring layer 220 is a multilayer wiring layer and is stacked on the semiconductor layer 120. For example, the wiring of the wiring layer 220 is formed by using a metal material such as aluminum, copper, or tungsten. The wiring of the wiring layer 220 can be formed by using other conductive materials. For example, the interlayer insulating film is formed by using an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0090] Second wiring layer 212 is provided with a plurality of electrodes 91. Wiring layer 220 is provided with a plurality of electrodes 92. Electrodes 91 and 92 are formed, for example, using copper (Cu). Electrodes 91 and 92 are electrodes used to bond metal electrodes and can also be referred to as bonding electrodes. For example, substrates 101 and 102 are bonded using so-called Cu-Cu bonding, which is bonding between metal electrodes (electrodes 91 and 92) made of Cu.

[0091] The circuits of substrate 101 and substrate 102 are electrically connected via electrodes 91 and 92. For example, the semiconductor layer 120 and wiring layer 220 are provided with the signal processing unit 112 including the AD converter 40. The semiconductor layer 120 and wiring layer 220 may also be provided with a pixel driver 111, a control unit 113, a processing unit 114, and the like. The semiconductor layer 120 and wiring layer 220 may also be provided with other circuits such as a memory, a processor, a power supply circuit, or an interface circuit.

[0092] Note that, for example, the electrodes 91 of the second wiring layer 212 and the electrodes 92 of the wiring layer 220 may be implemented by metal materials other than copper, such as nickel (Ni), cobalt (Co), or gold (Au). Alternatively, the substrates 101 and 102 may be stacked using bumps.

[0093] In the imaging device 1, at least some of the transistors in the readout circuit 20 are provided as thin film transistors (TFTs) in the wiring layer 210. The transistors of the readout circuit 20 can be allocated to different wiring layers including the first wiring layer 211 (MOL layer) and the second wiring layer 212 (BEOL layer). Figure 5 In the example shown, the first wiring layer 211 is provided with the pixel transistor 15a, and the second wiring layer 212 is provided with the pixel transistor 15b. Each of the pixel transistors 15a and 15b can be configured as a thin film transistor.

[0094] The imaging device 1 includes a plurality of pixel transistors 15 a and a plurality of pixel transistors 15 b provided for each pixel P or for a plurality of pixels P. Each of the pixel transistors 15 a and 15 b is a transistor of the above-mentioned readout circuit 20. The pixel transistors 15 a and 15 b function as an amplifier transistor AMP, a selection transistor SEL, a transistor FDG, a reset transistor RST, and the like.

[0095] The pixel transistor 15a is located in the first wiring layer 211 and is provided at a different layer than the transfer transistor TG. Furthermore, the pixel transistor 15b is located in the second wiring layer 212 and is provided at a different layer than the transfer transistor TG or the pixel transistor 15a. It can be said that the pixel transistor 15b is provided in the upper portion of the wiring layer 210 serving as a multi-layer wiring layer, while the pixel transistor 15a is provided in the lower portion of the wiring layer 210.

[0096] As an example, each of the transistors of the readout circuit 20, such as the amplifier transistor AMP, the selection transistor SEL, the transistor FDG, or the reset transistor RST, can be allocated as the pixel transistor 15a of the first wiring layer 211 or the pixel transistor 15b of the second wiring layer 212 and shared by multiple pixels P.

[0097] It should be noted that the transistors of the readout circuit 20 can be allocated to only one of the first wiring layer 211 (MOL layer) and the second wiring layer 212 (BEOL layer). Among the amplifier transistor AMP, select transistor SEL, transistor FDG, reset transistor RST, and other transistors in the readout circuit 20, at least some of these transistors can be arranged only in the first wiring layer 211 or only in the second wiring layer 212.

[0098] Each of the pixel transistors 15a and 15b may have a planar structure or a three-dimensional structure. Figure 5 In the example shown, each of the pixel transistors 15a and 15b is a planar transistor. Each of the pixel transistors 15a and 15b can also be a vertical transistor.

[0099] As described above, according to this embodiment, at least a portion of the transistors in the readout circuit 20 are arranged in the wiring layer 210. For example, the transistors of the readout circuit 20 are arranged as pixel transistors 15a or pixel transistors 15b in the first wiring layer 211 and the second wiring layer 212. This allows the imaging device 1 to have a configuration that is advantageous in terms of miniaturization of pixels. This enables the realization of a high-performance imaging device 1 while avoiding an increase in the area occupied by the transistors in the pixels.

[0100] Figure 6 and Figure 7 It is an explanatory diagram of an example of a planar configuration of the imaging apparatus according to the first embodiment. Figure 6 An example of a planar configuration on the first surface 11S1 side of the semiconductor layer 110 of the imaging device 1 is shown. Figure 7 An example of a planar configuration of the wiring layer 210 of the imaging device 1 is shown.

[0101] like Figure 6 and Figure 7 As shown in the example of FIG, among the multiple transistors of the readout circuit 20, the amplifier transistor AMP can be arranged on the first surface 11S1 side of the semiconductor layer 110, and the transistor FDG, the reset transistor RST, and the select transistor SEL can be arranged as thin film transistors (TFTs) in the wiring layer 210. In this case, the area where the amplifier transistor AMP is arranged can be sufficiently increased.

[0102] like Figure 6 As shown in the example of FIG. 1 , it is also possible to provide a plurality of amplifier transistors AMP ( Figure 6 The readout circuit 20 can generate a pixel signal using the amplifier transistors AMP1 to AMP4 connected in parallel, and output the pixel signal to the signal line VSL via the selection transistor SEL of the wiring layer 210. This reduces noise that may be incorporated into the pixel signal.

[0103] As above Figure 5As described above, for example, the transistor FDG, the reset transistor RST, and the selection transistor SEL of the readout circuit 20 may be distributed to a plurality of wiring layers including the first wiring layer 211 and the second wiring layer 212 .

[0104] It should be noted that the layout positions, shapes, etc. of the transistors of the readout circuit 20 are not limited to those described in the above examples, but can be modified as appropriate. Figure 8 As shown, the amplifier transistor AMP, the transistor FDG, the reset transistor RST, and the selection transistor SEL may be provided in the wiring layer 210 .

[0105] [Function and Effect] The light detection device according to this embodiment includes: a first substrate (substrate 101) including a photoelectric conversion element (photoelectric conversion unit 12) that performs photoelectric conversion on light, and a readout circuit (readout circuit 20) configured to output a first signal based on the charge converted by the photoelectric conversion element; and a second substrate (substrate 102) laminated on the first substrate and including a signal processing circuit (e.g., signal processing unit 112) configured to perform signal processing on the first signal. The first substrate includes a semiconductor layer (semiconductor layer 110) and a wiring layer (wiring layer 210). The readout circuit includes a first transistor (e.g., an amplifier transistor AMP, a select transistor SEL, a transistor FDG, or a reset transistor RST) disposed in the wiring layer.

[0106] In the light detection device (imaging device 1) according to this embodiment, at least a portion of the transistors in the readout circuit 20 are provided in the wiring layer 210. This allows the imaging device 1 to have a configuration that is advantageous in terms of miniaturization of pixels. This enables the realization of a light detection device that is advantageous in terms of miniaturization.

[0107] Next, a modification of the present disclosure will be described. Hereinafter, structural elements similar to those of the above embodiment will be denoted by the same reference numerals as those of the above embodiment, and repeated descriptions will be omitted as appropriate.

[0108] <2. Modifications> (2-1. Modification 1) In the above-described embodiment, there has been described an example of the configuration of the transistor of the pixel P. However, the configuration of the transistor of the pixel P is not limited to the above-described example. Figure 9A and Figure 9B 1 is an explanatory diagram of a configuration example of an imaging device according to a modification example 1 of the present disclosure. Figure 9A or Figure 9B As shown in the example of FIG. 1 , the readout circuit 20 may include two amplifier transistors AMP ( Figure 9A and Figure 9B Amplifying transistor AMP1 and amplifying transistor AMP2 in it).

[0109] The amplifying transistor AMP1 and the amplifying transistor AMP2 enable pixel signals to be generated and output. This enables noise mixed into the pixel signal to be reduced. Figure 9A As shown, the transistor FDG and the reset transistor RST may be configured in the semiconductor layer 110, and the selection transistor SEL may be configured in the wiring layer 210. Alternatively, for example, as Figure 9B As shown, the transistor FDG and the selection transistor SEL may be configured in the semiconductor layer 110 , and the reset transistor RST may be configured in the wiring layer 210 .

[0110] (2-2. Modification 2) Figure 10 2 is an explanatory diagram of a configuration example of an imaging device according to Modification 2. The plurality of thin film transistors of the wiring layer 210 may be configured to share a common electrode (source electrode or drain electrode).

[0111] like Figure 10 As shown in the example of , for example, the source electrode (or drain electrode) of the transistor FDG and the reset transistor RST can be integrated. In addition, the source electrode (or drain electrode) of the amplifier transistor AMP and the select transistor SEL can be integrated. This makes it possible to suppress the increase in pixel size.

[0112] like Figure 11 As shown in the schematic example, the thin film transistor ( Figure 11 The pixel transistor 15a in FIG. 1 may be a vertical transistor. For example, the thin film transistor may be a gate-all-around (GAA) TFT having a structure in which a gate surrounds a channel region.

[0113] For example, the thin film transistor may be a channel-all-around (CAA) TFT having a structure in which a channel region surrounds a gate electrode. By configuring the transistors of the readout circuit 20 as vertical transistors, the occupied area of ​​the transistors can be further reduced.

[0114] (2-3. Modification 3) In the above embodiment, an example of the imaging device 1 having a stacked structure in which the substrate 101 and the substrate 102 are stacked has been described. However, the photoelectric conversion unit 12, the readout circuit 20, the pixel driving unit 111, the signal processing unit 112, and the like of each pixel P may be provided on a single substrate. For example, the pixel unit 100, the pixel driving unit 111, the signal processing unit 112, and the like may be provided on the substrate 101 including the semiconductor layer 110 and the wiring layer 210.

[0115] <3. Second Implementation Plan> Next, a second embodiment of the present disclosure will be described. Hereinafter, structural elements similar to those of the above embodiment will be denoted by the same reference numerals as those of the above embodiment, and repeated descriptions will be omitted as appropriate.

[0116] Figure 12 1 is an explanatory diagram of an example of a cross-sectional configuration of an imaging device according to a second embodiment of the present disclosure. The imaging device 1 includes a plurality of conductors 60 ( Figure 12 60a and 60b in FIG. Figure 12 As shown in the example of , the imaging device 1 may include a conductor 60 arranged around a transistor provided in the wiring layer 210 .

[0117] In the imaging device 1, at least a part of the transistors in the pixel P is provided in the wiring layer 210. Figure 12 In the illustrated example, among the plurality of transistors of the readout circuit 20, the transistor FDG, the reset transistor RST, and the select transistor SEL are provided in the wiring layer 210. The amplifier transistor AMP is provided on the first surface 11S1 side of the semiconductor layer 110. In addition, the transfer transistor TG is provided on the first surface 11S1 side of the semiconductor layer 110.

[0118] For example, the wiring layer 210 includes transistors for the pixels P, which are provided as thin-film transistors (TFTs) stacked on the conductor 60. For example, a predetermined potential (voltage) is supplied to the conductor 60 via wiring, vias, and the like in the wiring layer 210. The conductor 60 is a shielding portion and can be referred to as a shielding region (or shielding layer).

[0119] For example, the conductor 60 is provided below the channel region of the transistor in the wiring layer 210. The conductor 60 is arranged below the channel region of the transistor and along the channel region. For example, the conductor 60 extends in the X-axis direction and the Y-axis direction to cover the channel region of the transistor in the wiring layer 210 from the semiconductor layer 110 side.

[0120] Conductor 60 ( Figure 12 Conductors 60a and 60b in the figure are implemented by polycrystalline silicon (Poly-Si), a semiconductor material doped with impurities, a metal material, or the like. For example, conductor 60 can be implemented by polycrystalline silicon containing phosphorus (P), arsenic (As), or boron (B) as an impurity. Conductor 60 can also be implemented by silicon that has been partially (e.g., on the surface side) or completely silicided using titanium (Ti), cobalt (Co), nickel (Ni), platinum (Pt), or the like.

[0121] Alternatively, for example, the conductor 60 may be formed using a metal material such as tungsten (W), titanium (Ti), titanium nitride (TiN), tantalum nitride (TaN), copper (Cu), aluminum (Al), cobalt (Co), or nickel (Ni). The conductor 60 may be formed using other conductive materials.

[0122] exist Figure 12 In the illustrated example, the conductor 60a is provided opposite to the transistor FDG and the reset transistor RST of the readout circuit 20. The transistor FDG and the reset transistor RST are stacked in the wiring layer 210 opposite to the conductor 60a.

[0123] For example, Figure 12 As shown in the example of FIG, conductor 60 a is formed below both semiconductor region 31 a and semiconductor region 31 b. Semiconductor region 31 a serves as the channel region of transistor FDG. Semiconductor region 31 b serves as the channel region of reset transistor RST. A portion of conductor 60 a is located below semiconductor region 31 a, and another portion of conductor 60 a is located below semiconductor region 31 b.

[0124] exist Figure 12 In the example shown, the conductor 60a is arranged between the transistor FDG (or the reset transistor RST) and the transfer transistor TG provided on the first surface 11S1 side of the semiconductor layer 110. As an example, Figure 12 As shown, the conductor 60 a is formed between the transistor FDG (or the reset transistor RST) and the transfer transistor TG such that the conductor 60 a covers the lower portion (bottom) of each of the semiconductor regions 31 a and 31 b .

[0125] Figure 13 1 is an explanatory diagram of an example of a planar configuration of an imaging device according to the second embodiment. Figure 12 or Figure 13 As shown, the conductor 60a is provided across the entire reset transistor RST and the entire transistor FDG and extends in the X-axis direction and the Y-axis direction. The size (width, area, etc.) of the conductor 60a is larger than the size of the semiconductor regions 31a and 31b.

[0126] like Figure 12 As shown in the example of FIG, the conductor 60b is provided opposite to the selection transistor SEL. The selection transistor SEL is stacked opposite to the conductor 60b in the wiring layer 210. For example, the conductor 60b is formed along the semiconductor region 31c below the semiconductor region 31c serving as the channel region of the selection transistor SEL.

[0127] The conductor 60b may be disposed between the selection transistor SEL and the amplifier transistor AMP provided on the first surface 11S1 side of the semiconductor layer 110. As an example, the conductor 60b is formed between the selection transistor SEL and the amplifier transistor AMP so as to cover the lower portion (bottom) of the semiconductor region 31c.

[0128] In addition, for example, Figure 12 or Figure 13 As shown, the conductor 60b is provided across the entire selection transistor SEL and extends in the X-axis direction and the Y-axis direction. The size (width, area, etc.) of the conductor 60b is larger than the size of the semiconductor region 31c.

[0129] For example, Figure 13 As shown, the gate electrode 42a of the transistor FDG and the gate electrode 42b of the reset transistor RST are respectively provided so as to overlap with the conductor 60a. The conductor 60a and the gate electrode 42a of the transistor FDG face each other via the semiconductor region 31a. The conductor 60a and the gate electrode 42b of the reset transistor RST face each other via the semiconductor region 31b.

[0130] In addition, for example, Figure 13 As shown, the selection transistor SEL includes a gate electrode 42c that overlaps a portion of the conductor 60b. The conductor 60b and the gate electrode 42c of the selection transistor SEL face each other with the semiconductor region 31c interposed therebetween.

[0131] exist Figure 13 In the example shown, the conductor 60a is larger than the gate electrode 42a of the transistor FDG and the gate electrode 42b of the reset transistor RST. In addition, the conductor 60b is larger than the gate electrode 42c of the select transistor SEL.

[0132] For example, a predetermined potential (voltage) is supplied to the conductor 60 through the wiring, through-holes, etc. of the wiring layer 210. The conductor 60 is a shielding member that can be electrically connected to the wiring, etc. that is supplied with a certain amount of voltage. Figure 12 In the illustrated example, the conductor 60 a is connected to a through-hole 54 (contact portion) provided in the wiring layer 210 , and is electrically connected to the semiconductor region 36 through the through-hole 54 .

[0133] The conductor 60b is connected to the through hole 55 (contact portion) provided in the wiring layer 210, and is electrically connected to the semiconductor region 37 through the through hole 55. For example, the through hole 54 and the through hole 55 are formed by using the same material as the through holes 51 to 53. The semiconductor region 36 and the semiconductor region 37 are provided in the well 26 of the semiconductor layer 110.

[0134] For example, well 26 is a p-type semiconductor region and is a p-type well (p-well). The semiconductor layer 110 of the imaging device 1 is provided with well 26, which is a p-type well region. Semiconductor regions 36 and 37 are semiconductor regions having the same conductivity type as well 26 and are provided on the first surface 11S1 side of the semiconductor layer 110. Semiconductor regions 36 and 37 are provided within well 26 and are electrically connected to well 26.

[0135] exist Figure 12 In the illustrated example, semiconductor regions 36 and 37 are p+ type semiconductor regions formed using p-type impurities. For example, the impurity concentration of each of semiconductor regions 36 and 37 is higher than the impurity concentration of well 26. For example, semiconductor regions 36 and 37 are provided for each pixel P or for a plurality of pixels P.

[0136] A reference potential, such as a ground potential (GND potential), is supplied to semiconductor regions 36, 37, and well 26 via wiring, vias, and the like in wiring layer 210. As an example, a voltage VSS (e.g., 0 V), which is a ground potential, is supplied to semiconductor regions 36, 37, and well 26. Semiconductor regions 36 and 37 can be referred to as well contact regions. Vias 54 and 55 can be referred to as well contacts or well taps.

[0137] For example, conductor 60a is electrically connected to through-hole 54 and semiconductor region 36 and is supplied with a ground potential (GND potential). Furthermore, conductor 60b is electrically connected to through-hole 55 and semiconductor region 37 and is supplied with a ground potential. Note that conductors 60a and 60b may be supplied with a potential different from the ground potential. The imaging device 1 according to this embodiment includes conductor 60, which enables crosstalk to be suppressed.

[0138] If the imaging device 1 does not include the conductor 60, there is a possibility that crosstalk between transistors in the semiconductor layer or between wiring layers in the wiring layer may increase. For example, there is a possibility that changes (migration) in the potential of the gate electrode provided on the first surface 11S1 side of the semiconductor layer 110, changes in the potential of wiring provided on the lower side of the wiring layer 210, or other changes may adversely affect the channel region of the transistors in the wiring layer 210. In this case, for example, noise may be mixed into the pixel signal, potentially degrading the pixel signal quality. It is also considered that this may also impose design restrictions on the layout of the transistors.

[0139] Therefore, as described above, the imaging device 1 according to this embodiment is provided with the conductors 60. The wiring layer 210 is provided with the conductors 60 corresponding to the transistors of the pixels P. This makes it possible to suppress crosstalk and reduce noise mixed into the pixel signal. By using the conductors 60, the design freedom of the transistors and the like can be increased. This makes it possible to prevent the increase in pixel size due to design restrictions on the transistor layout.

[0140] The imaging device 1 includes the conductor 60 a or conductor 60 b corresponding to the transistor (e.g., transistor FDG, reset transistor RST, or select transistor SEL) provided in the wiring layer 210. This makes it possible to reduce adverse effects on the transistors of the wiring layer 210. For example, changes in the potential of the gate electrode 46 or gate electrode 45 can reduce adverse effects on the transistor FDG, reset transistor RST, select transistor SEL, etc. This enables stable operation of the transistors.

[0141] [Function and Effect] The light detection device according to this embodiment includes: a first substrate (substrate 101) including a photoelectric conversion element (photoelectric conversion unit 12) that performs photoelectric conversion on light, and a readout circuit (readout circuit 20) configured to output a first signal based on the charge converted by the photoelectric conversion element; and a second substrate (substrate 102) stacked on the first substrate and including a signal processing circuit (e.g., signal processing unit 112) configured to perform signal processing on the first signal. The first substrate includes a semiconductor layer (semiconductor layer 110) and a wiring layer (wiring layer 210). The readout circuit includes a first transistor disposed in the wiring layer. The wiring layer includes a conductor (conductor 60) disposed between the semiconductor layer and the first transistor. The first transistor is stacked relative to the conductor.

[0142] The light detection device (imaging device 1) according to this embodiment includes conductors 60 (e.g., conductors 60a and 60b) disposed between the semiconductor layer 110 and the transistors of the readout circuit 20 (e.g., the select transistor SEL, the transistor FDG, and the reset transistor RST). This suppresses the generation of crosstalk. Consequently, a light detection device advantageous in miniaturization can be realized.

[0143] <4. Modifications> (4-1. Modification 4) Figure 14 and Figure 15 : is an explanatory diagram of a configuration example of an imaging device according to a modification example 4 of the present disclosure. Figure 14As shown in the dotted-line box in FIG, the conductor 60 can be electrically connected to a wiring, a through-hole, etc. supplied with a predetermined potential. For example, the wiring layer 210 can include conductors 60a and 60b electrically connected to a ground line (ground line).

[0144] exist Figure 14 or Figure 15 In the example shown, the conductor 60 a is electrically connected to a wiring, a via, or the like supplied with a voltage VSS (e.g., 0 V), which is a ground potential, and is supplied with the voltage VSS. Furthermore, the conductor 60 b is electrically connected to a wiring, a via, or the like supplied with the voltage VSS and is supplied with the voltage VSS.

[0145] Figure 16 and Figure 17 1 is an explanatory diagram of another configuration example of an imaging device according to Modification Example 4. Figure 16 or Figure 17 As shown in the example of FIG, the conductor 60a can be electrically connected to the semiconductor region 36 arranged in the well 26 and can be electrically connected to the wiring supplied with the voltage VSS. In addition, the conductor 60b can be electrically connected to the semiconductor region 37 arranged in the well 26 and can be electrically connected to the wiring supplied with the voltage VSS.

[0146] When using the imaging device 1 according to this modification, crosstalk can be suppressed and degradation of pixel signal quality can be suppressed. This modification also achieves similar effects to those of the above-described embodiment. It should be noted that the imaging device 1 may include only one of the conductors 60a and 60b.

[0147] (4-2. Modification 5) Figure 18 1 is an explanatory diagram of a configuration example of an imaging device according to Modification 5. The imaging device 1 may be configured to control the voltage supplied to the conductor 60. The conductor 60 provided for the transistor in the wiring layer 210 may be electrically connected to the gate electrode of the corresponding transistor.

[0148] For example, the imaging device 1 can utilize the insulating film (interlayer insulating film) of the wiring layer 210 below the channel region as a gate insulating film, and can be provided with the conductor 60 as a back gate electrode. Therefore, the conductor 60 can be used as a back gate electrode, which allows the transistor of the wiring layer 210 to have a dual-gate structure.

[0149] For example, Figure 18 As shown in the example of , the imaging device 1 may include a conductor 60a1, a conductor 60a2, and a conductor 60b. The conductor 60a1 is provided for the transistor FDG. The conductor 60a2 is provided for the reset transistor RST. In addition, the conductor 60b is provided relative to the selection transistor SEL.

[0150] exist Figure 18 In the illustrated example, a gate insulating film 43a is provided below the channel region (semiconductor region 31a) of transistor FDG. For example, gate insulating film 43a is implemented by the insulating film of wiring layer 210 and is formed between semiconductor region 31a and conductor 60a1. Conductor 60a1 is provided below gate insulating film 43a.

[0151] The transistor FDG may include a gate insulating film 43a and a conductor 60a1 serving as a back gate, and may have a double gate structure. Figure 18 As shown in the example of FIG, the conductor 60a1 is electrically connected to the gate electrode 42a of the transistor FDG via the wiring 95 of the wiring layer 210. The transistor FDG is controlled to be on / off by a signal voltage supplied to the wiring 95.

[0152] In addition, Figure 18 In the illustrated example, a gate insulating film 43b is provided below the channel region (semiconductor region 31b) of the reset transistor RST. For example, the gate insulating film 43b is implemented by the insulating film of the wiring layer 210 and is formed between the semiconductor region 31b and the conductor 60a2. The conductor 60a2 is provided below the gate insulating film 43b.

[0153] The reset transistor RST may include a gate insulating film 43b and a conductor 60a2 serving as a back gate, and may have a double gate structure. Figure 18 As shown in the example of FIG, the conductor 60a2 is electrically connected to the gate electrode 42b of the reset transistor RST via the wiring 96 of the wiring layer 210. The reset transistor RST is controlled to be on / off by a signal voltage supplied to the wiring 96.

[0154] Furthermore, a gate insulating film 43c is provided below the channel region (semiconductor region 31c) of the select transistor SEL. For example, the gate insulating film 43c is implemented by the insulating film of the wiring layer 210 and is formed between the semiconductor region 31c and the conductor 60b. The conductor 60b is provided below the gate insulating film 43c.

[0155] The selection transistor SEL may include a gate insulating film 43c and a conductor 60b serving as a back gate, and may have a double gate structure. Figure 18 As shown in the example of FIG, the conductor 60b is electrically connected to the gate electrode 42c of the selection transistor SEL through the wiring 97 of the wiring layer 210. The selection transistor SEL is controlled to be on / off by a signal voltage supplied to the wiring 97.

[0156] For example, the gate insulating films 43a to 43c can be formed using the same material as the gate insulating films 41a to 41c. For example, the film thickness (thickness along the Z-axis direction) of the gate insulating film 43a can be substantially the same as the film thickness of the gate insulating film 41a. Alternatively, the film thickness of the gate insulating film 43a can be within a range of not less than 1 times and not more than 2 times the film thickness of the gate insulating film 41a.

[0157] For example, the film thickness of the gate insulating film 43b can be substantially the same as the film thickness of the gate insulating film 41b. Furthermore, the film thickness (thickness) of the gate insulating film 43b can be within a range of not less than 1 times and not more than 2 times the film thickness of the gate insulating film 41b. For example, the film thickness of the gate insulating film 43c can be substantially the same as the film thickness of the gate insulating film 41c. Furthermore, for example, the film thickness of the gate insulating film 43c can be within a range of not less than 1 times and not more than 2 times the film thickness of the gate insulating film 41c.

[0158] The transistors in the wiring layer 210 of the imaging device 1 according to this variation can have a dual-gate structure. This improves the transistor's characteristics. This improves the short-channel characteristics of the transistors in the pixels P disposed in the wiring layer 210 and suppresses the drain-induced barrier lowering (DIBL) effect. This also reduces leakage current and improves the transistor's on / off ratio.

[0159] Figure 19 This diagram illustrates another configuration example of an imaging device according to Modification 5. The gate electrode of a transistor (thin film transistor) in wiring layer 210 can be electrically connected to wiring, vias, etc. that are different from those of conductor 60 serving as a back gate. This enables the gate electrode voltage and the back gate electrode voltage to be independently (separately) controlled.

[0160] exist Figure 19 In the example shown, the gate electrode 42a of the transistor FDG is electrically connected to the wiring 95a, and the conductor 60a1 is electrically connected to the wiring 95b. The gate electrode 42b of the reset transistor RST is electrically connected to the wiring 96a, and the conductor 60a2 is electrically connected to the wiring 96b. In addition, the gate electrode 42c of the select transistor SEL is electrically connected to the wiring 97a, and the conductor 60b is electrically connected to the wiring 97b.

[0161] For example, the film thickness of the gate insulating film 43b may be substantially the same as the film thickness of the gate insulating film 41b. Furthermore, the film thickness of the gate insulating film 43b may be within a range of 1 to 4 times the film thickness of the gate insulating film 41b. For example, the film thickness of the gate insulating film 43c may be substantially the same as the film thickness of the gate insulating film 41c. Furthermore, for example, the film thickness of the gate insulating film 43c may be within a range of 1 to 4 times the film thickness of the gate insulating film 41c.

[0162] The pixel driving unit 111 of the imaging device 1 (see Figure 1 ) can be configured to separately control the voltage to be supplied to the conductor 60 (back gate electrode) and the voltage to be supplied to the gate electrode of the transistor in the wiring layer 210. For example, the voltage of the conductor 60 (back gate electrode) can be set to be higher than the voltage of the gate electrode (front gate electrode).

[0163] For example, if the effective capacitance of the gate insulating film (e.g., interlayer insulating film) below the channel region is smaller than the effective capacitance of the gate insulating film above the channel region, the imaging device 1 can set the voltage of the conductor 60 serving as the back gate electrode to a voltage higher than the voltage of the front gate electrode. This makes it possible to improve the on / off ratio of the transistor FDG, the reset transistor RST, the select transistor SEL, and the like, for example.

[0164] (4-3. Modification 6) In the above embodiments and variations, examples of the configuration of the light detection device have been described. However, the configuration of the light detection device (imaging device) is not limited to this. For example, the layout positions and shapes of the transistors in the pixel P are not limited to those described in the above examples and can be modified as appropriate. As an example, the amplifier transistor AMP, the transistor FDG, the reset transistor RST, and the select transistor SEL may be provided in the wiring layer 210.

[0165] Alternatively, for example, Figure 5 As shown in the example of , for example, the transistor FDG, the reset transistor RST, and the selection transistor SEL can be allocated to multiple wiring layers including the first wiring layer 211 and the second wiring layer 212. The conductor 60 can be configured for each transistor allocated to the multiple wiring layers.

[0166] The photoelectric conversion unit 12, readout circuit 20, pixel driver 111, signal processing unit 112, etc. of the imaging device 1 can be provided on a single substrate. For example, the pixel unit 100, pixel driver 111, signal processing unit 112, etc. of the imaging device 1 can be provided on the substrate 101.

[0167] <5. Application Examples> For example, the above-described imaging device 1 and the like are applicable to any type of electronic equipment having an imaging function including a camera system such as a digital camera or a video camera, a mobile phone having an imaging function, and the like. Figure 20 Schematic configuration of electronic device 1000 is shown.

[0168] For example, the electronic device 1000 includes a lens group 1001 , an imaging device 1 , a DSP (Digital Signal Processor) circuit 1002 , a frame memory 1003 , a display section 1004 , a storage section 1005 , an operation section 1006 , and a power supply section 1007 .

[0169] The lens group 1001 receives incident light (image light) from a subject and forms an image on the imaging surface of the imaging device 1. The imaging device 1 converts the amount of incident light formed as an image on the imaging surface by the lens group 1001 into an electrical signal on a pixel basis and supplies the electrical signal as a pixel signal to the DSP circuit 1002.

[0170] The DSP circuit 1002 is a signal processing circuit that processes a signal supplied from the imaging device 1. The DSP circuit 1002 outputs image data obtained by processing the signal from the imaging device 1. The frame memory 1003 temporarily stores the image data processed by the DSP circuit 1002 in units of frames.

[0171] The display portion 1004 includes a panel-type display device such as a liquid crystal panel or an organic EL (Electroluminescence) panel, for example, and records image data of moving images or still images captured by the imaging device 1 in a recording medium such as a semiconductor memory or a hard disk.

[0172] The operation unit 1006 outputs operation signals for various functions of the electronic device 1000 according to user operations. The power supply unit 1007 appropriately supplies various electric powers for operating the DSP circuit 1002, frame memory 1003, display unit 1004, storage unit 1005, and operation unit 1006.

[0173] <6. Practical Application Examples> (Example of actual application on mobile objects) The technology according to the present disclosure (the present technology) is applicable to various products. For example, the technology according to the present disclosure can be implemented as a device installed on any type of mobile object, such as an automobile, electric vehicle, hybrid vehicle, motorcycle, bicycle, personal mobile device, airplane, drone, ship, or robot.

[0174] Figure 21: is a block diagram showing an example of a schematic configuration of a vehicle control system as an example of a mobile body control system to which the technology according to the embodiment of the present disclosure can be applied.

[0175] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. Figure 21 In the illustrated example, vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an exterior information detection unit 12030, an interior information detection unit 12040, and an integrated control unit 12050. Integrated control unit 12050 also includes a microcomputer 12051, a sound / image output unit 12052, and an in-vehicle network interface (I / F) 12053.

[0176] The drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various types of programs. For example, the drive system control unit 12010 functions as a control device for the following devices: a drive force generating device such as an internal combustion engine or a drive motor for generating vehicle drive force; a drive force transmission mechanism for transmitting drive force to wheels; a steering mechanism for adjusting the vehicle's steering angle; a braking device for generating vehicle braking force; and the like.

[0177] The body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, power windows, and various lights such as the headlights, backup lights, brake lights, turn signals, and fog lights. In this case, the body system control unit 12020 can receive radio waves or signals from various switches transmitted from a mobile device as a key alternative. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door locks, power windows, lights, and other devices.

[0178] The vehicle exterior information detection unit 12030 detects information about the exterior of the vehicle, including the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to the imaging unit 12031. The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to image the exterior of the vehicle and receives the imaged image. Based on the received image, the vehicle exterior information detection unit 12030 can detect objects such as people, vehicles, obstacles, signs, and characters on the road surface, or can detect the distance to such objects.

[0179] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 can be visible light or invisible light such as infrared light.

[0180] The in-vehicle information detection unit 12040 detects information about the vehicle interior. For example, the in-vehicle information detection unit 12040 is connected to a driver status detection unit 12041 that detects the driver's condition. For example, the driver status detection unit 12041 includes a camera that captures the driver's image. Based on the detection information input from the driver status detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or concentration level, or determine whether the driver is dozing off.

[0181] The microcomputer 12051 can calculate control target values ​​for the driving force generation device, steering mechanism, or braking device based on information about the exterior or interior of the vehicle obtained by the exterior information detection unit 12030 or the interior information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control to implement advanced driver assistance system (ADAS) functions, including collision avoidance or impact mitigation, vehicle-to-vehicle distance-based following driving, speed maintenance driving, vehicle collision warning, vehicle lane departure warning, and the like.

[0182] In addition, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the outside or inside of the vehicle obtained by the outside information detection unit 12030 or the inside information detection unit 12040, the microcomputer 12051 can perform collaborative control intended for automatic driving, etc., which enables the vehicle to drive autonomously without relying on the driver's operation.

[0183] In addition, based on the information about the exterior of the vehicle obtained by the exterior information detection unit 12030, the microcomputer 12051 can output a control command to the body system control unit 12020. For example, the microcomputer 12051 can perform cooperative control aimed at preventing glare by controlling the headlights to change from high beam to low beam, for example, based on the position of a preceding vehicle or an oncoming vehicle detected by the exterior information detection unit 12030.

[0184] The sound / image output unit 12052 sends an output signal of at least one of sound and image to an output device capable of visually or auditorily notifying the vehicle's passengers or the outside of the vehicle of information. Figure 21In the illustrated example, as output devices, an audio speaker 12061, a display portion 12062, and an instrument panel 12063 are illustrated. For example, the display portion 12062 may include at least one of an in-vehicle display and a head-up display.

[0185] Figure 22 12031 is a diagram showing an example of the installation position of the imaging unit 12031.

[0186] exist Figure 22 , the imaging unit 12031 includes imaging units 12101 , 12102 , 12103 , 12104 and 12105 .

[0187] For example, imaging units 12101, 12102, 12103, 12104, and 12105 are located on the front nose, rearview mirror, rear bumper, and rear door of vehicle 12100, as well as on the upper portion of the windshield inside the vehicle cabin. Imaging unit 12101 located on the front nose and imaging unit 12105 located on the upper portion of the windshield inside the vehicle cabin primarily capture images in front of vehicle 12100. Imaging units 12102 and 12103 located on the rearview mirror primarily capture images on both sides of vehicle 12100. Imaging unit 12104 located on the rear bumper or rear door primarily captures images from behind vehicle 12100. Imaging unit 12105 located on the upper portion of the windshield inside the vehicle cabin primarily detects vehicles ahead, pedestrians, obstacles, signal lights, traffic signs, lanes, and the like.

[0188] By the way, Figure 22 Examples of the imaging ranges of imaging units 12101 to 12104 are shown. Imaging range 12111 represents the imaging range of imaging unit 12101, which is located at the front nose. Imaging ranges 12112 and 12113 represent the imaging ranges of imaging units 12102 and 12103, respectively, which are located at the rearview mirrors. Imaging range 12114 represents the imaging range of imaging unit 12104, which is located at the rear bumper or rear door. For example, by superimposing image data captured by imaging units 12101 to 12104, a bird's-eye view image of vehicle 12100, as viewed from above, is obtained.

[0189] At least one of the imaging units 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0190] For example, based on the distance information obtained from imaging units 12101 to 12104, microcomputer 12051 can determine the distance to each three-dimensional object within imaging ranges 12111 to 12114 and the temporal change in that distance (relative speed with respect to vehicle 12100), thereby extracting the closest three-dimensional object as the preceding vehicle. Specifically, this three-dimensional object is located on the travel path of vehicle 12100 and is traveling in the same direction as vehicle 12100 at a predetermined speed (e.g., equal to or greater than 0 km / h). Furthermore, microcomputer 12051 can pre-set the inter-vehicle distance to be maintained between the preceding vehicle and execute automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), and other control mechanisms. Consequently, it is possible to implement cooperative control, such as automated driving, designed to enable the vehicle to travel autonomously without relying on driver input.

[0191] For example, based on the distance information obtained from imaging units 12101 to 12104, microcomputer 12501 can classify 3D object data of 3D objects into 3D object data of two-wheeled vehicles, standard vehicles, large vehicles, pedestrians, utility poles, and other 3D objects, extract the classified 3D object data, and use the extracted 3D object data to automatically avoid obstacles. For example, microcomputer 12051 identifies obstacles around vehicle 12100 as those that the driver of vehicle 12100 can visually identify and those that are difficult for the driver of vehicle 12100 to visually identify. Microcomputer 12051 then determines a collision risk, indicating the risk of collision with each obstacle. If the collision risk is equal to or higher than a set value, indicating a collision possibility, microcomputer 12051 outputs a warning to the driver via audio speaker 12061 or display unit 12062, and executes forced deceleration or evasive steering via drive system control unit 12010. Thus, microcomputer 12051 can assist driving to avoid collisions.

[0192] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 can identify pedestrians, for example, by determining whether a pedestrian exists in the images captured by the imaging units 12101 to 12104. For example, this pedestrian identification is performed by extracting feature points from the images captured by the imaging units 12101 to 12104, which are infrared cameras, and determining whether the pedestrian is a pedestrian by performing pattern matching on a series of feature points representing the object's outline. When the microcomputer 12051 determines that a pedestrian exists in the images captured by the imaging units 12101 to 12104 and thus identifies the pedestrian, the audio / visual output unit 12052 controls the display unit 12062 to display a square outline superimposed on the identified pedestrian for emphasis. The audio / visual output unit 12052 can also control the display unit 12062 to display an icon representing the pedestrian at a desired location.

[0193] The above description has been given of a mobile object control system to which the technology according to the embodiments of the present disclosure can be applied. For example, the technology according to the embodiments of the present disclosure can be applied to the imaging unit 12031 having the above configuration. Specifically, the imaging device 1 and the like can be applied to the imaging unit 12031. Applying the technology according to the embodiments of the present disclosure to the imaging unit 12031 enables the acquisition of high-definition captured images. This enables high-precision control using the captured images in the mobile object control system.

[0194] (Example of actual application of endoscopic surgery system) The technology according to the embodiment of the present disclosure (the present technology) can be applied to various products. For example, the technology according to the embodiment of the present disclosure can be applied to an endoscopic surgery system.

[0195] Figure 23 is a diagram illustrating an example of a schematic configuration of an endoscopic surgery system to which the technology according to an embodiment of the present disclosure (the present technology) can be applied.

[0196] exist Figure 23 , a state is shown in which a surgeon (doctor) 11131 is performing surgery on a patient 11132 on a bed 11133 using an endoscopic surgery system 11000. As shown, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical tools 11110 such as a pneumoperitoneum tube 11111 and an energy device 11112, a support arm device 11120, and a cart 11200 on which the endoscope 11100 is supported and on which various devices used for endoscopic surgery are loaded.

[0197] Endoscope 11100 includes a lens barrel 11101 and a camera 11102 connected to the proximal end of lens barrel 11101. Lens barrel 11101 has a region of a predetermined length from its distal end for insertion into a body cavity of a patient 11132. In the illustrated example, endoscope 11100 is illustrated as a rigid endoscope including lens barrel 11101 having a rigid shape. However, endoscope 11100 may also be a flexible endoscope including lens barrel 11101 having a flexible shape.

[0198] The lens barrel 11101 is provided at its distal end with an opening into which the objective lens is fitted. A light source device 11203 is connected to the endoscope 11100 so that light generated by the light source device 11203 is guided to the distal end of the lens barrel 11101 through a light guide extending inside the lens barrel 11101 and illuminates an observation target in the body cavity of the patient 11132 through the objective lens. It should be noted that the endoscope 11100 can be a forward-looking endoscope, or can be an oblique-looking endoscope or a side-looking endoscope.

[0199] The camera head 11102 is equipped with an optical system and an image pickup element. The optical system focuses reflected light from the observation target (observation light) onto the image pickup element. The image pickup element photoelectrically converts the observation light to generate an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observed image. This image signal is transmitted as RAW data to the camera control unit (CCU) 11201.

[0200] The CCU 11201 includes a central processing unit (CPU), a graphics processing unit (GPU), and the like, and centrally controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera 11102 and performs various image processing such as development processing (demosaicing processing) for displaying an image based on the image signal.

[0201] Under the control of the CCU 11201 , the display device 11202 displays thereon an image based on the image signal that has been image-processed by the CCU 11201 .

[0202] The light source device 11203 includes a light source such as a light emitting diode (LED), for example, and supplies irradiation light to the endoscope 11100 when imaging a surgical area.

[0203] The input device 11204 is an input interface for the endoscopic surgery system 11000. The user can input various types of information or instructions to the endoscopic surgery system 11000 through the input device 11204. For example, the user can input instructions to change the image pickup conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100.

[0204] The treatment tool control device 11205 controls the driving of the energy device 11112 for cauterizing or incising tissue, sealing blood vessels, and the like. The pneumoperitoneum device 11206 delivers gas into the body cavity of the patient 11132 via the pneumoperitoneum tube 11111 to insulate the cavity, thereby ensuring the field of view of the endoscope 11100 and the surgeon's working space. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats, such as text, images, or graphics.

[0205] It should be noted that the light source device 11203, which supplies illumination light to the endoscope 11100 when imaging the surgical area, can include a white light source such as an LED, a laser light source, or a combination thereof. If the white light source comprises a combination of red, green, and blue (RGB) laser light sources, the light source device 11203 can perform white balance adjustment for the captured image because the output intensity and output timing of each color (individual wavelengths) can be controlled with high precision. Furthermore, in this case, if the laser beams from each RGB laser light source are irradiated onto the observation target in a time-division manner, and the drive of the image pickup element of the camera 11102 is controlled in synchronization with the irradiation timing, images corresponding to each of the R, G, and B colors can also be captured in a time-division manner. This method allows color images to be obtained even without providing color filters for the image pickup element.

[0206] In addition, the light source device 11203 can be controlled so that the intensity of the light to be output changes at predetermined intervals. By controlling the drive of the image pickup element of the camera 11102 in synchronization with the timing of the change in light intensity, thereby acquiring images in a time-division manner and synthesizing the images, a high dynamic range image without underexposed shadows or overexposed highlights can be generated.

[0207] Furthermore, the light source device 11203 can be configured to supply light of a predetermined wavelength band prepared for special light observation. In special light observation, for example, by exploiting the wavelength dependence of light absorption in body tissue to illuminate light with a narrower wavelength than that used in conventional observation (i.e., white light), narrowband observation (narrowband imaging) can be performed to image predetermined tissues, such as blood vessels in the superficial layer of mucous membranes, with high contrast. Alternatively, special light observation can also be performed for fluorescence observation, which obtains images from fluorescence generated by irradiation with excitation light. Fluorescence observation can be performed by irradiating body tissue with excitation light to observe fluorescence from the tissue (autofluorescence observation), or by locally injecting an agent, such as indocyanine green (ICG), into the tissue and irradiating the tissue with excitation light corresponding to the agent's fluorescence wavelength to obtain a fluorescence image. The light source device 11203 can be configured to supply narrowband light and / or excitation light suitable for special light observation as described above.

[0208] Figure 24 It shows Figure 23 A block diagram showing an example of the functional configuration of the camera 11102 and the CCU 11201 is shown.

[0209] The camera 11102 includes a lens unit 11401, an image pickup section 11402, a drive section 11403, a communication section 11404, and a camera control section 11405. The CCU 11201 includes a communication section 11411, an image processing section 11412, and a control section 11413. The camera 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 for communication.

[0210] The lens unit 11401 is an optical system provided at a position connected to the lens barrel 11101. Observation light taken from the distal end of the lens barrel 11101 is guided to the camera 11102 and introduced into the lens unit 11401. The lens unit 11401 includes a combination of multiple lenses including a zoom lens and a focus lens.

[0211] The number of image pickup elements included in the image pickup section 11402 can be one (single-board type) or multiple (multi-board type). For example, when the image pickup section 11402 is configured as a multi-board type, image signals corresponding to each of R, G, and B are generated by the image pickup elements, and the image signals can be synthesized to obtain a color image. The image pickup section 11402 can also be configured to have a pair of image pickup elements for respectively acquiring an image signal for the right eye and an image signal for the left eye, thereby being used for three-dimensional (3D) display. If 3D display is performed, the surgeon 11131 can more accurately understand the depth of living tissue in the surgical area. It should be noted that when the image pickup section 11402 is configured as a multi-board type, multiple systems of lens units 11401 are provided corresponding to the respective image pickup elements.

[0212] In addition, the image pickup portion 11402 does not necessarily have to be provided on the camera head 11102. For example, the image pickup portion 11402 may be provided immediately behind the objective lens inside the lens barrel 11101.

[0213] The driving section 11403 includes an actuator and moves the zoom lens and the focus lens of the lens unit 11401 along the optical axis by a predetermined distance under the control of the camera control section 11405. Therefore, the magnification and focus of the image picked up by the image pickup section 11402 can be appropriately adjusted.

[0214] The communication section 11404 includes communication means for transmitting and receiving various types of information to and from the CCU 11201. The communication section 11404 transmits an image signal acquired from the image pickup section 11402 to the CCU 11201 through the transmission cable 11400 as RAW data.

[0215] In addition, the communication section 11404 receives a control signal for controlling the driving of the camera 11102 from the CCU 11201, and supplies the control signal to the camera control section 11405. The control signal includes information related to image pickup conditions, such as, for example, information specifying a frame rate for picking up an image, information specifying an exposure value when picking up an image, and / or information specifying a magnification and a focus of a picked up image.

[0216] It should be noted that image pickup conditions such as frame rate, exposure value, magnification, or focus may be specified by the user or may be automatically set based on the acquired image signal by the control section 11413 of the CCU 11201. In the latter case, an automatic exposure (AE) function, an automatic focus (AF) function, and an automatic white balance (AWB) function are incorporated into the endoscope 11100.

[0217] The camera control unit 11405 controls the driving of the camera 11102 based on the control signal received from the CCU 11201 through the communication unit 11404 .

[0218] The communication section 11411 includes a communication device for transmitting and receiving various types of information to and from the camera 11102. The communication section 11411 receives an image signal transmitted thereto from the camera 11102 via the transmission cable 11400.

[0219] Furthermore, the communication unit 11411 transmits a control signal for controlling the driving of the camera 11102 to the camera 11102. The image signal and the control signal can be transmitted through electrical communication, optical communication, or the like.

[0220] The image processing unit 11412 performs various image processing on the image signal in the RAW data format sent thereto from the camera 11102 .

[0221] The control section 11413 performs various types of control related to image pickup of the operation area, etc. by the endoscope 11100 and display of the picked-up image obtained by image pickup of the operation area, etc. For example, the control section 11413 generates a control signal for controlling the driving of the camera head 11102 .

[0222] Furthermore, the control unit 11413 controls the display device 11202 to display a picked-up image of the surgical area, etc., based on the image signal processed by the image processing unit 11412. Therefore, the control unit 11413 can use various image recognition technologies to identify various objects in the picked-up image. For example, the control unit 11413 can detect the shape and color of the edges of objects contained in the picked-up image to identify surgical tools such as forceps, specific living areas, bleeding, fog when the energy device 11112 is in use, and so on. When the control unit 11413 controls the display device 11202 to display the picked-up image, the control unit 11413 can use the recognition results to display various types of surgical support information superimposed on the image of the surgical area. When the surgical support information is displayed superimposed on the image and presented to the surgeon 11131, the burden on the surgeon 11131 can be reduced, allowing the surgeon 11131 to perform the surgery reliably.

[0223] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 to each other is an electric signal cable prepared for communication of electric signals, an optical fiber prepared for optical communication, or a composite cable prepared for electric and optical communication.

[0224] Here, although communication is performed by wired communication using the transmission cable 11400 in the illustrated example, communication between the camera 11102 and the CCU 11201 may be performed by wireless communication.

[0225] An example of an endoscopic surgical system to which the technology according to an embodiment of the present disclosure can be applied has been described above. The technology according to an embodiment of the present disclosure can be suitably applied to the image pickup unit 11402 provided in the camera head 11102 of the endoscope 11100 in the above-described configuration. Applying the technology according to an embodiment of the present disclosure to the image pickup unit 11402 enables the provision of the endoscope 11100 with high definition.

[0226] While the present disclosure has been described above with reference to embodiments, variations, applicable examples, and practical application examples, the present technology is not limited to the aforementioned embodiments and can be modified in a variety of ways. For example, while the variations described above are variations of the aforementioned embodiments, the configurations of the various variations can be combined as appropriate. For example, the present disclosure is not limited to backside-illuminated image sensors and can also be applied to frontside-illuminated image sensors.

[0227] In the aforementioned embodiments, the imaging device has been used as an example. However, for example, the light detection device of the present disclosure only needs to be a device that receives incident light and converts it into electric charge. The output signal can be a signal indicating image information or a signal indicating information related to the measured distance. The light detection device (imaging device) can be applied to image sensors, distance measurement sensors, and the like.

[0228] The light detection device disclosed herein can also be applied as a distance measurement sensor capable of measuring distance using the TOF (Time of Flight) method. This light detection device (imaging device) can also be applied as a sensor capable of detecting events, such as an event-driven sensor (referred to as an EVS (Event Vision Sensor), EDS (Event-Driven Sensor), or DVS (Dynamic Vision Sensor)).

[0229] The present disclosure is applicable not only to image sensors but also to various circuits and devices. Figure 4 、 Figure 5 The structure of the light detection device shown in FIG. 1 can be applied to various semiconductor devices. Each semiconductor layer can be provided with any element (or circuit). For example, other elements or circuits can be formed in semiconductor layer 110 instead of the photoelectric conversion element. Semiconductor layers 110 and 120 can be provided with memory, sensor circuits, power supply circuits, amplifier circuits, interface circuits, and the like. The configuration of the circuits formed in each layer and the layout of each layer can be modified as appropriate. The present disclosure can be applied to various electronic devices serving as semiconductor devices.

[0230] A light detection device according to an embodiment of the present disclosure includes: a first substrate including a photoelectric conversion element and a readout circuit; and a second substrate stacked on the first substrate. The first substrate includes a semiconductor layer and a wiring layer. The readout circuit includes a first transistor disposed in the wiring layer. Consequently, a light detection device with advantages in miniaturization can be realized.

[0231] A light detection device according to an embodiment of the present disclosure includes: a first substrate including a photoelectric conversion element and a readout circuit; and a second substrate stacked on the first substrate. The first substrate includes a semiconductor layer and a wiring layer. The readout circuit includes a first transistor disposed in the wiring layer. The wiring layer includes a conductor disposed between the semiconductor layer and the first transistor. The first transistor is stacked relative to the conductor. Consequently, a light detection device having advantages in miniaturization can be realized.

[0232] It should be noted that the effects described herein are merely exemplary and non-limiting, and other effects may also exist. In addition, the present technology may also have the following configurations. (1) A light detection device comprising: a first substrate including a photoelectric conversion element that photoelectrically converts light and a readout circuit configured to output a first signal based on the charge converted by the photoelectric conversion element; and a second substrate including a signal processing circuit configured to perform signal processing on the first signal, the second substrate being stacked on the first substrate, wherein The first substrate includes a semiconductor layer and a wiring layer, and The readout circuit includes a first transistor provided in the wiring layer. (2) The light detection device according to (1), wherein the first transistor includes a thin film transistor. (3) The light detection device according to (1) or (2), wherein the first transistor includes an amplification transistor, a selection transistor, a reset transistor, or a switching transistor. (4) The light detection device according to any one of (1) to (3), further comprising: a floating diffusion; and A transfer transistor is provided on the first surface side of the semiconductor layer, the transfer transistor being configured to transfer the charge converted by the photoelectric conversion element to the floating diffusion. (5) The light detection device according to (4), further comprising wiring provided in the wiring layer, the wiring including a metal material, wherein: The transfer transistor is electrically connected to the first transistor through the wiring. (6) The light detection device according to any one of (1) to (5), wherein: The readout circuit includes a plurality of transistors including the first transistor, and The plurality of transistors are provided in the wiring layer. (7) The light detection device according to any one of (1) to (6), wherein: The readout circuit includes a plurality of transistors, the plurality of transistors including the first transistor, A portion of the plurality of transistors is provided on the first surface side of the semiconductor layer, and Another part of the plurality of transistors is provided in the wiring layer. (8) The light detection device according to (7), wherein the plurality of transistors include an amplification transistor provided on the first surface side of the semiconductor layer. (9) The light detection device according to any one of (1) to (8), wherein the first transistor is configured as a vertical transistor. (10) The light detection device according to any one of (1) to (9), wherein: The readout circuit includes a second transistor provided in the wiring layer, and The first transistor and the second transistor are provided in different layers from each other. (11) The light detection device according to (10), wherein the wiring layer includes a first wiring layer provided with the first transistor and a second wiring layer provided with the second transistor, the second wiring layer being located on the first wiring layer. (12) The light detection device according to any one of (1) to (11), wherein the signal processing circuit includes an AD conversion circuit configured to convert the first signal into a digital signal. (13) The light detection device according to any one of (1) to (12), wherein The semiconductor layer has a first surface and a second surface located on a side opposite to the first surface. The wiring layer is stacked on the first surface of the semiconductor layer, and The photoelectric conversion element is provided between the first surface and the second surface of the semiconductor layer. (14) The light detection device according to (13), further comprising a lens provided on the second surface side of the semiconductor layer, wherein: The photoelectric conversion element performs photoelectric conversion on light incident through the lens. (15) The light detection device according to any one of (1) to (14), wherein: The wiring layer includes a conductor provided between the semiconductor layer and the first transistor, and The first transistor is provided so as to be stacked relative to the electrical conductor. (16) The light detection device according to (15), wherein the electric conductor includes a shield portion to be supplied with a predetermined potential. (17) The light detection device according to (15) or (16), further comprising: A well of a first conductivity type provided in the semiconductor layer; and The semiconductor region of the first conductivity type is provided in the well, wherein The conductor is electrically connected to the semiconductor region. (18) The light detection device according to (15) or (16), wherein: The wiring layer includes wiring to be supplied with a ground potential, and The conductor is electrically connected to the wiring. (19) The light detection device according to (15) or (16), further comprising: A well of a first conductivity type provided in the semiconductor layer; and The semiconductor region of the first conductivity type is provided in the well, wherein The wiring layer includes wiring to be supplied with a ground potential, and The conductor is electrically connected to the semiconductor region and the wiring. (20) The light detection device according to any one of (15) to (19), wherein: The conductor is disposed below the channel region of the first transistor, and The size of the conductor is larger than the size of the channel region. (21) The light detection device according to any one of (15) to (20), wherein: The readout circuit includes a third transistor provided on the first surface side of the semiconductor layer, and The conductor is provided between the third transistor and the first transistor. (22) The light detection device according to (21), wherein the electric conductor is provided between the gate electrode of the third transistor and the channel region of the first transistor. (23) The light detection device according to (21) or (22), wherein the third transistor includes a transfer transistor or an amplifying transistor. (24) The light detection device according to (15) or (16), wherein: The first transistor includes a channel region, a gate electrode disposed above the channel region, and a gate insulating film disposed between the channel region and the gate electrode; The electrical conductor is disposed below the channel region of the first transistor; and The wiring layer includes an insulating film provided between the channel region and the conductor. (25) The light detection device according to (24), wherein the conductor is electrically connected to the gate electrode of the first transistor. (26) The light detection device according to (25), wherein a film thickness of the insulating film is within a range of 1 to 2 times a film thickness of the gate electrode. (27) The light detection device according to (24), wherein the electric conductor and the gate electrode are electrically connected to wirings different from each other. (28) The light detection device according to (27), wherein a film thickness of the insulating film is within a range of 1 to 4 times a film thickness of the gate electrode. (29) An electronic device comprising: Optical systems; and a light detecting device that receives light transmitted through the optical system, The light detection device comprises: a first substrate including a photoelectric conversion element that photoelectrically converts light and a readout circuit configured to output a first signal based on the charge converted by the photoelectric conversion element; and a second substrate including a signal processing circuit configured to perform signal processing on the first signal, the second substrate being stacked on the first substrate, wherein The first substrate includes a semiconductor layer and a wiring layer, and The readout circuit includes a first transistor provided in the wiring layer.

[0233] This application claims the benefit of Japanese Priority Patent Application JP2023-065186 filed with the Japan Patent Office on April 12, 2023, and Japanese Priority Patent Application JP2023-205645 filed with the Japan Patent Office on December 5, 2023, the entire contents of which are incorporated herein by reference.

[0234] It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

Claims

1. A light detection device, comprising: a first substrate including a photoelectric conversion element that photoelectrically converts light and a readout circuit configured to output a first signal based on the charge converted by the photoelectric conversion element; and a second substrate including a signal processing circuit configured to perform signal processing on the first signal, the second substrate being stacked on the first substrate, wherein The first substrate includes a semiconductor layer and a wiring layer, and The readout circuit includes a first transistor provided in the wiring layer.

2. The light detection device according to claim 1, wherein The first transistor includes a thin film transistor.

3. The light detection device according to claim 1, wherein The first transistor includes an amplifying transistor, a selecting transistor, a reset transistor or a switching transistor.

4. The light detection device according to claim 1, further comprising: floating diffusion unit; and A transfer transistor is provided on the first surface side of the semiconductor layer, the transfer transistor being configured to transfer the charge converted by the photoelectric conversion element to the floating diffusion.

5. The light detecting device according to claim 4, further comprising wiring provided in the wiring layer, the wiring comprising a metal material, wherein The transfer transistor is electrically connected to the first transistor through the wiring. The light detection device according to claim 1 , wherein The readout circuit includes a plurality of transistors including the first transistor, and The plurality of transistors are provided in the wiring layer.

7. The light detection device according to claim 1, wherein The readout circuit includes a plurality of transistors, the plurality of transistors including the first transistor, A portion of the plurality of transistors is provided on the first surface side of the semiconductor layer, and Another part of the plurality of transistors is provided in the wiring layer.

8. The light detection device according to claim 7, wherein The plurality of transistors include an amplifying transistor provided on the first surface side of the semiconductor layer.

9. The light detection device according to claim 1, wherein The first transistor is configured as a vertical transistor.

10. The light detection device according to claim 1, wherein The readout circuit includes a second transistor provided in the wiring layer, and The first transistor and the second transistor are provided in different layers from each other. The light detection device according to claim 10 , wherein: The wiring layer includes a first wiring layer provided with the first transistor and a second wiring layer provided with the second transistor, the second wiring layer being located on the first wiring layer.

12. The light detection device according to claim 1, wherein The signal processing circuit includes an AD conversion circuit configured to convert the first signal into a digital signal.

13. The light detection device according to claim 1, wherein The semiconductor layer has a first surface and a second surface located on a side opposite to the first surface. The wiring layer is stacked relative to the first surface of the semiconductor layer, and The photoelectric conversion element is provided between the first surface and the second surface of the semiconductor layer.

14. The light detecting device according to claim 13, further comprising a lens provided on the second surface side of the semiconductor layer, wherein The photoelectric conversion element performs photoelectric conversion on light incident through the lens.

15. The light detection device according to claim 1, wherein The wiring layer includes a conductor provided between the semiconductor layer and the first transistor, and The first transistor is provided so as to be stacked relative to the electrical conductor.

16. The light detection device according to claim 15, wherein The electrical conductor includes a shield portion to be supplied with a predetermined potential.

17. The light detection device according to claim 15, further comprising: a well of a first conductivity type disposed in the semiconductor layer; and The semiconductor region of the first conductivity type is provided in the well, wherein The conductor is electrically connected to the semiconductor region.

18. The light detection device according to claim 15, wherein The wiring layer includes wiring to be supplied with a ground potential, and The conductor is electrically connected to the wiring.

19. The light detection device according to claim 15, further comprising: a well of a first conductivity type disposed in the semiconductor layer; and The semiconductor region of the first conductivity type is provided in the well, wherein The wiring layer includes wiring to be supplied with a ground potential, and The conductor is electrically connected to the semiconductor region and the wiring.

20. The light detection device according to claim 15, wherein The conductor is disposed below the channel region of the first transistor, and The size of the conductor is larger than the size of the channel region.

21. The light detection device according to claim 15, wherein The readout circuit includes a third transistor provided on the first surface side of the semiconductor layer, and The conductor is provided between the third transistor and the first transistor.

22. The light detection device according to claim 21, wherein The conductor is provided between the gate electrode of the third transistor and the channel region of the first transistor.

23. The light detection device according to claim 21, wherein The third transistor includes a transfer transistor or an amplifying transistor.

24. The light detection device according to claim 15, wherein The first transistor includes a channel region, a gate electrode disposed above the channel region, and a gate insulating film disposed between the channel region and the gate electrode; The electrical conductor is disposed below the channel region of the first transistor; and The wiring layer includes an insulating film provided between the channel region and the conductor.

25. The light detection device according to claim 24, wherein The conductor is electrically connected to the gate electrode of the first transistor.

26. The light detection device according to claim 25, wherein The film thickness of the insulating film is within a range of not less than 1 times and not more than 2 times the film thickness of the gate electrode.

27. The light detection device according to claim 24, wherein The electrical conductor and the gate electrode are electrically connected to wirings different from each other.

28. The light detection device according to claim 27, wherein The film thickness of the insulating film is within a range of 1 to 4 times the film thickness of the gate electrode.

29. An electronic device comprising: Optical system; and a light detecting device that receives light transmitted through the optical system, The light detection device comprises: a first substrate including a photoelectric conversion element that photoelectrically converts light and a readout circuit configured to output a first signal based on the charge converted by the photoelectric conversion element; and a second substrate including a signal processing circuit configured to perform signal processing on the first signal, the second substrate being stacked on the first substrate, wherein The first substrate includes a semiconductor layer and a wiring layer, and The readout circuit includes a first transistor provided in the wiring layer.

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