Task migration method and device, electronic equipment and storage medium

Abstract

The invention provides a task migration method and device, electronic equipment and a storage medium, and the method comprises the steps: obtaining a to-be-migrated task object from a processor core with a task migration demand; obtaining load information and core temperature information of each processor core in a processor core set to which the processor core with the task migration requirement belongs; according to the load information and the core temperature information, inter-core migration is carried out on the task object between the processor cores twice or more, and the range of the inter-core migration comprises the processor cores with task migration requirements. The performance stability of the processor core after receiving the task object is improved, the possibility that the performance of the processor core is abnormal due to the fact that the processor core receives the task object is reduced, the stability of the core temperature of each processor core is improved, and the core temperature control effect of each processor core is optimized.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a task migration method, device, electronic device, and storage medium. Background Art

[0002] With the development of chip technology, the operating power and dynamic power consumption of the central processing unit (CPU) deployed on the chip have increased accordingly. During the CPU operation, the core temperature of the processor core has a certain degree of impact on the security and stability of system operation.

[0003] Therefore, how to control the core temperature of the processor core is very important. Summary of the Invention

[0004] The present disclosure aims to solve one of the technical problems in the related art at least to a certain extent.

[0005] To this end, a first aspect of the present disclosure proposes a task migration method.

[0006] A second aspect of the present disclosure provides a task migration device.

[0007] A third aspect of the present disclosure provides an electronic device.

[0008] A fourth aspect of the present disclosure provides a computer-readable storage medium.

[0009] A fifth aspect of the present disclosure provides a chip.

[0010] In a first aspect, the present disclosure proposes a task migration method, comprising: obtaining a task object to be migrated from a processor core having a task migration requirement; obtaining load information and core temperature information of each processor core in a processor core set to which the processor core having the task migration requirement belongs; and performing two or more inter-core migrations of the task object between the processor cores based on the load information and the core temperature information, wherein the scope of the inter-core migration includes the processor core having the task migration requirement.

[0011] The second aspect of the present disclosure proposes a task migration device, including: a first acquisition module, used to obtain a task object to be migrated from a processor core with a task migration requirement; a second acquisition module, used to obtain load information and core temperature information of each processor core in a processor core set to which the processor core with the task migration requirement belongs; a migration module, used to perform two or more inter-core migrations of the task object between the processor cores based on the load information and the core temperature information, wherein the scope of the inter-core migration includes the processor core with the task migration requirement.

[0012] A third aspect of the present disclosure proposes an electronic device, comprising: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to execute the instructions to implement the task migration method proposed in the first aspect above.

[0013] A fourth aspect of the present disclosure proposes a computer-readable storage medium. When instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the task migration method proposed in the first aspect above.

[0014] The fifth aspect of the present disclosure proposes a chip comprising one or more interface circuits and one or more processors; the interface circuit is used to receive a signal and send the signal to the processor, the signal including a computer instruction stored in a memory, and when the processor executes the computer instruction, the chip executes the task migration method proposed in the first aspect above.

[0015] The task migration method and device proposed in the present disclosure determine the migration processor core of the task object through the load information and core temperature information of each processor core, thereby improving the performance stability of the processor core after receiving the task object, and reducing the possibility of performance abnormalities of the processor core due to receiving the task object through two or more inter-core migrations of the task object between each processor core. In the scenario where the task object may cause the core temperature of the processor core to exceed the safe range, the core temperature stability of each processor core is improved, the core temperature control effect of each processor core is optimized, the stability and safety of the CPU operation to which the processor core belongs are improved, and the operating performance of the CPU is optimized.

[0016] It should be understood that the contents described in the present disclosure are not intended to identify the key or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and / or additional aspects and advantages of the present disclosure will become apparent and readily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0018] Figure 1 A flowchart of a task migration method according to an embodiment of the present disclosure is shown;

[0019] Figure 2 This is a flowchart of a task migration method according to another embodiment of the present disclosure;

[0020] Figure 3 This is a flowchart of a task migration method according to another embodiment of the present disclosure;

[0021] Figure 4This is a flowchart of a task migration method according to another embodiment of the present disclosure;

[0022] Figure 5 This is a flowchart of a task migration method according to another embodiment of the present disclosure;

[0023] Figure 6 This is a structural diagram of a task migration device according to an embodiment of the present disclosure;

[0024] Figure 7 A block diagram of an electronic device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0025] The following describes in detail embodiments of the present disclosure, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present disclosure, and should not be construed as limiting the present disclosure.

[0026] The following describes a task migration method, device, electronic device, and storage medium proposed in embodiments of the present disclosure with reference to the accompanying drawings.

[0027] Figure 1 FIG. 1 is a flow chart of a task migration method according to an embodiment of the present disclosure. Figure 1 As shown, the method includes:

[0028] S101: Obtain a task object to be migrated from a processor core that has a task migration requirement.

[0029] In an embodiment of the present disclosure, multiple central processing units (CPUs) can be configured on a chip, wherein each CPU includes at least one processor core, and each processor core may have tasks to be executed. In this scenario, when it is identified that the tasks to be executed on any processor core need to be migrated to other processor cores for execution, the processor core can be determined as a processor core with task migration requirements.

[0030] Furthermore, tasks on the processor core having task migration requirements that need to be migrated to other processor cores are determined as task objects to be migrated.

[0031] Among them, the migration reason of the task object to be migrated may include an abnormality in the running process of the task object on the processor core where it is located, or it may include that the running of the task object on the processor core where it is located causes the core temperature of the processor core to exceed the set safety temperature range, and may also include other reasons, which are not specifically limited here.

[0032] S102 : Obtain load information and core temperature information of each processor core in a processor core set to which the processor core having the task migration requirement belongs.

[0033] In an embodiment of the present disclosure, multiple CPUs can be configured on the chip where the processor core with the task migration requirement is located, wherein each CPU includes at least one processor core. In this scenario, the set composed of the processor cores on the chip where the processor core with the task migration requirement is located can be determined as the set of processor cores to which the processor core with the task migration requirement belongs.

[0034] As an example, Figure 2 As shown, in Figure 2 In the chip shown, processor core 1 is set as the processor core with task migration requirements. Figure 2 In the illustrated scenario, the processing core set consisting of processor core 1, processor core 2, ..., processor core 10 can be determined as the processor core set to which the processor core having the task migration requirement belongs.

[0035] Optionally, each processor core on the CPU is configured with a data collection component for load information and a data collection component for temperature information.

[0036] In this scenario, load data of each processor core can be collected by a data collection component corresponding to the load information, thereby obtaining the load information of each processor core.

[0037] Correspondingly, the temperature data of each processor core is collected by a data collection component corresponding to the temperature information, thereby obtaining the core temperature information of each processor core.

[0038] The data acquisition component may be a data acquisition sensor, or other component types capable of realizing data acquisition, which is not specifically limited here.

[0039] S103 , performing inter-core migration of task objects two or more times between processor cores based on the load information and the core temperature information, wherein the scope of the inter-core migration includes processor cores that have task migration requirements.

[0040] In an embodiment of the present disclosure, some processor cores in the processor core set may be unable to receive task objects normally, so that these processor cores cannot serve as processor cores that receive task objects when the task objects are migrated between cores. In this scenario, the processor core set can be screened to obtain some processor cores that can receive task objects.

[0041] Optionally, corresponding processor core screening conditions can be set based on load information and core temperature information, and each processor core in the processor core set can be compared with the screening conditions respectively. For any processor core, when the comparison result indicates that the processor core matches the screening conditions, it can be determined that the processor core can be used as the processor core for receiving the task object.

[0042] Furthermore, a set of processor cores capable of receiving the task object is obtained, and the task object is migrated between cores based on the processor cores included in the set. For any processor core in the set that receives the task object, after the task object is migrated to the processor core, the task object may still fail to operate normally, or the core temperature of the processor core may exceed the set safety range.

[0043] Optionally, in order to reduce the probability of the above situation, the task object can be migrated twice or more in the set to determine from each processor core a processor core on which the task object can run normally and whose core temperature will not exceed the set safety range.

[0044] It should be noted that in the scenario where the core temperature of a processor core exceeds the set safety range due to the operation of a task object, two or more inter-core migrations of the task object between the processor cores can reduce the probability of the core temperature of each processor core exceeding the set safety range, thereby achieving core temperature control of each processor core in the processor set.

[0045] As an example, Figure 2 As shown, in Figure 2 In the chip shown, processor core 1 is set as the processor core with task migration requirements. Figure 2 In the scenario shown, based on the load information and core temperature information of processor core 1, processor core 2, ..., processor core 10, a processor core that can receive the task object to be migrated on processor core 1 can be obtained, and the task object can be migrated between cores twice or more in this part of the processor cores.

[0046] The processor cores participating in the inter-core migration may include the processor core 1 where the task object is located, or may not include the processor core 1 where the task object is located, which is not specifically limited here.

[0047] It should be noted that the present disclosure does not limit the execution sequence of steps S101 to S103. Figure 1 The steps S101 to S103 are merely executed in sequence for example.

[0048] The task migration method proposed in the present invention determines the migration processor core of the task object through the load information and core temperature information of each processor core, thereby improving the performance stability of the processor core after receiving the task object, and reduces the possibility of performance abnormalities of the processor core due to receiving the task object through two or more inter-core migrations of the task object between each processor core. In the scenario where the task object may cause the core temperature of the processor core to exceed the safe range, the core temperature stability of each processor core is improved, the core temperature control effect of each processor core is optimized, the stability and safety of the CPU operation to which the processor core belongs are improved, and the operating performance of the CPU is optimized.

[0049] In the above embodiment, regarding the two or more inter-core migrations of task objects between processor cores, the following can be combined with Figure 3 Further understanding, Figure 3 FIG. 1 is a flow chart of a task migration method according to another embodiment of the present disclosure. Figure 3 As shown, the method includes:

[0050] S301 : Obtain a task object to be migrated from a processor core that has a task migration requirement.

[0051] Optionally, based on a preset polling time interval, the core temperature of each processor core in the processor core set is obtained.

[0052] In the embodiment of the present disclosure, the time interval between each round of detecting the task migration demand of each processor core may be determined as the polling time interval.

[0053] The polling time interval may be set based on a trigger frequency of a system timer configured in the system, and the polling time interval for detecting task migration requirements on the processor core may be obtained by obtaining the number of beats set by the system timer.

[0054] Furthermore, based on the set polling time interval, each processor core in the processor core set is detected separately to determine whether it has a task migration requirement. In particular, the core temperature of each processor core can be detected to identify whether each processor core has a task migration requirement.

[0055] Optionally, for any processor core, in response to a core temperature of the processor core not falling within a preset core temperature safety range, the processor core is determined to be a processor core having a task migration requirement.

[0056] In the embodiment of the present disclosure, the core temperature of each processor core can be collected based on the core temperature data collection method in the related art, and then the core temperature of each processor core can be detected based on the preset core temperature safety range. When it is detected that the core temperature of any processor core exceeds the core temperature safety range, it can be determined that the core temperature of the processor core is abnormal. Furthermore, the processor core detected to have a core temperature abnormality can be determined as a processor core with a task migration requirement.

[0057] As an example, Figure 4 As shown, the core temperature of each processor core is obtained based on the set polling time interval and compared with the preset core temperature safety range. When the core temperature of any processor core does not fall within the core temperature safety range, it can be determined that the core temperature of the processor core is abnormal.

[0058] Furthermore, the processor core may be determined as a processor core having a task migration requirement, and its task migration flag may be set.

[0059] Optionally, for any processor core, in response to the processor core being a processor core having a task migration requirement, a task migration flag bit is set for the processor core having a task migration requirement.

[0060] In the embodiment of the present disclosure, each processor core in the processor core set is provided with a flag bit corresponding to a migration requirement. When the flag bit of a task 1 processor core is set, it can be determined that the processor core has a task migration requirement.

[0061] The flag bit may be determined as a task migration flag bit of the processor core.

[0062] In this scenario, the task migration flag of the processor core with task migration requirements can be set so that the inter-core migration operating system can identify the processor core with task migration requirements and perform inter-core migration operations on the task objects on the processor core.

[0063] Optionally, the task load of the task on the processor core having the task migration requirement is obtained, and in response to the task load being greater than or equal to a preset task load threshold, the task on the processor core having the task migration requirement is determined to be the task object to be migrated.

[0064] In the embodiment of the present disclosure, the tasks on the processor core that need to be migrated can be detected and identified to determine whether they are task objects that need to be migrated.

[0065] Among them, the tasks running on the processor core with task migration requirements can be obtained, and the current task load of the task can be obtained based on the running information of the task. Furthermore, the task load is compared with the preset task load threshold. When the task load is greater than or equal to the preset task load threshold, it can be determined that the task may be a task object that needs to be migrated.

[0066] It should be noted that during the daily operation of tasks, when any task exceeds the task load threshold, the core temperature of the processor core to which it belongs may be abnormal. That is to say, when any processor core is identified as a processor core with task migration requirements, it can be determined that the load of the task running on it may be abnormal, and then it can be determined that the task may be the reason that causes the core temperature of the processor core to exceed the set core temperature safety range.

[0067] In this scenario, the task can be determined as a task object that needs to be migrated on the processor core to which the task belongs and to which there is a task migration requirement.

[0068] It should be noted that the processor core with task migration requirements proposed in the embodiment of the present disclosure only runs one task. In this scenario, the migration of the task object can make the processor core with task migration requirements enter an idle state, thereby performing core temperature control on the processor core with task migration requirements so that the core temperature of the processor core can be restored to the core temperature safety range.

[0069] S302 : Obtain the core load and core load duration of each processor core in the processor core set according to the load information.

[0070] In the embodiment of the present disclosure, for any processor core, the current load of the processor core can be obtained through the load information of the processor core, and the load can be determined as the core load of the processor core.

[0071] Furthermore, the duration of the processor core being in any core load can be obtained through the load information, and the duration can be determined as the core load duration corresponding to the core load.

[0072] S303, based on the core load and the core load duration, obtain the migration processor core of the task object from the processor core set to obtain the migration processor core set of the task object, wherein the core load of the migration processor core is less than or equal to the preset core load threshold, and the core load duration is greater than or equal to the preset reference low power consumption cooling duration.

[0073] In an embodiment of the present disclosure, when the processor core is in a low power consumption state and maintains the low power consumption state for a set period of time, the processor core is in a low power consumption cooling state. The state of the processor core in this scenario can meet the migration conditions of the task object, and the processor core can be determined as the migration processor core of the task object.

[0074] Among them, in the scenario where the processor core maintains a low power consumption and cooling state, the low power consumption and cooling state maintenance time when the core temperature of the processor core drops to a set value is obtained, and the reference low power consumption and cooling time of the processor core can be determined based on this time.

[0075] In this scenario, the core load of the processor core can be compared with its corresponding core load threshold, and the core load duration corresponding to the core load can be compared with its preset reference low-power cooling duration. Among them, for any processor core, when the core load of the processor core is less than or equal to the preset processor core threshold, and the core load duration is greater than or equal to the corresponding reference low-power cooling duration, it can be determined that the processor core is in a low-power cooling state and the core temperature has dropped to the set temperature value, and then it can be determined that the processor core is a migration processor core that meets the task object migration conditions.

[0076] That is to say, the migrated processor core can be a processor core whose core load is in an idle state and the idle state time is greater than or equal to the reference low power cooling time, or it can be a processor core whose core load is in a non-idle state and the core load is less than or equal to the preset core load threshold and the core load time is greater than or equal to the reference low power cooling time. No specific limitation is made here.

[0077] Furthermore, a set of migration processor cores is determined as a migration processor core set.

[0078] S304: Perform two or more inter-core migrations on the task object in the migration processor core set.

[0079] Optionally, target migration processor core pairs of the current migration round and the next migration round are obtained from the migration processor core set, and two inter-core migrations are performed on the task object based on the target migration processor core pairs.

[0080] In an embodiment of the present disclosure, the migration processor core that receives the task object in the current migration round and the migration processor core that receives the task object in the next migration round corresponding to the current migration round can be obtained from the migration processor core set, and the two migration processor cores can be determined as the two target migration processor cores of the task object, thereby obtaining a target migration processor core pair consisting of the two target migration processor cores.

[0081] Furthermore, two inter-core migrations are performed based on the two target migration processor core task objects in the target migration processor core.

[0082] The target migration processor core may be the processor core closest to the processor core where the task object is located among all migration processor cores, or the processor core with the highest communication efficiency with the processor core where the task object is located among all migration processor cores, which is not specifically limited here.

[0083] As a possible implementation manner, target migration processor core pairs for the current migration round and the next migration round may be obtained from the migration processor core set based on processing performance.

[0084] Among them, a set of performance processor cores belonging to the high-performance core can be obtained from each migration processor core, and then from the performance processor core set, two performance processor cores of the task object in the current migration round and the next migration round are determined as the two target migration processor cores for the task object to perform the first inter-core migration and the second inter-core migration.

[0085] As an example, Figure 2 As shown, set Figure 2 Processor core 1, processor core 2, ..., processor core 6 are energy-efficient processor cores belonging to high-efficiency cores, and processor core 7, processor core 8, processor core 9 and processor core 10 are performance processor cores belonging to high-performance cores.

[0086] exist Figure 2 In the scenario shown, the migration processor cores are set to processor core 7, processor core 8, and processor core 9. Then, two performance processor cores of the task object in the current migration round and the next migration round can be determined from the performance processor core set composed of processor core 7, processor core 8, and processor core 9, and used as the two target migration processor cores for the task object to perform the first inter-core migration and the second inter-core migration.

[0087] Optionally, in response to the existence of a task migration requirement for the target migration processor core where the task object is located after two inter-core migrations, the next target migration processor core is obtained from the migration processor core set, the task object is continued to be migrated to the next target migration processor core, and the migration requirement detection is continued for the next target migration processor core after the migration until it is detected that there is no task migration requirement for the next target migration processor core after the migration, and the two or more inter-core migrations of the task object within the migration processor core set are terminated.

[0088] In the embodiment of the present disclosure, after a task object undergoes two inter-core migrations in a target processor core, the target processor core that receives the task object in the second inter-core migration can be determined as the processor core where the task object is located after the two inter-core migrations.

[0089] Optionally, the processor core can be tested for task migration needs. When it is detected that the task object cannot operate normally on the processor core and the core temperature of the processor core exceeds the set safety range after receiving the task object, it can be determined that the task object needs to continue to migrate between cores in the migration processor core set, that is, the processor core still has a task migration need after receiving the task object.

[0090] In this scenario, the remaining processor cores except the current target migration processor core can be obtained from the migration processor core set, and the next migration processor core for receiving the task object can be determined from the remaining migration processor cores as the next target migration processor core.

[0091] Furthermore, the task object is migrated from its current target migration processor core to the next target migration processor core by means of inter-core migration, and the next target migration processor core is continuously detected to determine whether there is a task migration requirement.

[0092] When it is detected that the next target processor core still has a task migration requirement, it is necessary to continue to perform inter-core migration on the task object within the range of the migration processor core set.

[0093] Accordingly, when it is detected that there is no task migration requirement for the next target processor core, the inter-core migration of the task object within the range of the migration processor core set can be terminated.

[0094] Optionally, in response to the core temperature of the target migration processor core being normal after the inter-core migration, the inter-core migration of the task object within the range of the migration processor core set is terminated.

[0095] In the embodiment of the present disclosure, a migration termination condition for terminating inter-core migration of a task object within a range of a set of processor cores may be determined based on the core temperature of the processor core.

[0096] It can be understood that, for any target migration processor core that has currently received the task object, when it is identified that the core temperature of the target migration processor core does not exceed the set safety range, it can be determined that the core temperature of the target migration processor core is normal, and it can be determined that there is no task migration requirement for the target migration processor core. In this scenario, it can be determined that the inter-core migration of the task object within the range of the migration processor core set meets the migration end condition, and the inter-core migration of the task object within the range of the migration processor core set can be ended, and the normal operation of the task object can be performed on the processor core that received the task object in the last round.

[0097] As an example, Figure 5As shown, for the core load of each processor core, it is identified whether the core load is less than or equal to the preset core load threshold, and the core load duration of some processor cores whose core load is less than or equal to the core load threshold obtained by screening is further judged, and then some processor cores whose core load is less than or equal to the preset core load threshold and whose core load duration is greater than or equal to the reference low-power cooling duration are obtained as migration processor cores, and then a migration processor core set is formed.

[0098] Furthermore, it is determined whether each migration processor core in the migration processor core set is a performance processor core, and the target migration processor core of the task object is determined from the performance processor cores that belong to the high-performance cores in the migration processor core set, and then the task object is migrated between cores twice or more within the range of the migration processor core set.

[0099] It should be noted that in Figure 5 The three conditions that the target migration processor core must meet are defined in Figure 5 In the scenario shown, when it is identified that the processor core does not meet Figure 5 If any of the limiting conditions shown is met, the subsequent conditions will not be judged and the current judgment process will be ended directly.

[0100] Optionally, in response to the processor core having the task migration demand not having the task migration demand, the task migration flag bit of the processor core having the task migration demand is cleared.

[0101] In the embodiment of the present disclosure, when any processor core is determined to be a processor core with a task migration requirement, its task migration flag bit will be set. In this scenario, when the task object on the processor core with a task migration requirement is migrated to other processor cores, it can be determined that the processor core does not have a task migration requirement.

[0102] In this scenario, identification information of task migration flag bits set for processor cores that do not require task migration may be eliminated.

[0103] Optionally, it is possible to determine whether there is still a need for task migration based on the core temperature identification of the processor core. That is, when the task object on the processor core with the task migration need is migrated to other processing cores, the processor core can enter a low-power state. When the processor core maintains this state for a set period of time, its core temperature can be restored to within a preset core temperature safety range. At this time, the abnormal core temperature of the processor core is resolved, and it can be determined that the task migration need of the processor core is resolved. Further, the task migration mark position can be eliminated.

[0104] As an example, Figure 4As shown, for a processor core with a task migration requirement, after the task object on it is migrated to another processor core, its core temperature can continue to be detected. When it is detected that its core temperature falls within the preset core temperature safety range, it can be determined that the core temperature abnormality of the processor core with the task migration requirement is resolved, as shown in FIG. Figure 4 As shown, the task migration flag bit can be cleared.

[0105] Accordingly, when it is detected that the abnormal core temperature condition of the processor core with task migration requirement has not been resolved, the next round of core temperature detection is waited for until the abnormal core temperature condition of the abnormal processing core is resolved.

[0106] Optionally, in the processor core set, each performance processor core in the performance processor core set belongs to the first power domain and the first clock domain, and each energy efficiency processor core in the energy efficiency processor core set belongs to the second power domain and the second clock domain.

[0107] In the embodiment of the present disclosure, a set of processor cores on the same CPU platform may include performance processing cores belonging to high-performance cores, and may also include energy-efficient processor cores belonging to high-energy-efficiency cores.

[0108] The set of performance processor cores may be determined as a performance processor core set, and the set of energy-efficiency processor cores may be determined as an energy-efficiency processor core set.

[0109] In this scenario, each performance processor core belongs to the same power domain, i.e., the first power domain, and each performance processor core belongs to the same clock domain, i.e., the first clock domain. Correspondingly, each energy-efficiency processor core belongs to the same power domain, i.e., the second power domain, and each energy-efficiency processor core belongs to the same clock domain, i.e., the second clock domain.

[0110] The first power domain and the second power domain may be different, and the first clock domain and the second clock domain may be different.

[0111] As an example, Figure 2 As shown, Figure 2 Among the processor cores 1, 2, ..., 10 shown, processor cores 1 to 6 are energy-efficiency processor cores, and processor cores 7 to 10 are performance processor cores.

[0112] Then processor cores 7 to 10 all belong to the first power domain and the first clock domain, and processor cores 1 to 6 all belong to the second power domain and the second clock domain.

[0113] It should be noted that the present disclosure does not limit the execution sequence of steps S301 to S304. Figure 3 The steps S301 to S304 are merely executed in sequence for example.

[0114] The task migration method proposed in the present invention performs two or more inter-core migrations of the task object within the range of the migration processor core set, thereby reducing the possibility of the task object causing the core temperature of the processor core to exceed the set safety range, realizing temperature control of the core temperature of each processor core, optimizing the temperature control method and temperature control effect of the core temperature of the processor core, reducing the possibility of abnormal core temperature causing abnormal operation of the processor core, improving the stability and safety of the operation of the CPU to which the processor core belongs, and optimizing the operating performance of the CPU.

[0115] Corresponding to the task migration methods proposed in the above-mentioned embodiments, an embodiment of the present disclosure also proposes a task migration device. Since the task migration device proposed in the embodiment of the present disclosure corresponds to the task migration methods proposed in the above-mentioned embodiments, the implementation method of the above-mentioned task migration method is also applicable to the task migration device proposed in the embodiment of the present disclosure, and will not be described in detail in the following embodiments.

[0116] Figure 6 FIG. 1 is a structural diagram of a task migration device according to an embodiment of the present disclosure. Figure 6 As shown, the task migration device 600 includes a first acquisition module 61, a second acquisition module 62 and a migration module 63, wherein:

[0117] A first acquisition module 61 is configured to acquire a task object to be migrated from a processor core that has a task migration requirement;

[0118] A second acquisition module 62 is configured to acquire load information and core temperature information of each processor core in a processor core set to which the processor core having the task migration requirement belongs;

[0119] The migration module 63 is configured to perform two or more inter-core migrations of task objects between processor cores based on the load information and the core temperature information, wherein the scope of the inter-core migration includes the processor cores that have task migration requirements.

[0120] In the embodiment of the present disclosure, the migration module 63 is also used to: obtain the core load and core load duration of each processor core in the processor core set based on the load information; obtain the migration processor core of the task object from the processor core set based on the core load and core load duration to obtain the migration processor core set of the task object, wherein the core load of the migration processor core is less than or equal to the preset core load threshold, and the core load duration is greater than or equal to the preset reference low power consumption cooling duration; perform two or more inter-core migrations on the task object in the migration processor core set.

[0121] In the embodiment of the present disclosure, the migration module 63 is also used to: obtain a performance processor core set from the processor core set based on processing performance; obtain the target migration processor core of the task object according to the core load and core load duration of each performance processor core set to obtain the target migration processor core set.

[0122] In the embodiment of the present disclosure, the migration module 63 is also used to: obtain the target migration processor check of the current migration round and the next migration round from the migration processor core set, and perform two inter-core migrations on the task object based on the target migration processor check; in response to the existence of task migration requirements for the target migration processor core where the task object is located after two inter-core migrations, obtain the next target migration processor core from the migration processor core set; continue to migrate the task object to the next target migration processor core, and continue to detect the migration requirements for the next target migration processor core after the migration until it is detected that there is no task migration requirement for the next target migration processor core after the migration, and end the two or more inter-core migrations of the task object within the migration processor core set.

[0123] In the embodiment of the present disclosure, the migration module 63 is further configured to: in response to the core temperature of the target migration processor core being normal after the inter-core migration, terminate the inter-core migration of the task object within the target migration processor core set.

[0124] In the embodiment of the present disclosure, the migration module 63 is further configured to: in response to the target migration processor core having no task migration requirement after the inter-core migration, run the task object on the target migration processor core.

[0125] In the embodiment of the present disclosure, the first acquisition module 61 is also used to: obtain the core temperature of each processor core in the processor core set based on a preset polling time interval; for any processor core, in response to the core temperature of the processor core not falling within the preset core temperature safety range, determine that the processor core is a processor core with a task migration requirement; obtain the task load of the task on the processor core with a task migration requirement; in response to the task load being greater than or equal to a preset task load threshold, determine that the task on the processor core with a task migration requirement is a task object to be migrated.

[0126] In the embodiment of the present disclosure, the apparatus further includes a marking module for: for any processor core, in response to the processor core being a processor core having task migration requirements, setting a task migration mark bit for the processor core having task migration requirements.

[0127] In the embodiment of the present disclosure, the marking module is further configured to: in response to a processor core having task migration demand not having task migration demand, clear the task migration flag bit of the processor core having task migration demand.

[0128] In the embodiment of the present disclosure, in the processor core set, each performance processor core in the performance processor core set belongs to the first power domain and the first clock domain, and each energy efficiency processor core in the energy efficiency processor core set belongs to the second power domain and the second clock domain.

[0129] The task migration device proposed in the present disclosure determines the migration processor core of the task object through the load information and core temperature information of each processor core, thereby improving the performance stability of the processor core after receiving the task object, and reduces the possibility of performance abnormalities of the processor core due to receiving the task object through two or more inter-core migrations of the task object between each processor core. In the scenario where the task object may cause the core temperature of the processor core to exceed the safe range, the core temperature stability of each processor core is improved, the core temperature control effect of each processor core is optimized, the stability and safety of the CPU operation to which the processor core belongs are improved, and the operating performance of the CPU is optimized.

[0130] To achieve the above embodiments, the present disclosure also provides an electronic device, a computer-readable storage medium, and a computer program product.

[0131] Figure 7 FIG. 7 is a block diagram of an electronic device 700 according to an embodiment of the present disclosure. Figure 7 As shown, the electronic device 700 includes a memory 701, a processor 702, and a computer program stored in the memory 701 and executable on the processor 702. When the processor 702 executes program instructions, the task migration method provided in the above embodiment is implemented.

[0132] In order to implement the above embodiments, the present disclosure further proposes a non-transitory computer-readable storage medium having a computer program stored thereon. When the program is executed by a processor, the task migration method provided in the above embodiments is implemented.

[0133] In order to implement the above embodiments, the present disclosure further proposes a computer program product having a computer program stored thereon. When the computer program is executed by a processor, the task migration method provided in the above embodiments is implemented.

[0134] In order to implement the above embodiments, the present disclosure also proposes a chip, including one or more interface circuits and one or more processors; the interface circuit is used to receive signals and send the signals to the processors, and the signals include computer instructions stored in a memory. When the processor executes the computer instructions, the chip executes the task migration method provided in the above embodiments.

[0135] In the description of the application, reference to "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" means that a particular feature, structure, material, or characteristic being described is included in at least one embodiment or example of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment or example. Furthermore, the described specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples. Moreover, the usage of the terms "first", "second" or "third" does not limit the quantity or order of the specific features, structures, materials or characteristics, but rather the term "first", "second" or "third" can be used to distinguish different features, structures, materials or characteristics, which can be combined in any suitable manner. Furthermore, the singular forms "a", "an" and "the" include plural references unless the context clearly dictates otherwise.

[0136] Furthermore, the terms "first", "second", or the like, merely denote different instances of a similar feature, structure, material or characteristic, without necessarily implying any relative importance or any particular order. Thus, a feature defined with "first" or "second" can implicitly or explicitly include at least one of the features. The meaning of "a", "an" and "the" includes plural references unless the context clearly dictates otherwise.

[0137] Any process or method descriptions or blocks in flow charts or otherwise described herein represent embodiments which can be managed as one or more modules, segments, or portions of code which include one or more steps for implementing specific logic functions or steps, and the terms in the description are used for causing or carrying out or upgrading of an action between other hardware under their control. The description of processes and methods of operations should be considered as merely illustrative of the principles of the application.

[0138] The logic and / or steps represented in flow diagrams or otherwise described herein, for example, can be considered as a sequence of instructions to implement logic functions, and can be embodied in any computer-readable medium for use by an instruction execution system, apparatus, or device, such as a computer-based system, processor- containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. In the context of this specification, a "computer-readable medium" can be any means that can contain, store, communicate, propagate or transport the program for use by or in connection with the instruction execution system, apparatus, or device. The computer-readable medium can be a machine-readable storage device (e.g., magnetic, optical or other) a machine-readable storage diskette (e.g., floppy disk, optical disk, etc.), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), optical fibers, and a portable compact disc read-only memory (CDROM). Further, the computer-readable medium can even be paper or other suitable medium upon which the program is printed, as the program can be electronically captured, for example via the optical scanner of a device or other electronic capture device, and then compiled, interpreted, or otherwise processed in a suitable manner, if necessary, and stored in a computer memory.

[0139] It should be understood that aspects of the application can be implemented in hardware, software, firmware or combinations thereof. In the above embodiments, various steps or methods can be implemented in software or firmware that is stored in memory and executed by a suitable instruction execution system. As such, in some embodiments, the steps or methods can be implemented in a combination of hardware and software. If implemented in hardware, as in another embodiment, any of the above techniques can be implemented with or without the use of a programmable digital signal processor (DSP) or other programmable device. In some embodiments, the steps or methods can be implemented using a combination of different hardware devices.

[0140] Those of skill in the art would understand that information and signals can be represented using any of a variety of technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that can be referenced throughout the above description can be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0141] In addition, each functional unit in each embodiment of the present application can be integrated in one processing module, or each unit can be physically present separately, or two or more units can be integrated in one module. The integrated module can be realized in the form of hardware or in the form of a software functional module. When the integrated module is realized in the form of a software functional module and sold or used as an independent product, it can also be stored in a computer readable storage medium.

[0142] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present application have been shown and described above, it should be understood that the above embodiments are exemplary and should not be construed as limiting the present application, and those skilled in the art can make changes, modifications, replacements and variations to the above embodiments within the scope of the present application.

[0143] It should be understood that various forms of flow shown above can be used to reorder, add or delete steps. For example, each step described in the present disclosure can be executed in parallel, sequentially or in different order, as long as the desired results of the technical solutions disclosed in the present disclosure can be achieved, which is not limited herein.

[0144] The above specific embodiments do not constitute a limitation on the protection scope of the present disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations and replacements can be made according to design requirements and other factors. Any modifications, equivalent replacements and improvements within the spirit and principles of the present disclosure should be included in the protection scope of the present disclosure.

Claims

1. A task migration method, characterized in that: The method comprises: Obtain the task object to be migrated from the processor core that has the task migration requirement; Obtaining load information and core temperature information of each processor core in the processor core set to which the processor core having the task migration requirement belongs; The task object is migrated between the processor cores twice or more according to the load information and the core temperature information, wherein the scope of the inter-core migration includes the processor core having the task migration requirement.

2. The method according to claim 1, characterized in that The inter-core migration of the task object between the processor cores two or more times according to the load information and the core temperature information, wherein the scope of the inter-core migration includes the processor cores having the task migration requirement, includes: According to the load information, obtaining the core load and core load duration of each processor core in the processor core set; Obtaining, according to the core load and the core load duration, a migration processor core of the task object from the processor core set to obtain a migration processor core set of the task object, wherein the core load of the migration processor core is less than or equal to a preset core load threshold, and the core load duration is greater than or equal to a preset reference low-power cooling duration; The task object is migrated between cores twice or more in the migration processor core set.

3. The method according to claim 2, characterized in that The method further comprises: Obtaining a performance processor core set from the processor core set based on processing performance; The target migration processor core of the task object is acquired according to the core load and core load duration of each of the performance processor core sets to obtain the target migration processor core set.

4. The method according to claim 2, characterized in that The performing two or more inter-core migrations of the task object in the migration processor core set includes: Obtaining target migration processor checksums for a current migration round and a next migration round from the migration processor core set, and performing two inter-core migrations on the task object based on the target migration processor checksums; In response to a task migration requirement existing in the target migration processor core where the task object is located after two inter-core migrations, obtaining a next target migration processor core from the migration processor core set; The task object is continued to be migrated to the next target migration processor core, and the migration demand detection is continued for the next target migration processor core after the migration until it is detected that there is no task migration demand for the next target migration processor core after the migration, and the two or more inter-core migrations of the task object within the range of the migration processor core set are terminated.

5. The method according to claim 2, characterized in that The performing two or more inter-core migrations of the task object in the migration processor core set includes: In response to the core temperature of the target migration processor core being normal after the inter-core migration, the inter-core migration of the task object within the target migration processor core set is terminated.

6. The method according to claim 5, characterized in that The method further comprises: In response to the target migration processor core having no task migration requirement after the inter-core migration, the task object is run on the target migration processor core.

7. The method according to claim 1, characterized in that The step of obtaining a task object to be migrated from a processor core that has a task migration requirement includes: Obtaining a core temperature of each processor core in the processor core set based on a preset polling time interval; For any processor core, in response to a core temperature of the processor core not falling within a preset core temperature safety range, determining that the processor core is the processor core having a task migration requirement; Obtaining a task load of the task on the processor core having the task migration requirement; In response to the task load being greater than or equal to a preset task load threshold, the task on the processor core having the task migration requirement is determined as the task object to be migrated.

8. The method according to claim 1, characterized in that The method further comprises: For any processor core, in response to the processor core being the processor core with the task migration requirement, a task migration flag bit is set for the processor core with the task migration requirement.

9. The method according to claim 8, characterized in that The method further comprises: In response to the processor core having the task migration requirement not having the task migration requirement, the task migration flag bit of the processor core having the task migration requirement is cleared.

10. The method according to any one of claims 1 to 9, characterized in that In the processor core set, each performance processor core in the performance processor core set belongs to a first power domain and a first clock domain, and each energy-efficiency processor core in the energy-efficiency processor core set belongs to a second power domain and a second clock domain.

11. A task migration device, characterized in that: The device comprises: A first acquisition module is used to acquire a task object to be migrated from a processor core that has a task migration requirement; A second acquisition module is configured to acquire load information and core temperature information of each processor core in a processor core set to which the processor core having the task migration requirement belongs; A migration module is used to perform two or more inter-core migrations of the task object between processor cores based on the load information and the core temperature information, wherein the scope of the inter-core migration includes the processor cores that have task migration requirements.

12. The device according to claim 11, characterized in that The migration module is further configured to: According to the load information, obtaining the core load and core load duration of each processor core in the processor core set; Obtaining, according to the core load and the core load duration, a migration processor core of the task object from the processor core set to obtain a migration processor core set of the task object, wherein the core load of the migration processor core is less than or equal to a preset core load threshold, and the core load duration is greater than or equal to a preset reference low-power cooling duration; The task object is migrated between cores twice or more in the migration processor core set.

13. The device according to claim 12, characterized in that The migration module is further configured to: Obtaining a performance processor core set from the processor core set based on processing performance; The target migration processor core of the task object is acquired according to the core load and core load duration of each of the performance processor core sets to obtain the target migration processor core set.

14. The device according to claim 12, characterized in that The migration module is further configured to: Obtaining target migration processor checksums for a current migration round and a next migration round from the migration processor core set, and performing two inter-core migrations on the task object based on the target migration processor checksums; In response to a task migration requirement existing in the target migration processor core where the task object is located after two inter-core migrations, obtaining a next target migration processor core from the migration processor core set; The task object is continued to be migrated to the next target migration processor core, and the migration demand detection is continued for the next target migration processor core after the migration until it is detected that there is no task migration demand for the next target migration processor core after the migration, and the two or more inter-core migrations of the task object within the range of the migration processor core set are terminated.

15. An electronic device, characterized in that: include: processor; a memory for storing executable instructions for the processor; The processor is configured to execute instructions to implement the method according to any one of claims 1 to 10. 16 . A computer-readable storage medium, wherein when instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to perform the method according to claim 1 .

17. A chip, characterized in that: The chip comprises one or more interface circuits and one or more processors; the interface circuit is used to receive a signal and send the signal to the processor, the signal including a computer instruction stored in a memory, and when the processor executes the computer instruction, the chip executes the steps of the method according to any one of claims 1 to 10.

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