Scheduling method and device for descriptors in host machine and electronic equipment

Abstract

The invention provides a scheduling method and device for descriptors in a host machine, electronic equipment and a readable storage medium, and relates to the technical field of artificial intelligence such as big data, cloud services, the Internet of Things and cloud computing. The scheduling method comprises the following steps: acquiring target equipment information and target virtual machine information according to a descriptor to be scheduled in a host machine; obtaining a first descriptor storage number according to the target equipment information, and obtaining a second descriptor storage number according to the target virtual machine information; in response to determining that the storage number of the first descriptors is smaller than the first descriptor waterline and the storage number of the second descriptors is smaller than the second descriptor waterline, storing the to-be-scheduled descriptors pulled from the host machine, and performing first updating on the storage number of the descriptors; and in response to determining that the current scheduling sequence is the target scheduling sequence, scheduling the stored to-be-scheduled descriptors, and performing second update on the number of the descriptors stored. The resource storage cost can be reduced, and the descriptor scheduling efficiency can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to artificial intelligence technologies such as big data, cloud services, the Internet of Things, and cloud computing. A method, apparatus, electronic device, and readable storage medium for scheduling descriptors in a host machine are provided. Background Art

[0002] Virtualization is a key component of cloud computing technology, but software-based virtualization consumes significant server computing resources. Data processing units (such as Smart NICs) offload I / O (Input / Output) through virtualization, freeing up significant processing power in the server CPU, allowing it to focus on general computing tasks.

[0003] In the prior art, the data processing unit directly pulls descriptors from the host machine, uses the DDR (Double Data Rate) cache in the data processing unit to store the pulled descriptors, and then schedules the stored descriptors. The above scheduling method adopted by the prior art has problems such as high cost of storage resources for storing descriptors and increased scheduling delay. If DDR is not used and the RAM (Random Access Memory) in the data processing unit is directly used, it will also lead to the problem of being unable to schedule descriptors due to head blocking. Summary of the Invention

[0004] According to a first aspect of the present disclosure, a scheduling method for descriptors in a host machine is provided, comprising: obtaining target device information and target virtual machine information based on descriptors to be scheduled in the host machine; obtaining a first descriptor storage number corresponding to the target device based on the target device information, and obtaining a second descriptor storage number corresponding to the target virtual machine based on the target virtual machine information; in response to determining that the first descriptor storage number is less than a first descriptor waterline and the second descriptor storage number is less than a second descriptor waterline, storing the descriptors to be scheduled pulled from the host machine and performing a first update on the first descriptor storage number and the second descriptor storage number; in response to determining that the current scheduling order is a target scheduling order, scheduling the stored descriptors to be scheduled and performing a second update on the first descriptor storage number and the second descriptor storage number.

[0005] According to a second aspect of the present disclosure, a scheduling device for descriptors in a host machine is provided, comprising: a first acquisition unit, configured to acquire target device information and target virtual machine information based on the descriptors to be scheduled in the host machine; a second acquisition unit, configured to acquire a first descriptor storage number corresponding to the target device based on the target device information, and to acquire a second descriptor storage number corresponding to the target virtual machine based on the target virtual machine information; a pulling unit, configured to, in response to determining that the first descriptor storage number is less than a first descriptor waterline and the second descriptor storage number is less than a second descriptor waterline, store the descriptors to be scheduled pulled from the host machine and perform a first update on the first descriptor storage number and the second descriptor storage number; and a scheduling unit, configured to, in response to determining that the current scheduling order is the target scheduling order, schedule the stored descriptors to be scheduled and perform a second update on the first descriptor storage number and the second descriptor storage number.

[0006] According to a third aspect of the present disclosure, an electronic device is provided, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method described above.

[0007] According to a fourth aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable the computer to execute the method as described above.

[0008] According to a fifth aspect of the present disclosure, a computer program product is provided, comprising a computer program, which implements the method described above when executed by a processor.

[0009] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The accompanying drawings are used to better understand the present invention and do not constitute a limitation of the present invention.

[0011] Figure 1 is a schematic diagram according to a first embodiment of the present disclosure;

[0012] Figure 2 is a schematic diagram according to a second embodiment of the present disclosure;

[0013] Figure 3 is a schematic diagram according to a third embodiment of the present disclosure;

[0014] Figure 4 is a schematic diagram according to a fourth embodiment of the present disclosure;

[0015] Figure 5 is a schematic diagram according to a fifth embodiment of the present disclosure;

[0016] Figure 6 It is a block diagram of an electronic device used to implement the method for scheduling descriptors in a host machine according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0017] The following description of exemplary embodiments of the present disclosure is made in conjunction with the accompanying drawings, and various details of the embodiments of the present disclosure are included to facilitate understanding. These details should be considered as merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and mechanisms are omitted in the following description.

[0018] Figure 1 Schematic diagram of the first embodiment of the present disclosure. Figure 1 As shown, the scheduling method for descriptors in the host machine of this embodiment specifically includes the following steps:

[0019] S101. Obtain target device information and target virtual machine information according to the description to be scheduled in the host machine;

[0020] S102: Acquire the number of first descriptors stored in the target device according to the target device information, and acquire the number of second descriptors stored in the target virtual machine according to the target virtual machine information;

[0021] S103: In response to determining that the number of stored first descriptors is less than a first descriptor watermark and the number of stored second descriptors is less than a second descriptor watermark, storing the to-be-scheduled description pulled from the host machine, and performing a first update on the number of stored first descriptors and the number of stored second descriptors;

[0022] S104 . In response to determining that the current scheduling order is the target scheduling order, schedule the stored descriptors to be scheduled, and perform a second update on the number of stored first descriptors and the number of stored second descriptors.

[0023] The scheduling method for descriptors in the host machine of this embodiment adopts a method of comparing the number of first descriptor storages and the number of second descriptor storages obtained according to the descriptors to be scheduled with the first descriptor waterline and the second descriptor waterline respectively to determine whether to pull the descriptors to be scheduled from the host machine for scheduling. On the one hand, based on the dynamic waterline configuration of the speed limit value, the descriptors pulled from the host machine are controlled, so that the number of descriptors that need to be stored is greatly reduced, thereby reducing the cost of storage resources for storing descriptors. On the other hand, through the two-level waterline set, the head blocking problem caused by the large number of devices under a single virtual machine can be effectively avoided, ensuring that the storage resources for storing descriptors are effectively utilized, thereby improving the scheduling efficiency of descriptors in the host machine.

[0024] The execution subject of the scheduling method for descriptors in the host machine of this embodiment is the data processing unit (DPU), specifically the FPGA module in the data processing unit; the data processing unit in this embodiment can be a smart network card, or it can be other devices with similar functions to the smart network card.

[0025] The data processing unit (eg, smart network card) in this embodiment includes an FPGA (Field-Programmable Gate Array) module and a SOC (System on Chip), and the FPGA module includes on-chip RAM.

[0026] In this embodiment, the descriptor to be scheduled in the host is a data structure used to manage and execute input / output operations, which includes all necessary information of one or more network data packets, such as the storage location, length, status, attributes, etc. of the network data packets; the descriptor to be scheduled in this embodiment is used to trigger the data processing unit to send a network data packet (i.e., outbound).

[0027] In this embodiment, the head blocking problem is that due to the speed limit of individual devices or virtual machines, the storage space of the descriptors (such as on-chip RAM) is filled with descriptors and there is no additional space, which makes it impossible for other devices or virtual machines to pull descriptors from the host machine and schedule them.

[0028] When executing S101 and obtaining target device information and target virtual machine information according to the descriptor to be scheduled in the host machine, this embodiment can first determine the target device to which the descriptor to be scheduled belongs based on the queue information corresponding to the descriptor to be scheduled, obtain the device information of the corresponding target device as the target device information, and then determine the target virtual machine to which the target device belongs based on the target device information, and obtain the virtual machine information of the corresponding target virtual machine as the target virtual machine information.

[0029] In this embodiment, queue information corresponding to the descriptor to be scheduled may be obtained according to the queue to which the descriptor to be scheduled belongs in the host machine, and then the device to which the queue belongs may be determined according to the queue information.

[0030] In this embodiment, the target device information and target virtual machine information corresponding to the descriptor to be scheduled obtained in S101 may be identification information corresponding to the target device and the target virtual machine, such as the device number of the target device and the virtual machine number of the target virtual machine.

[0031] After executing S101 to obtain target device information and target virtual machine information, this embodiment executes S102 to obtain the number of first descriptors stored corresponding to the target device according to the target device information, and obtains the number of second descriptors stored corresponding to the target virtual machine according to the target virtual machine information.

[0032] Among them, the first descriptor storage number obtained by executing S102 in this embodiment is the number of descriptors stored in the data processing unit at the current moment and corresponding to the target device; the second descriptor storage number obtained by executing S102 in this embodiment is the number of descriptors stored in the data processing unit at the current moment and corresponding to the target virtual machine.

[0033] Since the target virtual machine may include multiple devices, the number of first descriptor storages obtained in this embodiment is less than or equal to the number of second descriptor storages.

[0034] It can be understood that the FPGA module in the data processing unit of this embodiment may include a descriptor statistics module, which is used to count the number of descriptors corresponding to different devices or virtual machines stored in the data processing unit according to device granularity and virtual machine granularity (for example, device number and virtual machine number).

[0035] Therefore, when executing S102 in this embodiment, the descriptor statistics module may query according to the target device information and the target virtual machine information, thereby obtaining the first descriptor storage number and the second descriptor storage number according to the query result.

[0036] In addition, when executing S102, this embodiment can also query the area used to store descriptors in the data processing unit (such as on-chip RAM) based on the target device information and the target virtual machine information, so as to obtain the first descriptor storage number and the second descriptor storage number based on the query results.

[0037] After executing S102 to obtain the first descriptor storage number and the second descriptor storage number, this embodiment executes S103 in response to determining that the first descriptor storage number is less than the first descriptor waterline and the second descriptor storage number is less than the second descriptor waterline, stores the to-be-scheduled descriptors pulled from the host machine, and performs a first update on the first descriptor storage number and the second descriptor storage number.

[0038] When executing S103, this embodiment first determines based on the number of descriptor storages and the corresponding descriptor waterline to determine whether to pull the descriptor to be scheduled from the host machine. Then, if it is determined to pull, a descriptor pulling action is initiated to pull the descriptor to be scheduled located in the host machine and store it. Finally, the number of descriptor storages is first updated.

[0039] It can be understood that if it is determined not to pull, it indicates that the number of descriptor storage at the current moment has reached the waterline of the target device and / or target virtual machine. This embodiment can go to execution S102 after a period of time, and continue to determine whether to pull the descriptors to be scheduled located in the host machine based on the comparison result between the number of descriptor storage obtained at the next moment and the descriptor waterline, and repeat this cycle until the descriptors to be scheduled are pulled from the host machine.

[0040] In this embodiment, the descriptor watermark is used to reflect the maximum number of descriptors that can be stored in the data processing unit of the corresponding device or virtual machine; the first descriptor watermark corresponds to the target device, and the second descriptor watermark corresponds to the target virtual machine.

[0041] When executing S103 to store the descriptors to be scheduled pulled from the host machine, this embodiment can store the descriptors to be scheduled pulled from the host machine in the on-chip RAM of the data processing unit; wherein the on-chip RAM is located inside the FPGA module.

[0042] That is to say, since this embodiment limits the descriptors stored in the data processing unit based on the dynamic waterline configuration of the speed limit value, the number of descriptors that need to be stored is greatly reduced, so the problem of descriptors requiring large storage resources does not arise, thereby reducing the cost of storage resources; on this basis, this embodiment can use the relatively precious on-chip RAM to store descriptors. Compared with storing descriptors in the off-chip DDR in the data processing unit (that is, double-rate synchronous dynamic random access memory, DDR is located outside the FPGA module), this embodiment avoids the read and write interaction between the off-chip DDR during scheduling, thereby reducing the scheduling delay of the descriptor.

[0043] It is understandable that in some scenarios where the delay requirement is not high, this embodiment may also store the to-be-scheduled descriptor pulled from the host machine into an off-chip DDR when executing S103 .

[0044] After executing S103 to store the descriptors to be scheduled pulled from the host machine, this embodiment performs a first update on the number of first descriptor storages and the number of second descriptor storages; the first update in this embodiment is specifically to add one to the values ​​of the number of first descriptor storages and the number of second descriptor storages.

[0045] It can be understood that in this embodiment, the waterline configuration module in the FPGA module can obtain the descriptor waterline from the SOC of the data processing unit, the descriptor pulling module in the FPGA module can pull the descriptors to be scheduled from the host machine, and the descriptor statistics module in the FPGA module can perform the first update on the number of descriptors.

[0046] In this embodiment, after executing S103 to perform a first update on the number of first descriptor storages and the number of second descriptor storages, executing S104 in response to determining that the current scheduling order is the target scheduling order, schedules the stored descriptors to be scheduled, and performs a second update on the number of first descriptor storages and the number of second descriptor storages.

[0047] When executing S104 in this embodiment, the scheduling order corresponding to the descriptors to be scheduled may be determined according to the descriptor information of the descriptors to be scheduled, as the target scheduling order.

[0048] In this embodiment, the descriptor information is key information used for scheduling the descriptor, such as the priority information of the device and virtual machine to which the descriptor belongs, the length information of the descriptor, the queue information of the queue to which the descriptor belongs, the speed limit information of the device and virtual machine to which the descriptor belongs, etc.

[0049] When executing S104, this embodiment can use HQoS (Hierarchical Quality of Service) technology to determine the target scheduling order of the descriptors to be scheduled based on the descriptor information, thereby achieving the purpose of multi-level scheduling of different descriptors based on priority information, queue information, length information or rate limit information.

[0050] It is understandable that in this embodiment, the descriptor scheduling module in the FPGA module can determine the target scheduling order of the descriptors to be scheduled according to the descriptor information.

[0051] After executing S104 to determine the target scheduling order corresponding to the descriptors to be scheduled, this embodiment schedules the stored descriptors to be scheduled in response to determining that the current scheduling order is the target scheduling order, and performs a second update on the number of first descriptor storages and the number of second descriptor storages.

[0052] When executing S104 in this embodiment, when the current scheduling order is the target scheduling order, that is, it is determined that the to-be-scheduled descriptor corresponding to the target scheduling order is to be scheduled, the stored to-be-scheduled descriptor is first pulled out from the data processing unit (specifically, the on-chip RAM) (that is, the data processing unit no longer stores the to-be-scheduled descriptor, thereby freeing up a certain amount of storage space), and then the storage location of the network data packet corresponding to the to-be-scheduled descriptor in the host machine is determined, and finally, the network data packet is obtained from the host machine according to the storage location and sent.

[0053] In this embodiment, after executing S104 to schedule the stored descriptors to be scheduled, the first descriptor storage number and the second descriptor storage number are second updated. The second update in this embodiment is specifically to reduce the values ​​of the first descriptor storage number and the second descriptor storage number by one.

[0054] That is to say, when this embodiment stores the to-be-scheduled descriptors pulled from the host machine in the data processing unit, the value of the number of descriptors corresponding to the to-be-scheduled descriptors is increased by one (i.e., the first update); when the stored to-be-scheduled descriptors are pulled from the data processing unit, the value of the number of descriptors corresponding to the to-be-scheduled descriptors is decreased by one (i.e., the second update), thereby dynamically adjusting the number of descriptors through the first update and the second update, ensuring that the number of descriptors stored in the data processing unit does not exceed the corresponding waterline, thereby avoiding the occurrence of the head blocking problem.

[0055] It can be understood that in this embodiment, the descriptor scheduling module in the FPGA module can pull the stored descriptors to be scheduled, obtain the network data packets corresponding to the descriptors to be scheduled from the host machine and send them, and the descriptor statistics module in the FPGA module can perform a second update on the number of descriptors.

[0056] Figure 2 is a schematic diagram according to a second embodiment of the present disclosure. As shown in Figure 2 , the embodiment shows the steps when the descriptor pipeline is acquired:

[0057] S201, acquiring a device limit value of the target device and a virtual machine limit value of the target virtual machine;

[0058] S202, according to a first correspondence table between the limit value and the descriptor pipeline, taking the descriptor pipeline corresponding to the device limit value as the first descriptor pipeline, and taking the descriptor pipeline corresponding to the virtual machine limit value as the second descriptor pipeline.

[0059] That is, the embodiment pre-sets the first correspondence table between the limit value and the descriptor pipeline, and then acquires the first descriptor pipeline and the second descriptor pipeline according to the limit value corresponding to the target device or the target virtual machine through the first correspondence table, which improves the accuracy of the acquired descriptor pipeline, and thus the pulling process of the to-be-scheduled descriptor from the host machine can be combined with the dynamic pipeline configuration based on the limit value, reducing the number of descriptor storage and improving the pulling accuracy of the to-be-scheduled descriptor.

[0060] When S201 is performed, the limit value can be acquired in real time by performing performance testing on the device or the virtual machine, or a preset limit value can be acquired according to device information or virtual machine information. The preset limit value is previously acquired by performing performance testing on the device or the virtual machine.

[0061] In the embodiment, the first correspondence table is stored in the SOC in the data processing unit, and the pipeline configuration module in the FPGA module can acquire the descriptor pipeline according to the SOC. The greater the limit value of the device or the virtual machine, the greater the descriptor pipeline corresponding to the device or the virtual machine in the first correspondence table. The descriptor pipeline corresponding to different limit values can be determined by theoretical calculation or by board testing.

[0062] When S202 is performed, the descriptor pipeline corresponding to the device limit value in the first correspondence table is taken as the first descriptor pipeline, and the descriptor pipeline corresponding to the virtual machine limit value in the first correspondence table is taken as the second descriptor pipeline.

[0063] However, in actual scenarios, different devices or different virtual machines correspond to different limit values, so when the number of devices or virtual machines is large, the pipeline corresponding to each limit value cannot be acquired, resulting in that there is no pipeline corresponding to a certain limit value in the first correspondence table.

[0064] Therefore, the embodiment can further include the following content when performing S202: in response to determining that the descriptor pipeline corresponding to the device limit value and / or the virtual machine limit value does not exist in the first correspondence table, determining a target limit value which is one level higher than the device limit value and / or the virtual machine limit value in the first correspondence table; and taking the descriptor pipeline corresponding to the target limit value in the first correspondence table as the first descriptor pipeline and / or the second descriptor pipeline.

[0065] That is to say, when the first correspondence table does not include the correspondence between all limit values and descriptor pipelines, the embodiment can determine the descriptor pipeline according to the limit value which is one level higher than the current limit value in the first correspondence table, so as to ensure that the descriptor pipeline can be obtained and the problem that the obtained descriptor pipeline deviates greatly from the actual situation is avoided.

[0066] For example, if the first correspondence table includes the descriptor pipeline corresponding to 1Mpps, the descriptor pipeline corresponding to 3Mpps, the descriptor pipeline corresponding to 5Mpps, the descriptor pipeline corresponding to 10Mpps, etc., if the obtained device limit value is 4Mpps, the embodiment can obtain the descriptor pipeline corresponding to 5Mpps as the first descriptor pipeline corresponding to the target device when performing S202.

[0067] In addition, when the number of devices or the number of virtual machines is small, the embodiment can also obtain the descriptor pipeline according to the second correspondence table between the device information / virtual machine information and the descriptor pipeline when obtaining the descriptor pipeline, take the descriptor pipeline corresponding to the target device information in the second correspondence table as the first descriptor pipeline, and take the descriptor pipeline corresponding to the target virtual machine information in the second correspondence table as the second descriptor pipeline.

[0068] That is to say, the embodiment can obtain the first descriptor pipeline or the second descriptor pipeline according to the descriptor pipeline corresponding to the device information / virtual machine information in the second correspondence table without using the limit value corresponding to the device or the virtual machine.

[0069] It can be understood that since the device or the virtual machine can have multiple limit values at the same time, for example, the limit value of bits per second (BPS) and the limit value of packets per second (PPS), the embodiment can take the maximum value of the descriptor pipelines corresponding to different limit values as the descriptor pipeline corresponding to the device or the virtual machine when configuring the descriptor pipeline corresponding to the device or the virtual machine in the second correspondence table.

[0070] For example, if the descriptor watermark corresponding to the BPS speed limit value of a device is 8 and the descriptor watermark corresponding to the PPS speed limit value is 4, then in this embodiment, 8 is used as the descriptor watermark corresponding to the device when configuring the second correspondence table.

[0071] It can be understood that the second correspondence table is stored in the SOC in the data processing unit. In this embodiment, the waterline configuration module in the FPGA module can obtain the descriptor waterline through the SOC.

[0072] Figure 3 is a schematic diagram according to a third embodiment of the present disclosure. Figure 3 The structure diagram of the scheduling system for descriptors in the host machine of this embodiment is shown in the figure: the scheduling system includes a host machine and a data processing unit, and the data processing unit includes an FPGA module and a SOC; wherein the FPGA module includes a descriptor pulling module, a descriptor statistics module, a waterline configuration module, a descriptor scheduling module and a descriptor storage pool (i.e., on-chip RAM).

[0073] In this embodiment, the descriptor pulling module is used to pull the descriptor to be scheduled from the host machine and store the pulled descriptor to be scheduled in the descriptor storage pool when determining that the number of first descriptor storages and the number of second descriptor storages corresponding to the descriptor to be scheduled counted in the descriptor statistics module meet the preset requirements based on the first descriptor waterline and the second descriptor waterline corresponding to the descriptor to be scheduled in the waterline configuration module.

[0074] The descriptor statistics module is used to count the number of descriptors corresponding to different devices and different virtual machines stored in the descriptor storage pool, and perform a first update or a second update on the number of descriptor storage when a descriptor is stored in the descriptor storage pool or when a descriptor is taken out of the descriptor storage pool.

[0075] The waterline configuration module is used to obtain a first correspondence table including the correspondence between the speed limit value and the descriptor waterline from the SOC, so that the descriptor pulling module obtains the first descriptor waterline and the second descriptor waterline corresponding to the descriptor to be scheduled according to the first correspondence table.

[0076] The descriptor scheduling module is used, on the one hand, to determine the target scheduling order of the descriptors to be scheduled based on the descriptor information of the descriptors to be scheduled obtained from the descriptor storage pool; on the other hand, it is used to pull the descriptors to be scheduled from the descriptor storage pool and obtain the network data packets corresponding to the descriptors to be scheduled from the host machine for sending.

[0077] The descriptor storage pool is used to store the to-be-scheduled descriptors pulled from the host by the descriptor pull module.

[0078] The scheduling system for descriptors in the host machine of this embodiment realizes dynamic waterline configuration based on the speed limit value through the mutual cooperation between the descriptor pulling module, descriptor statistics module, waterline configuration module, descriptor scheduling module, descriptor storage pool in the FPGA module and the SOC outside the FPGA module, so as to reduce the cost of storage resources used to store descriptors and improve the scheduling efficiency of descriptors in the host machine.

[0079] Figure 4 is a schematic diagram according to a fourth embodiment of the present disclosure. Figure 4 , a flowchart of the descriptor scheduling method for the host machine of this embodiment is shown in the figure: S401, polling scheduling is performed according to the device number; S402, the virtual machine number is obtained according to the device number; S403, according to the device number and the virtual machine number, the number of descriptor storages of the corresponding device and the number of descriptor storages of the corresponding virtual machine are obtained; S404, it is determined whether the obtained number of descriptor storages is less than the corresponding descriptor waterline, if so, execute S405, otherwise jump to execute S401; S405, pull the descriptor corresponding to the device number from the host machine; S406, store the pulled descriptor, and update the corresponding number of descriptor storages, for example, store it in the on-chip RAM; S407, schedule the descriptor according to the descriptor information; S408, after completing the scheduling of the descriptor, take out the stored descriptor and perform a package pulling operation according to the taken out descriptor, and update the corresponding number of descriptor storages.

[0080] That is to say, this embodiment can also schedule the descriptor corresponding to a device in the host machine through polling scheduling, and the pulling of descriptors during the scheduling process fully considers the dynamic waterline configuration based on the speed limit value, thereby greatly reducing the storage resources required for the descriptor while also improving the scheduling efficiency of the descriptor.

[0081] Figure 5 Schematic diagram of the fifth embodiment of the present disclosure. Figure 5 As shown, the scheduling device 500 for descriptors in a host machine of this embodiment includes:

[0082] The first acquisition unit 501 is used to obtain target device information and target virtual machine information according to the to-be-scheduled descriptor in the host machine;

[0083] A second acquiring unit 502 is configured to acquire the number of first descriptors stored in the corresponding target device according to the target device information, and acquire the number of second descriptors stored in the corresponding target virtual machine according to the target virtual machine information;

[0084] The pulling unit 503 is configured to, in response to determining that the number of stored first descriptors is less than a first descriptor watermark and the number of stored second descriptors is less than a second descriptor watermark, store the to-be-scheduled descriptors pulled from the host machine, and perform a first update on the number of stored first descriptors and the number of stored second descriptors;

[0085] The scheduling unit 504 is configured to schedule the stored descriptors to be scheduled in response to determining that the current scheduling order is the target scheduling order, and perform a second update on the number of stored first descriptors and the number of stored second descriptors.

[0086] The scheduling device for descriptors in the host machine of this embodiment is located in the data processing unit (DPU), specifically the FPGA module in the data processing unit; the data processing unit in this embodiment can be a smart network card, or it can be other devices with similar functions to the smart network card.

[0087] The data processing unit (eg, smart network card) in this embodiment includes an FPGA (Field-Programmable Gate Array) module and a SOC (System on Chip), and the FPGA module includes on-chip RAM.

[0088] When the first acquisition unit 501 obtains the target device information and the target virtual machine information based on the descriptor to be scheduled in the host machine, it can first determine the target device to which the descriptor to be scheduled belongs based on the queue information corresponding to the descriptor to be scheduled, obtain the device information of the corresponding target device as the target device information, and then determine the target virtual machine to which the target device belongs based on the target device information, and obtain the virtual machine information of the corresponding target virtual machine as the target virtual machine information.

[0089] In this embodiment, the first obtaining unit 501 may obtain queue information corresponding to the descriptor to be scheduled according to the queue to which the descriptor to be scheduled belongs in the host machine, and further determine the device to which the queue belongs according to the queue information.

[0090] The target device information and target virtual machine information corresponding to the to-be-scheduled descriptor obtained by the first obtaining unit 501 may be identification information corresponding to the target device and the target virtual machine, such as the device number of the target device and the virtual machine number of the target virtual machine.

[0091] In this embodiment, after the first acquiring unit 501 acquires the target device information and the target virtual machine information, the second acquiring unit 502 acquires the number of first descriptors stored corresponding to the target device according to the target device information, and acquires the number of second descriptors stored corresponding to the target virtual machine according to the target virtual machine information.

[0092] Among them, the number of first descriptor storages obtained by the second acquisition unit 502 is the number of descriptors stored in the data processing unit at the current moment and corresponding to the target device; the number of second descriptor storages obtained by the second acquisition unit 502 is the number of descriptors stored in the data processing unit at the current moment and corresponding to the target virtual machine.

[0093] In this embodiment, after the second acquisition unit 502 obtains the first descriptor storage number and the second descriptor storage number, the pulling unit 503 stores the descriptors to be scheduled pulled from the host machine in response to determining that the first descriptor storage number is less than the first descriptor waterline and the second descriptor storage number is less than the second descriptor waterline, and performs a first update on the first descriptor storage number and the second descriptor storage number.

[0094] The pulling unit 503 first determines based on the number of descriptor storage and the corresponding descriptor waterline to determine whether to pull the descriptor to be scheduled from the host machine. Then, if it is determined to pull, it initiates a descriptor pulling action to pull the descriptor to be scheduled located in the host machine and store it. Finally, the number of descriptor storage is first updated.

[0095] It can be understood that if it is determined not to pull, it indicates that the number of descriptor storages at the current moment has reached the waterline of the target device and / or target virtual machine. In this embodiment, after a period of time, the second acquisition unit 502 can continue to execute the operation of obtaining the number of descriptor storages, thereby determining whether to pull the descriptor to be scheduled based on the comparison result between the number of descriptor storages obtained at the next moment and the descriptor waterline, and repeating this cycle until the descriptor to be scheduled is pulled from the host machine.

[0096] In this embodiment, the descriptor waterline is used to reflect the maximum number of descriptors that can be stored in the data processing unit of the corresponding device or virtual machine.

[0097] When storing the to-be-scheduled descriptors pulled from the host machine, the pulling unit 503 may store the to-be-scheduled descriptors pulled from the host machine into the on-chip RAM in the data processing unit; wherein the on-chip RAM is located inside the FPGA module.

[0098] That is to say, since the pulling unit 503 limits the descriptors stored in the data processing unit based on the dynamic waterline configuration of the speed limit value, the number of descriptors that need to be stored is greatly reduced, so there will be no problem of descriptors requiring large storage resources, thereby reducing the cost of storage resources; on this basis, the pulling unit 503 can use on-chip RAM to store descriptors. Compared with storing the descriptors in the off-chip DDR in the data processing unit, it avoids the read and write interaction between the off-chip DDR during scheduling, thereby reducing the scheduling delay of the descriptor.

[0099] When obtaining the descriptor waterline, the pulling unit 503 can adopt the following method: obtain the device speed limit value of the target device and the virtual machine speed limit value of the target virtual machine; according to the first correspondence table between the speed limit value and the descriptor waterline, the descriptor waterline corresponding to the device speed limit value is used as the first descriptor waterline, and the descriptor waterline corresponding to the virtual machine speed limit value is used as the second descriptor waterline.

[0100] That is to say, this embodiment pre-sets a first correspondence table between the speed limit value and the descriptor waterline, and then the pulling unit 503 obtains the first descriptor waterline and the second descriptor waterline according to the speed limit value of the corresponding target device or target virtual machine through the first correspondence table, thereby improving the accuracy of the obtained descriptor waterline, so that the pulling process of the descriptor to be scheduled from the host machine can be combined with the dynamic waterline configuration based on the speed limit value, reducing the number of stored descriptors, and thus improving the pulling accuracy of the descriptor to be scheduled.

[0101] The pulling unit 503 can obtain the speed limit value in real time by performing performance testing on the device or virtual machine, or can obtain the preset speed limit value based on the device information or virtual machine information, where the preset speed limit value is previously obtained by performing performance testing on the device or virtual machine.

[0102] However, in actual scenarios, since different devices or different virtual machines correspond to different speed limit values, when the number of devices or virtual machines is large, it is impossible to obtain the waterline corresponding to each speed limit value, resulting in the absence of a waterline corresponding to a certain speed limit value in the first correspondence table.

[0103] Therefore, the pulling unit 503 can also be used to perform the following: in response to determining that there is no descriptor waterline corresponding to the device speed limit value and / or virtual machine speed limit value in the first correspondence table, determine a target speed limit value in the first correspondence table that is one level higher than the device speed limit value and / or virtual machine speed limit value; use the descriptor waterline corresponding to the target speed limit value in the first correspondence table as the first descriptor waterline and / or the second descriptor waterline.

[0104] That is to say, when the pulling unit 503 does not include all the correspondences between speed limit values ​​and descriptor waterlines in the first correspondence table, the descriptor waterline can be determined based on the speed limit value in the first correspondence table that is one level higher than the current speed limit value, thereby ensuring that the descriptor waterline can be acquired and avoiding the problem of a large deviation between the acquired descriptor waterline and the actual situation.

[0105] In addition, when the number of devices or virtual machines is small, the pulling unit 503 can also use the descriptor waterline corresponding to the target device information as the first descriptor waterline and the descriptor waterline corresponding to the target virtual machine information as the second descriptor waterline when obtaining the descriptor waterline based on the second correspondence table between the device information / virtual machine information and the descriptor waterline.

[0106] That is, the pulling unit 503 can obtain the first descriptor waterline or the second descriptor waterline according to the descriptor waterline corresponding to the device information or virtual machine information in the second correspondence without using the rate limit value corresponding to the device or virtual machine.

[0107] After storing the descriptors to be scheduled pulled from the host machine, the pulling unit 503 performs a first update on the number of first descriptor storages and the number of second descriptor storages. The first update in this embodiment is specifically to add one to the values ​​of the number of first descriptor storages and the number of second descriptor storages.

[0108] In this embodiment, after the pulling unit 503 performs a first update on the number of first descriptor storages and the number of second descriptor storages, the scheduling unit 504 schedules the stored descriptors to be scheduled in response to determining that the current scheduling order is the target scheduling order, and performs a second update on the number of first descriptor storages and the number of second descriptor storages.

[0109] The scheduling unit 504 may determine, according to the descriptor information of the descriptors to be scheduled, a scheduling order corresponding to the descriptors to be scheduled as a target scheduling order.

[0110] In this embodiment, the descriptor information is key information used for scheduling the descriptor, such as the priority information of the device and virtual machine to which the descriptor belongs, the length information of the descriptor, the queue information of the queue to which the descriptor belongs, the speed limit information of the device and virtual machine to which the descriptor belongs, etc.

[0111] The scheduling unit 504 can use HQoS (Hierarchical Quality of Service) technology to determine the target scheduling order of the descriptors to be scheduled based on the descriptor information, thereby achieving the purpose of multi-level scheduling of different descriptors based on priority information, queue information, length information or rate limit information.

[0112] In this embodiment, after the scheduling unit 504 determines the target scheduling order, in response to determining that the current scheduling order is the target scheduling order, the stored descriptors to be scheduled are scheduled, and the number of stored first descriptors and the number of stored second descriptors are second updated.

[0113] When the scheduling unit 504 determines that the current scheduling order is the target scheduling order, that is, it determines that the to-be-scheduled descriptor is to be scheduled, it first pulls out the stored to-be-scheduled descriptor from the data processing unit (that is, the to-be-scheduled descriptor is no longer stored in the data processing unit), and then determines the storage location of the network data packet corresponding to the to-be-scheduled descriptor in the host machine, and finally obtains the network data packet according to the storage location and sends it.

[0114] After scheduling the stored descriptors to be scheduled, the scheduling unit 504 performs a second update on the number of first descriptor storages and the number of second descriptor storages. The second update in this embodiment is specifically to reduce the values ​​of the number of first descriptor storages and the number of second descriptor storages by one.

[0115] That is to say, when this embodiment stores the to-be-scheduled descriptors pulled from the host machine in the data processing unit, the value of the number of descriptors corresponding to the to-be-scheduled descriptors is increased by one (i.e., the first update); when the stored to-be-scheduled descriptors are pulled from the data processing unit, the value of the number of descriptors corresponding to the to-be-scheduled descriptors is decreased by one (i.e., the second update), thereby dynamically adjusting the number of descriptors through the first update and the second update, ensuring that the number of descriptors stored in the data processing unit does not exceed the corresponding waterline, thereby avoiding the occurrence of the head blocking problem.

[0116] In the technical solutions disclosed herein, the acquisition, storage, and application of user personal information involved comply with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0117] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium, and a computer program product.

[0118] like Figure 6, is a block diagram of an electronic device for a method for scheduling descriptors in a host machine according to an embodiment of the present disclosure. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0119] like Figure 6 As shown, the device 600 includes a computing unit 601, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 602 or a computer program loaded from a storage unit 608 into a random access memory (RAM) 603. Various programs and data required for the operation of the device 600 can also be stored in the RAM 603. The computing unit 601, the ROM 602, and the RAM 603 are connected to each other via a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0120] Various components in device 600 are connected to I / O interface 605, including: an input unit 606, such as a keyboard, mouse, etc.; an output unit 607, such as various types of displays, speakers, etc.; a storage unit 608, such as a magnetic disk, optical disk, etc.; and a communication unit 609, such as a network card, modem, wireless communication transceiver, etc. Communication unit 609 allows device 600 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0121] The computing unit 601 can be various general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 601 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units that run machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 601 performs the various methods and processes described above, such as a scheduling method for descriptors in a host machine. For example, in some embodiments, the scheduling method for descriptors in a host machine can be implemented as a computer software program that is tangibly included in a machine-readable medium, such as a storage unit 608.

[0122] In some embodiments, part or all of the computer program may be loaded and / or installed on the device 600 via the ROM 602 and / or the communication unit 609. When the computer program is loaded into the RAM 603 and executed by the computing unit 601, one or more steps of the above-described method for scheduling descriptors in the host machine may be performed. Alternatively, in other embodiments, the computing unit 601 may be configured to execute the method for scheduling descriptors in the host machine in any other appropriate manner (e.g., by means of firmware).

[0123] Various embodiments of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0124] The program code for implementing the methods of the present disclosure can be written in any combination of one or more programming languages. The program code can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable vehicle positioning or positioning model training device, such that when executed by the processor or controller, the program code implements the functions / operations specified in the flowcharts and / or block diagrams. The program code can be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0125] In the context of this disclosure, a machine-readable medium can be a tangible medium that can include or store program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium can include but is not limited to an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the machine-readable storage medium will include one or more lines of electrical connections, portable computer disks, hard disk drives, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or Flash memory), optical fibers, portable compact disc read-only memories (CD-ROMs), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0126] To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0127] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.

[0128] The computer system can include clients and servers. This relationship can be. The servers are typically remote from the clients with the interactions typically occurring over the network. The relationship between client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The servers can be cloud servers, also known as cloud computing servers or cloud hosts, which are a host product in the cloud computing service system to solve the defects of large management difficulty and weak business scalability in traditional physical hosts and VPS services ("Virtual Private Server", or simply "VPS"). The servers can also be servers of a distributed system, or servers combined with a blockchain.

[0129] It should be understood that the various forms of flow shown above can be reordered, steps added or removed. For example, the steps described in the present disclosure can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in the present disclosure can be achieved, which are not limited herein.

[0130] The above detailed description does not constitute a limitation on the protection scope of the present disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A method for scheduling descriptors in a host machine, comprising: According to the descriptor to be scheduled in the host machine, the target device information and target virtual machine information are obtained; Acquire the number of first descriptor storages corresponding to the target device according to the target device information, and acquire the number of second descriptor storages corresponding to the target virtual machine according to the target virtual machine information; In response to determining that the first descriptor storage number is less than a first descriptor watermark and the second descriptor storage number is less than a second descriptor watermark, storing the to-be-scheduled descriptors pulled from the host machine, and performing a first update on the first descriptor storage number and the second descriptor storage number; In response to determining that the current scheduling order is the target scheduling order, the stored descriptors to be scheduled are scheduled, and a second update is performed on the number of stored first descriptors and the number of stored second descriptors.

2. The method according to claim 1, wherein Getting the descriptor waterline includes: Obtaining a device speed limit value of the target device and a virtual machine speed limit value of the target virtual machine; According to a first correspondence table between speed limit values ​​and descriptor waterlines, the descriptor waterline corresponding to the device speed limit value is used as the first descriptor waterline, and the descriptor waterline corresponding to the virtual machine speed limit value is used as the second descriptor waterline.

3. The method according to claim 2, further comprising: In response to determining that a descriptor waterline corresponding to the device speed limit value and / or the virtual machine speed limit value does not exist in the first correspondence table, determining a target speed limit value in the first correspondence table that is one level higher than the device speed limit value and / or the virtual machine speed limit value; The descriptor waterline corresponding to the target speed limit value in the first correspondence table is used as the first descriptor waterline and / or the second descriptor waterline.

4. The method according to claim 1, wherein The storing the to-be-scheduled descriptor pulled from the host machine includes: The to-be-scheduled descriptor pulled from the host machine is stored in an on-chip RAM in a data processing unit, where the on-chip RAM is located inside an FPGA module of the data processing unit.

5. The method according to claim 1, wherein The descriptor to be scheduled stored in the scheduling includes: After pulling the stored descriptor to be scheduled, determining a storage location of the network data packet corresponding to the descriptor to be scheduled in the host machine; The network data packet is obtained from the host machine according to the storage location and sent.

6. The method according to claim 1, wherein The step of obtaining target device information and target virtual machine information according to the to-be-scheduled descriptor in the host machine includes: determining a target device to which the descriptor to be scheduled belongs according to queue information corresponding to the descriptor to be scheduled, and acquiring device information corresponding to the target device as the target device information; The target virtual machine to which the target device belongs is determined according to the target device information, and virtual machine information corresponding to the target virtual machine is obtained as the target virtual machine information.

7. The method according to claim 1, wherein Getting the descriptor waterline includes: According to the second correspondence table between device information / virtual machine information and descriptor waterlines, the descriptor waterline corresponding to the target device information is used as the first descriptor waterline, and the descriptor waterline corresponding to the target virtual machine information is used as the second descriptor waterline.

8. The method according to claim 1, wherein Determining the target scheduling order includes: According to the descriptor information of the descriptor to be scheduled, a scheduling order corresponding to the descriptor to be scheduled is determined as the target scheduling order.

9. A descriptor scheduling device for a host machine, comprising: A first acquiring unit, configured to acquire target device information and target virtual machine information according to a to-be-scheduled descriptor in a host machine; a second acquiring unit, configured to acquire the number of first descriptors stored in the corresponding target device according to the target device information, and acquire the number of second descriptors stored in the corresponding target virtual machine according to the target virtual machine information; a pulling unit, configured to, in response to determining that the number of stored first descriptors is less than a first descriptor watermark and the number of stored second descriptors is less than a second descriptor watermark, store the to-be-scheduled descriptors pulled from the host machine, and perform a first update on the number of stored first descriptors and the number of stored second descriptors; The scheduling unit is configured to, in response to determining that the current scheduling order is the target scheduling order, schedule the stored descriptors to be scheduled, and perform a second update on the number of stored first descriptors and the number of stored second descriptors.

10. An electronic device comprising: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor. The instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 8.

11. A non-transitory computer-readable storage medium storing computer instructions, wherein: The computer instructions are used to cause the computer to execute the method according to any one of claims 1 to 8.

12. A computer program product comprising a computer program, wherein when the computer program is executed by a processor, the computer program implements the method according to any one of claims 1 to 8.

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