Reading circuit and magnetic memory

Abstract

The invention provides a reading circuit and a magnetic memory, and the reading circuit comprises a temperature compensation module and a differential reading module which are electrically connected, and the temperature compensation module generates a temperature compensation voltage of which the amplitude is in negative correlation with the temperature of the environment where the reading circuit is located. The temperature compensation voltage serves as reading voltage and is input into a data magnetic storage device and a reference magnetic storage device in the differential reading module at the same time, and the temperature drift phenomenon of the tunneling magnetoresistance ratio of the data magnetic storage device and the reference magnetic storage device is compensated through the reading voltage which is negatively correlated with the temperature; when data in the magnetic memory device is read, the tunneling magnetoresistance ratio of the data magnetic memory device to the reference magnetic memory device does not change along with the environment temperature, so that the reading reliability of the magnetic memory device and the magnetic memory is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a reading circuit and a magnetic memory. Background Art

[0002] Magneto Resistive Random Access Memory (MRAM) is a nonvolatile magnetic memory based on magnetic tunnel junction (MTJ) technology. MRAM consists of multiple magnetic storage devices, each of which includes at least one magnetic tunnel junction. This device can be used to switch between high and low resistance states through the magnetoresistance effect of the magnetic tunnel junction, thereby storing binary data.

[0003] The reading circuit is usually configured as a differential reading circuit, which includes a comparator. The first input terminal of the comparator is electrically connected to the magnetic storage device for obtaining a data signal, and the second terminal of the comparator is electrically connected to a reference circuit for obtaining a reference signal. By comparing the magnitudes of the data signal and the reference signal, the resistance state of the magnetic storage device is obtained, and the binary data stored in the magnetic storage device is determined.

[0004] However, under the influence of temperature, the tunnel magnetoresistance ratio (TMR) of the magnetic memory device will change, resulting in an inability to accurately output data signals, thereby reducing the read reliability of the magnetic memory device and the magnetic memory. Summary of the Invention

[0005] The present application provides a reading circuit and a magnetic memory to improve the reading reliability of a magnetic memory device and the magnetic memory.

[0006] In a first aspect, the present application provides a reading circuit, comprising: a temperature compensation module and a differential reading module electrically connected; wherein the temperature compensation module is used to generate and output a temperature compensation voltage, and the amplitude of the temperature compensation voltage is negatively correlated with the ambient temperature of the reading circuit; the differential reading module includes a comparison circuit, a data branch and a reference branch respectively arranged at two input ends of the comparison circuit, the data branch is provided with at least one data magnetic storage device, and the reference branch is provided with at least one reference magnetic storage device; by simultaneously inputting the temperature compensation voltage as a reading voltage into the data magnetic storage device and the reference magnetic storage device, when reading data in the data magnetic storage device, the tunneling magnetoresistance ratio of the data magnetic storage device and the reference magnetic storage device does not change with the ambient temperature.

[0007] In an embodiment of the first aspect of the present application, the data magnetic memory device and the reference magnetic memory device each include at least a magnetic tunnel junction.

[0008] In an embodiment of the first aspect of the present application, the temperature compensation module includes an electrically connected temperature sensing module and a voltage regulation module; wherein the temperature sensing module is used to generate a temperature sensing signal; the voltage regulation module is used to convert the temperature sensing signal into the temperature compensation voltage, and the amplitude of the temperature compensation voltage is negatively correlated with the temperature.

[0009] In an embodiment of the first aspect of the present application, the temperature sensing module is a bandgap reference circuit, which is used to generate the temperature sensing signal; wherein the temperature sensing signal includes a bandgap reference signal and a temperature detection signal, the bandgap reference signal does not change with the ambient temperature, and the temperature detection signal changes with the ambient temperature; the bandgap reference circuit is electrically connected to the voltage regulation module, and the voltage regulation module is used to convert the bandgap reference signal and the temperature detection signal into the temperature compensation voltage whose amplitude is negatively correlated with the temperature.

[0010] In an embodiment of the first aspect of the present application, the voltage regulation module includes an electrically connected proportional adjustment unit and an addition and subtraction operation unit; wherein the proportional adjustment unit is used to adjust the voltage of the bandgap reference signal according to a preset voltage division ratio to obtain an intermediate adjustment signal; the addition and subtraction operation unit is used to obtain the temperature compensation voltage based on the sum of the temperature detection signal and the intermediate adjustment signal, or the addition and subtraction operation unit is used to obtain the temperature compensation voltage based on the difference between the temperature detection signal and the intermediate adjustment signal.

[0011] In an embodiment of the first aspect of the present application, the temperature sensing module includes a temperature-sensitive magnetic storage device; wherein the resistance of the temperature-sensitive magnetic storage device is negatively correlated with the ambient temperature, and is used to output the temperature sensing signal; the temperature-sensitive magnetic storage device is electrically connected to the voltage regulation module, and the voltage regulation module is used to convert the temperature sensing signal into the temperature compensation voltage whose voltage amplitude is negatively correlated with the temperature.

[0012] In an embodiment of the first aspect of the present application, the temperature sensing signal is a temperature sensing current flowing through the temperature-sensitive magnetic storage device, and the temperature sensing module further includes a first operational amplifier clamping circuit, which is electrically connected to the voltage regulation module and the temperature-sensitive magnetic storage device; wherein, the first operational amplifier clamping circuit is used to input a fixed clamping voltage of the temperature-sensitive magnetic storage device and output a bias voltage identical to the clamping voltage to the temperature-sensitive magnetic storage device, so that the bias voltage of the temperature-sensitive magnetic storage device is fixed, and its temperature sensing current changes only with the ambient temperature.

[0013] In an embodiment of the first aspect of the present application, the data branch further includes a second operational amplifier clamping circuit; wherein the second operational amplifier clamping circuit is electrically connected to the temperature compensation module and the data magnetic storage device; the second operational amplifier clamping circuit is used to input the temperature compensation voltage and output a read voltage identical to the temperature compensation voltage to the data magnetic storage device, so that the read voltage of the data magnetic storage device changes with the ambient temperature, thereby causing the tunneling magnetoresistance ratio of the data magnetic storage device to not change with the ambient temperature; and / or, the reference branch further includes a third operational amplifier clamping circuit; wherein the third operational amplifier clamping circuit is electrically connected to the temperature compensation module and the reference magnetic storage device; the third operational amplifier clamping circuit is used to input the temperature compensation voltage and output a read voltage identical to the temperature compensation voltage to the reference magnetic storage device, so that the read voltage of the reference magnetic storage device changes with the ambient temperature, thereby causing the tunneling magnetoresistance ratio of the reference magnetic storage device to not change with the ambient temperature.

[0014] In an embodiment of the first aspect of the present application, the reference branch includes a first sub-reference branch and a second sub-reference branch; wherein, the first sub-reference branch includes at least one first reference magnetic storage device, and the resistance state of the first reference magnetic storage device is a high resistance state; the second sub-reference branch includes at least one second reference magnetic storage device, and the resistance state of the second reference magnetic storage device is a low resistance state; the first sub-reference branch and the second sub-reference branch are both electrically connected to the same input terminal of the comparison circuit.

[0015] A second aspect of the present application provides a magnetic memory comprising at least one reading circuit as provided in any one of the first aspects of the present application.

[0016] In summary, the read circuit and magnetic memory provided by the present application have a negative correlation between the tunneling magnetoresistance ratio of the data magnetic memory device and the reference magnetic memory device and temperature, that is, the tunneling magnetoresistance ratio has a temperature drift phenomenon. Therefore, a temperature compensation voltage whose amplitude is negatively correlated with the ambient temperature of the read circuit is generated by the temperature compensation module, and then the temperature compensation voltage is simultaneously input into the data magnetic memory device and the reference magnetic memory device in the differential read module as a read voltage. The read voltage that is negatively correlated with temperature compensates for the temperature drift phenomenon of the tunneling magnetoresistance ratio of the data magnetic memory device and the reference magnetic memory device. When reading data from the magnetic memory device, the tunneling magnetoresistance ratio of the data magnetic memory device and the reference magnetic memory device does not change with temperature, thereby improving the read reliability of the magnetic memory device and the magnetic memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0018] Figure 1 A schematic structural diagram of an embodiment of a magnetic storage device provided in this application;

[0019] Figure 2 A schematic structural diagram of another embodiment of the magnetic storage device provided by the present application;

[0020] Figure 3 A schematic structural diagram of an embodiment of a reading circuit provided by the present application;

[0021] Figure 4 A schematic diagram of the amplitude of the temperature compensation voltage provided in this application;

[0022] Figure 5 This is a structural diagram of an embodiment of a differential reading module provided by the present application;

[0023] Figure 6 This is a schematic structural diagram of an embodiment of a temperature compensation module provided by this application;

[0024] Figure 7 This is a schematic structural diagram of the first embodiment of the temperature sensing module provided by this application;

[0025] Figure 8 A schematic diagram of the amplitude of the first embodiment of the temperature sensing signal provided by this application;

[0026] Figure 9 This is a schematic structural diagram of the first embodiment of the voltage regulation module provided by this application;

[0027] Figure 10 This is a schematic diagram of the circuit structure of an embodiment of a proportional adjustment unit provided by the present application;

[0028] Figure 11 A schematic diagram of the circuit structure of an embodiment of the addition and subtraction operation unit provided by this application;

[0029] Figure 12 A schematic diagram of the amplitude of a temperature compensation voltage according to an embodiment of the present application;

[0030] Figure 13 A schematic diagram of the circuit structure of another embodiment of the addition and subtraction operation unit provided by the present application;

[0031] Figure 14A schematic diagram of the amplitude of another embodiment of the temperature compensation voltage provided by this application;

[0032] Figure 15 This is a schematic structural diagram of the second embodiment of the temperature sensing module provided by this application;

[0033] Figure 16 A schematic diagram of the amplitude of a temperature compensation voltage according to another embodiment of the present application;

[0034] Figure 17 This is a schematic structural diagram of the second embodiment of the voltage regulation module provided by this application;

[0035] Figure 18 A schematic diagram of the circuit structure of an embodiment of a differential reading module provided by this application;

[0036] Figure 19 This is a schematic diagram of the circuit structure of another embodiment of the differential reading module provided by this application. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0038] The terms "first," "second," "third," "fourth," and the like (if any) in the specification and claims of this application and in the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of the application described herein can, for example, be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not necessarily limited to those steps or elements explicitly listed, but may include other steps or elements not explicitly listed or inherent to such process, method, product, or apparatus.

[0039] Magnetic memory is a non-volatile magnetic memory based on magnetic tunnel junction technology. It mainly includes spin-transfer torque magnetic random access memory (STT-MRAM) and spin-orbit torque magnetic random access memory (SOT-MRAM).

[0040] Among them, the spin transfer torque magnetic memory generally includes a single or multiple magnetic storage devices. For example, Figure 1 A schematic diagram of the structure of an embodiment of a magnetic storage device provided in this application, combined with Figure 1 As shown, each magnetic memory device includes at least one magnetic tunnel junction. The magnetic tunnel junction comprises at least a free layer L3, a tunnel layer L2, and a reference layer L1 stacked in sequence. The free layer L3 has a variable magnetization direction, while the reference layer L1 has a fixed magnetization direction. When the magnetization directions of the free layer L3 and the reference layer L1 are parallel, the magnetic tunnel junction exhibits a low-resistance state, known as the parallel state or P state. When the magnetization directions of the free layer L3 and the reference layer L1 are antiparallel, the magnetic tunnel junction exhibits a high-resistance state, known as the antiparallel state or AP state. The high and low resistance states represent the stored binary data "0" or "1." During a read operation, a read voltage is applied to one end of the magnetic tunnel junction. The resistance state of the magnetic tunnel junction is determined by the magnitude of the read current flowing through the magnetic tunnel junction, thereby determining the data stored in the magnetic memory device.

[0041] A spin-orbit torque magnetic memory generally includes a single or multiple magnetic storage devices. For example, Figure 2 This is a structural diagram of another embodiment of the magnetic storage device provided by this application, combined with Figure 2 As shown, each magnetic memory device includes at least one magnetic tunnel junction and a spin-orbit torque (SOT) layer L4, which is located adjacent to the free layer L3 of the magnetic tunnel junction. During a read operation, a read voltage is applied between the magnetic tunnel junction and one end of the SOT layer L4. The read current flowing through the magnetic tunnel junction determines the resistance state of the magnetic tunnel junction, thereby determining the data stored in the magnetic memory device.

[0042] The reading circuit for a magnetic storage device is usually configured as a differential reading circuit, wherein the differential reading circuit includes a comparator, a first input terminal of the comparator being electrically connected to the magnetic storage device for obtaining a data signal, and a second terminal of the comparator being electrically connected to a reference circuit for obtaining a reference signal. The comparator obtains the resistance state of the magnetic storage device by comparing the magnitudes of the data signal and the reference signal, thereby determining the binary data stored in the magnetic storage device.

[0043] The tunneling magnetoresistance ratio (TMR) is a physical quantity that measures the magnitude of the change in resistance of a magnetic memory device under different magnetization states and can be used to evaluate the core performance of magnetic memory devices. The tunneling magnetoresistance ratio can be calculated using the following formula: TMR = (Rap - Rp) / Rp, where TMR is the tunneling magnetoresistance ratio, Rp is the resistance of the magnetic memory device in the P state, and Rap is the resistance of the magnetic memory device in the AP state. When the tunneling magnetoresistance ratio of a magnetic memory device changes, the data signal output by the magnetic memory device and the reference signal output by the reference circuit will also change accordingly. Therefore, the stability of the tunneling magnetoresistance ratio of a magnetic memory device determines the effectiveness and reliability of data read from the magnetic memory device.

[0044] However, if Figure 1 and Figure 2 The tunneling magnetoresistance ratio of the magnetic tunnel junction in the magnetic storage device shown is easily affected by temperature. Specifically, the tunneling magnetoresistance ratio is negatively correlated with temperature, that is, the tunneling magnetoresistance ratio has a temperature drift phenomenon, which causes the data signal output by the magnetic storage device to change with temperature. Therefore, during the read operation, the current state of the magnetic tunnel junction cannot be accurately determined based on the data signal output by the magnetic tunnel junction, and the data stored in the magnetic tunnel junction cannot be accurately determined, thereby reducing the read reliability of the magnetic storage device and limiting the application of the magnetic storage device in high and low temperature scenarios.

[0045] Based on the above problems, the present application provides a reading circuit and a magnetic memory device, which provide a temperature compensation voltage to the magnetic memory device according to the ambient temperature of the reading circuit, so that the magnetic memory device can read data more accurately at different temperatures based on the temperature compensation voltage, thereby improving the reading reliability of the magnetic memory device over a wide temperature range. The technical solution of the present application is described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

[0046] Figure 3 This is a structural diagram of an embodiment of a reading circuit provided by this application, as shown in FIG. Figure 3 The read circuit shown can be used to read Figure 1 or Figure 2 The magnetic memory device shown, specifically, Figure 3 The reading circuit 1 shown includes:

[0047] The temperature compensation module 11 is used to generate and output a temperature compensation voltage V according to the ambient temperature of the reading circuit 1. read , where the temperature compensation voltage V read The magnitude of is negatively correlated with the ambient temperature. For example, Figure 4 A schematic diagram of the amplitude of the temperature compensation voltage provided in this application is shown as follows: Figure 4As shown, when the ambient temperature is higher, the temperature compensation voltage V read The lower the amplitude, the lower the ambient temperature. read The higher the amplitude, the higher the temperature compensation voltage V read The amplitude changes linearly.

[0048] The differential reading module 12 is electrically connected to the temperature compensation module 11 . Figure 5 This is a structural diagram of an embodiment of a differential reading module provided by this application. The differential reading module 12 provided by this embodiment can be applied to Figure 3 In the reading circuit 1 shown, Figure 5 The differential reading module 12 shown specifically includes:

[0049] Data branch 122, for receiving temperature compensation voltage V read As the read voltage, and outputting the data current I based on the read voltage data At least one data magnetic storage device is disposed in the data branch 122 .

[0050] Reference branch 123, for receiving temperature compensation voltage V read As the read voltage, and based on the read voltage output reference current I ref At least one reference magnetic memory device is provided in the reference branch 123 .

[0051] The comparison circuit 121 has an input terminal electrically connected to the data branch 122 for receiving the data current I data The other input terminal is electrically connected to the reference branch 123 for receiving the reference current I ref , and based on the data current I data and reference current I ref The comparison result determines the resistance state of the magnetic tunnel junction in the magnetic memory device, thereby outputting data Data. data >I ref When the magnetic tunnel junction in the magnetic storage device is in a low resistance state, the output data Data is "0", and when I data <I ref When , the magnetic tunnel junction in the magnetic storage device is in a high-resistance state, and the output data Data is "1".

[0052] By inputting the temperature compensation voltage as a read voltage into the data magnetic memory device and the reference magnetic memory device simultaneously, the tunneling magnetoresistance ratio of the data magnetic memory device and the reference magnetic memory device does not change with the ambient temperature when reading data in the data magnetic memory device.

[0053] In the read circuit provided by the present application, since the tunneling magnetoresistance ratio of the data magnetic storage device and the reference magnetic storage device is negatively correlated with the ambient temperature, that is, the tunneling magnetoresistance ratio has a temperature drift phenomenon, a temperature compensation voltage whose amplitude is negatively correlated with the ambient temperature of the read circuit is generated by the temperature compensation module, and then the temperature compensation voltage is simultaneously input into the data magnetic storage device and the reference magnetic storage device in the differential read module as a read voltage. The read voltage negatively correlated with the ambient temperature compensates for the temperature drift of the tunneling magnetoresistance ratio of the data magnetic storage device and the reference magnetic storage device. When reading data from the data storage device, the tunneling magnetoresistance ratio of the data magnetic storage device and the reference magnetic storage device does not change with the ambient temperature, thereby improving the read reliability of the magnetic storage device and the magnetic storage.

[0054] It should be noted that the comparison circuit includes but is not limited to a current comparator and a voltage comparator. As long as the data current I data and reference current I ref The comparison result is used to determine the resistance state of the magnetic tunnel junction in the magnetic memory device, thereby outputting the data Data, which will not be listed here one by one.

[0055] Optionally, the temperature compensation voltage V read The relationship between the tunneling magnetoresistance ratio of the data magnetic memory device or the reference magnetic memory device is as follows:

[0056] TMR(V read )=TMR(0) / (1+V read 2 / V h 2 )=[(Rap-Rp) / Rp] / [(1+V read 2 / V h 2 )].

[0057] Among them, V read TMR (V read ) is to apply a read voltage of V to the data magnetic memory device or the reference magnetic memory device. read TMR(0) is the tunneling magnetoresistance ratio of the magnetic tunnel junction when no read voltage is applied to the data magnetic storage device or the reference magnetic storage device, V h is the bias voltage of the data magnetic storage device or reference magnetic storage device when the actual tunneling magnetoresistance ratio drops to half of TMR(0). Since TMR(0) is negatively correlated with the ambient temperature (i.e., TMR(0) decreases with increasing temperature), V read Negatively correlated with temperature (V read Decreases with increasing temperature, that is, with temperature), reasonably adjust Vread The amplitude can make TMR (V read ) does not change with temperature.

[0058] In this way, according to the above relationship, the temperature compensation voltage V output by the temperature compensation module can be adjusted more accurately. read , thereby more accurately compensating for the temperature drift of the tunneling magnetoresistance ratio, thereby making the tunneling magnetoresistance ratio more thermally stable and improving reading reliability.

[0059] The temperature compensation voltage V generated by the temperature compensation module 11 read The amplitude of is negatively correlated with the ambient temperature, so the temperature compensation module 11 can generate a temperature compensation voltage V with a higher amplitude when the ambient temperature is low. read , and when the ambient temperature is high, a temperature compensation voltage V with a lower amplitude is generated read .

[0060] By setting the temperature compensation voltage V read After being inputted into the data magnetic storage device and the reference magnetic storage device as a read voltage at the same time, the read voltage of the data magnetic storage device and the reference magnetic storage device can be dynamically adjusted as the ambient temperature changes. When reading the data in the data magnetic storage device and the reference magnetic storage device, the temperature compensation voltage V read As a read voltage, a more appropriate read voltage at the current ambient temperature can be input into the magnetic memory to overcome the situation where the tunneling magnetoresistance ratio of the data magnetic memory device and the reference magnetic memory device changes with temperature.

[0061] When the tunneling magnetoresistance ratio of the data magnetic storage device and the reference magnetic storage device does not change with the ambient temperature under the action of the corresponding read voltage, the resistance state of the current reference magnetic storage device can be determined more accurately based on the data signal and the reference signal, and the data stored in the data magnetic storage device can be determined more accurately, thereby improving the reading reliability of the magnetic storage device and the magnetic storage, and realizing the application of the magnetic storage device in a wider ambient temperature range such as high and low temperatures.

[0062] Optionally, the data magnetic memory device and the reference magnetic memory device each include at least a magnetic tunnel junction.

[0063] Specifically, refer to Figure 1 As shown, the data magnetic memory device and the reference magnetic memory device both include a magnetic tunnel junction. read The read circuit of the present invention is applied to one end of the free layer or one end of the reference layer of the magnetic tunnel junction. In this way, the read circuit of the present invention is applied to the second-generation STT-MRAM, which is beneficial to improving the thermal stability of the tunnel magnetoresistance ratio of the magnetic memory device and the read reliability of the STT-MRAM.

[0064] Specifically, refer to Figure 2 As shown, both the data magnetic memory device and the reference magnetic memory device include a magnetic tunnel junction and a spin-orbit moment layer, with the free layer and the spin-orbit moment layer of the magnetic tunnel junction positioned adjacent to each other. A temperature compensation voltage is applied to either end of the spin-orbit moment layer or one end of the reference layer of the magnetic tunnel junction. Thus, the read circuit of the present application is applied to third-generation SOT-MRAM, which helps improve the thermal stability of the tunnel magnetoresistance ratio of the magnetic memory device and the read reliability of the SOT-MRAM.

[0065] In this way, the reading circuit of the present application can be used to improve the reading reliability of different generations of magnetic memories, which is conducive to broadening the application scenarios.

[0066] Furthermore, Figure 6 This is a schematic diagram of the structure of an embodiment of the temperature compensation module provided by this application. The temperature compensation module 11 provided in this embodiment can be applied to Figure 3 In the reading circuit 1 shown, Figure 6 The temperature compensation module 11 shown specifically includes:

[0067] The temperature sensing module 111 is configured to generate and output a temperature sensing signal according to the ambient temperature.

[0068] The voltage regulating module 112 is electrically connected to the temperature sensing module 111 and is used to convert the temperature sensing signal into a temperature compensation voltage V read .

[0069] based on Figure 6 The structure of the temperature compensation module 11 is shown. This application provides two specific implementation methods of the temperature compensation module 11, which are described below in conjunction with the accompanying drawings.

[0070] In such Figure 6 In the first embodiment of the temperature compensation module 11 shown, Figures 7 to 14 The embodiment shows the implementation of the temperature sensing module 111 and the voltage regulating module 112 in the temperature compensation module 11 .

[0071] Figure 7 This is a schematic diagram of the structure of the first embodiment of the temperature sensing module provided by this application, as shown Figure 7 The temperature sensing module 111 shown includes a bandgap reference circuit, which can be used to generate a temperature sensing signal. In the first embodiment, the temperature sensing signal includes a bandgap reference signal V bandgap and the temperature detection signal V ctat Alternatively, the temperature sensing signal includes a bandgap reference signal V bandgap and the temperature detection signal V ptat Bandgap reference signal V bandgapThe amplitude of the temperature detection signal V ctat The amplitude of V changes with the ambient temperature. The bandgap reference circuit is electrically connected to the voltage regulation module, which is used to convert the bandgap reference signal V bandgap and the temperature detection signal V ctat Converted into temperature compensation voltage V read , or the voltage regulation module is used to convert the bandgap reference signal V bandgap and the temperature detection signal V ptat Converted into temperature compensation voltage V read .

[0072] In this way, first, the bandgap reference circuit is used as the temperature sensing module, which does not need to rely on an external voltage source to save circuit layout area. Second, the bandgap reference circuit has extremely strong temperature stability and process stability, which is conducive to ensuring the bandgap reference signal V bandgap and the temperature detection signal V ctat or V ptat Long-term stable output. Third, the two output terminals of the bandgap reference circuit itself (one output terminal outputs a bandgap reference signal V that does not change with the ambient temperature) bandgap The other output terminal outputs a temperature detection signal V that changes with the ambient temperature. ctat or V ptat ) output two temperature sensing signals V bandgap and V ctat (or V ptat ), no need to set up a temperature detection circuit to output the temperature detection signal V ctat or V ptat , realizing the functional reuse of the bandgap reference circuit is conducive to further saving the layout area.

[0073] Specifically, the temperature detection signal V ctat It can also be called a negative temperature coefficient voltage, in which the voltage drop amplitude based on the diode has a temperature coefficient that decreases as the ambient temperature increases. Figure 7 In the bandgap reference circuit shown in FIG, a positive temperature coefficient current I is generated in the front-stage circuit structure 111-1 of the bandgap reference circuit, which increases with increasing temperature. ptat, using a current mirror structure to copy Iptat from the previous stage circuit structure 111-1 to the branch containing the first transistor N2 and the second transistor P2, causing the current flowing through the first diode J1 to increase as the temperature rises, thereby causing the voltage drop amplitude across the first diode J1 to increase as the current flowing therethrough increases. Since the first diode J1 itself has the characteristic that the voltage drop amplitude across the first diode J1 decreases as the ambient temperature rises, the anode voltage of the first diode J1 decreases as the temperature rises. By adjusting the area of ​​the first diode J1, the slope of the decrease in the anode voltage of the first diode J1 as the temperature rises can be adjusted. The anode voltage of the first diode J1, which is positively correlated with temperature due to the current mirror copy, is superimposed on the anode voltage of the first diode J1, which is negatively correlated with temperature due to its own characteristics. This allows the anode voltage of the first diode J1 to decrease as the temperature rises, resulting in a negative temperature coefficient voltage V ctat The anode voltage of the first diode J1 is used as the temperature detection signal V ctat Output. Bandgap reference signal V bandgap It is obtained by adding the negative temperature coefficient voltage and the positive temperature coefficient voltage. Figure 7 In the bandgap reference circuit shown in FIG, since the current flowing through the drain of the second transistor P2 and the second diode J3 in the branch where the second transistor P2 is located also increases with the increase of temperature, the potential difference between the drain of the second transistor P2 and the anode of the second diode J3 is used as the positive temperature coefficient voltage V ptat The temperature detection signal V is converted to ctat and positive temperature coefficient voltage V ptat The voltage of the bandgap reference signal V is generated by superposition bandgap And output.

[0074] Specifically, the first output terminal of the bandgap reference circuit is the drain of the second transistor P2, which is used to output the bandgap reference signal V bandgap , is electrically connected to the voltage regulation module. When the temperature detection signal is V ctat When the second output terminal of the bandgap reference circuit is the source of the first transistor N2, it is used to output the temperature detection signal V ctat , electrically connected to the voltage regulation module.

[0075] In this way, the two output terminals of the bandgap reference circuit output two temperature sensing signals V bandgap and V ctat , no need to set up a temperature detection circuit to output the temperature detection signal V ctat , realizing the functional reuse of the bandgap reference circuit is conducive to further saving the layout area.

[0076] For example, Figure 8 This is a schematic diagram of the amplitude of the first embodiment of the temperature sensing signal provided by this application, such as Figure 7As shown, when the temperature changes, the bandgap reference signal V bandgap The amplitude of the temperature detection signal V ctat The amplitude changes with temperature, and the temperature detection signal V ctat The amplitude of the temperature detection signal V is negatively correlated with the ambient temperature. When the ambient temperature is low, the temperature detection signal V ctat The amplitude of the temperature detection signal V is high. When the ambient temperature is high, the temperature detection signal V ctat The amplitude of the temperature detection signal V ctat The amplitude of the change is linear. At the same time, since the diode connected in series with the transistor will increase the temperature-related voltage drop, it can be adjusted by Figure 7 The area of ​​diode J1 in the bandgap reference circuit shown is used to adjust the output temperature detection signal V ctat The slope of the diode J1 is larger, and the output temperature detection signal V ctat In the specific implementation process, the parameters of each component in the bandgap reference circuit can be repeatedly optimized and adjusted through circuit simulation tools, so that the bandgap reference circuit can output the corresponding temperature detection signal V ctat The slope of .

[0077] It should be noted that if Figure 7 The bandgap reference circuit shown is only one possible implementation, and the present application does not limit the specific circuit structure of the bandgap reference circuit.

[0078] Figure 9 This is a schematic diagram of the structure of the first embodiment of the voltage regulation module provided by this application, as shown in FIG. Figure 9 The voltage regulation module 112 shown can be used to Figure 7 The bandgap reference circuit shown outputs a bandgap reference signal V bandgap and the temperature detection signal V ctat , which is converted into a temperature compensation voltage V whose amplitude is negatively correlated with the ambient temperature read Or Figure 7 The bandgap reference circuit shown outputs a bandgap reference signal V bandgap and the temperature detection signal V ptat , which is converted into a temperature compensation voltage V whose amplitude is negatively correlated with the ambient temperature read .

[0079] Specifically, if Figure 9 The voltage regulation module 112 shown includes:

[0080] The ratio adjustment unit 1121 is used to adjust the bandgap reference signal V according to the preset voltage division ratio. bandgap The voltage is used to change the amplitude of the bandgap reference signal Vbandgap to obtain the intermediate adjustment signal V'bandgap .

[0081] The addition and subtraction operation unit 1122 is electrically connected to the proportional adjustment unit 1121 and is used to adjust the signal V' based on the intermediate bandgap and the temperature detection signal V ctat The sum of the intermediate adjustment signal V' bandgap and the temperature detection signal V ptat The difference between the two is the temperature compensation voltage V read .

[0082] More specifically, Figure 10 The circuit structure diagram of an embodiment of the proportional adjustment unit provided in this application can be applied to Figure 9 In the voltage regulation module 112 shown, the temperature sensing signal includes a bandgap reference signal V bandgap and the temperature detection signal V ctat In the case of Figure 10 The ratio adjustment unit 1121 shown specifically includes:

[0083] The first operational amplifier OP3, the third transistor M1, the first voltage dividing structure R1 and the second voltage dividing structure R2. Figure 9 In the example shown, the third transistor is a P-type MOS tube, and the non-inverting input terminal of the first operational amplifier OP3 is used to obtain the bandgap reference signal V bandgap The output end of the first operational amplifier OP3 is connected to the control end of the third transistor M1, the first end of the third transistor M1 is connected to the first voltage source V1, the second end of the third transistor M1 is connected to the inverting input end of the first operational amplifier OP3 and the first end of the first voltage dividing structure R1, the second end of the first voltage dividing structure R1 is connected to the first end of the second voltage dividing structure R2, and the second end of the second voltage dividing structure R2 is grounded.

[0084] Then when the bandgap reference signal V bandgap The first operational amplifier OP3 is input, and the first operational amplifier OP3 and the third transistor M1 form a clamp structure, so that the bandgap reference signal V bandgap After the voltage is divided by the first voltage dividing structure R1 and the second voltage dividing structure R2, the intermediate adjustment signal V' after voltage division is outputted from the second end of the first voltage dividing structure R1 and the first end of the second voltage dividing structure R2. bandgap .

[0085] It is understandable that the resistance values ​​of the first voltage dividing structure R1 and the second voltage dividing structure R2 can be adjusted according to the bandgap reference signal V bandgap and the intermediate adjustment signal V' bandgap The amplitude is set.

[0086] In one embodiment, the first voltage dividing structure R1 includes one or more resistors, and the second voltage dividing structure R2 includes one or more resistors. Figure 9 In the example shown, the first voltage dividing structure R1 and the second voltage dividing structure R2 are exemplified by a resistor.

[0087] In one embodiment, Figure 11 The circuit structure diagram of an embodiment of the addition and subtraction operation unit provided in this application can be applied to Figure 9 In the voltage regulation module 112 shown, specifically, as Figure 11 The addition and subtraction operation unit 1122 shown includes: a second operational amplifier OP4, wherein the non-inverting input terminal of the second operational amplifier OP4 is used to obtain the intermediate adjustment signal V' bandgap and the temperature detection signal V ctat The output terminal of the second operational amplifier OP4 is used to output the temperature compensation voltage V read , and the output terminal of the second operational amplifier OP4 is also connected to its inverting input terminal and grounded.

[0088] In one embodiment, if Figure 10 The addition and subtraction unit 1122 shown further includes: a first protection structure R3, a second protection structure R4, a third protection structure R5 and a fourth protection structure R6, wherein Figure 10 In the example shown, the first protection structure R3, the second protection structure R4, the third protection structure R5 and the fourth protection structure R6 are all resistors. The non-inverting input terminal of the second operational amplifier OP4 obtains the intermediate adjustment signal V' through the first protection structure R3. bandgap , and obtain the temperature detection signal V through the second protection structure R4 ctat The output terminal of the second operational amplifier OP4 is connected to the inverting input terminal thereof through the third protection structure R5, and the inverting input terminal of the second operational amplifier OP4 is grounded through the fourth protection structure R6.

[0089] Then when the intermediate adjustment signal V' bandgap and the temperature detection signal V ctat The second operational amplifier OP4 is input into the non-inverting input terminal. The second operational amplifier OP4 is based on the temperature detection signal V ctat and the intermediate adjustment signal V' bandgap The temperature compensation voltage V is output through its output terminal. read .

[0090] For example, Figure 12 This is a schematic diagram of the amplitude of an embodiment of the temperature compensation voltage provided by the present application, wherein when the ambient temperature changes, the bandgap reference signal V bandgap The amplitude remains unchanged, and the intermediate adjustment signal V' after being processed by the voltage regulation module 112 bandgapThe amplitude of the temperature detection signal V ctat The amplitude changes with the ambient temperature and is negatively correlated with the ambient temperature. Figure 11 After the addition and subtraction operation unit 1122 processes the temperature detection signal V ctat and the intermediate adjustment signal V' bandgap The temperature compensation voltage V read The amplitude of changes with the ambient temperature and is negatively correlated with the ambient temperature. Figure 12 The temperature compensation voltage V read The change of V can be expressed by the following formula: read =a*V bandgap +V ctat Where a is the temperature compensation voltage V read The slope of .

[0091] In one embodiment, Figure 13 This is a circuit diagram of another embodiment of the addition and subtraction unit provided in this application, which can be applied to Figure 9 In the voltage regulation module 112 shown, the temperature sensing signal includes a bandgap reference signal V bandgap and the temperature detection signal V ptat In the case of Figure 13 The voltage regulating module 112 shown includes: a third operational amplifier OP5, wherein the inverting input terminal of the third operational amplifier OP5 is used to obtain the temperature detection signal V ptat The non-inverting input terminal of the third operational amplifier OP5 is used to obtain the intermediate adjustment signal V' bandgap The output terminal of the third operational amplifier OP5 is also connected to the inverting input terminal thereof, and the inverting input terminal of the third operational amplifier OP5 is also grounded.

[0092] In one embodiment, if Figure 13 The addition and subtraction unit 1122 shown further includes: a fifth protection structure R7, a sixth protection structure R8, a seventh protection structure R9 and an eighth protection structure R10, wherein Figure 13 In the example shown, the fifth protection structure R7, the sixth protection structure R8, the seventh protection structure R9 and the eighth protection structure R10 are all resistors. The inverting input terminal of the third operational amplifier OP5 obtains the temperature detection signal V through the fifth protection structure R7. ptat The non-inverting input terminal of the third operational amplifier OP5 obtains the intermediate adjustment signal V' through the sixth protection structure R8 bandgap The output terminal of the third operational amplifier OP5 is connected to the inverting input terminal thereof through the seventh protection structure R9, and the inverting input terminal of the third operational amplifier OP5 is grounded through the eighth protection structure R10.

[0093] Then when the temperature detection signal V ptat Input the inverting input terminal of the second operational amplifier OP4. bandgap The input signal is input to the non-inverting input terminal of the second operational amplifier OP4. The second operational amplifier OP4 adjusts the signal based on the intermediate adjustment signal V'. bandgap With the temperature detection signal V ptat The temperature compensation voltage V is output through its output terminal. read .

[0094] For example, Figure 14 This is a schematic diagram of the amplitude of another embodiment of the temperature compensation voltage provided by the present application, wherein when the ambient temperature changes, the bandgap reference signal V bandgap The amplitude remains unchanged, and the intermediate adjustment signal V' after being processed by the voltage regulation module 112 bandgap The amplitude of the temperature detection signal V ptat The amplitude changes with the ambient temperature and is positively correlated with the ambient temperature. Figure 13 After the addition and subtraction operation unit 1122 is processed, the intermediate adjustment signal V' bandgap With the temperature detection signal V ptat The temperature compensation voltage V read The amplitude changes with the ambient temperature and is negatively correlated with the ambient temperature.

[0095] It is understandable that if Figure 9 The voltage regulating module 112 shown in FIG. 1 may be configured as follows: Figure 10 The addition and subtraction unit 1122 shown, or setting as shown Figure 13 The addition and subtraction operation unit 1122 shown in the figure can be used to adjust the voltage according to the intermediate signal V'. bandgap and temperature compensation voltage V read Set the amplitude accordingly.

[0096] In summary, in the first embodiment of the temperature compensation module 11 provided by the present application, the temperature sensing module 111 generates a temperature detection signal V whose amplitude varies with the ambient temperature. ctat or V ctat , a bandgap reference signal V whose amplitude does not change with ambient temperature bandgap , and the voltage regulation module 112 divides the signal and performs addition and subtraction operations to obtain a temperature compensation voltage V whose amplitude changes with the ambient temperature. read , thereby generating a temperature compensation voltage V read, realizing temperature compensation of the read voltage of the magnetic storage device, and each module and unit in the temperature compensation module 11 includes resistors, amplifiers and transistors, etc., with a relatively simple structure and the required operation logic being relatively direct, which can effectively reduce the structural complexity and cost of the temperature compensation module 11 and the read circuit 1 in which it is located, and is more conducive to the application and promotion of the read circuit 1 and the magnetic storage device in which it is located provided by this application.

[0097] In such Figure 6 In the second embodiment of the temperature compensation module 11 shown, Figures 15 to 17 The embodiment shows the implementation of the temperature sensing module 111 and the voltage regulating module 112 in the temperature compensation module 11 .

[0098] Figure 15 This is a schematic diagram of the structure of the second embodiment of the temperature sensing module provided by this application, as shown in FIG. Figure 15 The temperature sensing module 111 shown includes a temperature-sensitive magnetic storage device 1110. The resistance of the temperature-sensitive magnetic storage device 1110 is negatively correlated with temperature, and the device is configured to output a temperature sensing signal. The temperature-sensitive magnetic storage device is electrically connected to a voltage regulation module, which converts the temperature sensing signal into a temperature-compensated voltage.

[0099] In this way, using a temperature-sensitive magnetic storage device as a temperature sensing module, on the one hand, because the magnetic storage device has a micron or even nanometer-scale volume, which is much smaller than the volume of temperature-sensing devices such as thermistors used in traditional temperature sensors, the temperature sensing module can be further miniaturized to save the layout area of ​​the magnetic storage device. On the other hand, the existing magnetic storage devices in the magnetic storage device can be reused, which can further save the layout area of ​​the magnetic storage device and reuse the existing manufacturing process, eliminating the need for additional packaging and thus reducing costs. Furthermore, magnetic storage devices have a wider operating temperature range, stronger anti-interference capabilities, and low power consumption, and their performance is superior to traditional materials such as thermistors.

[0100] In such Figure 15 In the example shown, the temperature-sensitive magnetic memory device 1110 includes at least a magnetic tunnel junction in the AP state, wherein the resistance of the magnetic tunnel junction in the AP state varies with the ambient temperature, and the resistance is negatively correlated with the ambient temperature. Therefore, the magnetic tunnel junction in the AP state can provide a temperature-sensing current I that varies with the ambient temperature. ap .

[0101] Specifically, refer to Figure 1 As shown, the temperature-sensitive magnetic memory device may include a magnetic tunnel junction. ap Output from one end of the free layer or one end of the reference layer of the magnetic tunnel junction. Figure 2As shown, the temperature sensing magnetic memory device can include a magnetic tunnel junction and a spin-orbit torque layer, the free layer of the magnetic tunnel junction and the spin-orbit torque layer are arranged adjacent to each other. The temperature sensing current I ap is output from either end of the spin-orbit torque layer or one end of the reference layer of the magnetic tunnel junction. In this way, the temperature sensing module can be compatible with STT-MRAM and SOT-MRAM, and its application scenarios and compatibility are more extensive.

[0102] In an embodiment, the temperature sensing signal is a temperature sensing current I ap that flows through the temperature sensing magnetic memory device. Figure 15 As shown, the temperature sensing module 111 also includes a first op-amp clamping circuit electrically connected with the temperature sensing magnetic memory device 1110, respectively, wherein the first op-amp clamping circuit is used to input a fixed clamping voltage of the temperature sensing magnetic memory device, and output a bias voltage same as the clamping voltage to the temperature sensing magnetic memory device, so that the bias voltage of the temperature sensing magnetic memory device is fixed, and the temperature sensing current thereof only changes with the ambient temperature.

[0103] Specifically, the first op-amp clamping circuit includes a fourth operational amplifier OP6 and a fourth transistor M4, the output end of the fourth operational amplifier OP6 is electrically connected with the fourth transistor M4, the non-inverting input end inputs a fixed clamping voltage V clamp , the inverting input end is electrically connected with the temperature sensing magnetic memory device 1110, and is electrically connected with the output end through the fourth transistor M4. The first op-amp clamping circuit is used to obtain the fixed clamping voltage V clamp , and output a bias voltage V' clamp same as the clamping voltage V clamp to the temperature sensing magnetic memory device 1110, wherein the amplitude of the bias voltage V' clamp remains unchanged, and since the tunneling magnetoresistance ratio of the magnetic tunnel junction in the AP state in the temperature sensing magnetic memory device changes with the ambient temperature, the temperature sensing current I ap flowing through the temperature sensing magnetic memory device 1110, the fifth transistor M2 and the fourth transistor M4 changes with the ambient temperature, and the temperature sensing current I ap is output to the voltage regulation module.

[0104] In this way, by setting the first clamping op-amp circuit, the temperature sensing magnetic memory device inputs a bias voltage same as the fixed clamping voltage, so that the bias voltage of the temperature sensing magnetic memory device is fixed, and its temperature sensing current only changes with the ambient temperature, so that the ambient temperature can be more accurately represented, thereby improving the accuracy of the temperature sensing signal, and the thermal stability of the tunneling magnetoresistance ratio of the data magnetic memory device and the reference magnetic memory device is better.

[0105] Specifically, the temperature sensing module also includes a current mirror circuit, which includes a fifth transistor M2 and a sixth transistor M3, and is used as a temperature sensing current I apThe output port of I ap Copy and enter the value into the Voltage Regulator module.

[0106] In this way, setting up a current mirror circuit can mirror the temperature sensing current flowing through the temperature-sensitive magnetic storage device and be used in the subsequent voltage regulation module, while suppressing environmental noise and preventing the temperature sensing current from being interfered with by other environmental factors except the ambient temperature.

[0107] Figure 16 This is a schematic diagram of the amplitude of another embodiment of the temperature compensation voltage provided by this application, such as Figure 16 As shown, Figure 14 In the temperature sensing module 111 shown in FIG. 1 , the temperature sensing current I outputted from the current mirror circuit is ap The amplitude changes with the ambient temperature and is positively correlated with the ambient temperature, and shows a nonlinear change pattern.

[0108] Figure 17 This is a schematic diagram of the structure of the second embodiment of the voltage regulation module provided in this application, as shown in FIG. Figure 16 The voltage regulation module 112 shown can be used to Figure 15 The temperature sensing module 111 outputs a temperature sensing signal I ap Converted into a temperature compensation voltage V whose amplitude is negatively correlated with temperature read .

[0109] Specifically, if Figure 17 The voltage regulation module 112 shown includes:

[0110] Analog to digital converter (ADC) module 1123 is used to obtain the temperature sensing signal I ap , and the temperature sensing signal I ap Converted into a corresponding first digital signal.

[0111] The digital unit 1124 is electrically connected to the analog-to-digital conversion module 1123 and is used to adjust the amplitude of the first digital signal to obtain a second digital signal.

[0112] The digital to analog converter (DAC) unit 1125 is electrically connected to the digital unit 1124 and is used to convert the second digital signal into a read signal temperature compensation voltage V read .

[0113] It should be noted that the analog-to-digital conversion module includes an analog-to-digital converter, the digital-to-analog conversion module includes a digital-to-analog converter, and the digital unit includes an arithmetic logic unit for adjusting digital signals, which are not listed one by one here.

[0114] This helps to more accurately adjust the temperature compensation voltage V read The magnitude of the tunneling magnetoresistance ratio is increased, thereby more accurately compensating for the temperature drift phenomenon of the tunneling magnetoresistance ratio of the data magnetic storage unit and the reference magnetic storage unit.

[0115] Combine Figure 16 The amplitude diagram shown in FIG. Figure 15 After the processing of the voltage regulating module 112 shown in FIG, the temperature compensation voltage V is obtained according to the digital modulation method. read The amplitude changes with the ambient temperature and is negatively correlated with the ambient temperature.

[0116] In summary, in the second embodiment of the temperature compensation module 11 provided by the present application, the temperature sensing module 111 generates a temperature sensing signal I whose amplitude varies with temperature. ap , and the voltage regulating module 112 adjusts the amplitude of the signal in a digital modulation manner to obtain a temperature compensation voltage V whose amplitude changes with temperature read , thereby generating a temperature compensation voltage V read , realizing temperature compensation of the read voltage of the data magnetic storage device and the reference magnetic storage device, wherein the required operations are mainly implemented by digital units, which can effectively reduce the hardware implementation cost, and is also more conducive to the application and promotion of the reading circuit 1 provided by the present application and the magnetic storage device in which it is located.

[0117] Figure 18 This is a circuit diagram of an embodiment of a differential reading module provided by the present application, as shown in FIG. Figure 18 Shown Figure 5 A specific circuit implementation of the differential reading module 12 provided in FIG. Figure 18 In the differential reading module 12 shown:

[0118] In the first solution, the data branch 122 further includes: a second op amp clamping circuit 1221, wherein the second op amp clamping circuit is electrically connected to the temperature compensation module 11 and the data magnetic storage device 2-1. The second op amp clamping circuit 1221 is used to input a temperature compensation voltage and output a read voltage that is the same as the temperature compensation voltage to the data magnetic storage device, so that the read voltage of the data magnetic storage device changes with the ambient temperature, thereby making the tunneling magnetoresistance ratio of the data magnetic storage device unchanged with the ambient temperature. Figure 18 In the example shown, the second operational amplifier clamp circuit 1221 includes: a fifth operational amplifier OP1 and a seventh transistor M9. The non-inverting input terminal of the fifth operational amplifier OP1 is used to obtain the temperature compensation voltage V read The output terminal of the fifth operational amplifier OP1 is connected to its negative phase input terminal and is also connected to the control terminal of the seventh transistor M9. When the positive phase input terminal of the operational amplifier OP1 inputs the temperature compensation voltage V provided by the temperature compensation module 11,read The clamping structure formed by the fifth operational amplifier OP1 and the seventh transistor M9 can be used to output a voltage corresponding to the temperature compensation voltage V to the data magnetic memory device 2-1. read The same read voltage V' read and fix the voltage across the data magnetic memory device 2-1 at the read voltage V' read The current mirror structure formed by the eighth transistor M11 and the ninth transistor M6 can output the data current I to the comparison circuit 121. data .

[0119] In the second solution, the reference branch 123 further includes: a third op amp clamping circuit 1231, wherein the third op amp clamping circuit 1231 is electrically connected to the temperature compensation module 11 and the reference magnetic storage device. The third op amp clamping circuit 1231 is used to input a temperature compensation voltage and output a read voltage that is the same as the temperature compensation voltage to the reference magnetic storage device, so that the read voltage of the reference magnetic storage device changes with the ambient temperature, thereby making the tunneling magnetoresistance ratio of the reference magnetic storage device unchanged with the ambient temperature. Figure 18 In the example shown, the third op amp clamp circuit includes: a sixth operational amplifier OP2 and a tenth transistor M7 and an eleventh transistor M8. The non-inverting input terminal of the sixth operational amplifier OP2 is used to obtain the temperature compensation voltage V read The output terminal of the sixth operational amplifier OP2 is connected to its negative phase input terminal and is also connected to the control terminals of the tenth transistor M7 and the eleventh transistor M8. read The clamping structure formed by the sixth operational amplifier OP2 and the tenth transistor M7 and the clamping structure formed by the sixth operational amplifier OP2 and the eleventh transistor M8 can be used to output a voltage corresponding to the temperature compensation voltage V to the reference magnetic memory device. read The same read voltage V' read and fix the voltage across the reference magnetic memory device at the read voltage V' read The current mirror structure formed by the twelfth transistor M10 and the thirteenth transistor M5 can output a reference current I to the comparison circuit 121. ref .

[0120] It should be noted that the above description includes the first solution, or the second solution, or the situation where the first solution and the second solution occur at the same time.

[0121] In this way, by setting a clamping operational amplifier circuit in the data branch and the reference branch, a read voltage that is the same as the temperature compensation voltage can be output to the data magnetic storage device and / or the reference magnetic storage device, so that the read voltage of the reference magnetic storage device changes with the ambient temperature, thereby making the tunneling magnetoresistance ratio of the reference magnetic storage device unchanged with the ambient temperature, which is conducive to more accurate adjustment of the temperature compensation voltage V read The magnitude of the tunneling magnetoresistance ratio is increased, thereby more accurately compensating for the temperature drift phenomenon of the tunneling magnetoresistance ratio of the data magnetic storage unit and / or the reference magnetic storage unit.

[0122] In one embodiment, if Figure 18 The reference branches shown specifically include:

[0123] The first sub-reference branch includes at least one first reference magnetic memory device 1232-1, and the resistance state of the first reference magnetic memory device 1232-1 is a high resistance state. It should be noted that the high resistance state here means that the magnetic tunnel junction of the first reference magnetic memory device is in the AP state.

[0124] The second sub-reference branch includes at least one second reference magnetic memory device 1231-1, and the resistance state of the second reference magnetic memory device 1231-1 is a low resistance state. It should be noted that the low resistance state here means that the magnetic tunnel junction of the second reference magnetic memory device is in a P state.

[0125] The first sub-reference branch and the second sub-reference branch are both electrically connected to the same input terminal of the comparison circuit.

[0126] In this way, two parallel sub-reference branches are set up so that the reference resistance in the entire reference branch is equivalent to the sum of the resistance of the magnetic tunnel junction in the AP state of the first reference magnetic storage device and the resistance of the magnetic tunnel junction in the P state of the second reference magnetic storage device. When the data signal is compared with the reference signal, it is beneficial to more accurately determine the resistance state of the data magnetic storage device, thereby further improving the accuracy of reading.

[0127] exist Figure 18 and Figure 19 In the example shown, the comparison circuit 121 includes a sense amplifier SA, which can be used to detect the current I data and reference current I ref The comparison result outputs data Data.

[0128] exist Figure 18 In the example described above, the magnetic storage device 2-1 is Figure 2 Taking the spin-orbit moment magnetic memory device 2-1 as an example, the second operational amplifier clamp circuit 1221 can be used to provide a read voltage V' to the spin-orbit moment layer of the magnetic memory device 2-1. read , so that the voltage across the magnetic memory device 2-1 is fixed at the read voltage V' readAnd, the first reference magnetic memory device 1232-1 and the second reference magnetic memory device 1231-1 are both Figure 2 Taking the spin-orbit moment magnetic memory shown in FIG. 1 as an example, the third op amp clamp circuit 1231 can be used to provide a read voltage V′ to the spin-orbit moment layers of the first reference magnetic memory device 1232-1 and the second reference magnetic memory device 1231-1. read , so that the voltage across the first reference magnetic memory device 1232-1 and the second reference magnetic memory device 1231-1 is fixed at the read voltage V' read .

[0129] In another embodiment of the present application, Figure 19 This is a circuit diagram of another embodiment of the differential reading module provided by the present application, as shown in FIG. Figure 19 In the embodiment shown, the magnetic storage device 2-2 is Figure 1 Taking the spin transfer torque magnetic memory shown in FIG. 1 as an example, the second operational amplifier clamp circuit 1221 can be used to provide a read voltage V' at one end of the magnetic tunnel junction. read , so that the voltage across the magnetic memory device 2-2 is fixed at the read voltage V' read And, the first reference magnetic memory device 1232-2 and the second reference magnetic memory device 1231-2 are both Figure 1 Taking the spin transfer torque magnetic memory shown in FIG. 1 as an example, the third op amp clamp circuit 1231 can be used to provide a read voltage V' to one end of the first reference magnetic memory device 1232-2 and one end of the second reference magnetic memory device 1231-2. read , so that the voltage across the first reference magnetic memory device 1232-1 and the second reference magnetic memory device 1231-1 is fixed at the read voltage V' read .

[0130] like Figure 19 The other circuit structures shown are Figure 18 The embodiments shown are the same and will not be described again.

[0131] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A reading circuit, characterized in that: include: a temperature compensation module and a differential reading module electrically connected; The temperature compensation module is configured to generate and output a temperature compensation voltage, wherein the amplitude of the temperature compensation voltage is negatively correlated with the ambient temperature of the reading circuit; The differential reading module includes a comparison circuit, a data branch and a reference branch respectively provided at two input terminals of the comparison circuit, wherein at least one data magnetic storage device is provided in the data branch, and at least one reference magnetic storage device is provided in the reference branch; By inputting the temperature compensation voltage as a read voltage to the data magnetic memory device and the reference magnetic memory device simultaneously, when reading data in the data magnetic memory device, the tunneling magnetoresistance ratio of the data magnetic memory device and the reference magnetic memory device does not change with the ambient temperature.

2. The reading circuit according to claim 1, wherein: The data magnetic memory device and the reference magnetic memory device each include at least a magnetic tunnel junction.

3. The reading circuit according to claim 1, wherein: The temperature compensation module includes a temperature sensing module and a voltage regulating module that are electrically connected; Wherein, the temperature sensing module is used to generate a temperature sensing signal; The voltage regulating module is used to convert the temperature sensing signal into the temperature compensation voltage.

4. The reading circuit according to claim 3, wherein: The temperature sensing module is a bandgap reference circuit, and the bandgap reference circuit is used to generate the temperature sensing signal; The temperature sensing signal includes a bandgap reference signal and a temperature detection signal, the bandgap reference signal does not change with the ambient temperature, and the temperature detection signal changes with the ambient temperature; The bandgap reference circuit is electrically connected to the voltage regulating module, and the voltage regulating module is used to convert the bandgap reference signal and the temperature detection signal into the temperature compensation voltage.

5. The reading circuit according to claim 4, wherein: The voltage regulation module includes a proportional regulation unit and an addition and subtraction operation unit that are electrically connected; The ratio adjustment unit is configured to adjust the voltage of the bandgap reference signal according to a preset voltage division ratio to obtain an intermediate adjustment signal; The addition and subtraction operation unit is used to obtain the temperature compensation voltage based on the sum of the temperature detection signal and the intermediate adjustment signal, or the addition and subtraction operation unit is used to obtain the temperature compensation voltage based on the difference between the temperature detection signal and the intermediate adjustment signal.

6. The reading circuit according to claim 3, wherein: The temperature sensing module includes a temperature-sensitive magnetic storage device; The resistance of the temperature-sensitive magnetic storage device is negatively correlated with the ambient temperature, and is used to output the temperature sensing signal; The temperature-sensitive magnetic storage device is electrically connected to the voltage regulating module, and the voltage regulating module is used to convert the temperature sensing signal into the temperature compensation voltage.

7. The reading circuit according to claim 6, wherein: The temperature sensing signal is a temperature sensing current flowing through the temperature-sensitive magnetic storage device, and the temperature sensing module further includes a first operational amplifier clamping circuit electrically connected to the temperature-sensitive magnetic storage device; The first operational amplifier clamping circuit is configured to input a fixed clamping voltage of the temperature-sensitive magnetic memory device and output a bias voltage identical to the clamping voltage to the temperature-sensitive magnetic memory device, so that the bias voltage of the temperature-sensitive magnetic memory device is fixed and the temperature sensing current thereof changes only with the ambient temperature.

8. The reading circuit according to claim 1, wherein: The data branch further includes a second operational amplifier clamping circuit; wherein the second operational amplifier clamping circuit is electrically connected to the temperature compensation module and the data magnetic storage device; the second operational amplifier clamping circuit is used to input the temperature compensation voltage and output a read voltage that is the same as the temperature compensation voltage to the data magnetic storage device, so that the read voltage of the data magnetic storage device changes with the ambient temperature, thereby making the tunneling magnetoresistance ratio of the data magnetic storage device unchanged with the ambient temperature; and / or, The reference branch also includes a third operational amplifier clamping circuit; wherein the third operational amplifier clamping circuit is electrically connected to the temperature compensation module and the reference magnetic storage device; the third operational amplifier clamping circuit is used to input the temperature compensation voltage and output a read voltage identical to the temperature compensation voltage to the reference magnetic storage device, so that the read voltage of the reference magnetic storage device changes with the ambient temperature, thereby preventing the tunneling magnetoresistance ratio of the reference magnetic storage device from changing with the ambient temperature.

9. The reading circuit according to claim 1, wherein: The reference branch includes a first sub-reference branch and a second sub-reference branch; Wherein, the first sub-reference branch includes at least one first reference magnetic storage device, and the resistance state of the first reference magnetic storage device is a high resistance state; The second sub-reference branch includes at least one second reference magnetic memory device, and the resistance state of the second reference magnetic memory device is a low resistance state; The first sub-reference branch and the second sub-reference branch are both electrically connected to the same input terminal of the comparison circuit.

10. A magnetic memory, characterized in that: At least: At least one read circuit as claimed in any one of claims 1 to 9.

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