A method for manufacturing a microlens array

Abstract

The present application belongs to the technical field of micro-nano optical device manufacturing, and relates to a preparation method of a microlens array. After spin coating photoresist on the surface of a substrate and forming a microcolumn array, a thin film is deposited on the microcolumn by using a magnetron sputtering technology, the surface energy distribution of the photoresist is adjusted by precisely controlling the compressive stress of the thin film to be-200MPa to +80MPa, the surface energy is effectively reduced from 45-60mN / m to 25-35mN / m, and the flowability and formability of the material in the subsequent thermal reflow process are optimized, the problems of poor surface quality and low shape accuracy existing in the traditional process are successfully solved, the compatibility and stability of the process are improved, and a new way is provided for efficiently and low-costly manufacturing high-quality microlens arrays.

Description

Technical Field

[0001] This invention belongs to the field of micro-nano optical device manufacturing technology, and relates to a method for preparing a microlens array. Background Technology

[0002] Thermal reflow is a key process widely used in the fabrication of microlens arrays on wafers. Its basic principle is as follows: First, a regularly arranged cylindrical or specifically shaped photoresist structure is formed on the substrate surface using photolithography. Then, the photoresist is heated to reach and exceed its glass transition temperature (Tg), softening it and causing it to naturally shrink into an aspherical structure under surface tension, ultimately forming a microlens array with optical functions. This method has attracted widespread attention because it allows for the direct integration of microlens structures at the wafer level, and is particularly suitable for large-scale, low-cost optical component manufacturing. However, in practical applications, traditional thermal reflow processes still face many challenges and limitations.

[0003] First, while traditional coating-free thermal reflow processes are simple to operate, the lack of effective control over material flow behavior results in high surface roughness of the formed microlenses, typically exceeding 15 nm, and poor morphological uniformity between different regions, affecting the uniformity of optical performance. To improve this issue, some studies have attempted to use solution-based coating of surface modification layers to control the wettability and flowability of photoresists. However, this method easily introduces organic contaminants and has compatibility issues with standard semiconductor manufacturing processes, thus limiting its application in high-precision devices.

[0004] In addition, some researchers have attempted to use plasma processing techniques to enhance the fluidity of photoresist, thereby optimizing the microlens forming effect. However, this process may damage the existing patterned structure, affecting the integrity of the pattern, especially in fine-structured areas, potentially causing edge deformation or structural collapse. Meanwhile, other studies have proposed thermal reflow processing in a nitrogen atmosphere to reduce the effects of oxidation and contamination, but this method fails to fundamentally solve the problem of uneven surface energy gradients, resulting in significant deviations in the microlens curvature radius, reaching ±8 μm, severely impacting the consistency of optical focusing performance.

[0005] In recent years, researchers have also proposed using the "photosensitive acid diffusion" method to fabricate microlens arrays made of SU-8 material. This method involves lateral diffusion of photoacids during baking after ultraviolet exposure, resulting in a continuously varying cross-linking degree distribution, which in turn guides the SU-8 material to form a smooth curved structure during development. Compared to the aforementioned high-cost methods, this method is lower in cost and relatively simpler in process. However, it still suffers from problems such as a narrow process window, poor controllability of microlens shape, and difficulty in completely removing residues after development, hindering its practical application and promotion in industry.

[0006] In summary, although the hot reflow method has significant advantages in the fabrication of wafer-level microlens arrays, it still faces many technical bottlenecks in terms of surface quality control, process compatibility, material selection, and shape accuracy.

[0007] Chinese patent application document (CN113419301A) discloses a method for fabricating a microlens array and a wafer, but it has drawbacks such as poor surface roughness control, insufficient material flow control during thermal reflow leading to poor morphological consistency, and potential limitations in compatibility with high-precision semiconductor processes.

[0008] Chinese patent application document (CN113703081A) discloses a method for fabricating a microlens array structure, but it has disadvantages such as relatively complex process steps, high cost due to dependence on specific materials or processing methods, and room for improvement in controlling the uniformity of microlens curvature radius and reducing surface roughness. Summary of the Invention

[0009] The purpose of this invention is to address the aforementioned problems in the existing technology by proposing a method for fabricating a microlens array. This method improves the morphological accuracy of the microlens array by controlling the surface energy distribution of the photoresist and combining it with a gradient thermal reflow process.

[0010] The objective of this invention can be achieved through the following technical solutions: A method for fabricating a microlens array, the method comprising the following steps: S1. A photoresist layer is spin-coated onto the substrate surface, and a micropillar array is formed by photolithography. S2. Then, magnetron sputtering is used to deposit a thin film on the surface of the micropillar array. During the magnetron sputtering process, the compressive stress of the thin film is controlled to be -300 MPa to +80 MPa by using a substrate bias voltage of -50V to +30V. S3. Then, gradient thermal reflux treatment is performed in an inert gas environment; S4. Then, using the thin film as an etching mask, inductively coupled plasma etching is performed to transfer the microlens morphology to the substrate.

[0011] This invention controls the compressive stress of the thin film to precisely regulate the surface energy distribution and gradient of the photoresist micropillars. Films under compressive stress tend to contract, increasing the surface tension of the underlying photoresist; films under tensile stress tend to expand, reducing the surface tension of the underlying photoresist. By precisely controlling the compressive stress within the range of -300 MPa to +80 MPa, a desired, controllable surface energy gradient can be formed on the micropillar surface, guiding the photoresist material to flow more uniformly and controllably during thermal reflow. This optimizes the forming accuracy of the microlens, reduces surface roughness (<5 nm), and significantly improves the uniformity of the radius of curvature (>97%). This range is based on empirically proven ranges for commonly used thin film materials (such as Al, TiN, Cr) that can stably achieve and effectively control the surface energy of the photoresist under controllable process conditions.

[0012] In the above-mentioned method for fabricating a microlens array, the substrate includes at least one of silicon, quartz and sapphire materials, wherein the surface flatness of the substrate is ≤0.1μm.

[0013] In the above-mentioned method for fabricating a microlens array, the photoresist layer thickness is 5-20 μm, and the photoresist is selected from AZ series positive photoresist or SU-8 series negative photoresist.

[0014] In the above-mentioned method for fabricating a microlens array, the diameter of the micropillar array is 10-100 μm.

[0015] This invention achieves a balance between process efficiency and optical performance by controlling the diameter of the micropillar array within the range of 10-100 μm. This range is suitable for most optical applications (such as imaging, homogenization, and sensing), and at this size, the effects of surface tension and gravity on thermal reflow molding are in a favorable balance, making it easy to form smooth, symmetrical lens surfaces. However, if the diameter is too short (<10 μm), the surface tension effect is too strong during thermal reflow, leading to excessive shrinkage of the micropillars and the formation of lenses with excessively small radii of curvature and short focal lengths. Insufficient material may even result in incomplete lens shapes or an increased risk of collapse; it also places extremely high demands on the uniformity of photolithography and sputtering. If the diameter is too long (>100 μm), the influence of gravity will be relatively increased, which may cause the lens to sag and deform during thermal reflow, making it difficult to form ideal spherical or aspherical surfaces. The ratio of lens height to diameter (sagitta) will decrease, weakening the optical focusing ability; at the same time, large-sized structures are more prone to fusion of adjacent structures or overall collapse (increased collapse rate) during thermal reflow.

[0016] In the above-mentioned method for fabricating a microlens array, the thin film is a metal thin film or a dielectric thin film with a thickness of 5-50 nm, and the thin film material includes at least one of Al, TiN, and Cr.

[0017] In the above-mentioned method for fabricating a microlens array, magnetron sputtering uses a DC power supply or an RF power supply; The DC power supply used is 150-250W, the substrate temperature is 50-90℃, the working pressure is 0.3-1.0Pa, and the substrate bias voltage is -50V to +30V. The RF power supply is 200-400W, the substrate temperature is 70-90℃, the working pressure is 0.3-1.0Pa, and the substrate bias voltage is -50V to +30V.

[0018] Preferably, when the thin film material is Al, a substrate bias voltage of +10V to +30V is applied, and the compressive stress of the thin film is +30 to +80MPa. When the thin film material is TiN, a substrate bias voltage of -20V to -40V is applied, and the compressive stress of the thin film is -150 to -300MPa.

[0019] In the above-mentioned method for fabricating a microlens array, the ambient gas used in magnetron sputtering is at least one of N2 and Ar.

[0020] Preferably, magnetron sputtering uses a mixture of N2 and Ar in a volume ratio of 1:(2-4).

[0021] In the above-mentioned method for fabricating a microlens array, the gradient thermal reflux treatment is carried out in an inert gas environment at a heating rate of 1-3℃ / min, holding at 120-150℃ for 1-3min, and then continuing to heat to 170-220℃ and holding for 5-10min; wherein the oxygen content in the inert gas environment is: 1 ppm < oxygen content ≤ 100ppm.

[0022] Preferably, the inert gas is nitrogen or argon, wherein the temperature fluctuation in the first stage of the gradient thermal reflux process is ≤±2℃, and the temperature fluctuation in the second stage is ≤±1℃.

[0023] This invention requires controlling the oxygen content to be below 100 ppm but above trace levels (e.g., >1 ppm), preferably within the range of 30-100 ppm. While environments with pure nitrogen or extremely low oxygen content (e.g., <1 ppm) reduce oxidation, they fail to actively introduce conditions for forming a uniform surface oxide layer, resulting in insufficient surface energy gradient control. This invention utilizes a certain amount of oxygen in the reaction. In the first stage of gradient thermal reflux treatment (holding at 120-150°C), a controlled, slow oxidation reaction occurs on the surface of the metal or dielectric film (e.g., Al, TiN, Cr) in an oxygen-containing environment (30-100 ppm O2), forming a very thin (2-5 nm) but uniform and dense oxide layer (e.g., Al2O3, TiO2, Cr2O3). This oxide layer has different surface chemistry properties (mainly higher surface energy) compared to the unoxidized substrate film. This oxidation process is carried out at a relatively low temperature, ensuring the uniformity and controllability of the reaction. This uniform oxide layer establishes a consistent and controllable surface energy gradient on the micropillar surface. During the subsequent reflow stage at higher temperatures (170-220℃), as the photoresist softens and flows, the interfacial tension between it and the covering film (and oxide layer) is significantly affected by this uniform oxide layer. The uniform surface energy gradient guides the molten photoresist material to flow more uniformly and synchronously from the edge of the micropillar towards the center, thereby greatly improving the curvature radius consistency (>97%) of the final microlens array.

[0024] In the above-mentioned method for fabricating a microlens array, an oxide layer with a thickness of 2-5 nm is formed on the surface of the thin film after gradient thermal reflow treatment.

[0025] This invention utilizes gradient reflow in the first stage, holding the photoresist at 120-150℃ for 1-3 minutes to bring it to or slightly exceed its glass transition temperature (Tg), causing it to begin softening but not fully flowing. In an oxygen-containing environment, this promotes the formation of a uniform thin oxide layer (2-5nm) on the film surface, establishing a controllable surface energy gradient (one of the core advantages of this invention). The low-temperature stage avoids drastic flow deformation of the photoresist, providing stable conditions for the uniform formation of the surface oxide layer. Preheating makes the internal temperature of the photoresist more uniform, reducing stress in the subsequent high-temperature stage.

[0026] The second stage involves holding the photoresist at 170-220℃ for 5-10 minutes to bring its temperature significantly higher than T. g The photoresist is fully softened and shaped into a smooth lens surface under the action of surface tension (controlled by the surface energy gradient established by the oxide layer). High temperature ensures that the photoresist flows fully and completes the lens formation. Precise temperature control (fluctuation ≤ ±1℃) combined with the uniform surface energy gradient established in the first stage ensures the high synchronicity and consistency of microlens formation on the entire wafer.

[0027] It is evident that the phased heating of this invention avoids uneven internal stress and flow runaway of the photoresist caused by a sudden temperature rise; the separation of low-temperature oxidation and high-temperature molding steps optimizes their respective effects; and ultimately achieves ultra-low surface roughness (<5nm) and ultra-high curvature radius consistency (>97%).

[0028] In the above-mentioned method for fabricating a microlens array, the inductively coupled plasma etching power is 700-1000W, the RF bias voltage is 120-180W, and the surface roughness of the substrate after etching is ≤5nm. The etching is performed using a mixed gas of Cl2 and BCl3 with a volume ratio of (3-5):1, and the flow rate of the mixed gas is 40-60sccm.

[0029] Compared with the prior art, the present invention has the following beneficial effects: 1. In this invention, after spin-coating photoresist on the substrate surface to form a micropillar array, a thin film is deposited on the micropillars using magnetron sputtering technology. By precisely controlling the compressive stress of the thin film from -200MPa to +80MPa, the surface energy distribution of the photoresist is adjusted, effectively reducing the surface energy from 45-60mN / m to 25-35mN / m, and optimizing the material flowability and formability during subsequent thermal reflow. 2. This invention utilizes gradient thermal reflow treatment, that is, gradually heating and holding the temperature in an inert gas environment with an oxygen content of less than 100 ppm, to ensure the uniformity and consistency of the microlens array during the forming process, reduce the surface roughness problem commonly found in traditional processes, and achieve a surface roughness of less than 5 nm, which is about 67% lower than traditional methods. At the same time, the uniformity of the radius of curvature also exceeds 97%. 3. In the inductively coupled plasma etching step, this invention uses a specific ratio of Cl2 and BCl3 mixed gas for etching, which not only improves the etching selectivity to 5.8:1, a 193% improvement compared to existing technologies, but also ensures that the surface roughness of the substrate after etching does not exceed 5nm, further guaranteeing the optical performance of the final product. More importantly, through the above process, the thermal reflow collapse rate is controlled below 3%, greatly reducing the defect rate in the production process and improving the yield. 4. This invention can be applied to various substrate materials such as silicon, quartz, and sapphire, and it also exhibits good adaptability to photoresists of different thicknesses (5-20 μm) and types (such as AZ series positive photoresists or SU-8 series negative photoresists), allowing the microlens diameter range to be flexibly adjusted between 10-100 μm. This microlens array fabrication method, by introducing surface energy modulation and gradient thermal reflow treatment, successfully solves the problems of poor surface quality and low shape accuracy in traditional processes, while improving process compatibility and stability, providing a new approach for the efficient and low-cost fabrication of high-quality microlens arrays. Attached Figure Description

[0030] Figure 1 These are surface energy gradient distribution diagrams of the microlens array prepared in Example 1 of this invention and the microlens array prepared by conventional process in Comparative Example 1.

[0031] Figure 2 This is a temperature control curve of gradient thermal reflux of the microlens array prepared in Example 1 of the present invention; a. Temperature control curve, b. Radius of curvature distribution. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of this invention patent clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this invention patent and are not intended to limit the scope of this invention patent.

[0033] The terms “comprising,” “including,” “having,” “containing,” or any other variations thereof, as used herein, are intended to cover a non-exclusive inclusion. For example, a composition, step, method, article, or apparatus that includes the listed elements is not necessarily limited to those elements, but may include other elements not expressly listed or elements inherent to such composition, step, method, article, or apparatus.

[0034] The terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., used in this invention refer to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms are not necessarily directed at the same embodiment or example. Furthermore, the technical features involved in the various embodiments of the invention can be combined with each other as long as they do not conflict with each other.

[0035] The following explanation will be provided in conjunction with specific embodiments: Example 1

[0036] S1. Spin-coat a photoresist layer onto the substrate surface; The substrate is a 4-inch silicon wafer spin-coated with AZ4620 photoresist (9.5μm thick). Spin coating process: Spin coating speed 1500 rpm, time 45 seconds; pre-baking (soft bake) temperature 110℃, time 180 seconds.

[0037] S2. A micropillar array with a diameter of 98μm is formed by photolithography. Photolithography process: Exposure wavelength 365nm (i-line), exposure dose 800 mJ / cm²; development using 2.38% TMAH developer, development time 300 seconds; hard bake temperature 110℃, time 120 seconds.

[0038] S3. Then, a thin film with a thickness of 30 nm is deposited on the surface of the micropillar array by magnetron sputtering; The magnetron sputtering target is Al with a purity of 99.999%. The DC power supply is 200W, the Ar concentration is 40sccm, the cavity pressure is 0.5Pa, the substrate temperature is 60℃, and the substrate bias voltage is +20V to control the compressive stress of the thin film to +50 MPa.

[0039] S4. Then, in an N2 environment with an oxygen content of 30ppm, the temperature is increased at 3℃ / min and held at 120℃ for 2min. Then, the temperature is increased to 180℃ and held for 5min to form a 3nm oxide layer through gradient thermal reflux treatment. S5. Using the thin film as an etching mask, inductively coupled plasma etching is performed to transfer the microlens morphology to the substrate. The inductively coupled plasma etching power is 800W, the RF bias voltage is 150W, the etching depth is 15μm, and the surface roughness of the substrate after etching is ≤5nm. The etching is performed using a mixed gas of Cl2 and BCl3 with a volume ratio of 4:1 and a mixed gas flow rate of 50sccm. Example 2

[0040] S1. Spin-coat a photoresist layer onto the substrate surface; The substrate is a 4-inch silicon wafer spin-coated with AZ4620 photoresist (9.5μm thick). Spin coating process: Spin coating speed 1500 rpm, time 45 seconds; pre-baking (soft bake) temperature 110℃, time 180 seconds.

[0041] S2. A micropillar array with a diameter of 98μm is formed by photolithography. Photolithography process: Exposure wavelength 365nm (i-line), exposure dose 800 mJ / cm²; development using 2.38% TMAH developer, development time 300 seconds; hard bake temperature 110℃, time 120 seconds.

[0042] S3. Then, a TiN thin film with a thickness of 20 nm is deposited on the surface of the micropillar array by magnetron sputtering; The magnetron sputtering target is Ti with a purity of 99.999%. The DC power supply is 300W, the N2 / Ar = 1:3 concentration is 40sccm, the cavity pressure is 0.5Pa, the substrate temperature is 60℃, and the substrate bias voltage is -30V to control the film compressive stress to -300 MPa.

[0043] S4. Then, in an N2 environment with an oxygen content of 30ppm, the temperature is increased at 3℃ / min and held at 120℃ for 2min. Then, the temperature is increased to 180℃ and held for 5min to form a 3nm oxide layer through gradient thermal reflux treatment. S5. Using the thin film as an etching mask, inductively coupled plasma etching is performed to transfer the microlens morphology to the substrate. The inductively coupled plasma etching power is 800W, the RF bias voltage is 150W, the etching depth is 15μm, and the surface roughness of the substrate after etching is ≤5nm. The etching is performed using a mixed gas of Cl2 and BCl3 with a volume ratio of 4:1 and a mixed gas flow rate of 50sccm. Example 3

[0044] S1. Spin-coat a photoresist layer onto the substrate surface; The substrate is a 4-inch silicon wafer spin-coated with AZ4620 photoresist (5μm thick). Spin coating process: Spin coating speed 1500 rpm, time 45 seconds; pre-baking (soft bake) temperature 110℃, time 180 seconds.

[0045] S2. A micropillar array with a diameter of 20μm is formed by photolithography. Photolithography process: Exposure wavelength 365nm (i-line), exposure dose 800 mJ / cm²; development using 2.38% TMAH developer, development time 300 seconds; hard bake temperature 110℃, time 120 seconds.

[0046] S3. Then, a thin film with a thickness of 30 nm is deposited on the surface of the micropillar array by magnetron sputtering; The magnetron sputtering target is Al with a purity of 99.999%. The DC power supply is 200W, the Ar concentration is 40sccm, the cavity pressure is 0.5Pa, the substrate temperature is 60℃, and the substrate bias voltage is +20V to control the compressive stress of the thin film to +80 MPa.

[0047] S4. Then, in an N2 environment with an oxygen content of 5 ppm, the temperature is increased at 3 °C / min and held at 120 °C for 2 min. Then, the temperature is increased to 180 °C and held for 5 min to form a 3 nm oxide layer through gradient thermal reflux treatment. S5. Using the thin film as an etching mask, inductively coupled plasma etching is performed to transfer the microlens morphology to the substrate. The inductively coupled plasma etching power is 800W, the RF bias voltage is 150W, the etching depth is 15μm, and the surface roughness of the substrate after etching is ≤5nm. The etching is performed using a mixed gas of Cl2 and BCl3 with a volume ratio of 4:1 and a mixed gas flow rate of 50sccm. Example 4

[0048] The only difference from Example 1 is that the magnetron sputtering film thickness is 10 nm. Example 5

[0049] The only difference from Example 1 is that the magnetron sputtering film thickness is 100 nm. Example 6

[0050] The only difference from Example 1 is that the oxygen content is 0 during the gradient thermal reflux process. Example 7

[0051] The only difference from Example 1 is that the oxygen content is 150 ppm during the gradient thermal reflux process. Example 8

[0052] The only difference from Example 1 is that the heat reflux is performed at a heating rate of 3°C / min and held at 120°C for 2 minutes. Example 9

[0053] The only difference from Example 1 is that the heat reflux is performed at a heating rate of 3°C / min and held at 180°C for 5 minutes. Comparative Example 1

[0054] S1. Spin-coat AZ4620 photoresist (9.5μm thickness) onto the surface of a 4-inch silicon wafer, using the same spin-coating parameters as in Example 1;

[0055] S2. A micropillar array with a diameter of 98μm is formed by photolithography (process is the same as in Example 1).

[0056] S3. Perform single-stage heat reflux treatment directly in the air environment: heat up to 180℃ at 5℃ / min and hold for 10min;

[0057] S4. Perform inductively coupled plasma etching (parameters same as in Example 1) to transfer the microlens morphology to the substrate. Comparative Example 2

[0058] The only difference from Example 1 is that step S2, magnetron sputtering of the film, was not performed. Comparative Example 3

[0059] The only difference from Example 1 is that the compressive stress of the thin film is controlled to be +150MPa using bias voltage. Comparative Example 4

[0060] The only difference from Example 2 is that the compressive stress of the thin film is controlled to be -350 MPa using bias voltage.

[0061] Table 1: Performance test results of the microlens arrays prepared in the examples and comparative examples

[0062] "Table 1 data verification: Excessive compressive stress (Comparative Example 3 / 4) resulted in incomplete forming; excessive oxygen content (Example 6 / 7) caused roughness >10nm; lack of two-stage gradient reflow (Example 8 / 9) significantly reduced consistency."

[0063] Figure 1 These are surface energy gradient distribution diagrams of the microlens array prepared in Example 1 of this invention and the microlens array prepared by conventional process in Comparative Example 1. Figure 1 As can be seen, the surface energy gradient distribution of Comparative Example 1 (conventional process) exhibits significant fluctuations (ranging from 30 to 95 mN / m), while the surface energy gradient of Example 1 remains stable within the range of 30 to 55 mN / m. This indicates that: Comparative Example 1 exhibits uneven surface energy distribution. Due to the lack of thin-film control, the surface energy gradient of the photoresist in Comparative Example 1 is disordered, leading to increased asynchronous material flow during thermal reflow (flow rate difference between adjacent micropillars > 40%), resulting in edge collapse and curvature deviation. Comparative Example 1 also lacks an oxide layer. During thermal reflow in air, a non-uniform oxide layer (thickness fluctuating 5-20 nm) is randomly generated on the surface, further exacerbating surface roughness (measured Ra = 16.3 nm). Furthermore, the flow control in Comparative Example 1 fails, and the lack of a surface energy gradient makes the material shrinkage direction uncontrollable, resulting in a microlens curvature uniformity of only 75.2% (compared to 97.6% in Comparative Example 1).

[0064] Figure 2 This is a temperature control curve of gradient thermal reflow for the microlens array prepared in Example 1 of this invention; a. Temperature control curve, b. Radius of curvature distribution. As can be seen from the figure, Example 1 solves the problems of poor microlens morphology consistency, high surface roughness, and high collapse rate by controlling the thin film compressive stress and gradient thermal reflow, and is compatible with semiconductor processes.

[0065] In summary, this invention can be applied to various substrate materials such as silicon, quartz, and sapphire, and it exhibits excellent adaptability to different thicknesses (5-20 μm) and types of photoresists (such as AZ series positive photoresists or SU-8 series negative photoresists), allowing the microlens diameter range to be flexibly adjusted between 10-100 μm. This microlens array fabrication method, by introducing surface energy modulation and gradient thermal reflow treatment, successfully solves the problems of poor surface quality and low shape accuracy in traditional processes, while improving process compatibility and stability, providing a new approach for the efficient and low-cost fabrication of high-quality microlens arrays.

[0066] The embodiments herein cover any points not exhaustively within the scope of the technical claims of this invention, as well as new technical solutions formed by equivalent substitutions of one or more technical features in the embodiments. These are all within the scope of the claims of this invention. Furthermore, in all listed or unlisted embodiments of this invention, each parameter in the same embodiment merely represents an instance (i.e., a feasible solution) of its technical solution, and there is no strict coordination or limitation relationship between the parameters. The parameters can be substituted for each other without violating axioms and the claims of this invention, unless otherwise stated.

[0067] The technical means disclosed in this invention are not limited to those described above, but also include technical solutions composed of any combination of the above technical features. The above descriptions are specific embodiments of this invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of this invention, and these improvements and modifications are also considered within the scope of protection of this invention.

[0068] The specific embodiments described herein are merely illustrative of the spirit of the invention. Those skilled in the art to which this invention pertains may make various modifications or additions to the described specific embodiments or use similar methods to substitute them, without departing from the spirit of the invention or exceeding the scope defined by the appended claims.

Claims

1. A method for fabricating a microlens array, characterized in that, The method includes the following steps: S1. A photoresist layer is spin-coated onto the substrate surface, and a micropillar array is formed by photolithography. S2. Then, magnetron sputtering is used to deposit a thin film on the surface of the micropillar array. During the magnetron sputtering process, the compressive stress of the thin film is controlled to be -300 MPa to +80 MPa by using a substrate bias voltage of -50V to +30V. S3. Then, gradient thermal reflux treatment is performed in an inert gas environment; S4. Then, using the thin film as an etching mask, inductively coupled plasma etching is performed to transfer the microlens morphology to the substrate.

2. The method for fabricating a microlens array according to claim 1, characterized in that, The substrate includes at least one of silicon, quartz and sapphire materials, wherein the surface flatness of the substrate is ≤0.1μm.

3. The method for fabricating a microlens array according to claim 1, characterized in that, The photoresist layer thickness is 5-20μm, and the photoresist is selected from AZ series positive photoresist or SU-8 series negative photoresist.

4. The method for fabricating a microlens array according to claim 1, characterized in that, The diameter of the micropillar array is 10-100 μm.

5. The method for fabricating a microlens array according to claim 1, characterized in that, The thin film is a metal thin film or dielectric thin film with a thickness of 5-50 nm, and the thin film material includes at least one of Al, TiN and Cr.

6. The method for fabricating a microlens array according to claim 1, characterized in that, Magnetron sputtering can use a DC power supply or an RF power supply; The DC power supply used is 150-250W, the substrate temperature is 50-90℃, the working pressure is 0.3-1.0Pa, and the substrate bias voltage is -50V to +30V. The RF power supply is 200-400W, the substrate temperature is 70-90℃, the working pressure is 0.3-1.0Pa, and the substrate bias voltage is -50V to +30V.

7. The method for fabricating a microlens array according to claim 1, characterized in that, In magnetron sputtering, the ambient gas is at least one of N2 and Ar.

8. The method for fabricating a microlens array according to claim 1, characterized in that, The gradient heat reflux treatment is carried out in an inert gas environment at a heating rate of 1-3℃ / min, holding at 120-150℃ for 1-3 min, and then continuing to heat to 170-220℃ and holding for 5-10 min; wherein the oxygen content in the inert gas environment is: 1ppm < oxygen content ≤ 100ppm.

9. The method for fabricating a microlens array according to claim 1, characterized in that, After gradient thermal reflow treatment, an oxide layer with a thickness of 2-5 nm is formed on the surface of the film.

10. The method for fabricating a microlens array according to claim 1, characterized in that, The inductively coupled plasma etching power is 700-1000W, the RF bias voltage is 120-180W, and the surface roughness of the substrate after etching is ≤5nm. The etching is carried out by a mixed gas of Cl2 and BCl3 with a volume ratio of (3-5):1, and the flow rate of the mixed gas is 40-60sccm.

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