Application board for reducing creepage current and semiconductor package mounted thereon

Abstract

An application board, a semiconductor package mounted thereon, and a semiconductor device module, the application board including: a first main surface and a plurality of electrical contact regions disposed on the first main surface, the plurality of electrical contact regions including one or more first electrical contact regions and one or more second electrical contact regions; and a recess, i.e. A slit or a groove, disposed in the first main face, the recess separating a first portion of the application board from a second portion of the application board, a first electrical contact region disposed on the first portion of the application board, and a second electrical contact region disposed on the second portion of the application board.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to an application board and a semiconductor device module comprising the application board and a semiconductor package mounted on the application board. BACKGROUND

[0002] Electronic devices, such as e.g. power semiconductors, can be operated at high voltages. Here, the devices can need to comply with electrical insulation requirements according to certain safety standards. Electronic devices must be continuously improved. In particular, it can be desirable to meet the required safety standards without reducing the performance and quality of the devices. In this regard, it can be particularly desirable to increase the creepage distance of the devices. Furthermore, it can be desirable to reduce system costs and provide higher power density.

[0003] For these and other reasons, there is a need for the present disclosure. SUMMARY

[0004] A first aspect of the present disclosure relates to an application board comprising: a first main face and a plurality of electrical contact areas arranged on the first main face, the plurality of electrical contact areas comprising one or more first electrical contact areas and one or more second electrical contact areas; and a recess, i.e. a slit or groove, arranged in the first main face, the recess separating a first portion of the application board from a second portion of the application board, wherein the first electrical contact areas are arranged on the first portion of the application board and the second electrical contact areas are arranged on the second portion of the application board.

[0005] According to one embodiment of the application board according to the first aspect, the first electrical contact areas are arranged on the first portion of the application board at a distance from an edge of the first portion facing the recess in the range of 0 mm to 3 mm.

[0006] According to one embodiment of the application board according to the first aspect, the thickness of the application board can be in the range of 1 mm to 5 mm. In case of a groove as the recess, the thickness of the groove can be in the range of 0.1 mm to 2.0 mm or more.

[0007] According to one embodiment of the application board according to the first aspect, the width of the recess is in the range of 0.25 mm to 5 mm.

[0008] According to one embodiment of the application board according to the first aspect, two or more first electrical contact areas are arranged side by side along a row.

[0009] According to one embodiment of the application board according to the first aspect, the application board comprises one or more of a printed circuit board (PCB), a direct copper bonding (DCB), an active metal brazing (AMB), an insulated metal substrate (IMS), or any other interposer.

[0010] A second aspect of the present disclosure relates to a semiconductor device module comprising an application board according to the first aspect and a semiconductor package mounted on the application board.

[0011] According to one embodiment of the semiconductor device module according to the second aspect, the semiconductor package comprises a semiconductor transistor die and a plurality of external contacts, the plurality of external contacts comprising a first external contact and a second external contact, wherein the semiconductor transistor die comprises a load path, wherein the first external contact is connected with the load path of the semiconductor transistor die.

[0012] According to one embodiment of the semiconductor device module according to the second aspect, wherein the semiconductor package comprises a first main surface facing the application board, in which a recess is formed, wherein the semiconductor package is mounted on the application board in such a way that the recess of the semiconductor package is located above the recess of the application board.

[0013] According to one embodiment of the semiconductor device module according to the second aspect, the recess formed in the first main surface of the semiconductor package is a groove or recess located at an edge of the package.

[0014] According to one embodiment of the semiconductor device module according to the second aspect, an inner wall of the groove is adjacent and coplanar with an inner wall of the recess.

[0015] According to one embodiment of the semiconductor device module according to the second aspect, the semiconductor package comprises a lead frame, wherein the lead frame comprises a die pad and a plurality of leads.

[0016] According to one embodiment of the semiconductor device module according to the second aspect, the recess extends from a first side wall to an opposite second side wall of the semiconductor package.

[0017] According to one embodiment of the semiconductor device module according to the second aspect, the semiconductor transistor die comprises one or more of a vertical semiconductor transistor die, a semiconductor power transistor die, an IGBT die, a MOSFET die, a JFET die, a CoolMOS die, a wide bandgap semiconductor transistor die, in particular a SiC transistor die or a GaN transistor die.

[0018] According to one embodiment of the semiconductor device module according to the second aspect, the semiconductor package is any type of SMD bottom side cooled package or a double side cooled package. BRIEF DESCRIPTION OF DRAWINGS

[0019] The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate the embodiments and, together with the description, serve to explain the principles of the embodiments. Other embodiments and many of the intended advantages of the embodiments will be readily understood as they become better understood by reference to the following detailed description.

[0020] The elements in the drawings are not necessarily drawn to scale relative to each other. Identical or similar reference numbers designate identical or similar parts.

[0021] FIG. 1A and FIG. 1B A side cross-sectional view (A) and a perspective view (B) of an exemplary application panel including a slot are shown.

[0022] FIG. 2A and FIG. 2B A side cross-sectional view (A) and a perspective view (B) of an exemplary application plate including grooves are shown.

[0023] FIGS. 3A-3C A side cross-sectional view (A), a perspective view (B), and a bottom view (C) of an exemplary semiconductor device module with an application board including a slot are shown.

[0024] FIG. 4A and FIG. 4B A perspective view (A) and a bottom view (B) of an exemplary semiconductor device module including three semiconductor packages with an application board including a slot are shown.

[0025] FIGS. 5A-5C A side cross-sectional view (A), a perspective view (B), and a bottom view (C) of an exemplary semiconductor device module with an application board including a recess are shown.

[0026] FIG. 6A and FIG. 6B A perspective view (A) and a bottom view (B) of an exemplary semiconductor device module including three semiconductor packages with an application board including a recess are shown.

[0027] FIGS. 7A-7C A side cross-sectional view (A), a perspective view (B), and a bottom view (C) of an exemplary semiconductor device module having an SMD leadless semiconductor package with an application board including a slot are shown.

[0028] FIG. 8A and FIG. 8B A side cross-sectional view (A) of an SMD leadless semiconductor package with an exemplary improved lead frame and a side cross-sectional view (B) of a semiconductor device module including the semiconductor package with the improved lead frame are shown.

[0029] FIGS. 9A-9C Shown withFIG. 8A and FIG. 8B A side cross-sectional view (A), a perspective view (B), and a bottom view (C) of an exemplary semiconductor device module showing a semiconductor package with an application board including a recess.

[0030] FIG. 10A and FIG. 10B A side cross-sectional view (A) of a semiconductor package with another exemplary improved lead frame and a side cross-sectional view (B) of a semiconductor device module including an SMD leaded semiconductor package with the improved lead frame are shown.

[0031] FIGS. 11A-11C Shown as FIG. 10B An exemplary semiconductor device module is shown in side cross-sectional view (A), perspective view (B), and bottom view (C).

[0032] FIGS. 12A-12C Shown are a side cross-sectional view (A), a perspective view (B), and a bottom view (C) of an exemplary semiconductor device module having an SMD leaded semiconductor package with an application board including a recess.

[0033] FIG. 13A and FIG. 13B Shown are a side cross-sectional view (A) of an SMD leaded semiconductor package with another exemplary improved lead frame, and a side cross-sectional view (B) of a semiconductor device module including the semiconductor package with the improved lead frame with an application board having a slot.

[0034] FIGS. 14A-14C Shown with FIG. 13A and FIG. 13B Side cross-sectional view (A), perspective view (B), and bottom view (C) of an exemplary semiconductor device module of the same semiconductor package with an application board having a slot.

[0035] FIGS. 15A-15C Shown with FIGS. 14A-14C Side cross-sectional view (A), perspective view (B), and bottom view (C) of an exemplary semiconductor device module of the same semiconductor package with an application board having a recess.

[0036] FIG. 16A and FIG. 16B Shown are a side cross-sectional view (A) of an SMD leaded semiconductor package with another exemplary improved lead frame, and a side cross-sectional view (B) of a semiconductor device module including the semiconductor package with the improved lead frame with an application board having a slot.

[0037] FIGS. 17A-17C Shown with FIG. 16A andFIG. 16B Side sectional view (A), perspective view (B) and bottom view (C) of an exemplary semiconductor device module with the same semiconductor package and with an application board having a slot.

[0038] FIGS. 18A-18C An exemplary semiconductor device module with the same semiconductor package and with an application board having a slot is shown. FIG. 16A and FIG. 16B Side sectional view (A), perspective view (B) and bottom view (C) of an exemplary semiconductor device module with the same semiconductor package and with an application board having a slot. DETAILED DESCRIPTION

[0039] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which are shown by way of illustration specific embodiments in which the disclosure can be practiced. In this regard, directional terminology, such as "top," "bottom," "front," "back," etc., is used with reference to the orientation of the Figure(s) described. Because components of embodiments can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration and is in no way limiting. It is to be understood that other embodiments can be utilized and structural or logical changes can be made without departing from the scope of the present disclosure. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims.

[0040] It is to be understood that the features of the various example embodiments described herein can be combined with each other, unless specifically noted otherwise.

[0041] As used in this specification, the terms "engaged," "attached," "connected," "coupled," and / or "electrically connected / electrically coupled" do not mean that the elements or layers must be in direct contact with each other; an intervening element or layer can be present between the elements that are "engaged," "attached," "connected," "coupled," and / or "electrically connected / electrically coupled" accordingly. However, according to the present disclosure, the above-mentioned terms can optionally also have the specific meaning that the elements or layers are in direct contact with each other, i.e. no intervening element or layer is present between the elements that are "engaged," "attached," "connected," "coupled," and / or "electrically connected / electrically coupled" accordingly.

[0042] Furthermore, the word "over" as used in connection with a component, element or layer "over" or positioned "over" a surface can be used in the present description to mean that the component, element or layer is positioned "indirectly" over (e.g., placed, formed, deposited, etc. on) the surface, with one or more additional components, elements or layers arranged between the surface and the component, element or layer. Alternatively, the word "over" as used in connection with a component, element or layer "over" or positioned "over" a surface can optionally also mean that the component, element or layer is positioned "directly" over (e.g., placed, formed, deposited, etc. on) the surface, e.g., in direct contact with the surface.

[0043] Examples of semiconductor device modules can use various types of transistor devices. The examples can also use horizontal or vertical transistor devices, where these structures can be provided in a form that all contact elements of the transistor devices are arranged on one main face of the semiconductor die (horizontal transistor structure) or in a form that at least one electrical contact element is arranged on a first main face of the semiconductor die and at least one other electrical contact element is arranged on a second main face opposite to the main face of the semiconductor die (vertical transistor structure), e.g. MOS transistor structures or IGBT (Insulated Gate Bipolar Transistor) structures.

[0044] According to one embodiment of the semiconductor package, the semiconductor transistor die is a semiconductor power transistor die. Here, the term "power semiconductor transistor die" can refer to a semiconductor die that provides at least one of a high voltage blocking capability or a high current carrying capability. The power semiconductor die can be configured for high currents with a maximum current value of several amperes, e.g. 10 A, 250 A, 600 A, 1000 A, or a maximum current value of up to or even exceeding 1000 A. Similarly, the voltage associated with such current values can have a value of several volts to several tens of volts or several hundreds of volts or even several thousands of volts.

[0045] Examples of semiconductor packages can include an encapsulant or an encapsulating material with a semiconductor transistor die and a semiconductor driver die embedded therein. The encapsulating material can be any electrically insulating material, e.g. any type of molding material, any type of resin material, or any type of epoxy material. The encapsulating material can also be a polymeric material, a polyimide material, a thermoplastic material, a silicone material, a ceramic material, and a glass material. The encapsulating material can also include any of the above materials and further include a filler material embedded therein, e.g. a thermally conductive augmentation, e.g. thermally conductive particles, e.g. made of AIO, BNi, AINi, SiN, diamond, or any other thermally conductive particles.

[0046] FIG. 1A and FIG. 1BA side sectional view (A) and a perspective view (B) of an exemplary application board comprising a slit are shown.

[0047] FIG. 1A and FIG. 1B The application board 1 can be a regular printed circuit board (PCB). The application board 1 comprises a first upper main face and a plurality of electrical contact areas 1.1, 1.1A, 1.1B arranged on the first upper main face, the plurality of electrical contact areas 1.1, 1.1A, 1.1B comprising one or more first electrical contact areas 1.1A and one or more second electrical contact areas 1.1B. The application board 1 further comprises a slit 1.2 formed in the first main face of the PCB 1.

[0048] The slit 1.2 divides the PCB 1 into two portions 1A and 1B of different sizes. The first portion 1A, i.e. the smaller one of the two portions 1A and 1B, is intended for mounting a semiconductor package thereon. The first contact areas 1.1A are arranged on the first portion 1A of the two portions 1A and 1B of the PCB 1. The first contact areas 1.1A can be arranged at a distance of between 0 mm and 3 mm from the edge of the first section 1A facing the recess.

[0049] The first electrical contact areas 1.1A are intended to be connected to certain external contacts of the semiconductor package, as will be seen later.

[0050] The application board 1 further has second electrical contact areas 1.1B arranged on the second portion 1B, which are intended to be connected to other external contacts of the semiconductor package.

[0051] FIG. 1A and FIG. 1B Three first electrical contact areas 1.1A arranged in a row next to each other are shown in Fig. 1.1, wherein the slit 1.2 is at a short distance from the row of two or more first electrical contact areas 1.1A. The three first electrical contact areas 1.1A can be identical and can be equally spaced from the edge of the first portion 1A. Furthermore, the three first electrical contact areas 1.1A can be directly next to each other laterally, or can also be slightly spaced apart.

[0052] Furthermore, the slit 1.2 can have a constant width over its entire length dimension, for example, the width can be in the range of 3 mm to 5 mm.

[0053] Manufacturing and handling the PCB 1 can be done by attaching a preform of the PCB to a sheet of adhesive film or the like, then cutting out the slit 1.2, and then mounting the semiconductor package thereon.

[0054] FIG. 2A and FIG. 2BA side cross-sectional view (A) and a perspective view (B) of an exemplary application plate including grooves are shown.

[0055] FIG. 2A and FIG. 2B The application board 2 can also be a conventional printed circuit board (PCB). The application board 2 includes a first upper main surface and a plurality of electrical contact areas 2.1, 2.1A, 2.1B disposed on the first upper main surface. The plurality of electrical contact areas 2.1, 2.1A, 2.1B include one or more first electrical contact areas 2.1A and one or more second electrical contact areas 2.1B. The application board 20 also includes a recess 2.2 disposed in the first main surface.

[0056] Recess 2.2 divides PCB 2 into two sections 2A and 2B of different sizes. First section 2A, the smaller of sections 2A and 2B, is intended for mounting a semiconductor package thereon. A first contact area 2.1A is disposed on first section 2A of PCB 2, 2A and 2B. This first contact area 2.1A can be positioned at a distance between 0 mm and 3 mm from the edge of first section 2A facing the recess.

[0057] Thus, the application board 2 differs from the application board 1 only in the type of recess: the application board 1 has a slot 1.2 as recess, whereas the application board 2 has a groove 2.2, the depth of which may correspond to half the thickness of the PCB 2, for example.

[0058] Apart from this, all other elements and characteristics of the application plate 2, in particular the first electrical contact area 2.1A and the second electrical contact area 2.1B, have the same FIG. 1A and FIG. 1B The same features and functions as the corresponding components of the application board 1. The specified values ​​of the dimensions and distances may also be the same.

[0059] FIGS. 3A-3C A side cross-sectional view (A), a perspective view (B), and a bottom view (C) of an exemplary semiconductor device module with an application board including a slot are shown.

[0060] FIGS. 3A-3C The semiconductor device module 10 includes an application board 1, such as FIG. 1A and FIG. 1B The PCB 1 shown and described in FIG. 1 includes a slot 1 . 2 . In addition, the semiconductor device module 10 includes a semiconductor package 11 mounted on the PCB 1 .

[0061] The semiconductor package 11 comprises a semiconductor transistor die (not shown) and a plurality of external contacts 11.1 comprising a first external lead 11.1A and a second external lead 11.1B, wherein the semiconductor transistor die comprises a load path, wherein the first external lead 11.1A is connected with the load path of the semiconductor transistor die. More specifically, the semiconductor transistor die can comprise a vertical transistor die, e.g. an IGBT die, comprising a source pad and a gate pad arranged on a first upper main surface of said IGBT die and a drain pad arranged on a second lower main surface of said IGBT die, such that the load path is located between the source and the drain of said semiconductor transistor die.

[0062] The semiconductor package 11 further comprises a first main surface facing the PCB 1 comprising a recess 11.2, wherein the semiconductor package 11 is mounted on the PCB 1 in such a way that the recess 11.2 of the semiconductor package 11 is located above the slot 1.2 of the PCB 1. It can in particular be the case that the inner lateral walls of the recess 11.2 are adjacent and coplanar with the inner lateral walls of the slot 1.2, as realized in the example of the semiconductor device module of FIGS. 3A-3C The slot 1.2 of the application board 1 and the recess 11.2 of the semiconductor package 11 form a continuous space. The same applies to the embodiment shown below with the trench 2.2 of the application board 2.

[0063] The recess 11.2 preferably extends with a constant thickness from the first lateral wall to the opposite lateral wall of the semiconductor package 11, which constant thickness can be in the range of 1 m to 3 mm.

[0064] This design serves to avoid or at least greatly reduce the creepage current between the electrical contacts 1.1B and 1.1A. If there is no slot 1.2 in the PCB 1 and no trench 11.2 in the semiconductor package, there would be a creepage current path between the left electrical contact 1.1B by which the semiconductor package 11 is mounted on the second portion 1B of the PCB 1 and the electrical contact 1.1A on the first portion 1A of the PCB 1. Thus, the slot 1.2 and the recess 11.2 can effectively reduce the creepage current between the above-mentioned contacts. With this improved ability to resist leakage currents, the semiconductor transistor can be operated at higher load voltages.

[0065] The semiconductor device module 10 is designed as a component for bottom side cooling. For this purpose, a heat sink 13 can be attached to the lower side of the PCB 1.

[0066] The second outer lead 11.1 B is connected with the leftmost second electrical contact area 1.1 B on the PCB 1 through which, for example, a control signal can be fed to the gate contact of the IGBT.

[0067] It is also possible that the recesses 1.2, 2.2 of the application board 1, 2 and the recess 11.2 of the semiconductor package 11 are filled with a dielectric encapsulation material. The dielectric encapsulation material can comprise one or more of a dielectric molding compound, a thermally conductive filling material, a silicone resin or a silicone-based material. By this additional measure, the insulation strength can be further increased, even to the point that hardly any leakage current flows. The dielectric encapsulation material can be filled in liquid form or in granular form, for example using a dispensing process. This variant can also be used for all other examples of semiconductor packages shown below.

[0068] FIG. 4A and FIG. 4B A perspective view (A) and a bottom view (B) of an exemplary semiconductor device module comprising three semiconductor packages and with an application board comprising a slot are shown.

[0069] FIG. 4A and FIG. 4B The semiconductor device module 20 of Fig. 20 comprises an application board 1, for example FIG. 1A and FIG. 1B as shown and described in Figs. 19 and 20. In addition, the semiconductor device module 20 comprises three semiconductor packages 11 mounted on the PCB 1. The three semiconductor packages 11 are mounted on the PCB 1 in the same way as shown in Fig. 19, so that most of the reference signs are retained. FIGS. 3A-3C

[0070] FIGS. 5A-5C A side sectional view (A), a perspective view (B) and a bottom view (C) of an exemplary semiconductor device module with an application board comprising a recess are shown.

[0071] FIGS. 5A-5C The semiconductor device module 30 of Fig. 30 comprises an application board 2, for example FIG. 2A and FIG. 2B as shown and described in Figs. 29 and 30, which comprises a recess 2.2. In addition, the semiconductor device module 30 comprises a semiconductor package 11 mounted on the PCB 2. The semiconductor package 11 is mounted on the PCB 2 in a similar way as shown in Fig. 29, so that most of the reference signs are retained. FIGS. 3A-3C

[0072] ​​In particular, the semiconductor package 11 further comprises a first main surface facing the PCB 2, which first main surface comprises a recess 11.2, wherein the semiconductor package 11 is mounted on the PCB 2 in such a way that the recess 11.2 of the semiconductor package 11 is located above the recess 2.2 of the PCB 2. It can in particular be the case that the inner lateral walls of the recess 11.2 are adjacent to and coplanar with the inner lateral walls of the recess 2.2, which is achieved in a similar way as FIGS. 3A-3C An example of a semiconductor device module according to the application.

[0073] FIG. 6A and FIG. 6B shows a perspective view (A) and a bottom view (B) of an exemplary semiconductor device module comprising three semiconductor packages and with an application board comprising a recess.

[0074] FIG. 6A and FIG. 6B The semiconductor device module 40 according to the application comprises an application board 1, e.g. FIG. 1A and FIG. 1B as shown and described in the PCB 2 of FIGS. 5A-5C is mounted on the PCB 1 in the same way as shown in

[0075] The examples of semiconductor device modules described so far contain semiconductor packages with external contacts in the form of leads, in particular bent leads. However, other semiconductor packages can also be used, as will be further described below.

[0076] FIGS. 7A-7C shows a side sectional view (A), a perspective view (B) and a bottom view (C) of an exemplary semiconductor device module with SMD (surface mount device) leadless semiconductor packages and with an application board comprising a slit.

[0077] FIGS. 7A-7C The semiconductor device module 50 according to the application comprises an application board 1, e.g. FIG. 1A and FIG. 1B as shown and described in the PCB 1 of

[0078] FIGS. 7A-7CThe semiconductor device module 50 comprises a semiconductor package 21 having an external contact portion 21 in the form of a horizontal outer extension of an inner portion of an electrical connector, which may be part of a lead frame. Thus, the semiconductor package 21 may be attached to the PCB 1 using surface mounting technology. In addition, the electrical function of the external contact portion 21 is combined with the FIGS. 3A-3C The electrical function of the described leads 11 . 1 is the same. Furthermore, the semiconductor package comprises a recess 21 . 2 which corresponds to the recess 11 . 2 of the semiconductor package 11 .

[0079] FIG. 8A and FIG. 8B A side cross-sectional view (A) of an SMD leadless semiconductor package with an exemplary improved lead frame and a side cross-sectional view (B) of a semiconductor device module including the semiconductor package with the improved lead frame are shown.

[0080] like FIG. 8A The semiconductor package 31 shown in FIG. 1 includes a lead frame 31.1 embedded in an encapsulation material. The semiconductor package 31 also includes a recess 31.2 that corresponds to the recess 11.2 of the semiconductor package 11. The lead frame 31.1 includes a right portion 31.11 that curves upward to extend over the recess 31.2, and a left portion 31.12 that includes a die pad on which a semiconductor transistor die 31.3 is mounted. The right portion 31.11 is connected to a first flat external contact 31.1A, while the left portion 31.12 is also connected to a second flat external contact 31.1B. Both the first external contact 31.1A and the second external contact 31.1B allow the semiconductor package 31 to be surface mounted on a contact area of ​​an application board, such as a PCB. The right side portion 31 . 11 of the lead frame 31 . 1 may be connected to the left side portion 31 . 12 or to the semiconductor die 31 . 3 via connecting wires (not shown).

[0081] FIG. 8B The semiconductor device module 60 includes an application board 1, such as FIG. 1A and FIG. 1B The PCB 1 shown and described in FIG. 1 includes a slot 1.2. In addition, the semiconductor device module 60 includes a semiconductor device mounted on the PCB 1. FIG. 8A The semiconductor package 31 is shown. The other elements of the semiconductor device module 60 correspond functionally to the corresponding elements of the semiconductor device module shown above, and thus the corresponding reference numerals are retained.

[0082] FIGS. 9A-9C Shown with FIG. 8A andFIG. 8B Fig. 1 shows a side sectional view (A), a perspective view (B) and a bottom view (C) of an exemplary semiconductor device module with a semiconductor package and a PCB comprising a recess.

[0083] FIGS. 9A-9C The semiconductor device module 70 comprises an application board 2, e.g. FIG. 2A and FIG. 2B a PCB 2 as shown and described in connection with FIG. 8A and FIG. 8B the semiconductor package 31 as shown and described in connection with FIGS. 3A-3C is mounted on the PCB 2 in a similar way as shown in

[0084] FIG. 10A and FIG. 10B shows a side sectional view (A) of a semiconductor package with another exemplary modified lead frame, and a side sectional view (B) of a semiconductor device module comprising an SMD lead semiconductor package with a modified lead frame.

[0085] The semiconductor package 41 as shown in FIG. 10A comprises a lead frame 41.1 embedded in an encapsulation material. The semiconductor package 41 further comprises a recess 41.2, which corresponds to the recess 11.2 of the semiconductor package 11. The lead frame 41.1 comprises a right side portion 41.11, which is bent upwards to extend above the recess 41.2, and a left side portion 41.12, which comprises a die pad on which a semiconductor transistor die 41.3 is mounted. The right side portion 41.11 is connected with a first external contact 41.1A in the form of a lead, and the left side portion 41.12 is connected with a second external contact element 41.1B in the form of a flat external contact, both allowing surface mounting of the semiconductor package 41 to a contact area of an application board, such as a PCB. The right side portion 41.11 of the lead frame 41.1 is connected by a thick connection wire 41.4 to a metal layer 41.5 provided on the semiconductor transistor die 41.3.

[0086] FIG. 10B The semiconductor device module 80 comprises an application board 1, e.g. FIG. 1A and FIG. 1B a PCB 1 as shown and described in connection with FIG. 10AThe semiconductor package 41 as shown. Other elements of the semiconductor device module 80 correspond in function to the respective elements of the semiconductor device module shown above, and therefore the respective reference numerals are retained.

[0087] FIGS. 11A-11C A side sectional view (A), a perspective view (B) and a bottom view (C) of an exemplary semiconductor device module 80 are shown. FIG. 10B

[0088] FIGS. 12A-12C A side sectional view (A), a perspective view (B) and a bottom view (C) of an exemplary semiconductor device module with an SMD lead semiconductor package and with an application board comprising a recess are shown.

[0089] FIGS. 12A-12C The semiconductor device module 90 comprises an application board 2, e.g. FIG. 2A and FIG. 2B as shown and described in the PCB 2 comprising a recess 2.2. Furthermore, the semiconductor device module 90 comprises a semiconductor package 41 as shown in FIG. 10A mounted on the PCB 2. The semiconductor package 41 is mounted on the PCB 2 in a similar way as shown in FIGS. 11A-11C , and therefore most of the reference numerals are retained.

[0090] FIG. 13A and FIG. 13B A side sectional view (A) of an SMD lead semiconductor package with another exemplary modified lead frame, and a side sectional view (B) of a semiconductor device module comprising a semiconductor package with a modified lead frame, the semiconductor device module with an application board having a slit, are shown.

[0091] as FIG. 13A ​The semiconductor package 51 shown in FIG. 5 includes a lead frame 51.1 embedded in an encapsulation material. The semiconductor package 51 also includes a recess 51.2 that corresponds to the recess 11.2 of the semiconductor package 11. The lead frame 51.1 includes a right portion 51.11 that is bent upward to extend over the recess 51.2, and a left portion 51.12 that includes a die pad on which a semiconductor transistor die 51.3 is mounted. The right portion 51.11 is connected to a first external contact 51.1A in the form of a lead, while the left portion 51.12 is connected to a second external contact element 51.1B in the form of a flat external contact. Both the first external contact 51.1A and the second external contact 51.1B allow the semiconductor package 51 to be surface mounted on a contact area of ​​an application board, such as a PCB. The right side portion 51.11 of the lead frame 51.1 is connected to the semiconductor transistor die 51.3 via a thick connecting wire 51.4.

[0092] FIG. 13B The semiconductor device module 100 includes an application board 1, such as FIG. 1A and FIG. 1B The PCB 1 shown and described in FIG. 1 includes a slot 1.2. In addition, the semiconductor device module 100 includes a semiconductor device mounted on the PCB 1. FIG. 13A The semiconductor package 51 is shown. The other elements of the semiconductor device module 100 correspond functionally to the corresponding elements of the semiconductor device module shown above, and thus the corresponding reference numerals are retained.

[0093] FIGS. 14A-14C Shown with FIG. 13B Side cross-sectional view (A), perspective view (B), and bottom view (C) of an exemplary semiconductor device module of the same semiconductor package with an application board having a slot.

[0094] FIGS. 15A-15C Shown with FIGS. 14A-14C Side cross-sectional view (A), perspective view (B), and bottom view (C) of an exemplary semiconductor device module of the same semiconductor package with an application board having a recess.

[0095] FIGS. 15A-15C The semiconductor device module 110 includes an application board 2, such as FIG. 2A and FIG. 2B The PCB 2 shown and described in the drawings includes a groove 2.2. In addition, the semiconductor device module 110 includes a PCB 2 mounted on the PCB 2. FIG. 13A The semiconductor package 51 shown. The semiconductor package 51 is FIGS. 14A-14Cis mounted on the PCB 2 in an analogous manner as shown in

[0096] FIG. 16A and FIG. 16B A side sectional view (A) of another SMD leadframe semiconductor package with another exemplary modified leadframe is shown, as well as a side sectional view (B) of a semiconductor device module comprising the semiconductor package with the modified leadframe, the semiconductor device module having an application board with a slot.

[0097] In the previous embodiment of the semiconductor device module, the molded recess formed in the semiconductor package is formed by a trench. In the following embodiment, the recess is provided by a recess formed at the edge of the package.

[0098] As FIG. 16A The semiconductor package 61 shown in Fig. 6 comprises a leadframe 61.1 embedded in an encapsulation material. The semiconductor package 61 further comprises a recess 61.2 at the edge of the semiconductor package, which corresponds functionally to the groove 11.2 of the semiconductor package 11. The leadframe 61.1 comprises a right side portion 61.11 which is bent upwards to extend above the groove 61.2 and a left side portion 61.12 comprising a die pad on which a semiconductor transistor die 61.3 is mounted. The right side portion 61.11 is connected with a first external contact 61.1A in the form of a lead, and the left side portion 61.12 is connected with a second external contact element 61.1B in the form of a flat external contact, both allowing surface mounting of the semiconductor package 61 onto a contact area of an application board, such as a PCB. The right side portion 61.11 of the leadframe 61.1 is connected to the semiconductor transistor die 61.3 by a thick connection wire 61.4.

[0099] FIG. 16B The semiconductor device module 120 of Fig. 12 comprises an application board 1, e.g. FIG. 1A and FIG. 1B the PCB 1 shown and described in Figs. 1 to 5, which comprises a slot 1.2. Furthermore, the semiconductor device module 120 comprises a semiconductor package 61 as shown in FIG. 16A Fig. 6 mounted on the PCB 1. The other elements of the semiconductor device module 120 correspond functionally to the corresponding elements of the semiconductor device module shown above, and the corresponding reference numerals are therefore retained.

[0100] FIGS. 17A-17C A side sectional view (A), a perspective view (B) and a bottom view (C) of the exemplary semiconductor device module 120 as shown in FIG. 16B Fig. 12 are shown.

[0101] FIGS. 18A-18C A side sectional view (A), a perspective view (B) and a bottom view (C) of an exemplary semiconductor device module with the same semiconductor package and with a PCB 2 with a recess 2.2 are shown. FIG. 16B

[0102] Example

[0103] The following describes specific examples of the present disclosure.

[0104] Example 1 is an application board comprising a first main face and a plurality of electrical contact areas arranged on the first main face, the plurality of electrical contact areas comprising one or more first electrical contact areas and one or more second electrical contact areas, and a recess, i.e. a slit or groove, arranged in the first main face, the recess separating a first portion of the application board from a second portion of the application board, wherein the first electrical contact areas are arranged on the first portion of the application board and the second electrical contact areas are arranged on the second portion of the application board.

[0105] Example 2 is the application board according to example 1, wherein the one or more first electrical contact areas are arranged on the first portion of the application board at a distance from an edge of the first portion facing the recess in a range between 0 mm and 3 mm.

[0106] Example 3 is the application board according to example 1 or 2, wherein a width of the recess is in a range between 0.25 mm and 5 mm.

[0107] Example 4 is the application board according to any of the preceding examples, wherein two or more first electrical contact areas are arranged side by side along a row on the first portion of the application board.

[0108] Example 5 is the application board according to any of the preceding examples, wherein the application board comprises one or more of a printed circuit board (PCB), a direct copper bonding (DCB), an active metal brazing (AMB), an insulated metal substrate (IMS) or any other interposer.

[0109] Example 6 is a semiconductor device module comprising an application board according to any of the preceding examples, and a semiconductor package mounted on the application board.

[0110] Example 7 is the semiconductor device module according to example 6, wherein the semiconductor package comprises a semiconductor transistor die and a plurality of external contacts, the plurality of external contacts comprising first external contacts and second external contacts, wherein the semiconductor transistor die comprises a load path, wherein the first external contacts are connected with the load path of the semiconductor transistor die.

[0111] ​Example 8 is the semiconductor device module of Example 6 or 7, wherein the semiconductor package includes a first major surface facing the application board, the first major surface having a recess formed therein, wherein the semiconductor package is mounted on the application board in a manner such that the recess of the semiconductor package is positioned over the recess of the application board.

[0112] Example 9 is the semiconductor device module of Example 8, wherein the recess formed in the first major surface of the semiconductor package is a groove or recess located at an edge.

[0113] Example 10 is the semiconductor device module of Example 8 or 9, wherein an interior lateral wall of the recess is adjacent to and coplanar with an interior lateral wall of the recess of the application board.

[0114] Example 11 is the semiconductor device module of any of Examples 8 to 10, wherein the recess extends from a first lateral wall of the semiconductor package to an opposite lateral wall.

[0115] Example 12 is the semiconductor device module of any of Examples 6 to 11, wherein the external contact is a curved lead or a flat contact.

[0116] Example 13 is the semiconductor device module of any of Examples 6 to 12, wherein the semiconductor package includes a leadframe, wherein the leadframe includes a die pad and a plurality of leads.

[0117] Example 14 is the semiconductor device module of any of Examples 6 to 13, wherein the semiconductor transistor die includes one or more of a vertical semiconductor transistor die, a semiconductor power transistor die, an IGBT die, a MOSFET die, a JFET die, a CoolMOS die, a wide bandgap semiconductor transistor die (in particular a SiC transistor die or a GaN transistor die).

[0118] Example 15 is the semiconductor device module of any of Examples 6 to 14, wherein the recess of the application board and the recess of the semiconductor package are filled with a dielectric encapsulation material.

[0119] Example 16 is the semiconductor device module of Example 15, wherein the dielectric encapsulation material includes one or more of a dielectric molding compound, a thermally conductive fill material, a silicone resin, or a silicon-based material.

[0120] Furthermore, although one specific feature or aspect of an embodiment of the disclosure can be disclosed with reference to a particular implementation, alternative implementations of that feature or aspect can exist that are not per se disclosed, but are nonetheless within the scope of the disclosure. Moreover, the various implementations described herein can be modified or combined into other implementations. Additionally or alternatively, certain aspects of the implementations described herein can be implemented consistently with or independently of other aspects. Furthermore, unless specifically stated otherwise, a process, mechanism, or module described herein can be implemented by one or more of the following: hardware, software, firmware, or combinations thereof. For example, an aspect of the disclosure can be implemented by a processor programmed with software or firmware, or by a hardware component such as an application specific integrated circuit (ASIC) or field programmable gate array (FPGA). Moreover, unless specifically stated otherwise, the terms "comprise," "comprises," "comprising," "contains," "containing," "include," "including," or "includes" shall be construed as open-ended, meaning that the listed steps or components do not exclude additional steps or components. Moreover, the term "exemplary" is used herein merely for purposes of illustration and is not intended to convey an indication of a recommended or preferred implementation. Furthermore, it shall be understood that the features and / or elements of the disclosure can be implemented in discrete circuits, partially integrated circuits, or fully integrated circuits, or programming devices. Moreover, the term "exemplary" is used herein merely for purposes of illustration and is not intended to convey an indication of a recommended or preferred implementation. Also, it shall be understood that, for clarity and ease of understanding, the features and / or elements depicted herein are shown with specific dimensions relative to one another, whereas the actual dimensions can be significantly different from those shown herein.

[0121] While specific embodiments have been shown and described in detail to illustrate the principles of the present disclosure, it will be understood by those of ordinary skill in the art that various alternatives and / or equivalents can be used without departing from the scope of the present disclosure. The present disclosure is intended to cover any and all alternatives, modifications, or equivalents of the specific embodiments discussed herein. Thus, the present disclosure is intended to be limited only by the claims and their equivalents.

Claims

1. An application board (1; 2), comprising: a first main surface and a plurality of electrical contact areas arranged on the first main surface (1.1; 2.1), the plurality of electrical contact areas (1.1; 2.1) comprising one or more first electrical contact regions (1.1A; 2.1A) and one or more second electrical contact regions (1.1B; 2.1B); and concavity(1.2; 2.2), namely a slot (1.2) or a groove (2.2), which is provided in the first main surface, the recess (1.2; 2.2) separating a first portion (1A; 2A) of the application plate (1; 2) from a second portion (1B; 2B) of the application plate (1; 2), wherein: A first electrical contact area (1.1A; 2.1A) is provided on a first portion (1A; 2A) of the application board (1; 2), and a second electrical contact area (1.1B; 2.1B) is provided on a second portion (1B; 2B) of the application board (1; 2).

2. The application board (1; 2) according to claim 1, wherein The one or more first electrical contact areas (1.1A) are arranged on a first portion (1A; 2A) of the application plate (1; 2) at a distance from the first section (1A; 2A) facing the recess (1.2; 2.2) The distance from the edge is in the range of 0 mm to 3 mm.

3. The application board (1) according to claim 1 or 2, wherein: The width of the recess (1.2) is in the range of 0.25 mm to 5 mm.

4. Application board (1) according to any one of the preceding claims, wherein Two or more first electrical contact areas (1.1A) are arranged side by side along a row on a first part (1A; 2A) of an application board (1; 2).

5. Application board (1) according to any one of the preceding claims, wherein The application board (1) includes one or more of a printed circuit board (PCB), direct copper bonding (DCB), active metal brazing (AMB), insulated metal substrate (IMS) or any other interposer.

6. A semiconductor device module (10), comprising: An application board (1) according to any one of the preceding claims; as well as A semiconductor package (11) is mounted on an application board (1).

7. The semiconductor device module (10) according to claim 6, wherein The semiconductor package (11) comprises a semiconductor transistor die and a plurality of external contacts (11.1), the plurality of external contacts (11.1) comprising a first external contact (11.1A) and a second external contact (11.1B), The semiconductor transistor die comprises a load path, and the first external contact (11.1) is connected to the load path of the semiconductor transistor die.

8. The semiconductor device module (10) according to claim 6 or 7, wherein: The semiconductor package (11) comprises a first main surface facing the application board (1), a recess (11.2) being formed in the first main surface, The semiconductor package (11) is mounted on the application board (1) in such a manner that the recess (11.2) of the semiconductor package (11) is located above the recess (1.2) of the application board (1).

9. The semiconductor device module (10) according to claim 8, wherein The recess (11.2) formed in the first main surface of the semiconductor package (11) is a groove or recess located at the edge.

10. The semiconductor device module (10) according to claim 8 or 9, wherein: The inner lateral walls of the recess (11.2) are adjacent to and coplanar with the inner lateral walls of the recess (1.2) of the application plate.

11. The semiconductor device module (10) according to any one of claims 8 to 10, wherein: The recess (11.2) extends from a first side wall of the semiconductor package (11) to an opposite side wall.

12. The semiconductor device module (10) according to any one of claims 6 to 11, wherein: The external contacts (11.1A) are either bent leads or flat contacts.

13. The semiconductor device module (10) according to any one of claims 6 to 12, wherein: The semiconductor package (11) includes a lead frame, The lead frame includes a die pad and a plurality of leads (11.1).

14. The semiconductor device module (10) according to any one of claims 6 to 13, wherein: The semiconductor transistor die includes one or more of a vertical semiconductor transistor die, a semiconductor power transistor die, an IGBT die, a MOSFET die, a JFET die, a CoolMOS die, a wide bandgap semiconductor transistor die, in particular, a SiC transistor die or a GaN transistor die.

15. The semiconductor device module (10) according to any one of claims 6 to 14, wherein The recess (1.2; 2.2) of the application board (1; 2) and the recess (11.2) of the semiconductor package (11) are filled with a dielectric encapsulation material.

16. The semiconductor device module (10) according to claim 15, wherein The dielectric encapsulation material includes one or more of a dielectric molding compound, a thermally conductive filler material, silicone, or a silicone-based material.

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