Control method for Si and SiC mixed-frequency parallel inverter system

Abstract

The control method for a Si and SiC mixed-frequency parallel inverter system provided by this invention, in harmonic compensation mode, allows the MU to operate at a low switching frequency, and the output current of the MU... i 1. Filtered inductor L 1. After filtering out high-frequency components, the SU dynamically compensates for the harmonics introduced by the MU and corrects the fundamental frequency tracking error of the MU. The current reference value of the MU is... i 1ref Current reference value of SU i 2ref They are respectively with i oref Where, is the system power allocation ratio. i oref This is the system output current reference value; in direct parallel mode, MU and SU operate independently with an equal structure, and the current reference value of MU is... i 1ref Current reference value of SU i 2ref The control method for the Si and SiC mixed-frequency parallel inverter system provided by this invention is easy to implement in engineering, occupies little memory, and has good speed and dynamic performance.

Description

Technical Field

[0001] This invention relates to the field of converter control technology, and in particular to a control method for a Si and SiC mixed-frequency parallel inverter system. Background Technology

[0002] The Si IGBT and SiC MOSFET hybrid frequency inverter (HSFI) system, with its combination of the high power carrying capacity of Si devices and the high frequency and low loss characteristics of SiC devices, provides a new technical path to overcome the inherent limitations of traditional grid-connected inverters with single devices and to balance performance and cost.

[0003] A typical HSFI (High-Speed ​​Variable Inverter) architecture consists of a high-power Si IGBT main unit (MU) and a low-power SiC MOSFET sub-unit (SU) connected in parallel. HSFI possesses inherent dual-mode operation capability: when the grid strength is high, it can operate in harmonic compensation mode to achieve high-performance output; while in extremely weak grids, the SU and MU can be treated as independent inverter units, operating in direct parallel to enhance disturbance rejection. In harmonic compensation mode, the MU efficiently handles most of the load power with a low switching frequency, while the SU accurately compensates for the low-frequency ripple of the main unit with a high switching frequency, thus achieving both high capacity and low harmonic output characteristics. Existing research has proposed various advanced control methods to achieve real-time compensation of the MU output waveform by the SU, including direct digital control, feedback control based on the main unit switching signal, and finite step model predictive control. While these methods have validated the engineering feasibility and excellent performance of HSFI on multiple experimental platforms, such as a 2.1 kW Si / GaN hybrid boost PFC converter and a 300 kW three-phase full-bridge hybrid inverter system, demonstrating HSFI's significant advantages in improving system efficiency, reducing costs, and enhancing power quality at the device level, the harmonic compensation methods involved in these approaches either require acquiring the PWM signal of the MU to predict the MU current harmonics, a mathematically complex method typically used in simple topologies such as mixed-frequency DC / DC converters or mixed-frequency single-phase inverters, which requires a large amount of computing memory in three-phase mixed-frequency inverters, making implementation difficult. Alternatively, they employ SHEPWM modulation strategies, which rely on offline calculations and suffer from poor real-time performance, slow dynamic response, weak overmodulation capability, and sensitivity to parameter changes, limiting their applicability in applications requiring rapid dynamic response or drastic changes in operating conditions. Summary of the Invention

[0004] To address the problems of complex calculations, poor real-time performance, and slow dynamic response in traditional three-phase mixer inverter control methods, this invention provides a control method for a Si and SiC mixer parallel inverter system.

[0005] To solve the above-mentioned technical problems, the present invention adopts the following technical method: a control method for a Si and SiC mixed-frequency parallel inverter system, the system comprising a Si-based master converter unit MU and a SiC-based slave converter unit SU, wherein MU and SU are respectively connected through a filter inductor. L 1 and inductor L 2. The system is connected in parallel to the common coupling point PCC. Under weak grid conditions, the system operates in direct parallel mode, and under strong grid conditions, it operates in harmonic compensation mode.

[0006] In harmonic compensation mode, the MU operates at a low switching frequency, and the MU's output current... Filtered inductor L 1. After filtering out high-frequency components, the SU dynamically compensates for the harmonics introduced by the MU and corrects the fundamental frequency tracking error of the MU. The current reference value of the MU is... Current reference value of SU They are respectively and ,in, The system power allocation ratio, This is the reference value for the system output current.

[0007] In direct parallel mode, MU and SU operate independently with an equivalent structure, and the current reference value of MU is... Current reference value of SU They are respectively and .

[0008] Furthermore, the current control process of the hybrid parallel inverter system includes:

[0009] Step S1: Acquire system PCC voltage Phase-locked control is performed to obtain the voltage phase angle. ;

[0010] Step S2, MU current control;

[0011] Step 2.1, Set the system output current reference value Collect the output current of the MU ;

[0012] Step 2.2, based on the system output current reference value and power distribution ratio Calculate the current reference value of MU ;

[0013] (1)

[0014] Step 2.3, Comparison and And PI control is performed to obtain the internal potential reference value of MU. ;

[0015] Step 2.4, After PWM processing, a pulse signal is generated to drive the MU switching transistor.

[0016] Step S3, current control of SU;

[0017] Step 3.1: Collect the total output current of the system. and the output current of SU ;

[0018] Step 3.2, based on the system output current reference value Calculate the reference current value of SU When the system is operating in harmonic compensation mode, the following formula (2) is used for calculation. When the system is operating in direct parallel mode, use the following formula (3) to calculate. ;

[0019] (2)

[0020] (3)

[0021] Step 3.3, when the system is operating in harmonic compensation mode, compare... and And PI control is performed to obtain the internal potential reference value of SU. When the system operates in direct parallel mode, the comparison and And PI control is performed to obtain the internal potential reference value of SU. ;

[0022] Step 3.4, After PWM processing, a pulse signal is generated to drive the SU switching transistor.

[0023] Furthermore, in step 2.3, the comparison... and The process of PI control is as follows:

[0024] ①Use right Perform an abc / dq coordinate transformation to obtain ;

[0025] ② Set the reference current value of MU in the dq coordinate system and what was obtained After comparison, the signal is input to the current controller CC1 for PI control, and the output is a modulated signal in the dq coordinate system. ;

[0026] ③ Modulate the signal By performing time delay control, the reference value of the internal potential of MU in the dq coordinate system is obtained. ;

[0027] ④Use right Perform a dq / abc transformation to obtain the reference value of the internal potential of MU in the abc coordinate system. .

[0028] Preferably, in step 3.3, the comparison and The process of PI control is as follows:

[0029] ①Use right Perform an abc / dq coordinate transformation to obtain ;

[0030] ② Set the reference value of the current of SU in the dq coordinate system and what was obtained After comparison, the signal is input to the current controller CC2 for PI control, and the output is a modulated signal in the dq coordinate system. ;

[0031] ③ Modulate the signal By performing time delay control, the reference value of the internal potential of SU in the dq coordinate system is obtained. ;

[0032] ④Use right Perform a dq / abc transformation to obtain the reference value of the internal electric potential of SU in the abc coordinate system. .

[0033] Preferably, in step 3.3, the comparison and The process of PI control is as follows:

[0034] ①Use right Perform an abc / dq coordinate transformation to obtain ;

[0035] ② Set the reference value of the current of SU in the dq coordinate system and get After comparison, the signal is input to the current controller CC2 for PI control, and the output is a modulated signal in the dq coordinate system. ;

[0036] ③ Modulate the signal By performing time delay control, the reference value of the internal potential of SU in the dq coordinate system is obtained. ;

[0037] ④Use right Perform a dq / abc transformation to obtain the reference value of the internal electric potential of SU in the abc coordinate system. .

[0038] Compared with traditional methods, the control method of the Si and SiC mixed-frequency parallel inverter system provided by this invention adopts the mature PI control, which fully utilizes the harmonic compensation function of the SU, reduces the harmonic content of the system output current, avoids complex mathematical calculations, is easy to implement in engineering, occupies little memory, and has good speed and dynamics. Attached Figure Description

[0039] Figure 1 This is a topology diagram of the Si and SiC mixed-frequency parallel inverter system involved in this invention;

[0040] Figure 2 This is a schematic diagram of the control structure of HSFI in this invention (in the figure, (a) is a schematic diagram of the current control structure in the harmonic compensation mode; (b) is a schematic diagram of the current control structure in the direct parallel mode).

[0041] Figure 3 This is a schematic diagram of the overall control structure of HSFI in this invention;

[0042] Figure 4 The figure shows the operating effect of HSFI under rated operating conditions in an embodiment of the present invention (in the figure, (a) is the output voltage and current waveform and spectrum analysis diagram of HSFI under rated operating conditions; (b) is the total output current of phase a of HSFI under rated operating conditions). MU output current SU output current Waveform diagram). Detailed Implementation

[0043] To facilitate understanding by those skilled in the art, the present invention will be further described below with reference to embodiments and accompanying drawings. The content mentioned in the embodiments is not intended to limit the present invention.

[0044] Before describing this invention, let's first introduce the Si and SiC mixed-frequency parallel inverter system involved in this invention, such as... Figure 1 As shown, the system consists of a Si-based master converter unit MU and a SiC-based slave converter unit SU. MU and SU are connected by filter inductors. L 1 and inductor L 2. Connected in parallel to the point of common coupling (PCC), the total output current of the system is... Current output from MU With SU output current Superposition, that is , Figure 1 middle, , These represent the system input and output power, respectively. , These represent the transmission power of MU and SU, respectively. This represents the system's DC voltage. Depending on the control methods of MU and SU, HSFI has two typical operating modes: harmonic compensation mode and direct parallel mode. In practical applications, grid impedance fluctuates significantly due to various factors such as faults and grid-connected capacity, leading to significant variations in grid strength under different scenarios. To enhance the grid adaptability of the HSFI system, the system adopts direct parallel mode under weak grid conditions. This reduces control loop coupling and suppresses the impact of grid disturbances on system stability. The basic principle of direct parallel mode is the same as that of traditional multi-inverter parallel systems, with MU and SU operating independently in an equal structure. Under strong grid conditions, the system adopts harmonic compensation mode to fully leverage the advantages of HSFI in power quality and efficiency. Harmonic compensation mode is the main operating mode of HSFI. Its core idea is to integrate the low-cost, high-current carrying capacity advantages of Si devices with the high-frequency, high-precision control capabilities of SiC devices to achieve synergistic optimization of system efficiency and power quality. Specifically:

[0045] 1) The MU (Multi-Installer Unit) is used to handle the main load power: The MU uses low-cost, high-current-carrying-capacity Si IGBT devices to handle most of the active power in the system. To reduce switching losses, the MU operates at a low switching frequency;

[0046] 2) The Substation (SU) is used to improve output current quality: The SU uses SiC MOSFET devices with excellent switching characteristics, mainly for real-time compensation of low-frequency harmonic components introduced by the MU, thereby improving the total harmonic distortion performance of the output current. Since the SU only handles a small amount of power, its high-frequency operation has a limited impact on the overall system efficiency and cost.

[0047] In summary, the HSFI in this invention provides high-quality power output while ensuring low system cost and high power output, constructing a parallel inverter architecture that balances engineering practicality and performance optimization. Based on this, this invention provides a control method for a Si and SiC mixed-frequency parallel inverter system, in which the control objective of the HSFI system is to maximize the total output current. Accurately track its reference value ,Right now To achieve this goal, HSFI employs different control strategies in the two operating modes, with the control structure as follows: Figure 2As shown. The AC power grid is represented by the Thevenin equivalent circuit, consisting of a voltage source. With grid impedance Series connection; PCC voltage is The output voltages of MU and SU are respectively and .

[0048] To ensure consistency in subsequent modeling and analysis, this invention defines the power allocation ratio between MU and SU. for:

[0049] (4)

[0050] in, and They are respectively and Reference values.

[0051] like Figure 2 As shown, in harmonic compensation mode, the MU operates at a low switching frequency, and its output current... Filtered inductor L 1. After filtering out high-frequency components, it mainly contains the fundamental frequency component. and low-frequency harmonic components To ensure the waveform quality of the system output current, the SU needs to dynamically compensate for the harmonics introduced by the MU. Its output current is expressed as:

[0052] (5)

[0053] Among them, the fundamental component Used to correct fundamental frequency tracking error, harmonic components This is used to compensate for the harmonic current introduced by MU. Therefore, the control objectives of MU and SU are expressed as:

[0054] (6)

[0055] The corresponding control structure is as follows Figure 2 (a) shows the data acquisition system. Phase-locked control is performed to obtain the voltage phase angle. Set the system output current reference value Collect the output current of the MU ; Calculate the current reference value of MU according to equation (6) ;Compare and And PI control is performed to obtain the internal potential reference value of MU. ;Will After PWM processing, a pulse signal is generated to drive the MU switching transistor. The total output current of the system is acquired. ; Calculate the reference current value of SU according to equation (6) ;Compare and And PI control is performed to obtain the internal potential reference value of SU. ;Will After PWM processing, a pulse signal is generated to drive the SU switching transistor.

[0056] like Figure 2 As shown, in direct parallel mode, MU and SU operate independently with an equal structure, each bearing a certain proportion of the total output current. At this time, SU and MU each track their reference values, satisfying:

[0057] (7)

[0058] Since the SU is no longer responsible for harmonic compensation, in order to ensure the power quality of the system output current, the switching frequency of the MU needs to be appropriately increased to compensate for the decrease in harmonic suppression capability. The corresponding control structure is as follows: Figure 2 (b) shows the data acquisition system. Phase-locked control is performed to obtain the voltage phase angle. Set the system output current reference value Collect the output current of the MU ; Calculate the current reference value of MU according to equation (7) ;Compare and And PI control is performed to obtain the internal potential reference value of MU. ;Will After PWM processing, a pulse signal is generated to drive the MU switching transistor. The SU output current is collected. ; Calculate the reference current value of SU according to equation (7) ;Compare and And PI control is performed to obtain the internal potential reference value of SU. ;Will After PWM processing, a pulse signal is generated to drive the SU switching transistor.

[0059] Due to the dynamic characteristics of the phase-locked loop (PLL), the system involves two different dq rotating coordinate systems: one is the system coordinate system defined by the grid voltage, namely the abc coordinate system (labeled with the superscript "s"), and the other is the controller coordinate system defined by the phase synchronization control algorithm, namely the dq coordinate system (labeled with the superscript "c").

[0060] Furthermore, refer to Figure 3 In the current control process of MU, comparison and The steps for performing PI control are as follows:

[0061] ①Use right Perform an abc / dq coordinate transformation to obtain .

[0062] ②For example Figure 3 As shown, the current reference value set by the system is the current reference value in the dq coordinate system. Therefore, according to The calculated reference current value of MU is The reference value of the current of MU in the dq coordinate system. and what was obtained After comparison, the signal is input to the current controller CC1 of the MU for PI control, and outputs a modulated signal in the dq coordinate system. The calculation process is as follows:

[0063] (8)

[0064] In the formula, For MU's PI controller, and For the PI parameters of the MU current controller; For MU, the voltage feedforward coefficient is used. This is the system's fundamental frequency; For the filter inductor of MU; This represents the output voltage in the dq coordinate system.

[0065] ③ Modulate the signal By performing time delay control, the reference value of the internal potential of MU in the dq coordinate system is obtained. As shown in the following formula:

[0066] (9)

[0067] In the formula, This is the delay phase of MU.

[0068] ④Use right Perform a dq / abc transformation to obtain the reference value of the internal potential of MU in the abc coordinate system. .

[0069] Furthermore, refer to Figure 3 In the current control process of SU, comparison and The steps for performing PI control are as follows:

[0070] ①Use right Perform an abc / dq coordinate transformation to obtain .

[0071] ②For example Figure 3 As shown, the current reference value set by the system is the current reference value in the dq coordinate system. Therefore, according to The calculated reference current value for SU is The reference value of the current of SU in the dq coordinate system. Received After comparison, the signal is input to the current controller CC2 of SU for PI control, and outputs a modulated signal in the dq coordinate system. ;

[0072] (10)

[0073] In the formula, For SU's PI controller and For the PI parameters of the SU current controller; is the voltage feedforward coefficient of SU.

[0074] ③ Modulate the signal By performing time delay control, the reference value of the internal potential of SU in the dq coordinate system is obtained. As shown in the following formula:

[0075] (11)

[0076] In the formula, This is the delay stage of SU.

[0077] ④Use right Perform a dq / abc transformation to obtain the reference value of the internal electric potential of SU in the abc coordinate system. .

[0078] Additionally, refer to Figure 3 In the current control process of SU, comparison and The steps for performing PI control are as follows:

[0079] ①Use right Perform an abc / dq coordinate transformation to obtain .

[0080] ② Set the reference value of the current of SU in the dq coordinate system and get After comparison, the signal is input to the current controller CC2 of SU for PI control, and outputs a modulated signal in the dq coordinate system. ;

[0081] (12).

[0082] ③ Modulate the signal By performing time delay control, the reference value of the internal potential of SU in the dq coordinate system is obtained. , as in equation (11).

[0083] ④Use right Perform a dq / abc transformation to obtain the reference value of the internal electric potential of SU in the abc coordinate system. .

[0084] To verify the basic functions of the HSFI system after adopting the method involved in this invention, the output current characteristics of the system before and after SU enabling are analyzed to confirm its ability to actively compensate for low-order harmonic components in the MU current. Figure 4 (a) shows the output voltage and current waveforms of the system under rated operating conditions, SU at t = Enabled at 0.1 s, the harmonic content of the system output current is significantly reduced after enabling. The spectrum characteristics are extracted by fast Fourier transform. The results show that the total harmonic distortion (THD) of the system before and after SU is enabled is 10.13% and 3.74%, respectively. Figure 4 (b) is the total output current of phase a of HSFI under rated operating conditions. MU output current SU output current The waveform diagram shows that... and It exhibits low-frequency harmonic components of equal magnitude but opposite direction, and the total output current... i oa The harmonic amplitude was significantly reduced, thus verifying the effectiveness of the SU harmonic compensation function.

[0085] The above embodiments are preferred implementations of the present invention. In addition, the present invention can be implemented in other ways. Any obvious substitutions without departing from the concept of the present technical solution are within the protection scope of the present invention.

[0086] To facilitate understanding by those skilled in the art of the improvements of this invention over the prior art, some of the accompanying drawings and descriptions have been simplified, and for clarity, some other elements have been omitted from this application. Those skilled in the art should realize that these omitted elements may also constitute the content of this invention.

Claims

1. A control method for a Si and SiC mixed-frequency parallel inverter system, which consists of a Si-based master converter unit MU and a SiC-based slave converter unit SU. MU and SU are connected by filter inductors. L 1 and inductor L 2. Connected in parallel to the common coupling point PCC, this system operates in direct parallel mode under weak grid conditions and in harmonic compensation mode under strong grid conditions. Its characteristics are: In harmonic compensation mode, the MU operates at a low switching frequency, and the MU's output current... Filtered inductor L 1. After filtering out high-frequency components, the SU dynamically compensates for the harmonics introduced by the MU and corrects the fundamental frequency tracking error of the MU. The current reference value of the MU is... Current reference value of SU They are respectively and ,in, The system power allocation ratio, This is the reference value for the system output current. In direct parallel mode, MU and SU operate independently with an equivalent structure, and the current reference value of MU is... Current reference value of SU They are respectively and .

2. The control method for the Si and SiC mixed-frequency parallel inverter system according to claim 1, characterized in that: The current control process of the mixed-frequency parallel inverter system includes: Step S1: Acquire system PCC voltage Phase-locked control is performed to obtain the voltage phase angle. ; Step S2, MU current control; Step 2.1, Set the system output current reference value Collect the output current of the MU ; Step 2.2, based on the system output current reference value and power distribution ratio Calculate the current reference value of MU ; （1） Step 2.3, Comparison and And PI control is performed to obtain the internal potential reference value of MU. ; Step 2.4, After PWM processing, a pulse signal is generated to drive the MU switching transistor. Step S3, current control of SU; Step 3.1: Collect the total output current of the system. and the output current of SU ; Step 3.2, based on the system output current reference value Calculate the reference current value of SU When the system is operating in harmonic compensation mode, the following formula (2) is used for calculation. When the system is operating in direct parallel mode, use the following formula (3) to calculate. ; （2） （3） Step 3.3, when the system is operating in harmonic compensation mode, compare... and And PI control is performed to obtain the internal potential reference value of SU. When the system operates in direct parallel mode, the comparison... and And PI control is performed to obtain the internal potential reference value of SU. ; Step 3.4, After PWM processing, a pulse signal is generated to drive the SU switching transistor.

3. The control method for the Si and SiC mixed-frequency parallel inverter system according to claim 2, characterized in that: In step 2.3, the comparison and The process of PI control is as follows: ①Use right Perform an abc / dq coordinate transformation to obtain ; ② Set the reference current value of MU in the dq coordinate system and what was obtained After comparison, the signal is input to the current controller CC1 for PI control, and the output is a modulated signal in the dq coordinate system. ; ③ Modulate the signal By performing time delay control, the reference value of the internal potential of MU in the dq coordinate system is obtained. ; ④Use right Perform a dq / abc transformation to obtain the reference value of the internal potential of MU in the abc coordinate system. .

4. The control method for the Si and SiC mixed-frequency parallel inverter system according to claim 3, characterized in that: In step 3.3, the comparison and The process of PI control is as follows: ①Use right Perform an abc / dq coordinate transformation to obtain ; ② Set the reference value of the current of SU in the dq coordinate system and what was obtained After comparison, the signal is input to the current controller CC2 for PI control, and the output is a modulated signal in the dq coordinate system. ; ③ Modulate the signal By performing time delay control, the reference value of the internal potential of SU in the dq coordinate system is obtained. ; ④Use right Perform a dq / abc transformation to obtain the reference value of the internal electric potential of SU in the abc coordinate system. ; In step 3.3, the comparison and The process of PI control is as follows: ①Use right Perform an abc / dq coordinate transformation to obtain ; ② Set the reference value of the current of SU in the dq coordinate system and get After comparison, the signal is input to the current controller CC2 for PI control, and the output is a modulated signal in the dq coordinate system. ; ③ Modulate the signal By performing time delay control, the reference value of the internal potential of SU in the dq coordinate system is obtained. ; ④Use right Perform a dq / abc transformation to obtain the reference value of the internal electric potential of SU in the abc coordinate system. .

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