Three-channel power supply module based on SIP technology

By employing SIP (System-in-Package) technology and inductor sinking design in complex aerospace systems, a three-channel power supply circuit is integrated, solving the problems of high integration and miniaturization, and achieving efficient space utilization of multiple power outputs.

CN120813032APending Publication Date: 2025-10-17CHENGDU HUANYUXIN TECH
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Patent Information

Application Number
CN202510886280.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-30
Publication Date
2025-10-17

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Abstract

A three-channel power supply module based on SIP (Session Initiation Protocol) technology relates to the technical field of integrated circuits and comprises a three-channel power supply circuit, an active chip bare core and a passive device of the three-channel power supply circuit are packaged in an integrated ceramic tube shell, and the top of the integrated ceramic tube shell is connected with a metal cover plate by adopting a parallel seam welding process; the bare core is connected with the ceramic substrate through a conductive adhesive, the bare core pad is connected with the ceramic substrate through 25 [mu] m gold wire ultrasonic pressure welding, and the passive device is connected with the ceramic substrate through a tin soldering process. According to the invention, the SIP system-level packaging technology is adopted, the wide voltage input and three-path power supply output functions are realized, power can be supplied to a digital circuit and an analog circuit at the same time, a certain power supply universality requirement is met, various power utilization scenes of avionic products can be met, high power density and high integration level can be realized, the space is greatly saved, and the cost is reduced. The device has obvious advantages in the aspects of miniaturization, modularization, light weight and the like of products.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, in particular to a three-channel power module based on SIP technology. BACKGROUND

[0002] For a complex aviation system, the types and numbers of subsystems and devices contained therein are relatively large, including digital circuit systems, analog circuit systems, sensor circuits, digital-to-analog conversion circuits, and power supply systems. The power supply system supplies power to other subsystems and circuits, and each subsystem and circuit often requires different input voltages, which requires the power supply system to output multiple voltage different power supplies, resulting in complex power supply system circuits and occupying a large space. Therefore, for a complex aviation system, the internal power supply circuit needs to meet the requirements of high power density and high integration.

[0003] Patent CN202510194868.8 "A module power supply and a power supply system" proposes a single-output power supply scheme, which can generate a single-output DC power supply with accurate output voltage based on the patent. However, this patent cannot generate multiple power supplies required by complex systems, the output voltage amplitude is fixed and cannot be adjusted, and many peripheral devices are required, occupying a large space.

[0004] Patent CN202510206984.7 "A DCDC rectifier circuit based on third-generation semiconductor" proposes a DCDC power supply circuit based on BUCK circuit and LLC resonant circuit, which can generate a DC power supply with adjustable output voltage based on the patent. However, this patent can only output single, cannot generate multiple DC outputs, and also requires many peripheral devices, occupying a large space.

[0005] Patent CN202410787457.5 "A power protection module based on SIP packaging" proposes a power protection module based on SIP packaging, which can greatly save the required space of the product due to its high integration. Based on the patent, the power supply circuit can provide fault signal uploading and output protection functions. However, there are no related applications for multi-channel power supply modules based on high-integration SIP packaging in the industry. SUMMARY

[0006] The purpose of the present application is to provide a miniaturized and modular three-channel power module based on SIP technology, which has a wide voltage input and three power supply output functions, can simultaneously supply power to digital circuits and analog circuits, has certain power supply versatility requirements, and can meet various power consumption scenarios of avionics products.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: a three-channel power module based on SIP technology, comprising a three-channel power circuit, wherein the active chip bare core and passive components of the three-channel power circuit are encapsulated in an integrated ceramic tube shell, and a metal cover plate is connected to the top of the integrated ceramic tube shell using a parallel seam welding process;

[0008] The bare core is connected to the ceramic substrate using conductive glue, the bare core pad is connected to the ceramic substrate through 25μm gold wire ultrasonic pressure welding, and the passive components are connected to the ceramic substrate using a tin soldering process.

[0009] The integrated ceramic shell and tube is an integrated design of the shell and substrate.

[0010] Furthermore, the material of the integrated ceramic tube shell is alumina, the material of the sealing ring is 4J29, and the material of the metal cover plate is iron-nickel alloy 4J42.

[0011] Furthermore, the ceramic substrate is sunken at the position of the inductor.

[0012] Because the height of the inductor is higher than other components and bare cores, the substrate design scheme of sinking the inductor can reduce the height of the product, thereby further realizing the miniaturization of the product.

[0013] Furthermore, the three-channel power supply circuit includes a first voltage generating circuit, a second voltage generating circuit and a third voltage generating circuit. The input end of the first voltage generating circuit is connected to the external DC input voltage, and the output end generates a first voltage VOUT+; the input end of the second voltage generating circuit is connected to the output end of the first voltage generating circuit, and the output end generates a second voltage VOUT-; the input end of the third voltage generating circuit is connected to the output end of the first voltage generating circuit, and the output end generates a third voltage.

[0014] As a further preferred solution, the specific structure of the first voltage generating circuit is:

[0015] The DC input VIN is connected to the VIN-1, VIN-2, and VIN-3 terminals of the first step-down DC-DC chip, and is connected to the EN terminal of the first step-down DC-DC chip through a resistor R+5-EN, and is also connected to the GND ground through a capacitor C28-1;

[0016] The SW-1, SW-2, and SW-3 connection terminals of the first step-down DC-DC chip are connected to the first voltage VOUT+ output terminal through the inductor L+5. The first voltage VOUT+ output terminal is connected to the GND ground through the parallel capacitor group C+5-2, C+5-4, and C+5-6. The first voltage VOUT+ output terminal is also connected to the GND ground through the series resistor R+5-1 and the resistor R+5-2. The connection point of the resistor R+5-1 and the resistor R+5-2 is connected to the FB connection terminal of the first step-down DC-DC chip.

[0017] The SW-1 connecting end of the first step-down DCDC chip is connected to the BST connecting end of the first step-down DCDC chip through the capacitor C+5-1.

[0018] The PGND-1 and PGND-2 connecting ends of the first step-down DCDC chip are connected to the GND ground, and the AGND and Other connecting ends of the first step-down DCDC chip are connected to the AGND ground.

[0019] As a further another preferred solution, the second voltage generating circuit has the following specific structure:

[0020] The first voltage VOUT+ is connected to the VIN-1, VIN-2 and VIN-3 connecting ends of the second step-down DCDC chip, and is connected to the EN connecting end of the second step-down DCDC chip through the resistor R-5-EN, and is connected to the second voltage VOUT- output end through the capacitor C+5-3.

[0021] The SW-1, SW-2 and SW-3 connecting ends of the second step-down DCDC chip are connected to the GND ground through the inductor L-5, and the second voltage VOUT- output end is connected to the GND ground through the parallel capacitor group C-5-2 and C-5-3; the second voltage VOUT- output end is also connected to the GND ground through the series resistor R-5-2 and resistor R-5-1, and the connecting point of the resistor R-5-2 and resistor R-5-1 is connected to the FB connecting end of the second step-down DCDC chip.

[0022] The SW-1 connecting end of the second step-down DCDC chip is connected to the BST connecting end of the second step-down DCDC chip through the capacitor C-5-1.

[0023] The PGND-1 and PGND-2 connecting ends of the second step-down DCDC chip are connected to the second voltage VOUT- output end, and the AGND and Other connecting ends of the second step-down DCDC chip are connected to the AGND ground.

[0024] As a further another preferred solution, the third voltage generating circuit has the following specific structure:

[0025] The first voltage VOUT+ is connected to the IN-1 and IN-2 connecting ends of the LDO chip, the OUT-1, OUT-2 and PAD connecting ends of the LDO chip are connected to the third voltage output end, the third voltage output end is connected to the GND ground through the capacitor C3-2, and the GND connecting end of the LDO chip is also connected to the GND ground.

[0026] The present application has the following beneficial effects:

[0027] This invention utilizes SIP (system-in-package) technology to integrate multiple bare IC chips and chip components within a ceramic housing with an integrated housing and substrate, creating a multi-chip assembly. This achieves high power density and high integration, requiring only a few peripheral components to implement a three-way power output, significantly saving space. The power module based on this invention enables wide voltage input and three-way power output. Compared to existing power circuit designs that use pre-made chips and passive components, this invention utilizes system-in-package integration, offering significant advantages in miniaturization, modularization, and lightweighting. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 This is a block diagram of the circuit topology principle of an embodiment of the present invention;

[0029] Figure 2 is a schematic structural diagram of a first voltage generating circuit according to an embodiment of the present invention;

[0030] Figure 3 is a schematic structural diagram of a second voltage generating circuit according to an embodiment of the present invention;

[0031] Figure 4 is a schematic structural diagram of a third voltage generating circuit according to an embodiment of the present invention;

[0032] Figure 5 This is a schematic diagram of the internal structure of a module according to an embodiment of the present invention;

[0033] Figure 6 is a top view of the housing of an embodiment of the present invention;

[0034] Figure 7 is a side view of a housing according to an embodiment of the present invention;

[0035] Figure 8 2. It is a bottom view of the housing of an embodiment of the present invention.

[0036] Figure 9 This is a schematic diagram of the pins of an embodiment of the present invention. DETAILED DESCRIPTION

[0037] In order to more clearly understand the above-mentioned objects, features and advantages of the present invention, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0038] Figures 1-9 A specific embodiment of the present invention is a three-channel power module based on SIP technology, comprising a three-channel power circuit, wherein the active chip bare die and passive components of the three-channel power circuit are encapsulated in an integrated ceramic tube shell, and a metal cover plate is connected to the top of the integrated ceramic tube shell using a parallel seam welding process;

[0039] like Figure 5As shown, the three pieces of bare chips in this embodiment 3 (i.e. two pieces of HYW1631 bare chips and one piece of GEW4312-3.3 bare chip) are connected with the ceramic substrate by conductive glue, the bare chip pads are connected with the ceramic substrate by 25 μm gold wire ultrasonic pressure welding, and the passive devices are connected with the ceramic substrate by soldering process.

[0040] The integrated ceramic tube shell is designed in an integrated manner of the tube shell and the substrate. The material of the integrated ceramic tube shell is alumina, the material of the sealing ring is 4J29, and the material of the metal cover plate is iron-nickel alloy 4J42.

[0041] The sealing ring is used to connect the integrated ceramic tube shell and the metal cover plate. A sealing ring made of 4J29 material is attached to the uppermost end of the side wall of the integrated ceramic tube shell, and then the metal cover plate is pressed on the sealing ring. The hermetic connection between the integrated ceramic tube shell and the metal cover plate is achieved by using parallel seam welding process.

[0042] The ceramic substrate is sunken at the inductor position, as shown in Figure 5 As shown, the two inductors in this embodiment are Figure 2 and Figure 3 L+5 and L-5 in the above, respectively. Since the height of the inductor is higher than that of other components and bare chips, the sinking area is excavated on the substrate at the position of the two inductors before installing the inductors, which can reduce the height of the product, thereby further realizing the miniaturization of the product. The depth of the sinking, the dielectric layer and the metal trace layout of each layer of the substrate are modified and designed accordingly.

[0043] The three-channel power supply circuit in this embodiment, as shown in Figure 1 includes a first voltage generating circuit, a second voltage generating circuit and a third voltage generating circuit. The input end of the first voltage generating circuit is connected with an external DC input voltage, and the output end generates a first voltage VOUT+. The input end of the second voltage generating circuit is connected with the output end of the first voltage generating circuit, and the output end generates a second voltage VOUT-. The input end of the third voltage generating circuit is connected with the output end of the first voltage generating circuit, and the output end generates a third voltage +3.3V.

[0044] As shown in Figure 2 , the first voltage generating circuit generates a positive voltage output VOUT+ by a first step-down DCDC chip (a first piece of HYW1631 bare chip) and peripheral circuits. The specific structure is as follows:

[0045] The DC input VIN is connected with the VIN-1, VIN-2 and VIN-3 connection ends of the first step-down DCDC chip, and is connected with the EN connection end of the first step-down DCDC chip through the resistance R+5-EN, and is also connected with the GND ground through the capacitor C28-1.

[0046] The SW-1, SW-2 and SW-3 connection ends of the first step-down DCDC chip are connected to the first voltage VOUT+ output end through the inductor L+5, and the first voltage VOUT+ output end is connected to the GND ground through the parallel capacitor group C+5-2, C+5-4 and C+5-6; the first voltage VOUT+ output end is also connected to the GND ground through the series resistor R+5-1 and resistor R+5-2, and the connection point of the resistor R+5-1 and resistor R+5-2 is connected to the FB connection end of the first step-down DCDC chip;

[0047] The SW-1 connection end of the first step-down DCDC chip is connected to the BST connection end of the first step-down DCDC chip through the capacitor C+5-1;

[0048] The PGND-1 and PGND-2 connection ends of the first step-down DCDC chip are connected to the GND ground, and the AGND and Other connection ends of the first step-down DCDC chip are connected to the AGND ground.

[0049] As shown in Figure 3 The second voltage generating circuit generates a negative voltage output VOUT- by a second step-down DCDC chip (second chip HYW1631 bare chip) and peripheral circuits, and the specific structure is as follows:

[0050] The first voltage VOUT+ is connected to the VIN-1, VIN-2 and VIN-3 connection ends of the second step-down DCDC chip, and is connected to the EN connection end of the second step-down DCDC chip through the resistor R-5-EN, and is also connected to the second voltage VOUT- output end through the capacitor C+5-3;

[0051] The SW-1, SW-2 and SW-3 connection ends of the second step-down DCDC chip are connected to the GND ground through the inductor L-5, and the second voltage VOUT- output end is connected to the GND ground through the parallel capacitor group C-5-2 and C-5-3; the second voltage VOUT- output end is also connected to the GND ground through the series resistor R-5-2 and resistor R-5-1, and the connection point of the resistor R-5-2 and resistor R-5-1 is connected to the FB connection end of the second step-down DCDC chip;

[0052] The SW-1 connection end of the second step-down DCDC chip is connected to the BST connection end of the second step-down DCDC chip through the capacitor C-5-1;

[0053] The PGND-1 and PGND-2 connection ends of the second step-down DCDC chip are connected to the second voltage VOUT- output end, and the AGND and Other connection ends of the second step-down DCDC chip are connected to the AGND ground.

[0054] As shown in Figure 4As shown, the third voltage generating circuit generates the third voltage, i.e. +3.3V output, by the LDO chip (GEW4312-3.3 bare chip) and peripheral circuit, and the specific structure is as follows:

[0055] The first voltage VOUT+ is connected to the IN-1 and IN-2 connection terminals of the LDO chip, the OUT-1, OUT-2 and PAD connection terminals of the LDO chip are connected to the third voltage output terminal to generate +3.3V output, the third voltage output terminal is connected to the GND ground through the capacitor C3-2, and the GND connection terminal of the LDO chip is also connected to the GND ground.

[0056] The technical parameters of the three-channel power supply module product of the embodiment are shown in the following table:

[0057]

[0058] The pin of the three-channel power supply module product of the embodiment is shown in the following table:

[0059]

Claims

1. A three-channel power module based on SIP technology, characterized by: It includes a three-channel power supply circuit, wherein the active chip bare core and passive components of the three-channel power supply circuit are packaged inside an integrated ceramic tube shell, and the top of the integrated ceramic tube shell is connected to a metal cover plate using a parallel seam welding process; The bare core is connected to the ceramic substrate using conductive glue, the bare core pad is connected to the ceramic substrate through 25μm gold wire ultrasonic pressure welding, and the passive components are connected to the ceramic substrate using a tin soldering process.

2. The three-channel power module based on SIP technology according to claim 1, characterized in that: The material of the integrated ceramic shell is alumina, the material of the sealing ring is 4J29, and the material of the metal cover plate is iron-nickel alloy 4J42.

3. The three-channel power module based on SIP technology according to claim 1, characterized in that: The ceramic substrate is sunken at the location of the inductor.

4. The three-channel power module based on SIP technology according to claim 1, characterized in that: The three-channel power supply circuit includes a first voltage generating circuit, a second voltage generating circuit and a third voltage generating circuit. The input end of the first voltage generating circuit is connected to an external DC input voltage, and the output end generates a first voltage VOUT+; the input end of the second voltage generating circuit is connected to the output end of the first voltage generating circuit, and the output end generates a second voltage VOUT-; the input end of the third voltage generating circuit is connected to the output end of the first voltage generating circuit, and the output end generates a third voltage.

5. The three-channel power module based on SIP technology according to claim 4, characterized in that: The specific structure of the first voltage generating circuit is: The DC input VIN is connected to the VIN-1, VIN-2, and VIN-3 terminals of the first step-down DC-DC chip, and is connected to the EN terminal of the first step-down DC-DC chip through a resistor R+5-EN, and is also connected to the GND ground through a capacitor C28-1; The SW-1, SW-2, and SW-3 connection terminals of the first step-down DC-DC chip are connected to the first voltage VOUT+ output terminal through the inductor L+5. The first voltage VOUT+ output terminal is connected to the GND ground through the parallel capacitor group C+5-2, C+5-4, and C+5-6. The first voltage VOUT+ output terminal is also connected to the GND ground through the series resistor R+5-1 and the resistor R+5-2. The connection point of the resistor R+5-1 and the resistor R+5-2 is connected to the FB connection terminal of the first step-down DC-DC chip. The SW-1 connection terminal of the first step-down DCDC chip is connected to the BST connection terminal of the first step-down DCDC chip through the capacitor C+5-1; The PGND-1 and PGND-2 connection terminals of the first step-down DCDC chip are connected to the GND ground, and the AGND and Other connection terminals of the first step-down DCDC chip are connected to the AGND ground.

6. The three-channel power supply module based on SIP technology according to claim 4, characterized in that: The specific structure of the second voltage generating circuit is: The first voltage VOUT+ is connected to the VIN-1, VIN-2 and VIN-3 connection terminals of the second step-down DCDC chip, and is connected to the EN connection terminal of the second step-down DCDC chip through the resistor R-5-EN, and is also connected to the second voltage VOUT- output terminal through the capacitor C+5-3; The SW-1, SW-2, and SW-3 connection terminals of the second step-down DC-DC chip are connected to GND ground via the inductor L-5, and the second voltage VOUT- output terminal is connected to GND ground via the parallel capacitor group C-5-2 and C-5-3. The second voltage VOUT- output terminal is also connected to GND ground via the series resistor R-5-2 and the resistor R-5-1. The connection point of the resistor R-5-2 and the resistor R-5-1 is connected to the FB connection terminal of the second step-down DC-DC chip; The SW-1 connection terminal of the second step-down DCDC chip is connected to the BST connection terminal of the second step-down DCDC chip through the capacitor C-5-1; The PGND-1 and PGND-2 connection terminals of the second step-down DCDC chip are connected to the second voltage VOUT- output terminal, and the AGND and Other connection terminals of the second step-down DCDC chip are connected to the AGND ground.

7. The three-channel power module based on SIP technology according to claim 4, characterized in that: The specific structure of the third voltage generating circuit is: The first voltage VOUT+ is connected to the IN-1 and IN-2 connection terminals of the LDO chip, and the OUT-1, OUT-2 and PAD connection terminals of the LDO chip are connected to the third voltage output terminal. The third voltage output terminal is connected to the GND ground through the capacitor C3-2, and the GND connection terminal of the LDO chip is also connected to the GND ground.

Citation Information

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