Display driving method, display device and equipment

Abstract

The invention discloses a display driving method, a display device and equipment, relates to the technical field of electronics, and is used for solving the display problem of partition boundaries during partition refreshing. A refresh cycle of a first display area in the display screen is larger than a refresh cycle of a second display area, a first refresh cycle of the first display area comprises a holding frame, a second refresh cycle of the second display area comprises a first write-in frame, and the first write-in frame and the holding frame are overlapped in time sequence. The method comprises the steps that a driving circuit outputs data signals to a first display area and a second display area, the data signals are used for providing holding voltage and data voltage, and the data signals are converted into providing data voltage at the first moment of a holding frame; the driving circuit outputs a first selection signal to the second display area, the first selection signal jumps at a second moment of the first write-in frame, the jumping of the first selection signal is used for controlling the second display area to realize data write-in at the first write-in frame according to the data voltage, and the first moment is earlier than the second moment.

Description

Technical Field

[0001] The present application relates to the field of electronic technology, and in particular to a display driving method, a display device, and equipment. Background Art

[0002] The traditional refresh method for display devices is to refresh the entire screen. In this way, when only a part of the image in the display device area needs to be updated, the driving circuit still needs to refresh the entire screen of the display device, resulting in power consumption waste. At present, display technology is constantly developing and evolving. People are seeking high refresh frequencies while trying to reduce the energy consumption of display devices. In order to take both needs into account at the same time, partition frequency conversion technology is born. Partition frequency conversion technology determines whether the driving circuit writes data to the display device based on whether the image of the display device needs to be updated. Specifically, when the image of a part of the area of ​​the display device needs to be updated, the driving circuit writes data to that part of the area, and does not write data to other areas that do not need to be updated, thereby reducing the power consumption of the driving circuit.

[0003] However, when using partition frequency conversion technology to refresh the display device, two adjacent partitions corresponding to different refresh frequencies will have display problems at the partition boundary, such as bright lines appearing at the partition boundary, thereby affecting the display effect and reducing the user experience. Summary of the Invention

[0004] The present application provides a display driving method, a display device and an apparatus for solving the display problem existing at the boundaries of partitions with different refresh frequencies during partition refresh, thereby improving the display effect.

[0005] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0006] In a first aspect, a display driving method is provided for use in a display device comprising a driving circuit and a display screen. The display screen comprises a first display area and a second adjacent display area, wherein a refresh period of the first display area is greater than a refresh period of the second display area, i.e., a refresh frequency of the first display area is less than a refresh frequency of the second display area. A first refresh period of the first display area comprises a hold frame, and a second refresh period of the second display area comprises a first write frame, wherein the first write frame and the hold frame overlap in timing. The method includes: the driving circuit outputs a data signal to the first display area and the second display area, the data signal is used to provide a holding voltage and a data voltage, for example, the holding voltage is a low level, the data voltage is a high level, the data voltage is used to provide data for the second display area, the holding voltage is used to hold data in the first display area, the data signal is transformed to provide the data voltage at the first moment of the holding frame, for example, the data signal jumps from the holding voltage to the data voltage at the first moment, or the data signal gradually changes from the holding voltage to the data voltage and changes to the data voltage at the first moment; the driving circuit outputs a first selection signal to the second display area, the first selection signal jumps at the second moment of the first writing frame, the first selection signal jumping can refer to the first selection signal jumping from a high level to a low level, the jump of the first selection signal is used to control the second display area to implement data writing in the first writing frame according to the data voltage, and the first moment is earlier than the second moment.

[0007] In the above technical solution, in the process of partitioning and refreshing the first display area and the second display area, for the holding frame within the i-th refresh cycle of the first display area, the data signal output by the driving circuit provides a data voltage at the first moment within the holding frame, and the data voltage is used to provide data for the second display area. The first selection signal output by the driving circuit jumps at the second moment of the first writing frame, and the jump of the first selection signal is used to control the second display area to implement data writing in the first writing frame according to the data voltage. The first moment is earlier than the second moment, that is, the driving circuit provides data to the second display area in advance within the holding frame, so that the disturbance of the power supply signal VDD occurs before the data is written, so that the voltage of the power supply signal VDD can be restored to the normal voltage when the data is written, thereby solving the problem of bright lines appearing at the partition boundary during the process of partitioning and refreshing the first display area and the second display area, thereby improving the display effect and improving the user experience.

[0008] In any possible implementation of the first aspect, the first selection signal is a selection signal corresponding to the area of ​​the second display area that was written first. For example, the first selection signal is a selection signal corresponding to the area of ​​the second display area that is adjacent to the first display area and was written first. This possible implementation can solve the problem of bright lines appearing in areas of the second display area that are adjacent to the first display area.

[0009] In any possible implementation of the first aspect, the first display area includes a plurality of first pixel rows, the second display area includes a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows. Optionally, the first selection signal may be a selection signal corresponding to a pixel row adjacent to the first display area and written first among the plurality of pixel rows, such as a selection signal for the first pixel row among the plurality of second pixel rows. The above possible implementation can solve the problem of bright lines appearing in one or more second pixel rows adjacent to the first display area in the second display area.

[0010] In any possible implementation of the first aspect, the time difference between the first moment and the second moment is between 1 unit time and 100 unit time, where the unit time is the scanning duration of a single pixel row. In these possible implementations, the disturbance of the power supply signal VDD can occur before data is written, and the voltage of the power supply signal VDD is guaranteed to return to a normal voltage during data writing, thereby resolving the issue of bright lines appearing at the partition boundaries between the first and second display areas during partition refresh.

[0011] In any possible implementation of the first aspect, the first refresh cycle of the first display area includes a second write frame, the data voltage is also used to provide data to the first display area, and the data signal is also changed to provide the data voltage at a third moment before the second write frame; the method further includes: the driving circuit outputs a second selection signal to the first display area, the second selection signal jumps at a fourth moment in the second write frame, and the jump of the second selection signal is used to control the first display area to implement data writing in the second write frame according to the data voltage, and the third moment is earlier than the fourth moment. Optionally, the time difference between the third moment and the fourth moment is between 1 unit time and 100 unit time. In the above possible implementation, the driving circuit provides data to the first display area in advance before the second write frame, so that the disturbance of the power supply signal VDD occurs before the data is written. In this way, the voltage of the power supply signal VDD can be restored to a normal voltage when the data is written, thereby solving the problem of bright lines appearing at the boundary of the first display area.

[0012] In any possible implementation of the first aspect, the second selection signal is a selection signal corresponding to the area written first in the first display area. For example, the first display area includes multiple first pixel rows, and the second selection signal is a selection signal corresponding to the first pixel row among the multiple first pixel rows. The above possible implementation can solve the problem of bright lines appearing at the boundary of the first display area.

[0013] In any possible implementation of the first aspect, the data signal transitioning to providing the data voltage includes at least one of the following: the data signal jumping from providing the holding voltage to providing the data voltage, the data signal transitioning from providing the holding voltage to providing the data voltage in a step-by-step manner, the data signal transitioning from providing the holding voltage to providing the data voltage in a linearly increasing manner, or the data signal transitioning from providing the holding voltage to providing the data voltage in an arc-shaped increasing manner. In the above possible implementations, multiple possible transition methods for the data signal are provided, and the transitions in the above manners can reduce the impact of the transition of the data signal on the power supply signal VDD.

[0014] In a second aspect, a display device is provided, comprising a drive circuit and a display screen, wherein the display screen comprises a first display area and a second display area adjacent to each other, wherein the refresh period of the first display area is greater than the refresh period of the second display area, the first refresh period of the first display area comprises a hold frame, and the second refresh period of the second display area comprises a first write frame, wherein the first write frame and the hold frame overlap in timing. The drive circuit is configured to output a data signal to the first display area and the second display area, wherein the data signal is configured to provide a hold voltage and a data voltage, wherein the data voltage is configured to provide data for the second display area, wherein the hold voltage is configured to maintain data in the first display area, wherein the data signal is configured to provide the data voltage at a first moment of the hold frame; and the drive circuit is further configured to output a first selection signal to the second display area, wherein the first selection signal jumps at a second moment of the first write frame, wherein the jump of the first selection signal is configured to control the second display area to implement data writing in the first write frame according to the data voltage, wherein the first moment is earlier than the second moment.

[0015] In any possible implementation manner of the second aspect, the first selection signal is a selection signal corresponding to an area written first in the second display area.

[0016] In any possible implementation manner of the second aspect, the first display area includes a plurality of first pixel rows, the second display area includes a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows.

[0017] In any possible implementation manner of the second aspect, the time difference between the first moment and the second moment is between 1 unit time and 100 unit time, where the unit time is the scanning duration of a single pixel row.

[0018] In any possible implementation of the second aspect, the first refresh cycle of the first display area includes a second write frame, the data voltage is further used to provide data to the first display area, and the data signal is also changed to provide the data voltage at a third moment before the second write frame; the driving circuit is further used to output a second selection signal to the first display area, the second selection signal jumps at a fourth moment in the second write frame, and the jump of the second selection signal is used to control the first display area to implement data writing in the second write frame according to the data voltage, and the third moment is earlier than the fourth moment. Optionally, the second selection signal is the selection signal corresponding to the area in the first display area that is written first.

[0019] In any possible implementation of the second aspect, the data signal is transformed into providing the data voltage, including at least one of the following: the data signal jumps from providing the holding voltage to providing the data voltage, the data signal is transformed from providing the holding voltage to providing the data voltage in a step-by-step manner, the data signal is transformed from providing the holding voltage to providing the data voltage in a linearly increasing manner, or the data signal is transformed from providing the holding voltage to providing the data voltage in an arc-increasing manner.

[0020] In a third aspect, a display driving device is provided for driving a display screen, wherein the display screen includes a first display area and a second adjacent display area, a refresh period of the first display area is greater than a refresh period of the second display area, the first refresh period of the first display area includes a hold frame, and the second refresh period of the second display area includes a first write frame, and the first write frame overlaps with the hold frame in timing; the display driving device includes: a first driving unit for outputting a data signal to the first display area and the second display area, the data signal being used to provide a hold voltage and a data voltage, the data voltage being used to provide data for the second display area, the hold voltage being used to hold data in the first display area, the data signal being converted to provide the data voltage at the first moment of the hold frame; a second driving unit for outputting a first selection signal to the second display area, the first selection signal jumping at the second moment of the first write frame, the jump of the first selection signal being used to control the second display area to implement data writing in the first write frame according to the data voltage, the first moment being earlier than the second moment.

[0021] In any possible implementation manner of the third aspect, the first selection signal is a selection signal corresponding to an area written first in the second display area.

[0022] In any possible implementation manner of the third aspect, the first display area includes a plurality of first pixel rows, the second display area includes a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows.

[0023] In any possible implementation manner of the third aspect, the time difference between the first moment and the second moment is between 1 unit time and 100 unit time, where the unit time is the scanning duration of a single pixel row.

[0024] In any possible implementation of the third aspect, the first refresh cycle of the first display area includes a second write frame, the data voltage is further used to provide data to the first display area, and the data signal is also changed to provide the data voltage at a third time before the second write frame; the second drive unit is further used to output a second selection signal to the first display area, the second selection signal jumps at a fourth time in the second write frame, and the jump of the second selection signal is used to control the first display area to implement data writing in the second write frame according to the data voltage, and the third time is earlier than the fourth time. Optionally, the second selection signal is the selection signal corresponding to the area in the first display area that is written first.

[0025] In any possible implementation of the third aspect, the data signal is transformed into providing the data voltage, including at least one of the following: the data signal jumps from providing the holding voltage to providing the data voltage, the data signal is transformed from providing the holding voltage to providing the data voltage in a step-by-step increasing manner, the data signal is transformed from providing the holding voltage to providing the data voltage in a linear increasing manner, or the data signal is transformed from providing the holding voltage to providing the data voltage in an arc increasing manner.

[0026] In a fourth aspect, an electronic device is provided, comprising a processor and a display device coupled to the processor; wherein the display device is the display device provided by the second aspect or any possible implementation of the second aspect; or, the display device comprises a display screen and a display driver device as provided by the third aspect or any possible implementation of the third aspect.

[0027] In a fifth aspect, a computer-readable storage medium is provided, in which a computer program or instruction is stored. When the computer program or instruction is executed, the method provided in the first aspect or any possible implementation of the first aspect is implemented.

[0028] In a sixth aspect, a computer program product is provided, which includes: a computer program, which may also be referred to as code or instructions, which, when executed, enables a computer to execute the method provided in the first aspect or any possible implementation of the first aspect.

[0029] It can be understood that the beneficial effects that can be achieved by the above-mentioned second to sixth aspects can correspond to the beneficial effects provided by the above-mentioned first aspect or any possible implementation method of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic diagram of partitioning of a display screen provided in an embodiment of the present application;

[0031] Figure 2 A schematic diagram of a refresh cycle for partition refresh provided in an embodiment of the present application;

[0032] Figure 3 A schematic diagram showing a bright line appearing at a partition boundary of a display screen provided by an embodiment of the present application;

[0033] Figure 4 A schematic structural diagram of a display device provided in an embodiment of the present application;

[0034] Figure 5 A waveform diagram of a signal output by a driving circuit provided in an embodiment of the present application;

[0035] Figure 6 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0036] Figure 7 A schematic flow chart of a display driving method provided in an embodiment of the present application;

[0037] Figure 8 A schematic diagram of another partition of a display screen provided in an embodiment of the present application;

[0038] Figure 9 A waveform diagram of a signal output by another driving circuit provided in an embodiment of the present application;

[0039] Figure 10 A schematic flow chart of another display driving method provided in an embodiment of the present application;

[0040] Figure 11 A waveform diagram of a signal output by another driving circuit provided in an embodiment of the present application;

[0041] Figure 12 A waveform diagram of a signal output by another driving circuit provided in an embodiment of the present application;

[0042] Figure 13 A schematic diagram of a data signal transition provided in an embodiment of the present application;

[0043] Figure 14 A schematic structural diagram of another display device provided in an embodiment of the present application;

[0044] Figure 15 A schematic structural diagram of another display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0045] The following will discuss in detail the making and use of various embodiments. However, it should be understood that many applicable inventive concepts provided herein can be implemented in a variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to implement and use the present application and technology and do not limit the scope of this application.

[0046] Unless defined otherwise, all technical and scientific terms used herein have the same meanings as commonly understood by one of ordinary skill in the art.

[0047] Various circuits or other components may be described or referred to as being "configured to" perform one or more tasks. In this case, "configured to" is used to imply structure, such as circuitry, by indicating that the circuit / component includes structure that performs the one or more tasks during operation. Thus, even when a specified circuit / component is not currently operational, such as when it is not turned on, the circuit / component may be referred to as being configured to perform the task. Circuits / components used with the term "configured to" include hardware, such as circuitry that performs an operation.

[0048] The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. In the present application, "at least one" means one or more, and "more" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following / at least one" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, a and b, a and c, b and c, a, b and c; where a, b and c can be single or multiple.

[0049] The embodiments of this application use terms such as "first" and "second" to distinguish objects with similar names, functions, or effects. Those skilled in the art will understand that terms such as "first" and "second" do not limit the quantity or order of execution. The term "coupled" is used to indicate an electrical connection, including direct connection via wires or connectors or indirect connection via other devices. Therefore, "coupling" should be considered a broadly defined electronic communication connection.

[0050] In this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0051] Before introducing the embodiments of the present application, the application scenarios involved in the present application are first introduced and explained.

[0052] The traditional refresh method for display devices is to refresh the entire screen. In this way, when only a part of the image in the display device area needs to be updated, the driving circuit still needs to refresh the entire screen of the display device, resulting in power consumption waste. At present, display technology is constantly developing and evolving. People are seeking high refresh frequencies while trying to reduce the energy consumption of display devices. In order to take both needs into account at the same time, partition frequency conversion technology is born. Partition frequency conversion technology determines whether the driving circuit writes data to the display device based on whether the image of the display device needs to be updated. Specifically, when the image of a part of the area of ​​the display device needs to be updated, the driving circuit writes data to that part of the area, and does not write data to other areas that do not need to be updated, thereby reducing the power consumption of the driving circuit.

[0053] For example, Figure 1 As shown, the display screen of the display device includes display area A, display area B and display area C which are adjacent to each other in sequence, wherein the three display areas can be used to display images or contents with different refresh rates. For example, display area A can be used to display the title bar, display area B can be used as a display window for video playback, and display area C can be used to display the comment area. The refresh frame rates of display areas A and C are 40Hz, and the refresh rate of display area B is 120Hz. Figure 1 In the traditional refresh method, the display device refreshes the entire screen at 120Hz, meaning that display areas A, B, and C all write data at 120Hz. If the partitioned refresh method is used, data is written to display area B at 120Hz, while data is written to display areas A and C at 40Hz. Therefore, partitioned variable-frequency refresh can significantly reduce ineffective operation of the driver circuit and reduce power consumption.

[0054] The display area corresponding to any of the above refresh frequencies can operate in multiple refresh cycles, each of which can be referred to as a frame time. Each refresh cycle can include a write frame, or each refresh cycle can include a write frame and one or more hold frames, wherein the write frame is used to write data to the corresponding display area, and the hold frame is used to hold the data displayed in the corresponding display area. Optionally, the refresh cycle includes a write frame; or the refresh cycle includes a write frame and multiple hold frames, wherein the multiple hold frames are located after the write frame.

[0055] For example, in the scenario of partitioned refresh, if the refresh period of the display area with a low refresh rate is 40Hz, the refresh period is 1 / 40, and the refresh period is equal to 3 times the refresh period of the display area refreshed at 120Hz. Figure 2 As shown, when implementing partition refresh, if the refresh cycle is divided into three time periods, each time period is 1 / 120, then: in the first 1 / 120 time period, data is written to the entire screen of the display screen, and the pixel circuits in the display screen are written and stored with correct data. This time period can be called a write frame; in the second 1 / 120 and third 1 / 120 time periods, display area A and display area C no longer write data, while display area B continues to write and store data. Each of these two time periods can be called a hold frame. Figure 2 In the example, the data signal DA output by the driving circuit is at a high level in the write frame, at a high level when refreshing the display area B in the hold frame, and at a low level when not refreshing the display area B in the hold frame. In this way, the refresh cycle of the display area refreshed at 40Hz can be composed of one write frame and two hold frames, and the low level of the data signal DA output by the driving circuit in the two hold frames can be a High-z signal or a direct current (DC) signal, without performing an alternating current (AC) change in the signal, thereby saving some power consumption. The above-mentioned High-z signal can also be called a Hi-z signal, which refers to a signal with a voltage of 0 or close to 0, such as 100mV. At this time, the state of the display area can also be called a floating state.

[0056] However, when using the partition frequency conversion technology to refresh the display device, two adjacent partitions corresponding to different refresh frequencies will have display problems at the partition boundary, such as bright lines at the partition boundary, which affects the display effect and reduces the user experience. Figure 1 and Figure 2 Take the partition refresh shown as an example, Figure 3As shown, during the partition refresh process, a bright line problem may appear at the partition boundary between the display area A and the display area B.

[0057] Below through Figure 4 The display device shown, and Figure 5 The waveforms of multiple signals in the refresh cycle shown explain why display problems occur at partition boundaries during partition refresh.

[0058] Figure 4 A schematic structural diagram of a display device provided in an embodiment of the present application. The display device includes a driving circuit and a display screen, the display screen includes a pixel array, the pixel array includes multiple rows and columns of pixel units, the pixel units can be referred to as pixel circuits, or pixels for short. The multiple rows and columns of pixel units can also be referred to as multiple pixel rows and multiple pixel columns. The driving circuit is used to provide a data signal for each pixel column in the multiple pixel columns in the pixel array, and to provide a selection signal for each pixel row in the multiple pixel rows in the pixel array; each pixel in the multiple pixel arrays is also used to receive a power signal VDD, which can be used to power each pixel. Optionally, the multiple pixel rows in the display screen can be divided into multiple display areas, each display area can include multiple adjacent pixel rows, and the multiple display areas can have different refresh frequencies.

[0059] above Figure 4 In the embodiment, the data signals corresponding to the plurality of pixel columns are represented as DA1 to DAm, and the selection signals corresponding to the plurality of pixel rows are represented as S1 to Sn, where m and n are integers greater than 1. Optionally, the driving circuit may include a display driver integrated circuit (DDIC) and a gate driver on array (GOA) circuit, wherein the DDIC may be configured to provide the plurality of data signals DA1 to DAm, and the GOA circuit may be configured to provide the plurality of selection signals S1 to Sn.

[0060] With the above Figure 1 and Figure 2 Take the partition refresh shown as an example, Figure 4 Under the structure of the display device shown in FIG, the waveforms of the data signal DA, the power signal VDD and the selection signal S21 during the partition refresh process are as follows: Figure 5As shown, S21 represents the selection signal corresponding to the partition boundary between display area A and display area B. Specifically, during the first 1 / 120 time period of the refresh cycle corresponding to a refresh frequency of 40 Hz, that is, when entering the write frame, the entire screen is refreshed and data is written. At this time, the data signal DA and the power supply signal VDD corresponding to the partition boundary between display area A and display area B are both high, and the selection signal S21 jumps from high to low within the write frame to achieve data writing. When entering the second 1 / 120 time period of the refresh cycle, display area A and display area C enter data retention, and the corresponding data signal DA is low. During this time period, when data needs to be written to display area B, the data signal DA instantly jumps from low to high voltage, and the selection signal S21 also jumps from high to low during this time period to achieve data writing to display area B.

[0061] During the second 1 / 120 time period, the data signal DA instantly jumps from a low level to a high voltage, resulting in a large voltage difference. Because there is a capacitance overlap between the power signal VDD of the pixel currently being written and the pixel already written at the partition boundary, this voltage difference causes the voltage of the power signal VDD to be disturbed or mutated. Furthermore, due to the influence of the load and power supply in the display screen, the voltage of the power signal VDD cannot be restored to the correct voltage during writing. Therefore, the data written to the gate of the data thin film transistor (DTFT) in the pixel currently being written is the data written when the power signal VDD was abnormal. When the power signal VDD returns to the correct voltage after a period of time, the gate of the DTFT deviates from the data voltage, or the write voltage, resulting in display abnormality and the appearance of a bright line at the partition boundary.

[0062] Based on this, embodiments of the present application provide a display driving method for resolving display issues at the boundaries of partitions with different refresh rates during partition refresh. Specifically, this method can be used to resolve the issue of bright lines at the boundaries of partitions with different refresh rates, thereby improving display quality and user experience. This method can be applied to various electronic devices having a display device, which may include a driver circuit and a display screen.

[0063] Optionally, the electronic device may include but is not limited to: mobile phones, tablet computers, laptop computers, PDAs, mobile internet devices (MIDs), cameras, wearable devices, audio equipment, audio and video players, set-top boxes, game consoles, printers, mice, keyboards, vehicle-mounted equipment, virtual reality (VR) equipment, augmented reality (AR) equipment, wireless terminals in industrial control, smart home equipment, intelligent robots, workshop equipment, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, or wireless terminals in smart homes, flight equipment, etc. For example, wearable devices include smart watches, smart bracelets, pedometers, etc.; vehicle-mounted devices include equipment on vehicles such as cars, airplanes, ships, trains and high-speed trains; smart home devices include refrigerators, televisions, air conditioners, electricity meters, etc.; flying equipment includes smart robots, hot air balloons, drones, airplanes, etc.

[0064] The following takes the electronic device as an example, and describes the structure of the electronic device. Figure 6 As shown, the electronic device may include components such as a radio frequency (RF) circuit 110, a memory 120, an input unit 130, a display unit 140, a sensor 150, an audio circuit 160, a processor 170, and a power supply 180. Optionally, the display unit 140 may be the display device mentioned above.

[0065] RF circuitry 110 can be used to send and receive information, or receive or send signals during a call. Specifically, it receives downlink information from the base station and passes it to processor 170 for processing; it also sends uplink data to the base station. Typically, RF circuitry 110 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low-noise amplifier (LNA), a duplexer, and more. RF circuitry 110 can also communicate with the network and other devices via wireless communication.

[0066] The memory 120 can be used to store data, software programs, and modules; it includes a program storage area and a data storage area. The program storage area can store an operating system and at least one application required for a function, such as a sound playback function or an image playback function; the data storage area can store data created based on the use of the electronic device, such as audio data, image data, a phone book, etc. In addition, the electronic device may include high-speed random access memory and non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device. In an embodiment of the present application, the memory may include multiple memories, including a first memory and a second memory.

[0067] The input unit 130 can be used to receive input digital or character information, and generate key signal input related to the user settings and function control of the electronic device. The input unit 130 may include a touch screen 131 and other input devices 132. The touch screen 131 can collect the user's touch operations on or near it, and drive the corresponding connection device according to a pre-set program. For example, the touch operation may include the user using any suitable object or accessory such as a finger, a stylus, etc. to operate on or near the touch screen. Optionally, the other input devices 132 may include but are not limited to one or more of a physical keyboard, function keys, a trackball, a mouse, a joystick, etc. For example, the function keys include a volume control button, a power switch button, etc.

[0068] The display unit 140 can be used to display information input by the user or information provided to the user, as well as various menus of the electronic device. In one example, the display unit 140 may include a display screen 141, which may be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), or the like. Furthermore, the touch screen 131 may cover the display screen 141. When the touch screen 131 detects a touch operation on or near it, it transmits the information to the processor 170 to determine the type of touch event. The processor 170 then provides a corresponding visual output on the display screen 141 based on the type of touch event. Although the touch screen 131 and the display screen 141 are shown as two separate components to implement the input and output functions of the electronic device, in some embodiments, the touch screen 131 and the display screen 141 may be integrated to implement the input and output functions of the electronic device.

[0069] Sensor 150 may include one or more sensors for providing various status assessments for the electronic device. Specifically, sensor 150 may include a light sensor, which can be used in imaging applications, i.e., as a component of a camera or video camera. Sensor 150 may also include an accelerometer, a gyroscope, a magnetic sensor, a pressure sensor, or a temperature sensor. Sensor 150 can detect the acceleration / deceleration, orientation, open / closed state of the electronic device, relative positioning of components, or temperature changes of the electronic device.

[0070] The audio circuit 160, speaker, and microphone provide an audio interface between the user and the electronic device. The audio circuit 160 converts received audio data into electrical signals and transmits them to the speaker, which then converts them into sound signals for output. The microphone, on the other hand, converts collected sound signals into electrical signals, which are then received by the audio circuit 160 and converted into audio data. The audio data is then output to the RF circuit 110 for transmission to, for example, another mobile phone, or to the memory 120 for further processing.

[0071] The processor 170 is the control center of the electronic device. It uses various interfaces and lines to connect the various parts of the entire electronic device. By running or executing software programs and / or modules stored in the memory 120 and calling data stored in the memory 120, it performs various functions of the electronic device and processes data, thereby monitoring the electronic device as a whole. Optionally, the processor 170 may include one or more processing units, which may include but are not limited to: a central processing unit (CPU), a network processing unit (NPU), a graphics processing unit (GPU), an image signal processor (ISP), a tensor processing unit (TPU), a data processing unit (DPU), a digital signal processor (DSP), a microcontroller or a microprocessor, etc. Furthermore, the processor 170 may also include other hardware circuits or accelerators, such as an application specific integrated circuit (ASIC), a complex programmable logic device (CPLD) or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. Optionally, the processor 170 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a digital signal processor and a microprocessor, etc.

[0072] The electronic device may also include a power supply 180 (e.g., a battery) for supplying power to each component. The power supply 180 may be logically connected to the processor 170 through a power management system, thereby implementing functions such as managing charging, discharging, and power consumption management through the power management system. Optionally, the power management system may support both fast charging technology and non-fast charging technology. In actual applications, the power management system may charge the battery in the power supply 180 through fast charging technology, or may charge the battery in the power supply 180 through non-fast charging technology.

[0073] The electronic device may also include a wireless fidelity (WiFi) module, a Bluetooth module, etc., which will not be described in detail in the embodiments of the present application. Those skilled in the art will understand that the electronic device structure shown in the figure does not constitute a limitation of the electronic device, and may include more or fewer components than shown, or combine certain components, or arrange the components differently.

[0074] Figure 7 This is a flow chart of a display driving method provided in an embodiment of the present application. The method can be applied to a display device, the display device including a driving circuit and a display screen, the display screen including a first display area and a second display area adjacent to each other, and the method includes the following steps.

[0075] S201: The driving circuit outputs a data signal to the first display area and the second display area. The data signal is used to provide a holding voltage and a data voltage. The data voltage is used to provide data for the second display area. The holding voltage is used to hold data in the first display area. The data signal is converted to provide the data voltage at the first moment of the first holding frame.

[0076] The display screen may include multiple display areas with different refresh rates, and the multiple display areas may include at least a first display area and a second display area. The refresh rate of the first display area is lower than the refresh rate of the second display area, so that the refresh period of the first display area is longer than the refresh period of the second display area. For example, Figure 8 As shown in (a) in FIG. , the display may include two display areas, the refresh rate of the first display area is 60 Hz, and the refresh rate of the second display area is 120 Hz; or Figure 8 As shown in (b), the display may include three display areas, the refresh rates of the first display area and the third display area are both 60 Hz, the refresh rate of the second display area is 120 Hz, and the second display area is located between the first display area and the third display area.

[0077] In addition, the first display area and the second display area can operate in multiple refresh cycles, and the refresh cycle of the first display area is different from the refresh cycle of the second display area. For the convenience of description, any refresh cycle of the first display area is represented as the i-th refresh cycle of the first display area, and part of the refresh cycle of the second display area is represented as the j-th refresh cycle of the second display area, where i and j are positive integers. The value of i can be continuous, for example, the value of i can be 1, 2, 3, 4, 5, etc.; the value of j can be discontinuous, for example, the value of j can be 2, 3, 5, 6, etc. in sequence. The i-th refresh cycle of the first display area can include a write frame and at least one hold frame, and the j-th refresh cycle of the second display area can include a write frame. In this article, any hold frame of the i-th refresh cycle of the first display area is referred to as the first hold frame, and the write frame of the j-th refresh cycle of the second display area is referred to as the first write frame. The first write frame overlaps with the hold frame in timing, that is, the time period corresponding to the first write frame overlaps with the time period corresponding to the first hold frame. The j-th refresh period of the second display area may be a refresh period in which a writing frame in the refresh period of the second display area and a holding frame in the refresh period of the first display area overlap in timing.

[0078] Furthermore, the holding voltage provided by the data signal may be a low level, and the data voltage provided by the data signal may be a high level. In one example, the data signal may transition from providing the holding voltage to providing the data voltage, in which case the data signal may transition from a low level to a high level; the data signal may also transition from providing the data voltage to providing the holding voltage, in which case the data signal may transition from a high level to a low level.

[0079] In one possible embodiment, the driving circuit outputs multiple data signals to the first display area and the second display area. For example, the multiple data signals may include a data signal corresponding to each pixel column in a plurality of pixel columns corresponding to the first display area and the second display area. Each of the multiple data signals can be used to switch from providing the hold voltage to providing the data voltage in a first hold frame, and the data signal can switch to providing the data voltage at a first moment in the first hold frame. The data voltage provided by the data signal in the first hold frame is used to provide data for the second display area, and the hold voltage provided by the data signal in the first hold frame is used to maintain data in the first display area.

[0080] Optionally, the plurality of pixel rows in the pixel array included in the display screen can be divided into different display areas by row. Exemplarily, the first display area includes a plurality of first pixel rows, the second display area includes a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows.

[0081] S202: The driving circuit outputs a first selection signal to the second display area. The first selection signal jumps at the second moment of the first writing frame. The jump of the first selection signal is used to control the second display area to implement data writing in the first writing frame according to the data voltage. The first moment is earlier than the second moment.

[0082] Among them, the driving circuit can output different selection signals to different display areas, and can also output different selection signals to different areas of the same display area. The first selection signal can be the selection signal output by the driving circuit to the second display area; optionally, the first selection signal can be the selection signal corresponding to the area written first in the second display area; or, the first selection signal is the selection signal corresponding to the area in the second display area that is closer to the first display area. In one example, when the first display area includes multiple first pixel rows, the second display area includes multiple second pixel rows, and the multiple first pixel rows are located before the multiple second pixel rows, the first selection signal can be the selection signal corresponding to one or more second pixel rows written first in the multiple second pixel rows, or the first selection signal is the selection signal corresponding to one or more second pixel rows in the multiple second pixel rows that are closer to the first display area.

[0083] In addition, the jump of the first selection signal may refer to the first selection signal jumping from a high level to a low level, and the first selection signal will continue for a short period of time after the jump before returning to a high level; or the jump of the first selection signal may refer to the first selection signal jumping from a low level to a high level, and the first selection signal will continue for a short period of time after the jump before returning to a low level. In the embodiment of the present application, the jump of the first selection signal from a high level to a low level is used as an example for explanation. When data needs to be written to the second display area, the first selection signal will jump, and at this time, the area in the second display area that receives the first selection signal will realize data writing.

[0084] Optionally, the time difference between the first moment and the second moment is between 1 unit time and 100 unit time, where the unit time is the scanning time of a single pixel row. If the time difference is expressed as Δt and the unit time is expressed as H, then Δt>0 and is between 1H and 100H. In a possible example, the unit time H=1 second (s) / high refresh rate / number of rows of the display screen, where the high refresh rate may refer to the highest refresh rate corresponding to the display area in the display screen, for example, the high refresh rate may be 120Hz.

[0085] In one possible embodiment, the driver circuit outputs a first selection signal to the second display area. The first selection signal may change at a second moment in the first writing frame. The change in the first selection signal at the second moment may be used to control the second display area to write data according to the data voltage, that is, to write data to the second display area in the first writing frame. The first moment is earlier than the second moment, that is, the first moment when the driver circuit provides the data voltage is earlier than the second moment when the first selection signal changes.

[0086] Furthermore, before entering the first hold frame, the data signal can also provide data voltages in the write frame of the i-th refresh cycle of the first display area and in the write frame of the j-1-th refresh cycle of the second display area, respectively. The data voltages can be used to provide data for the first display area and the second display area. In addition, the drive circuit can also output a selection signal to the first display area, which can be used to control the first display area to write data according to the data voltage in the write frame of the i-th refresh cycle; the drive circuit can also output multiple selection signals to the second display area, which can be used to control the second display area to write data according to the data voltage in the write frame of the j-1-th refresh cycle. The write frame of the j-1-th refresh cycle is located within the write frame of the i-th refresh cycle.

[0087] In an embodiment of the present application, during the partition refresh process between the first display area and the second display area, for the hold frame within the i-th refresh cycle of the first display area, the driving circuit can provide the data voltage to the second display area in advance within the hold frame through the data signal, that is, the first moment when the data signal provides the data voltage within the hold frame is earlier than the second moment when the first selection signal jumps within the hold frame, so that the disturbance of the power supply signal VDD occurs before the data is written. In this way, the voltage of the power supply signal VDD can be restored to the normal voltage when the data is written, thereby solving the problem of bright lines appearing at the partition boundary between the first display area and the second display area during the partition refresh process. For example, Figure 9 (a) shows a waveform diagram of the data signal DA provided by the driving circuit to the first to third display areas of the display screen during the write frame and the hold frame of the i-th refresh cycle of the first display area. The refresh frequencies of the first and third display areas are the same and greater than the refresh frequency of the second display area. Figure 9 (b) shows the waveforms of the data signal DA, the power signal VDD, and the first selection signal S21 of the second display area.

[0088] Furthermore, for the write frame in any refresh cycle of the first display area, the data voltage is also used to provide data for the first display area, and the data signal is also converted to provide the data voltage before the write frame of the refresh cycle of the first display area. For example, the refresh cycle of the first display area can be the i-th refresh cycle of the first display area, or it can be the i+1-th refresh cycle of the first display area. The i+1-th refresh cycle of the first display area is used as an example for explanation below. Exemplarily, the i+1-th refresh cycle of the first display area includes a second write frame, and the second write frame can be a write frame after the first hold frame. The data voltage is also used to provide data for the first display area, and the data signal is also converted to provide the data voltage at a third moment before the second write frame. Combined with Figure 7 ,like Figure 10 As shown, the method further includes: S203.

[0089] S203: The driving circuit outputs a second selection signal to the first display area. The second selection signal jumps at the fourth moment of the second writing frame. The jump of the second selection signal is used to control the first display area to implement data writing in the second writing frame according to the data voltage. The third moment is earlier than the fourth moment.

[0090] The second selection signal may be a selection signal output by the drive circuit to the first display area; alternatively, the second selection signal may be a selection signal corresponding to the area written first in the first display area. In one example, when the first display area includes multiple first pixel rows and the second display area includes multiple second pixel rows, and the multiple first pixel rows are located before the multiple second pixel rows, the second selection signal may be a selection signal corresponding to a topmost first pixel row among the multiple first pixel rows.

[0091] In addition, the transition of the second selection signal may refer to the second selection signal transitioning from a high level to a low level, maintaining for a short period of time, and then returning to a high level. In the embodiment of the present application, when data needs to be written to the first display area, the second selection signal will transition, and the area of ​​the first display area that receives the second selection signal will implement data writing.

[0092] Optionally, the time difference between the third moment and the fourth moment is between 1 unit time and 100 unit time, where the unit time is the scanning duration of a single pixel row.

[0093] In one possible embodiment, the driver circuit outputs a data signal to the first display area and the second display at a third moment before the second writing frame, and then changes to provide the data voltage. The data voltage is used to provide data for the first display area. In addition, the driver circuit outputs a second selection signal to the second display. The second selection signal changes at a second moment in the fourth writing frame. The change of the second selection signal at this fourth moment can be used to control the first display area to implement data writing according to the data voltage, that is, to implement data writing to the first display area in the second writing frame. The third moment is earlier than the fourth moment, that is, the third moment when the driver circuit provides the data voltage is earlier than the fourth moment when the second selection signal changes.

[0094] Furthermore, when entering the second hold frame of the second write frame, the driver circuit can provide data signals and corresponding selection signals to the first display area and the second display area in a manner similar to the first hold frame. For a detailed description, please refer to the description of S201-S202 above, and this embodiment of the present application will not be repeated here.

[0095] For ease of understanding, the following Figure 8 The partition refresh scenario shown is through Figure 11 and Figure 12 The waveforms of multiple signals when the solution provided by the present invention is not adopted and the waveforms of multiple signals when the solution provided by the present application is adopted are described separately. The multiple signals may include a data signal DA, a power signal VDD, a selection signal S11 corresponding to the area first written in the first display area, and a selection signal S21 corresponding to the area first written in the second display area. For example, the area first written in the first display area is the first pixel row in the first display area, and the area first written in the second display area is the first pixel row in the second display area. S11 can be called the second selection signal, and S21 can be called the first selection signal.

[0096] The following Figure 11 and Figure 12 The illustration uses two adjacent refresh cycles in the first display area as an example, denoted as W1 and W2. The two refresh cycles in the first display area correspond to the four refresh cycles in the second display area. The figure shows the write frames and hold frames in the refresh cycles of the first display area, as well as the write frames in the refresh cycles of the second display area. The write frames in some refresh cycles of the second display area are denoted as high-frequency write frames, which overlap with the hold frames in the refresh cycles of the first display area. The figure denotes the first display area as Area 1, the second display area as Area 2, and the third display area as Area 3.

[0097] In one example, if the solution provided by this application is not adopted, Figure 8In the partition refresh scenario shown in (a) and (b), the waveforms of the above multiple signals are as follows Figure 11 (a) and Figure 12 As shown in (a) in the figure. The data signal DA is at a high level during the write frame of the refresh cycle W1 and changes from a low level to a high level during the hold frame or high-frequency write frame of the refresh cycle W1. The data signal DA is at a high level during the write frame of the refresh cycle W2 and changes from a low level to a high level during the hold frame or high-frequency write frame of the refresh cycle W2. The changes in the data signal DA occur when data is written to the second display area. The power supply signal VDD is at a high level during both the refresh cycle W1 and the refresh cycle W2, and a sudden change occurs due to disturbance during the process in which the data signal DA changes from a low level to a high level. The selection signal S11 jumps at the start of the write frame of the refresh cycle W1 and at the start of the write frame of the refresh cycle W2. The selection signal S21 jumps during the write frames of the refresh cycles W1 and W2, and the jump occurs when data is written to the second display area. The jump also occurs during the hold frame of the refresh cycles W1 and W2, and the jump is synchronized with the change in the data signal DA.

[0098] In another example, if the solution provided by this application is adopted, then Figure 8 In the partition refresh scenario shown in (a) and (b), the waveforms of the above multiple signals are as follows Figure 11 (b) and Figure 12 As shown in (b) in the figure, the data signal DA is at a high level during the write frame of the refresh cycle W1, changes from a low level to a high level at the first moment within the hold frame or high-frequency write frame of the refresh cycle W1, jumps to a high level at the third moment before the write frame of the refresh cycle W2, and changes from a low level to a high level at the fifth moment within the hold frame or high-frequency write frame of the refresh cycle W2; the power signal VDD is at a high level during both the refresh cycle W1 and the refresh cycle W2, and undergoes a sudden change due to disturbance during the process in which the data signal DA changes from a low level to a high level; the selection signal S11 jumps at the start moment of the write frame of the refresh cycle W1 and at the fourth moment before the write frame of the refresh cycle W2, with the third moment being earlier than the fourth moment; the selection signal S21 jumps during the write frames of the refresh cycles W1 and W2, and the jump occurs when data is written to the second display area, jumps at the second moment within the hold frame of the refresh cycle W1, and jumps at the sixth moment within the hold frame of the refresh cycle W2, with the first moment being earlier than the second moment, and the fifth moment being earlier than the sixth moment.

[0099] Optional, such as Figure 13As shown in (a), the data signal changes from providing the holding voltage to providing the data voltage, including at least one of the following: the data signal jumps from providing the holding voltage to providing the data voltage, the data signal changes from providing the holding voltage to providing the data voltage in a step-by-step manner, the data signal changes from providing the holding voltage to providing the data voltage in a linearly increasing manner, or the data signal changes from providing the holding voltage to providing the data voltage in an arc-increasing manner.

[0100] Similar, such as Figure 13 As shown in (b), the data signal changes from providing the data voltage to providing the holding voltage, including at least one of the following: the data signal jumps from providing the data voltage to providing the holding voltage, the data signal changes from providing the data voltage to providing the holding voltage in a step-by-step manner, the data signal changes from providing the data voltage to providing the holding voltage in a linearly increasing manner, or the data signal changes from providing the data voltage to providing the holding voltage in an arc-shaped increasing manner.

[0101] It is understood that in the embodiment of the present application, different refresh frequencies include 60Hz and 120Hz as an example. In actual applications, the different refresh frequencies can also be other values, and can also include three or more refresh frequencies. The embodiment of the present application does not impose specific restrictions on this. When the different refresh frequencies include three or more refresh frequencies, the first display area can be the display area with the lowest refresh frequency, and the second display area can be the display area with a higher refresh frequency. Optionally, each refresh cycle corresponding to the other refresh frequencies except the maximum refresh frequency among the different refresh frequencies can include a write frame and one or more hold frames.

[0102] In another possible embodiment of the present application, for the first refresh cycle of the first display area and the second refresh cycle of the second display area, the first refresh cycle of the first display area includes a hold frame, and the second refresh cycle of the second display area includes a first write frame, and the first write frame overlaps with the hold frame in timing. The method includes: the driving circuit outputs a data signal to the first display area and the second display area, the data signal is used to provide a hold voltage and a data voltage, the data voltage is used to provide data for the second display area, the hold voltage is used to hold the data of the first display area, and the data signal is converted to provide the data voltage at the first moment of the hold frame; the driving circuit outputs a first selection signal to the second display area, the first selection signal jumps at the second moment of the first write frame, and the jump of the first selection signal is used to control the second display area to implement data writing in the first write frame according to the data voltage, and the first moment is earlier than the second moment. Optionally, the first selection signal is the selection signal corresponding to the area written first in the second display area.

[0103] Optionally, the first refresh cycle of the first display area includes a second write frame, the data voltage is further used to provide data to the first display area, and the data signal is also changed to provide the data voltage at a third moment before the second write frame. The method further includes: the driving circuit outputs a second selection signal to the first display area, the second selection signal jumps at a fourth moment in the second write frame, and the jump of the second selection signal is used to control the first display area to implement data writing in the second write frame according to the data voltage, and the third moment is earlier than the fourth moment. Optionally, the second selection signal is the selection signal corresponding to the area written first in the first display area.

[0104] In an embodiment of the present application, during the partitioned refresh process of the first display area and the second display area, for the write frame within the refresh cycle of the first display area, the driving circuit can provide the first display area with a data voltage through the data signal before the write frame within the refresh cycle, that is, the moment when the data signal provides the data voltage is earlier than the moment when the second selection signal jumps in the write frame, so that the disturbance of the power supply signal VDD occurs before the data is written, so that the voltage of the power supply signal VDD can be restored to the normal voltage when the data is written, thereby solving the problem of a bright line appearing at the boundary of the first display area during the partitioned refresh process between the first display area and the second display area.

[0105] The above embodiments introduce the solutions provided by the embodiments of the present application from the perspective of the interaction between the driving circuit and the display screen in the display device. It is understandable that, in order to realize the above functions, the display device includes hardware structures and / or software modules corresponding to the execution of each function. It should be easily appreciated by those skilled in the art that, in combination with the units and algorithm steps of the various examples described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0106] In the embodiment of the present application, the functional modules of the display device can be divided according to the above method example. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one module. The above integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in the embodiment of the present application is schematic and is only a logical functional division. There may be other division methods in actual implementation. The following is an example of dividing each functional module according to each function.

[0107] In the case of an integrated unit, Figure 14 A schematic diagram of the structure of a display device involved in the above-mentioned embodiment is shown. The display device may include: a first drive unit 301 and a second drive unit 302 for driving the display screen. The first drive unit 301 may be used to support the device in executing S201 in the above-mentioned method embodiment; the second drive unit 302 may be used to support the device in executing S202 or S203 in the above-mentioned method embodiment. All relevant content of each step involved in the above-mentioned method embodiment can be referenced in the functional description of the corresponding functional module and will not be repeated in this embodiment of the present application.

[0108] Based on the hardware implementation, the first driving unit 301 and the second driving unit 302 in the embodiment of the present application may be a driving circuit, which can be used to drive the display screen. In the embodiment of the present application, the driving circuit can be used to support the display device to perform one or more steps S201-S203 in the above method embodiment. Optionally, Figure 15 As shown, the first driving unit 301 may be a DDIC, and the second driving unit 302 may be a GOA.

[0109] In another embodiment of the present application, an electronic device is further provided, which includes a processor and a display device; wherein the display device can be any display device provided above, used to execute the steps in the method embodiment provided above.

[0110] It can be understood that all relevant contents of each step involved in the above method embodiment can be referred to the embodiment of the starting device of the interface test and the embodiment of the communication device, and the embodiments of the present application will not be repeated here.

[0111] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules or units is merely a logical functional division. In actual implementation, other division methods may be used, such as combining or integrating multiple units or components into another device, or ignoring or not implementing certain features.

[0112] The units described as separate components may or may not be physically separate, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place or distributed in multiple places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0113] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. The readable storage medium may include: a USB flash drive, a mobile hard drive, a read-only memory, a random access memory, a magnetic disk, or an optical disk, etc., which can store program code. Based on this understanding, the technical solution of the embodiment of the present application, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product.

[0114] In another embodiment of the present application, a readable storage medium is also provided, which stores computer execution instructions. When a device (which may be a single-chip microcomputer, chip, etc.) or a processor executes the steps in the above method embodiment.

[0115] In another embodiment of the present application, a computer program product is provided, which includes computer instructions stored in a readable storage medium; at least one processor of the device can read the computer instructions from the readable storage medium, and at least one processor executes the computer instructions so that the device performs the steps in the above method embodiment.

[0116] Finally, it should be noted that the above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A display driving method, characterized in that: Applied to a display device including a drive circuit and a display screen, the display screen including a first display area and a second display area adjacent to each other, a refresh period of the first display area being greater than a refresh period of the second display area, a first refresh period of the first display area including a hold frame, a second refresh period of the second display area including a first write frame, the first write frame and the hold frame overlapping in timing, the method comprising: The driving circuit outputs a data signal to the first display area and the second display area, the data signal is used to provide a holding voltage and a data voltage, the data voltage is used to provide data for the second display area, the holding voltage is used to hold data in the first display area, and the data signal is transformed into providing the data voltage at a first moment of the holding frame; The driving circuit outputs a first selection signal to the second display area, and the first selection signal jumps at a second moment in the first writing frame. The jump of the first selection signal is used to control the second display area to implement data writing in the first writing frame according to the data voltage, and the first moment is earlier than the second moment.

2. The method according to claim 1, characterized in that The first selection signal is a selection signal corresponding to the area written first in the second display area.

3. The method according to claim 1 or 2, characterized in that The first display area includes a plurality of first pixel rows, the second display area includes a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows.

4. The method according to any one of claims 1 to 3, characterized in that The time difference between the first moment and the second moment is between 1 unit time and 100 unit time, where the unit time is the scanning duration of a single pixel row.

5. The method according to any one of claims 1 to 4, characterized in that The first refresh cycle of the first display area further includes a second writing frame, the data voltage is further used to provide data for the first display area, and the data signal is further transformed into providing the data voltage at a third moment before the second writing frame; the method further includes: The driving circuit outputs a second selection signal to the first display area, and the second selection signal jumps at a fourth moment in the second writing frame. The jump of the second selection signal is used to control the first display area to implement data writing in the second writing frame according to the data voltage, and the third moment is earlier than the fourth moment.

6. The method according to claim 5, characterized in that The second selection signal is a selection signal corresponding to the area written first in the first display area.

7. A display device, characterized in that: The device comprises a driving circuit and a display screen, wherein the display screen comprises a first display area and a second adjacent display area, wherein a refresh period of the first display area is greater than a refresh period of the second display area, wherein a first refresh period of the first display area comprises a hold frame, and a second refresh period of the second display area comprises a first write frame, wherein the first write frame and the hold frame overlap in timing; The driving circuit is configured to output a data signal to the first display area and the second display area, the data signal being configured to provide a hold voltage and a data voltage, the data voltage being configured to provide data for the second display area, the hold voltage being configured to hold data for the first display area, and the data signal being configured to provide the data voltage at a first moment of the hold frame; The driving circuit is also used to output a first selection signal to the second display area, and the first selection signal jumps at the second moment of the first writing frame. The jump of the first selection signal is used to control the second display area to write data according to the data voltage in the first writing frame, and the first moment is earlier than the second moment.

8. The device according to claim 7, characterized in that The first selection signal is a selection signal corresponding to the area written first in the second display area.

9. The device according to claim 7 or 8, characterized in that The first display area includes a plurality of first pixel rows, the second display area includes a plurality of second pixel rows, and the plurality of first pixel rows are located before the plurality of second pixel rows.

10. The device according to any one of claims 7 to 9, characterized in that: The time difference between the first moment and the second moment is between 1 unit time and 100 unit time, where the unit time is the scanning duration of a single pixel row.

11. The device according to any one of claims 7 to 10, characterized in that: The first refresh cycle of the first display area includes a second writing frame, the data voltage is further used to provide data for the first display area, and the data signal is further transformed into providing the data voltage at a third time before the second writing frame; The driving circuit is also used to output a second selection signal to the first display area, and the second selection signal jumps at a fourth moment in the second writing frame. The jump of the second selection signal is used to control the first display area to implement data writing in the second writing frame according to the data voltage, and the third moment is earlier than the fourth moment.

12. The device according to claim 11, characterized in that The second selection signal is a selection signal corresponding to the area written first in the first display area.

13. An electronic device, characterized in that: The electronic device includes a processor and a display device coupled to the processor, and the display device is the display device according to any one of claims 7 to 12.

14. A computer-readable storage medium, characterized in that The computer-readable storage medium stores instructions, and when the instructions are executed on a device, the device executes the display driving method according to any one of claims 1 to 6.

15. A computer program product, characterized in that The computer program product includes a computer program, and when the computer program is run on a device, the device is enabled to execute the display driving method according to any one of claims 1 to 6.

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