Switched capacitor nine-level power amplifier and its control and design method

Abstract

The application discloses a switched capacitor nine-level power amplifier and a control and design method thereof, comprising a direct current source, wherein the direct current source is electrically connected with a voltage boosting circuit, and the voltage boosting circuit is electrically connected with a polarity reversing circuit; the voltage boosting circuit is used for realizing voltage outputs of 0, 1 / 2E, E, 3 / 2E and 2E; the polarity reversing circuit is used for realizing polarity reversal of the output voltage, and E is an input voltage value of the direct current source. The voltage stress of all high-frequency switching devices is not greater than the input voltage, and the peak voltage stress is low; the number of output voltage levels can be controlled by using a modal control method of the topology structure; the topology has less high-frequency conversion switching devices of adjacent modes, and has lower switching loss.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of power supply in electrical engineering, and is a switching capacitor nine-level power amplifier with double voltage gain. BACKGROUND

[0002] With the transformation of global energy structure and the wide application of green energy, photovoltaic power generation as a clean and renewable energy is being applied more and more. However, the output voltage of the photovoltaic power generation system is relatively low, and direct current cannot be directly connected to the alternating current power grid. In order to enable the photovoltaic power generation system to meet the requirements of the power grid for voltage and power, the low-voltage direct current output by the photovoltaic system must be boosted and inverted.

[0003] At present, the domestic grid-connected system is mostly a two-stage converter structure composed of a DC-DC boost link and a DC-AC inversion link. The DC-AC converter usually adopts a multi-level inverter, including a diode clamped type, a flying capacitor type and a cascaded H-bridge type inverter structure. The diode clamped type multi-level inverter needs to use a large number of diodes, and the flying capacitor type multi-level inverter needs to use a large number of capacitors. The two topologies need to increase clamping devices and dividing capacitors to expand the output voltage level, and the control algorithm and modulation strategy are also more complex. The cascaded H-bridge type multi-level inverter needs multiple independent direct current power sources, and the application occasions are relatively limited. At the same time, the boost and inversion links of the two-stage DC-AC converter are relatively independent, so the efficiency and power density of the whole system are low, and the volume is large.

[0004] In order to overcome these problems, switching capacitor structure type power amplifiers have been widely applied. This kind of power amplifier can improve the output voltage gain through the series and parallel combination of capacitors and power supplies or capacitors and capacitors, reducing the DC-DC boost link. At the same time, the switching capacitor structure does not have magnetic elements such as inductors and transformers, so the power density and efficiency of the system are effectively improved. However, the existing switching capacitor power amplifiers usually have problems such as high peak voltage stress and high switching loss.

[0005] For example, the invention patent "Switching capacitor seven-level inverter topology with low voltage stress and its expansion structure" (publication number: CN116896282A, publication date: October 17, 2023) can realize self-balancing of capacitor voltage without auxiliary circuit, and the voltage stress of all switching tubes is not greater than the input voltage. However, it only realizes a seven-level output with one and a half times voltage boost through one voltage source and three capacitors, which is redundant. The "five-level switching capacitor inverter with double voltage gain" (publication number: CN116961453A, publication date: October 27, 2023) can realize a five-level output with double voltage boost, but the switching action frequency of the switching tubes is high when generating multi-level, and the switching loss is high. SUMMARY

[0006] The application provides a switch capacitor nine-level power amplifier with double voltage gain and a control and design method thereof.

[0007] To achieve the above object, the application adopts the technical scheme of:

[0008] A switch capacitor nine-level power amplifier comprises a DC source, the DC source is electrically connected with a voltage boosting circuit, and the voltage boosting circuit is electrically connected with a polarity inversion circuit. The voltage boosting circuit is used to realize voltage outputs of 0, 1 / 2E, E, 3 / 2E and 2E. The polarity inversion circuit is used to realize polarity inversion of the output voltage. E is the input voltage value of the DC source.

[0009] The voltage boosting circuit comprises a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube, a first diode, a second diode, a third diode, a fourth diode, a first energy storage capacitor and a second energy storage capacitor.

[0010] The drain of the first switch tube and the anode of the first diode are electrically connected with the anode of the DC source. The source of the second switch tube and the cathode of the second diode are electrically connected with the cathode of the DC source.

[0011] The source of the first switch tube is electrically connected with the drain of the third switch tube and one end of the first energy storage capacitor. The other end of the first energy storage capacitor is electrically connected with the cathode of the first diode and the drain of the fourth switch tube.

[0012] The drain of the second switch tube is electrically connected with the source of the third switch tube, one end of the second energy storage capacitor, the anode of the third diode and the cathode of the fourth diode. The other end of the second energy storage capacitor is electrically connected with the anode of the second diode and the source of the fifth switch tube.

[0013] Further improvement, the polarity inversion circuit comprises a first switch tube, a second switch tube, a third switch tube and a fourth switch tube.

[0014] The drain of the first switch tube and the drain of the third switch tube are electrically connected with the source of the fourth switch tube and the cathode of the third diode.

[0015] The source of the second switch tube and the source of the fourth switch tube are electrically connected with the drain of the fifth switch tube and the anode of the fourth diode.

[0016] The source of the first switch tube is electrically connected with the drain of the second switch tube and the anode of the load. The source of the third switch tube is electrically connected with the drain of the fourth switch tube and the cathode of the load.

[0017] Further improvement, the switch tube used by the boost circuit and the polarity reversal circuit is a wide band gap device.

[0018] A design method of the switch capacitor nine-level power amplifier, the switch capacitor nine-level power amplifier is as described above, the design method is as follows: first, the maximum discharge interval of the energy storage capacitor two and the energy storage capacitor one is obtained; the maximum discharge interval is the interval between the two charging states of the adjacent output maximum current; taking a period for analysis, it is confirmed that the maximum discharge of the energy storage capacitor two and the energy storage capacitor one respectively appears in the level period and period; according to the calculation that the capacitor voltage fluctuation does not exceed 10%, the capacitance value range of the energy storage capacitor two and the energy storage capacitor one is obtained.

[0019] Further improvement, the capacitance value of the energy storage capacitor two satisfies:

[0020]

[0021] The capacitance value of the energy storage capacitor one satisfies:

[0022]

[0023] wherein, is the frequency of the modulation wave, is the output current, is the maximum discharge of the energy storage capacitor two, is the maximum discharge of the energy storage capacitor one;

[0024] , is the angular frequency, is the time.

[0025] A control method of the switch capacitor nine-level power amplifier, the switch capacitor nine-level power amplifier is as claimed in claim 2 or 3, the specific steps are as follows:

[0026] If , at this time, it is mode one: the output is high-frequency square wave of SC 1: off, SC 2: off, SC 3: on, SC 4: on, SC 5: off S 1: on, S 2: off, S 3: , S 4: ;

[0027] If , at this time is the mode two: output is high frequency square wave, SC 1: off, SC 2: off, SC 3: on, SC 4: on, SC 5: , S 1: on, S 2: off, S 3: off, S 4: on;

[0028] If , at this time is the mode three: output is high frequency square wave, SC 1: off, SC 2: , SC 3: , SC 4: on, SC 5: on, S 1: on, S 2: off, S 3: off, S 4: on;

[0029] If , at this time is the mode four: output is high frequency square wave, SC 1: , SC 2: on, SC 3: off, SC 4: on, SC 5: on, S 1: on, S 2: off, S 3: off, S 4: on;

[0030] If , at this time is the mode five: output is high frequency square wave, SC 1: off, SC 2: off, SC 3: on, SC 4: off, SC 5: on, S 1: off, S 2: on, S 3: , S 4: ;

[0031] If at this time is mode six: the output is a high frequency square wave of SC 1: off, SC 2: off, SC 3: on, SC 4: , SC 5: on, S 1: off, S 2: on, S 3: on, S 4: off;

[0032] if at this time is mode seven: the output is a high frequency square wave of SC 1: , SC 2: off, SC 3: , SC 4: on, SC 5: on, S 1: off, S 2: on, S 3: on, S 4: off;

[0033] if at this time is mode eight: the output is a high frequency square wave of SC 1: on, SC 2: , SC 3: off, SC 4: on, SC 5: on, S 1: off, S 2: on, S 3: on, S 4: off;

[0034] wherein, is a modulated wave, S 1~4 are first~fourth switch tubes respectively, S 1~5 are switch tube one~five respectively; SC is a triangular carrier wave with different amplitudes. Figure 1 Further improvements, the amplitude is

[0035] , the amplitude is , the amplitude is , the amplitude is ,​​​ amplitude is , amplitude is , amplitude is , amplitude is , amplitude is 。

[0036] further improvement, wherein is the modulation degree, is the angular frequency.

[0037] Compared with the prior art, the application has the beneficial effects that:

[0038] (1) The voltage stress of all high-frequency switching devices of the topology structure is not greater than the input voltage, and the peak voltage stress is low.

[0039] (2) The number of output voltage levels can be controlled by using the modal control method of the topology structure.

[0040] (3) The topology has fewer switching devices for adjacent modal high-frequency conversion, and has lower switching loss. BRIEF DESCRIPTION OF DRAWINGS

[0041] Figure 2 The application provides a switching capacitor nine-level power amplifier topology structure with voltage stress balancing.

[0042] Figure 3a The application provides a switching capacitor nine-level power amplifier control modal diagram with voltage stress balancing.

[0043] Figure 3b is the modulation principle diagram of modal one.

[0044] Figure 3c is the modulation principle diagram of modal two.

[0045] Figure 3d is the modulation principle diagram of modal three.

[0046] Figure 3e is the modulation principle diagram of modal four.

[0047] Figure 3f is the modulation principle diagram of modal five.

[0048] Figure 3g is the modulation principle diagram of modal six.

[0049] Figure 3h is the modulation principle diagram of modal seven.

[0050] Figure 4 Modulation principle diagram for mode eight.

[0051] Figure 5 The present application provides a switch capacitor nine-level power amplifier output voltage and output current waveform diagram with voltage stress balance.

[0052] Figure 6 The present application provides a switch capacitor nine-level power amplifier capacitor voltage waveform diagram with voltage stress balance.

[0053] Figure 1 The present application provides a switch capacitor nine-level power amplifier different output voltage level waveform diagram with voltage stress balance. DETAILED DESCRIPTION

[0054] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme of the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the present application.

[0055] As shown in SC , the switch capacitor nine-level power amplifier with double voltage gain provided by the present application is composed of a DC source (voltage E ), two capacitors C 1, C 2, nine switch tubes S 1, S 2, S 3, S 4, SC 1, SC 2, SC 3, SC 4 and SC 5, four diodes D 1, D 2, D 3 and D 4. Among them, five switch tubes SC 1, SC 2, SC 3, SC 4, SC 5 and four diodes D 1, D 2, D 3, D 4 constitute a boost circuit, which can realize 0, 1 / 2 E , E , 3 / 2E and 2 E voltage output; S 1、 S 2、 S 3 and S 4 constitute a polarity inversion circuit, and the polarity of the output voltage can be inverted. In this embodiment, the switching devices S 1~ S 4 and SC 1~ Figure 2 5 are wide-bandgap devices.

[0056] The switching state of the nine-level power amplifier with voltage stress balancing provided by the application at different levels includes: the switching state of the topology at different levels is shown in the following table, wherein "1" indicates that the switch is turned on, and "0" indicates that the switch is turned off. The states of the three capacitors in the topology at each level are also shown in the table.

[0057]

[0058] The modulation principle and control process of the nine-level power amplifier with voltage stress balancing provided by the application include:

[0059] Modulation principle: as shown in Figure 3a , the modulation process of the topology is divided into eight modes, and the expression of the modulation wave is , wherein is the modulation degree, is the angular frequency. The eight triangular carriers are (amplitude ), (amplitude ), (amplitude ), (amplitude ), (amplitude ), (amplitude ), (amplitude ), and (amplitude ).

[0060] The expressions of , and are as follows:

[0061] (1)

[0062] , , Each corresponds to a different voltage level.

[0063] Control process: such as SC Shown if At this point, it is mode one: the output is High-frequency square wave, SC 1: Shut down SC 2: Shut down SC 3: Conductivity SC 4: Conductivity Figure 3b 5: Turn off S 1: Conductivity S 2: Shut down S 3: , S 4: ;

[0064] like SC like At this point, it is mode two: the output is High-frequency square wave, SC 1: Shut down SC 2: Shut down SC 3: Conductivity SC 4: Conductivity Figure 3c 5: , S 1: Conductivity S 2: Shut down S 3: Shut down S 4: Conductivity;

[0065] like SC like At this point, it is mode three: the output is High-frequency square wave, SC 1: Shut down SC 2: , SC 3: , SC 4: Conductivity Figure 3d 5: Conductivity S 1: Conductivity S 2: Shut down S 3: Shut down S 4: Conductivity;

[0066] like SC like At this point, it is mode four: the output is High-frequency square wave, SC 1: , SC 2: Conductivity SC 3: Shut down SC4: on, Figure 3e 5: on, S 1 : on, S 2: off, S 3: off, S 4: on;

[0067] As SC If , at this time is the modal five: output is high frequency square wave, SC 1 : off, SC 2: off, SC 3: on, SC 4: off, Figure 3f 5: on, S 1 : off, S 2: on, S 3: , S 4: ;

[0068] As SC If , at this time is the modal six: output is high frequency square wave, SC 1 : off, SC 2: off, SC 3: on, SC 4: , Figure 3g 5: on, S 1 : off, S 2: on, S 3: on, S 4: off;

[0069] As SC If , at this time is the modal seven: output is high frequency square wave, SC 1 : , SC 2: off, SC 3: , SC 4: on, Figure 3h 5: on, S 1 : off, S 2: on, S 3: on, S 4: off;

[0070] As SC If , at this time is the modal eight: output is high frequency square wave, SC 1 : on, SC2: , SC 3: Shut down SC 4: Conductivity Figure 4 5: Conductivity S 1: Shut down S 2: Conductivity S 3: Conductivity S 4: Turn off.

[0071] This invention provides a method for calculating the capacitance value of a nine-level power amplifier with voltage stress equalization using switched capacitors, including an energy storage capacitor. , .

[0072] Taking a nine-level stepped waveform output as an example, the capacitance value is calculated. The maximum voltage ripple of the capacitor occurs during the time interval of maximum discharge, so the maximum discharge interval of the switched capacitor should be between two charging states with maximum output current. Taking one cycle for analysis, the capacitance... Maximum discharge It should appear at the level During this period, it can be calculated using the following formula:

[0073] (2)

[0074] In the formula The frequency of the modulated wave, This is for the output current. From an engineering application perspective, it is generally required that the capacitor voltage fluctuation does not exceed 10%. (Capacitor) The expected voltage is equal to Its capacitance value should satisfy the following formula:

[0075] (3)

[0076] Similarly, capacitors Maximum discharge Appeared Maximum discharge during continuous operation It can be calculated using the following formula:

[0077] (4)

[0078] capacitance The expected voltage is equal to Its capacitance value should satisfy the following formula:

[0079] (5)

[0080] like Figure 4As shown, a nine-level power amplifier with voltage stress equalization using switched capacitors, designed based on this invention, is simulated using PLECS software. The DC source voltage is... The load is As can be seen from the nine-level output voltage and current waveforms in the figure, the simulation results are consistent with the theoretical analysis. Figure 5 As shown, the capacitor in a nine-level power amplifier with voltage stress equalization using switched capacitors designed based on this invention is... , Both methods can achieve capacitor voltage charging and discharging balance during the switching cycle, and the capacitor voltage stress does not exceed the DC source voltage.

[0081] like ​ As shown, a nine-level power amplifier with voltage stress equalization using switched capacitors, designed based on this invention, can output different voltage levels. Different voltage levels correspond to different numbers of output levels.

[0082] Based on the above theoretical analysis and simulation, it can be seen that the nine-level power amplifier with voltage stress balancing designed in this invention has advantages such as achieving a nine-level output with a voltage boost of 2x, ensuring that the voltage stress of all high-frequency switching devices is no greater than the input voltage, and low switching losses. Furthermore, the modal control method using this topology can control the number of output voltage levels.

[0083] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A switched-capacitor nine-level power amplifier, comprising a direct current source, the direct current source being electrically connected with a voltage boosting circuit, the voltage boosting circuit being electrically connected with a polarity flipping circuit; characterized in that, The boost circuit is used to realize voltage outputs of 0, 1 / 2E, E, 3 / 2E and 2E; the polarity inversion circuit is used to realize polarity inversion of the output voltage, E is an input voltage value of a direct current source; The boost circuit comprises a switch tube one, a switch tube two, a switch tube three, a switch tube four, a switch tube five, a diode one, a diode two, a diode three, a diode four, an energy storage capacitor one and an energy storage capacitor two; The drain of the switch tube one and the anode of the diode one are electrically connected to the anode of the direct current source; the source of the switch tube two and the cathode of the diode two are electrically connected to the cathode of the direct current source; The source of the switch tube one is electrically connected to the drain of the switch tube three and one end of the energy storage capacitor one; the other end of the energy storage capacitor one is electrically connected to the cathode of the diode one and the drain of the switch tube four; The drain of the switch tube two is electrically connected to the source of the switch tube three, one end of the energy storage capacitor two, the anode of the diode three and the cathode of the diode four, and the other end of the energy storage capacitor two is electrically connected to the anode of the diode two and the source of the switch tube five; the polarity inversion circuit comprises a first switch tube, a second switch tube, a third switch tube and a fourth switch tube; The drain of the first switch tube and the drain of the third switch tube are electrically connected to the source of the switch tube four and the cathode of the diode three; The source of the second switch tube and the source of the fourth switch tube are electrically connected to the drain of the switch tube five and the anode of the diode four; The source of the first switch tube is electrically connected to the drain of the second switch tube and the anode of the load, and the source of the third switch tube is electrically connected to the drain of the fourth switch tube and the cathode of the load.

2. The switched-capacitor nine-level power amplifier of claim 1, wherein, The switch tubes used in the boost circuit and the polarity inversion circuit are all wide band gap devices.

3. A design method of a switched-capacitor nine-level power amplifier, characterized by, The switch capacitor nine-level power amplifier as claimed in claim 1 or 2, the design method is as follows: first, the maximum discharge interval of the storage capacitor two and the storage capacitor one is obtained; the maximum discharge interval is the interval between the two charging states of the adjacent maximum output current; taking a period for analysis, it is confirmed that the maximum discharge of the storage capacitor two and the storage capacitor one respectively occurs in the period and ; according to the calculation that the capacitor voltage fluctuation does not exceed 10%, the capacitance range of the storage capacitor two and the storage capacitor one is obtained.

4. The design method of a switched-capacitor nine-level power amplifier of claim 3, wherein, The capacitance of the energy storage capacitor two satisfies: ； The capacitance of the energy storage capacitor satisfies: ； wherein, is the frequency of the modulation wave, is the output current, is the maximum discharge amount of the energy storage capacitor two, is the maximum discharge amount of the energy storage capacitor one; , is the angular frequency, is the time.

5. A control method of a switched-capacitor nine-level power amplifier, characterized by, The specific steps of the switch capacitor nine-level power amplifier are as follows: If , then the output is a high frequency square wave of , SC 1: off, SC 2: off, SC 3: on, SC 4: on, SC 5: off S 1: on, S 2: off, S 3: , S 4: . If , then the output is a high frequency square wave of , SC 1 : off, SC 2 : off, SC 3 : on, SC 4 : on, SC 5 : , S 1 : on, S 2 : off, S 3 : off, S 4 : on; If , then the output is a high frequency square wave of , SC 1: off, SC 2: , SC 3: , SC 4: on, SC 5: on, S 1: on, S 2: off, S 3: off, S 4: on; If , then the output is a high frequency square wave of SC 1: , SC 2: on, SC 3: off, SC 4: on, SC 5: on, S 1: on, S 2: off, S 3: off, S 4: on. If , then the output is a high frequency square wave of , SC 1: off, SC 2: off, SC 3: on, SC 4: off, SC 5: on, S 1: off, S 2: on, S 3: , S 4: . If , then the mode is six: the output is a high frequency square wave, SC 1 : off, SC 2 : off, SC 3 : on, SC 4: , SC 5 : on, S 1 : off, S 2 : on, S 3 : on, S 4 : off;​ If This is mode seven: the output is -3 / 2 E ~- E a high frequency square wave, SC 1: 、 SC 2: off, SC 3: 、 SC 4: on, SC 5: on, S 1: off, S 2: on, S 3: on, S 4: off; If at this time is the mode eight: output is high frequency square wave, SC 1: on, SC 2: , SC 3: off, SC 4: on, SC 5: on, S 1: off, S 2: on, S 3: on, S 4: off; wherein, is a modulating wave, S 1 S 4 are first to fourth switching tubes, respectively, SC 1 SC 5 are first to fifth switching tubes, respectively; are triangular carrier waves having different amplitudes.

6. The control method of the switch capacitor nine-level power amplifier according to claim 5, characterized in that, amplitude is , amplitude is , amplitude is , amplitude is , amplitude is , amplitude is , amplitude is , amplitude is 。 7. The control method of the switched-capacitor nine-level power amplifier of claim 5, wherein, wherein is the modulation, is the angular frequency.

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