Graph correction method, storage medium and storage terminal

By removing vertex regions from the initial pattern to be corrected, a pattern to be corrected that meets the mask constraints is generated, and optical proximity effect correction is performed, solving the problem of corner-to-corner pattern correction and improving pattern accuracy and manufacturing process accuracy.

CN120833282APending Publication Date: 2025-10-24SEMICON MFG INT (SHANGHAI) CORP
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Patent Information

Application Number
CN202410461168.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-04-16
Publication Date
2025-10-24

AI Technical Summary

Technical Problem

In the process of optical proximity effect correction, the process window for corner-to-corner patterns is small, and it is difficult to achieve good correction results by balancing the mask constraint rules and edge placement error control.

Method used

By removing vertex regions from the initial image to be corrected, ensuring that the spacing between adjacent images meets the mask constraint rules, Boolean operations are used to generate the image to be corrected, and optical proximity effect correction is performed.

Benefits of technology

This improves the accuracy of the graphics, ensuring that the corrected graphics meet the mask constraints and edge placement error requirements, and reduces graphics errors in the manufacturing process.

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Abstract

The invention discloses a graph correction method, a storage medium and a storage terminal.The graph correction method comprises the steps that a to-be-corrected layout is provided, and the to-be-corrected layout comprises a plurality of initial to-be-corrected graphs; a first initial to-be-corrected graph and a second initial to-be-corrected graph are obtained from the multiple initial to-be-corrected graphs, and the projection of the first initial to-be-corrected graph and the projection of the second initial to-be-corrected graph in the first direction and the projection of the second initial to-be-corrected graph in the second direction do not coincide; the first direction is perpendicular to the second direction, the first direction and the second direction are parallel to the surface of the to-be-corrected layout, the first initial to-be-corrected graph is provided with a first vertex, the second initial to-be-corrected graph is provided with a second vertex, and the first vertex is opposite to the second vertex; part of the initial to-be-corrected graph is removed, to-be-corrected graphs are generated, the removed area of the initial to-be-corrected graph comprises one or two of a first vertex and a second vertex, and the distance between every two adjacent to-be-corrected graphs meets the requirement of a mask limiting rule; and performing optical proximity effect correction on the to-be-corrected pattern. According to the graph correction method, the precision of the graph is improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, and in particular to a pattern correction method, a storage medium and a storage terminal. BACKGROUND

[0002] In the generated mask pattern, it is almost inevitable to have corner-to-corner patterns. Due to the design size reduction and the increase of precision requirement, for the corner-to-corner patterns, especially the point touch pattern, the process window is very small, and in the optical proximity effect correction process, the trade-off between the mask rule constraint (MRC) and the edge placement error (EPE) control becomes more difficult.

[0003] Therefore, it is necessary to improve the process of the optical proximity effect correction of the corner-to-corner pattern to obtain a better correction result. SUMMARY

[0004] The present application solves the technical problem of providing a pattern correction method, a storage medium and a storage terminal to improve the process of the optical proximity effect correction of the corner-to-corner pattern.

[0005] To solve the above technical problem, the technical scheme of the present application provides a pattern correction method, comprising: providing a to-be-corrected layout, the to-be-corrected layout comprising a plurality of initial to-be-corrected patterns; obtaining a first initial to-be-corrected pattern and a second initial to-be-corrected pattern from the plurality of initial to-be-corrected patterns, the projections of the first initial to-be-corrected pattern and the second initial to-be-corrected pattern in a first direction and a second direction are not coincident, the first direction and the second direction are perpendicular to each other and parallel to the surface of the to-be-corrected layout, the first initial to-be-corrected pattern has a first vertex, the second initial to-be-corrected pattern has a second vertex, and the first vertex and the second vertex are opposite; removing part of the initial to-be-corrected patterns to generate a to-be-corrected pattern, the removal area of the initial to-be-corrected pattern includes one or both of the first vertex and the second vertex, and the spacing between adjacent to-be-corrected patterns meets the requirement of the mask rule constraint; and performing optical proximity effect correction on the to-be-corrected pattern.

[0006] Optionally, the mask rule constraint comprises: the spacing between adjacent patterns is at least greater than or equal to a preset value; the first vertex and the second vertex have a first spacing, and the first spacing is smaller than the preset value.

[0007] Optionally, the removal area of the initial to-be-corrected graph includes a first vertex, the removing part of the initial to-be-corrected graph includes removing part of the first initial to-be-corrected graph, the shape of the removal area of the first initial to-be-corrected graph includes a first triangle, the first vertex is a vertex of the first triangle, and the first triangle has a first height.

[0008] Optionally, the sum of the first height and the first interval is greater than or equal to the preset value.

[0009] Optionally, the first triangle includes an isosceles right triangle.

[0010] Optionally, the removal area of the initial to-be-corrected graph includes a second vertex, the removing part of the initial to-be-corrected graph includes removing part of the second initial to-be-corrected graph, the shape of the removal area of the second initial to-be-corrected graph includes a second triangle, the second vertex is a vertex of the second triangle, and the second triangle has a second height.

[0011] Optionally, the sum of the second height and the first interval is greater than or equal to the preset value.

[0012] Optionally, the second triangle includes an isosceles right triangle.

[0013] Optionally, the removal area of the initial to-be-corrected graph includes a first vertex and a second vertex, the removing part of the initial to-be-corrected graph includes removing part of the first initial to-be-corrected graph and part of the second initial to-be-corrected graph, the shape of the removal area of the first initial to-be-corrected graph includes a first triangle, the first vertex is a vertex of the first triangle, the first triangle has a first height, the shape of the removal area of the second initial to-be-corrected graph includes a second triangle, the second vertex is a vertex of the second triangle, and the second triangle has a second height.

[0014] Optionally, the sum of the first height, the second height, and the first interval is greater than or equal to the preset value.

[0015] Optionally, the first height and the second height are equal.

[0016] Optionally, the first triangle includes an isosceles right triangle; and the second triangle includes an isosceles right triangle.

[0017] Optionally, the removing part of the initial to-be-corrected graph includes removing part of the first initial to-be-corrected graph, so that the first initial to-be-corrected graph forms a first to-be-corrected graph, the removal area of the first initial to-be-corrected graph includes the first vertex, and the to-be-corrected graph includes the first to-be-corrected graph and a second initial to-be-corrected graph.

[0018] Optionally, the removing part of the initial to-be-corrected pattern comprises: removing part of the second initial to-be-corrected pattern, so that the second initial to-be-corrected pattern forms a second to-be-corrected pattern, and a removal area of the second initial to-be-corrected pattern comprises the second vertex; and the to-be-corrected pattern comprises the second to-be-corrected pattern and the first initial to-be-corrected pattern.

[0019] Optionally, the removing part of the initial to-be-corrected pattern comprises: removing part of the first initial to-be-corrected pattern, so that the first initial to-be-corrected pattern forms a first to-be-corrected pattern, and a removal area of the first initial to-be-corrected pattern comprises the first vertex; removing part of the second initial to-be-corrected pattern, so that the second initial to-be-corrected pattern forms a second to-be-corrected pattern, and a removal area of the second initial to-be-corrected pattern comprises the second vertex; and the to-be-corrected pattern comprises the first to-be-corrected pattern and the second to-be-corrected pattern.

[0020] Optionally, the removing part of the initial to-be-corrected pattern to generate the to-be-corrected pattern comprises: extracting a removal area of the initial to-be-corrected pattern by using a Boolean operation method; and removing the removal area to generate the to-be-corrected pattern.

[0021] Optionally, the optical proximity correction on the to-be-corrected pattern comprises: providing a to-be-corrected model; and performing optical proximity correction on the to-be-corrected pattern according to the to-be-corrected model to generate a corrected layout, wherein the corrected layout comprises a plurality of corrected patterns, and each of the corrected patterns corresponds to one of the to-be-corrected patterns.

[0022] Correspondingly, the present application also provides a storage medium having computer instructions stored thereon, wherein the computer instructions perform the steps of the above method when executed.

[0023] Correspondingly, the present application also provides a storage terminal comprising a memory and a processor, wherein the memory has computer instructions stored thereon that can be executed on the processor, and the processor performs the steps of the above method when executing the computer instructions.

[0024] Compared with the prior art, the technical scheme of the present application has the following beneficial effects:

[0025] The pattern correction method of the present application removes the area comprising one or both of the first vertex and the second vertex in the initial to-be-corrected pattern, so that the spacing between adjacent to-be-corrected patterns meets the requirements of mask limitation rules, and thus the corrected pattern obtained after the subsequent correction of the to-be-corrected pattern can meet the mask limitation rules (MRC) and the edge placement error (EPE) requirements, so that the wafer pattern obtained in the subsequent manufacturing process has a smaller error with the design pattern, and the precision of the pattern is improved.

[0026] Further, the first height and the second height are equal, the first triangle comprises an isosceles right triangle, and the second triangle comprises an isosceles right triangle, so that the length of the right angle side of the first triangle is equal to the length of the right angle side of the second triangle, and the first initial to-be-corrected pattern and the second initial to-be-corrected pattern are cut in the same area, so that the process of removing part of the initial to-be-corrected pattern is more simplified, operation is facilitated, and the calculation efficiency can be improved. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 and Figure 2 is a structural schematic diagram of a pattern correction process in an embodiment;

[0028] Figure 3 is a scanning electron microscope schematic diagram after the corrected pattern is transferred to a wafer in an embodiment;

[0029] Figure 4 is a flowchart of a pattern correction method in an embodiment of the present application;

[0030] Figures 5 to 7 is a structural schematic diagram of a pattern correction process in an embodiment of the present application. DETAILED DESCRIPTION

[0031] As described in the background, the process of optical proximity correction of corner-to-corner patterns needs to be improved to obtain better correction results. Now, specific embodiments will be analyzed and described.

[0032] Figure 1 and Figure 2 is a structural schematic diagram of a pattern correction process in an embodiment; Figure 3 is a scanning electron microscope schematic diagram after the corrected pattern is transferred to a wafer in an embodiment.

[0033] Please refer to Figure 1 , a to-be-corrected layout 100 is provided, the to-be-corrected layout 100 comprises a first to-be-corrected pattern 101 and a second to-be-corrected pattern 102, projections of the first to-be-corrected pattern 101 and the second to-be-corrected pattern 102 do not coincide in a first direction and a second direction, the first direction and the second direction are parallel to the to-be-corrected layout 100, and the first direction and the second direction are perpendicular to each other, and top corners of the first to-be-corrected pattern 101 and the second to-be-corrected pattern 102 are opposite (as shown in region A).

[0034] Please refer to Figure 2 , optical proximity correction is performed on the first to-be-corrected pattern 101 and the second to-be-corrected pattern 102, so that the first to-be-corrected pattern 101 is generated as a first corrected pattern 103, and the second to-be-corrected pattern 102 is generated as a second corrected pattern 104.

[0035] Currently, there are two methods to deal with the top corner opposite pattern as shown in Figure 1 , (1) freeze the edge line of the top corner area, and do not move in the correction; (2) retract the edge line of the top corner area inward, without considering the influence of the edge placement error. Since the correction mode of the node after the shrinkage becomes more complex, both of the two methods have their own limitations in accuracy and implementation. For method (1), it violates the mask restriction rule (MRC), which is not friendly to mask proximity correction (MPC) and mask manufacturing, and in addition, it also causes mask detection failure. For method (2), please refer to Figure 3 , Figure 3 , the first pattern 105 is the pattern of the first correction pattern 103 transferred to the wafer, Figure 3 , the second pattern 106 is the pattern of the second correction pattern 104 transferred to the wafer, the edge line of the top corner area moves inward, although it satisfies the mask restriction rule and obtains the mask manufacturing process window, as shown by the arrow area in Figure 3 , however, it cannot meet the requirement of the edge placement error, so that the pattern after the correction is transferred to the wafer in Figure 3 is quite different from the design.

[0036] In order to solve the above problems, the technical scheme of the present application provides a pattern correction method, a storage medium and a storage terminal. The region including one or both of the first vertex and the second vertex in the initial to-be-corrected pattern is removed, so that the spacing between the adjacent to-be-corrected patterns satisfies the requirement of the mask restriction rule, so that after the to-be-corrected pattern is corrected subsequently, the obtained corrected pattern can satisfy the mask restriction rule (MRC) and the requirement of the edge placement error (EPE), so that the wafer pattern obtained in the subsequent manufacturing process has a smaller error from the design pattern, and the precision of the pattern is improved.

[0037] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0038] Figure 4 is a flowchart of the pattern correction method in the embodiments of the present application; Figures 5 to 7 is a structural schematic diagram of the pattern correction process in the embodiments of the present application.

[0039] Please refer to Figure 4 , the pattern correction method comprises:

[0040] Step S10: providing a to-be-corrected layout, the to-be-corrected layout comprising a plurality of initial to-be-corrected patterns;

[0041] Step S20: obtaining a first initial to-be-corrected pattern and a second initial to-be-corrected pattern from a plurality of initial to-be-corrected patterns, projections of the first initial to-be-corrected pattern and the second initial to-be-corrected pattern in a first direction and a second direction do not coincide, the first direction and the second direction are perpendicular to each other and parallel to the surface of the to-be-corrected mask, the first initial to-be-corrected pattern has a first vertex, the second initial to-be-corrected pattern has a second vertex, the first vertex and the second vertex are opposite;

[0042] Step S30: removing part of the initial to-be-corrected pattern to generate a to-be-corrected pattern, the removed area of the initial to-be-corrected pattern includes one or both of the first vertex and the second vertex, and the spacing between adjacent to-be-corrected patterns meets the requirements of mask limiting rules;

[0043] Step S40: performing optical proximity correction on the to-be-corrected pattern.

[0044] The pattern correction method removes the area including one or both of the first vertex and the second vertex in the initial to-be-corrected pattern, so that the spacing between adjacent to-be-corrected patterns meets the requirements of mask limiting rules, so that the corrected pattern obtained after subsequent correction of the to-be-corrected pattern can meet the mask limiting rules (MRC) and the edge placement error (EPE) requirements, so that the wafer pattern obtained in the subsequent manufacturing process has a smaller error with the design pattern, and the precision of the pattern is improved.

[0045] Next, each step is analyzed and described.

[0046] Please refer to Figure 5 Referring to 4, step S10 is performed: providing a to-be-corrected layout 200, the to-be-corrected layout 200 including a plurality of initial to-be-corrected patterns.

[0047] The to-be-corrected layout 200 is an initial pattern of a mask that has not undergone optical proximity correction, and the pattern after the to-be-corrected layout 200 undergoes optical proximity correction is a pattern that needs to be transferred to a mask.

[0048] Please refer to Figure 5With reference to 4, a step S20 is performed: a first initial to-be-corrected pattern 201 and a second initial to-be-corrected pattern 202 are obtained from a plurality of initial to-be-corrected patterns, projections of the first initial to-be-corrected pattern 201 and the second initial to-be-corrected pattern 202 on a first direction X and a second direction Y do not coincide, the first direction X and the second direction Y are perpendicular to each other and parallel to a surface of the to-be-corrected layout 200, the first initial to-be-corrected pattern 201 has a first vertex A1, the second initial to-be-corrected pattern 202 has a second vertex A2, and the first vertex A1 and the second vertex A2 are opposite.

[0049] In this embodiment, a first distance l between the first vertex A1 and the second vertex A2 is less than a preset value specified by a mask limitation rule.

[0050] The mask limitation rule includes that a distance between adjacent patterns is at least greater than or equal to a preset value. Assuming that the preset value is L, the first distance l < L.

[0051] Please refer to Figure 6 and Figure 7 With reference to 4, a step S30 is performed: part of the initial to-be-corrected patterns is removed to generate to-be-corrected patterns, a removal area of the initial to-be-corrected patterns includes one or both of the first vertex A1 and the second vertex A2, and a distance between adjacent to-be-corrected patterns meets a requirement of the mask limitation rule.

[0052] Removing part of the initial to-be-corrected patterns to generate to-be-corrected patterns includes: using a Boolean operation method to extract a removal area of the initial to-be-corrected patterns; and removing the removal area to generate the to-be-corrected patterns.

[0053] In this embodiment, the removal area of the initial to-be-corrected patterns includes the first vertex A1 and the second vertex A2, removing part of the initial to-be-corrected patterns includes removing part of the first initial to-be-corrected pattern 201 and part of the second initial to-be-corrected pattern 202, a shape of a removal area of the first initial to-be-corrected pattern 201 includes a first triangle 203, the first vertex A1 is a vertex of the first triangle 203, the first triangle 203 has a first height h1, and a shape of a removal area of the second initial to-be-corrected pattern 202 includes a second triangle 204, the second vertex A2 is a vertex of the second triangle 204, and the second triangle 204 has a second height h2.

[0054] The removing part of the initial to-be-corrected pattern includes removing part of the first initial to-be-corrected pattern 201 and part of the second initial to-be-corrected pattern 202, which includes: removing part of the first initial to-be-corrected pattern 201 to form the first to-be-corrected pattern 205 (as shown in FIG. 2B), and the removed area of the first initial to-be-corrected pattern 201 includes the first vertex A1; and removing part of the second initial to-be-corrected pattern 202 to form the second to-be-corrected pattern 206 (as shown in FIG. 2C), and the removed area of the second initial to-be-corrected pattern 202 includes the second vertex A2, and the to-be-corrected pattern includes the first to-be-corrected pattern 205 and the second to-be-corrected pattern 206. Figure 7 The removing part of the initial to-be-corrected pattern includes removing part of the first initial to-be-corrected pattern 201 and part of the second initial to-be-corrected pattern 202, which includes: removing part of the first initial to-be-corrected pattern 201 to form the first to-be-corrected pattern 205 (as shown in FIG. 2B), and the removed area of the first initial to-be-corrected pattern 201 includes the first vertex A1; and removing part of the second initial to-be-corrected pattern 202 to form the second to-be-corrected pattern 206 (as shown in FIG. 2C), and the removed area of the second initial to-be-corrected pattern 202 includes the second vertex A2, and the to-be-corrected pattern includes the first to-be-corrected pattern 205 and the second to-be-corrected pattern 206. Figure 7 The removing part of the initial to-be-corrected pattern includes removing part of the first initial to-be-corrected pattern 201 and part of the second initial to-be-corrected pattern 202, which includes: removing part of the first initial to-be-corrected pattern 201 to form the first to-be-corrected pattern 205 (as shown in FIG. 2B), and the removed area of the first initial to-be-corrected pattern 201 includes the first vertex A1; and removing part of the second initial to-be-corrected pattern 202 to form the second to-be-corrected pattern 206 (as shown in FIG. 2C), and the removed area of the second initial to-be-corrected pattern 202 includes the second vertex A2, and the to-be-corrected pattern includes the first to-be-corrected pattern 205 and the second to-be-corrected pattern 206.

[0055] In the embodiment, the line connecting the first height h1, the second height h2 and the first interval l is located on the same line, the first to-be-corrected pattern 205 and the second to-be-corrected pattern 206 have a second interval d, and the second interval d = h1 + h2 + l, and the sum of the first height h1, the second height h2 and the first interval l is greater than or equal to a preset value specified by the mask rule, that is, h1 + h2 + l ≥ L.

[0056] In other embodiments, the line connecting the first height, the second height and the first interval is not located on the same line, the first to-be-corrected pattern 205 and the second to-be-corrected pattern 206 have a second interval d (as shown in FIG. 2D), and the second interval d is greater than or equal to a preset value specified by the mask rule, that is, the second interval d ≥ L. Figure 7

[0057] In the embodiment, the first height h1 and the second height h2 are equal. Then the first height h1 ≥ (L-l) / 2, and the second height h2 ≥ (L-l) / 2.

[0058] In other embodiments, the first height and the second height can not be equal.

[0059] In the embodiment, the first triangle 203 includes an isosceles right triangle, that is, the length of the right angle side a1 of the first triangle 203 is equal. The second triangle 204 includes an isosceles right triangle, that is, the length of the right angle side a2 of the second triangle 204 is equal.

[0060] ​The first height h1 and the second height h2 are equal, the first triangle 203 comprises an isosceles right triangle, the second triangle 204 comprises an isosceles right triangle, so that the right angle side length a1 of the first triangle 203 is equal to the right angle side length a2 of the second triangle 204, and the first initial to-be-corrected pattern 201 and the second initial to-be-corrected pattern 202 are cut in the same area, so that the process of removing part of the initial to-be-corrected pattern is more simplified, operation is facilitated, and the calculation efficiency can be improved.

[0061] In the embodiment, the right angle side length a1 of the two first triangles 203 cut on one side of the first initial to-be-corrected pattern 201 is 2 times the right angle side length a1 of the first triangle 203, and 2 times the right angle side length a1 of the first triangle 203 is less than the side length of the first initial to-be-corrected pattern 201.

[0062] In the embodiment, the right angle side length a2 of the two second triangles 204 cut on one side of the second initial to-be-corrected pattern 202 is 2 times the right angle side length a2 of the second triangle 204, and 2 times the right angle side length a2 of the second triangle 204 is less than the side length of the second initial to-be-corrected pattern 202.

[0063] In other embodiments, the right angle side lengths of the first triangles can not be equal.

[0064] In other embodiments, the right angle side lengths of the second triangles can not be equal.

[0065] The area including one or both of the first vertex and the second vertex in the initial to-be-corrected pattern is removed, so that the spacing between adjacent to-be-corrected patterns meets the requirements of the mask limiting rule, so that the corrected pattern obtained after the to-be-corrected pattern is corrected can meet the mask limiting rule (MRC) and the edge placement error (EPE) requirements, so that the wafer pattern obtained in the subsequent manufacturing process has a small error with the design pattern, and the precision of the pattern is improved.

[0066] In an embodiment, the removal area of the initial to-be-corrected pattern includes a first vertex, removing part of the initial to-be-corrected pattern includes removing part of the first initial to-be-corrected pattern, the shape of the removal area of the first initial to-be-corrected pattern includes a first triangle, the first vertex is a vertex of the first triangle, and the first triangle has a first height. That is, only the corner region of the first initial to-be-corrected pattern is removed.

[0067] The removing part of the initial to-be-corrected pattern includes: removing part of the first initial to-be-corrected pattern to form the first to-be-corrected pattern, and the removed area of the first initial to-be-corrected pattern includes the first vertex; and the to-be-corrected pattern includes the first to-be-corrected pattern and a second initial to-be-corrected pattern, and the second initial to-be-corrected pattern has a second spacing with the first to-be-corrected pattern, and the second spacing is greater than or equal to the preset value.

[0068] The sum of the first height and the first spacing is greater than or equal to the preset value.

[0069] The first triangle includes an isosceles right triangle.

[0070] In another embodiment, the removed area of the initial to-be-corrected pattern includes a second vertex, the removing part of the initial to-be-corrected pattern includes removing part of the second initial to-be-corrected pattern, the shape of the removed area of the second initial to-be-corrected pattern includes a second triangle, the second vertex is a vertex of the second triangle, and the second triangle has a second height. That is, only the vertex angle area of the second initial to-be-corrected pattern is removed.

[0071] The removing part of the initial to-be-corrected pattern includes: removing part of the second initial to-be-corrected pattern to form the second to-be-corrected pattern, and the removed area of the second initial to-be-corrected pattern includes the second vertex; and the to-be-corrected pattern includes the second to-be-corrected pattern and a first initial to-be-corrected pattern, and the second to-be-corrected pattern has a second spacing with the first initial to-be-corrected pattern, and the second spacing is greater than or equal to the preset value.

[0072] The sum of the second height and the first spacing is greater than or equal to the preset value.

[0073] The second triangle includes an isosceles right triangle.

[0074] Please continue to refer to Figure 4 , and step S40 is performed: performing optical proximity correction on the to-be-corrected pattern.

[0075] The optical proximity correction on the to-be-corrected pattern includes: providing a to-be-corrected model; and performing optical proximity correction on the to-be-corrected pattern according to the to-be-corrected model to generate a corrected layout, and the corrected layout includes a plurality of corrected patterns, and the corrected patterns correspond to the to-be-corrected patterns one by one.

[0076] Correspondingly, the embodiment of the present application also provides a storage medium having computer instructions stored thereon, and the computer instructions are characterized in that when the computer instructions are executed, the steps of the method are executed. Figure 4 The method.

[0077] Correspondingly, the embodiment of the present application further provides a storage terminal, comprising a memory and a processor, wherein the memory stores computer instructions capable of running on the processor, and the processor executes the computer instructions to perform the method as Figure 4 the steps of the method.

[0078] Although the present application is disclosed as above, the present application is not limited to this. Any person skilled in the art, without departing from the spirit and scope of the present application, can make various changes and modifications, therefore the protection scope of the present application should be defined by the scope of the claims.

Claims

1. A method of graphic correction, characterized by, The method comprises: providing a to-be-corrected layout, the to-be-corrected layout comprising a plurality of initial to-be-corrected patterns; acquiring a first initial to-be-corrected pattern and a second initial to-be-corrected pattern from the plurality of initial to-be-corrected patterns, the first initial to-be-corrected pattern and the second initial to-be-corrected pattern having projections in a first direction and a second direction that do not coincide, the first direction and the second direction being perpendicular to each other and parallel to a surface of the to-be-corrected layout, the first initial to-be-corrected pattern having a first vertex, the second initial to-be-corrected pattern having a second vertex, the first vertex and the second vertex being opposite to each other; removing part of the initial to-be-corrected patterns to generate to-be-corrected patterns, the removal area of the initial to-be-corrected patterns comprising one or both of the first vertex and the second vertex, the spacing between adjacent to-be-corrected patterns satisfying the requirements of mask limiting rules; performing optical proximity correction on the to-be-corrected patterns.

2. The graphic correction method of claim 1, wherein The mask limiting rules comprise: the spacing between adjacent patterns being at least greater than or equal to a preset value; the first vertex and the second vertex having a first spacing, the first spacing being smaller than the preset value.

3. The graphic correction method of claim 2, wherein The removal area of the initial to-be-corrected patterns comprises the first vertex, and removing part of the initial to-be-corrected patterns comprises removing part of the first initial to-be-corrected pattern, the shape of the removal area of the first initial to-be-corrected pattern comprising a first triangle, the first vertex being a vertex of the first triangle, the first triangle having a first height.

4. The graphic correction method of claim 3, wherein The sum of the first height and the first spacing is greater than or equal to the preset value.

5. The graphic correction method of claim 3, wherein The first triangle comprises an isosceles right triangle.

6. The graphic correction method of claim 2, wherein The removal area of the initial to-be-corrected patterns comprises the second vertex, and removing part of the initial to-be-corrected patterns comprises removing part of the second initial to-be-corrected pattern, the shape of the removal area of the second initial to-be-corrected pattern comprising a second triangle, the second vertex being a vertex of the second triangle, the second triangle having a second height.

7. The graphic correction method of claim 6, wherein The sum of the second height and the first spacing is greater than or equal to the preset value.

8. The graphic correction method of claim 6, wherein, The second triangle comprises an isosceles right triangle.

9. The graphic correction method of claim 2, wherein, The removal area of the initial to-be-corrected patterns comprises the first vertex and the second vertex, and removing part of the initial to-be-corrected patterns comprises removing part of the first initial to-be-corrected pattern and part of the second initial to-be-corrected pattern, the shape of the removal area of the first initial to-be-corrected pattern comprising a first triangle, the first vertex being a vertex of the first triangle, the first triangle having a first height, the shape of the removal area of the second initial to-be-corrected pattern comprising a second triangle, the second vertex being a vertex of the second triangle, the second triangle having a second height.

10. The graphic correction method of claim 9, wherein The sum of the first height, the second height, and the first spacing is greater than or equal to the preset value.

11. The graphic correction method of claim 9, wherein The first height and the second height are equal.

12. The graphic correction method of claim 9, wherein, The first triangle comprises an isosceles right triangle; and the second triangle comprises an isosceles right triangle.

13. The method of claim 1, wherein the step of modifying the image is performed by a computer. The removing part of the initial to-be-corrected pattern comprises: removing part of the first initial to-be-corrected pattern to form the first to-be-corrected pattern, and the removed area of the first initial to-be-corrected pattern comprises the first vertex; and the to-be-corrected pattern comprises the first to-be-corrected pattern and a second initial to-be-corrected pattern.

14. The image correction method according to claim 1, wherein: The removing part of the initial to-be-corrected pattern comprises: removing part of the second initial to-be-corrected pattern to form the second to-be-corrected pattern, and the removed area of the second initial to-be-corrected pattern comprises the second vertex; and the to-be-corrected pattern comprises the second to-be-corrected pattern and the first initial to-be-corrected pattern.

15. The method of graphic correction of claim 1, wherein, The removing part of the initial to-be-corrected pattern comprises: removing part of the first initial to-be-corrected pattern to form the first to-be-corrected pattern, and the removed area of the first initial to-be-corrected pattern comprises the first vertex; and the to-be-corrected pattern comprises the first to-be-corrected pattern and a second to-be-corrected pattern.

16. The method of graphic correction of claim 1, wherein, The removing part of the initial to-be-corrected pattern to generate the to-be-corrected pattern comprises: extracting a removed area of the initial to-be-corrected pattern by using a Boolean operation method; and removing the removed area to generate the to-be-corrected pattern.

17. The method of graphic correction of claim 1, wherein, The optical proximity correction on the to-be-corrected pattern comprises: providing a to-be-corrected model; and performing optical proximity correction on the to-be-corrected pattern according to the to-be-corrected model to generate a corrected layout, wherein the corrected layout comprises a plurality of corrected patterns, and the corrected patterns correspond to the to-be-corrected pattern one by one.

18. A storage medium having stored thereon computer instructions, characterized in that, The computer instructions are configured to cause the processor to perform the steps of the method of any one of claims 1-17.

19. A storage terminal comprising a memory and a processor, the memory having stored thereon computer instructions executable on the processor, wherein, The processor is configured to perform the steps of the method of any one of claims 1-17 when the processor executes the computer instructions.

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