Operating mode control techniques for power factor correction circuits

Abstract

The invention relates to an operation mode control technique for a power factor correction circuit. A power factor correction (PFC) control circuit includes a pulse width modulation (PWM) circuit configured to control a switch that switches a power converter. The PFC control circuit also includes a mode control circuit configured to select a conduction mode from a plurality of conduction modes for the switching power converter based at least in part on an output power of the switching power converter, and controlling a start of a switching cycle of the switching power converter based on the selected conduction mode. Further, the PFC control circuit includes a current regulation circuit configured to provide a regulation signal to the PWM circuit to regulate an average coil current of the switching power converter in each of the plurality of conduction modes.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to power factor correction circuits, and in particular to a controller for controlling the on-mode of a power factor correction circuit. BACKGROUND

[0002] Switching power converters can be used to generate a direct current (“DC”) voltage from an alternating current (“AC”) voltage by switching current through a magnetic element, such as an inductor. An offline converter receives a voltage from an AC source or mains and forms a first voltage, which can then be converted to a different voltage. Typically, the AC input voltage is converted to a full-wave rectified voltage by a diode bridge rectifier and smoothed before being converted to a lower voltage for use by low voltage circuitry. One type of offline switching power converter is a power factor correction (“PFC”) circuit. A PFC circuit can be used to ensure that power is delivered to a load efficiently with a high power factor by keeping the current drawn from the AC source in phase with the AC voltage.

[0003] A PFC circuit can operate in one of a variety of operating modes. In continuous conduction mode (“CCM”), a new switching cycle is initiated before the inductor current of the previous cycle discharges to zero. In critical conduction mode (“CrM”), a new switching cycle is initiated soon after the inductor current reaches zero. In discontinuous conduction mode (“DCM”), the inductor current is allowed to decay to zero, and the switch then remains off for a period before initiating the next switching cycle. The inventors of embodiments of the present disclosure have recognized that different operating modes can be utilized to enhance PFC power converter characteristics, such as efficiency, power factor, and electromagnetic interference (“EMI”) under different operating conditions. The inventors of embodiments of the present disclosure have also recognized that different operating modes require different control schemes, resulting in instability during transitions from one operating mode to another. Embodiments of the present disclosure can address one or more of these challenges. BRIEF DESCRIPTION OF DRAWINGS

[0004] A more complete understanding of the present embodiments can be acquired by reference to the following description, taken in connection with the accompanying drawings, in which like reference numbers indicate like features.

[0005] Figure 1 A schematic diagram of a PFC circuit according to embodiments of the present disclosure is shown.

[0006] Figure 2 A plot of points showing exemplary waveforms within a boost converter according to embodiments of the present disclosure is shown.

[0007] Figure 3 A block diagram of a reference generator according to embodiments of the present disclosure is shown.

[0008] Figure 4 A block diagram of a mode control circuit is shown in accordance with embodiments of the present disclosure.

[0009] Figure 5A A plot of reference signal versus threshold for determining an operating mode of a boost converter is shown in accordance with embodiments of the present disclosure.

[0010] Figure 5B A plot of a current regulation reference signal and a minimum coil current threshold is shown in accordance with embodiments of the present disclosure.

[0011] Figure 6 A method for controlling a PFC circuit is shown in accordance with embodiments of the present disclosure. DETAILED DESCRIPTION

[0012] The details of one or more implementations are set forth in the accompanying description and drawings. Other features will be apparent from the description, the drawings, and from the claims.

[0013] Figure 1 A schematic diagram of a PFC circuit 100 is shown. The PFC circuit 100 can be implemented in any suitable manner in accordance with the operations described in this disclosure. The PFC circuit 100 can include an EMI filter 101, a diode bridge 102, an input capacitor 103, a boost converter 110, a feedback network 120, a power output monitor 130, a rectifier circuit 140, a current sense circuit 150, a zero crossing circuit 160, and a PFC control circuit 170. The PFC circuit 100 can be configured to provide a regulated output voltage V 输出 to a load 190. In some embodiments, the load 190 can include electronic circuitry that is powered directly by the PFC circuit 100. In other embodiments, the load 190 can include one or more additional power converter stages that can power electronic circuitry located downstream. For either of these two embodiments, the PFC circuit 100 can ensure that power is delivered to the load 190 efficiently with a high power factor by keeping the current drawn from the AC input in phase with the AC input voltage.

[0014] The AC input for the PFC circuit 100 can pass through an EMI filter 101 to a diode bridge 102. The EMI filter 101 can filter high frequency AC noise. The EMI filter 101 can, for example, protect the PFC circuit 100 from high frequency noise on the AC line voltage received at the AC input. The EMI filter 101 can also protect the AC line from high frequency switching noise generated by the PFC circuit 100. The diode bridge 102 can receive the filtered AC line voltage and output a rectified DC voltage. An input capacitor 103 can be coupled across the output of the diode bridge 102. Thus, a rectified voltage can be established across the input capacitor 103. As Figure 1 shown, the voltage at the input capacitor 103 can be provided to the input of a switching power converter, such as a boost converter 110. Although filtered and rectified in the exemplary embodiment shown, Figure 1 the power drawn at the input of the boost converter 110 can originate from the AC input of the PFC circuit 100. Thus, for the purposes of the present disclosure, the AC input of the PFC circuit 100 can also be referred to as the AC input of the switching power converter, or as the AC input of the boost converter 110.

[0015] The boost converter 110 can be implemented in any suitable manner according to the operations described in the present disclosure. As Figure 1 shown, the boost converter 110 can include an inductor 111, a switch 112, a diode 113, a bulk capacitor 114, and an output 116. The switch 112 can be repeatedly turned on and off to convert the voltage at the input capacitor 103 to a regulated output voltage V 输出 out at the output 116. When the switch 112 is on, the inductor current I L may flow through the switch 112 to ground. During the on-time of the switch 112, the inductor current I L may increase over time. When the switch 112 is off, the inductor current I L may flow through the diode 113 and to the bulk capacitor 114. During the off-time of the switch 112, the inductor current I L may decrease over time. Although Figure 1 the switch 112 is shown to be an n-channel metal oxide semiconductor field effect transistor (“NMOS” or “N-channel MOSFET”) in some embodiments, the switch 112 can be implemented by any suitable type of switch or transistor. The output voltage V 输出 of the boost converter 110 can be regulated by controlling the duty cycle of the switch 112. For the purposes of the present disclosure, the duty cycle of the switch 112 can refer to the ratio of the on-time of the switch 112 to the sum of the on-time and off-time of the switching cycle during a given switching cycle. AlthoughFigure 1 The exemplary embodiment of the boost converter 110 shown in FIG includes an inductor 111, but other embodiments may utilize any other suitable magnetic element, such as the first winding of a transformer or the first winding of a pair of coupled windings. The inductor current I L Therefore, it can also be generally referred to as the coil current I L In addition, although Figure 1 A boost converter 110 is utilized as an exemplary switching power converter, but other embodiments of the PFC circuit 100 may utilize other types of switching power converter topologies, such as a buck converter topology, a flyback converter topology, or a forward converter topology.

[0016] Figure 2 Graphs illustrating exemplary waveforms within boost converter 110 according to an embodiment of the present disclosure are shown. In particular, Figure 2 2 shows exemplary waveforms within the boost converter 110 when the boost converter 110 operates in DCM. Curve 201 shows the gate voltage V applied to the switch 112 to turn the switch 112 on and off. 栅极 Curve 202 shows the coil current I through the inductor 111. L Curve 203 shows the voltage V at the drain of switch 112 D During the switching period of the boost converter 110, the coil current I L and the voltage V at the drain of switch 112 D For example, when the switch 112 is on, the voltage at the drain of the switch 112 may be a value close to zero, which is equal to the on-resistance of the switch 112 multiplied by the current through the switch 112. As shown in curve 202, the coil current I L may increase over time during the on-time of switch 112. When switch 112 subsequently switches from on to off, the voltage at the drain of switch 112 may rise sharply to approximately equal to V 输出 The value of the voltage drop across the diode 113 is added. And as shown by curve 202, the coil current I L The switch 112 may decrease over time during the off-time of the switch 112. In DCM, the switch may reduce the coil current I L After reaching zero, it remains off for a period of time. As shown in curve 203, when the switch 112 is in the coil current I L When the voltage V at the drain of the switch 112 reaches zero and remains off, D The boost converter 110 can therefore reduce the coil current I during the off-time of the switch 112. LAn oscillating signal is generated at the drain of switch 112 after zero crossing. When operating in DCM, switching losses associated with turning on switch 112 can be reduced by the voltage V D at the drain of switch 112 being low. Accordingly, as described in further detail below, PFC control circuit 170 can detect a trough of the oscillating signal generated by boost converter 110 at the drain of switch 112 to align the on-time of switch 112 with a low portion of the selected trough.

[0017] Referring back to Figure 1 , the output voltage V 输出 of boost converter 110 can be regulated by controlling the turn-on and turn-off of switch 112. PFC control circuit 170 can provide a signal V 栅极 to the gate of switch 112 to control the switching of boost converter 110. PFC control circuit 170 can receive various inputs for controlling the switching of boost converter 110 as well as the mode of operation of boost converter 110. In some embodiments, PFC control circuit 170 can receive one or more inputs from, for example, feedback network 120, power output monitor 130, rectifier circuit 140, current sense circuit 150, and zero crossing circuit 160. In some embodiments, PFC control circuit 170 can utilize one or more of such inputs to control whether boost converter 110 is operating in CCM, CrM, or DCM.

[0018] Feedback network 120 can be implemented in any suitable manner in accordance with the operations described in this disclosure. In some embodiments, feedback network 120 can include feedback resistors 121 and 122. Feedback resistors 121 and 122 can be coupled in series to form a resistive voltage divider between output 116 and ground GND. An intermediate node between feedback resistors 121 and 122 can thus provide a feedback signal V FB that can be representative of the output voltage V 输出 of boost converter 110. Feedback resistors 121 and 122 can be sized to have large resistance values, e.g., in the range of kilo-ohms, mega-ohms, or higher, such that the current drawn and consumed by feedback resistors 121 and 122 is insignificant relative to the output current drawn by load 190. Figure 1 An embodiment of feedback network 120 including feedback resistors 121 and 122 is shown, which can generate a feedback signal V 输出 in the form of a voltage that is proportional to the output voltage V FBIn other embodiments, the feedback network 120 may include any component suitable for generating any form of feedback signal, such as an optocoupler or a buffer circuit, the feedback signal being a voltage signal or a current signal suitable for conveying a value representative of the output voltage V 输出 The feedback signal V FB may be provided to the PFC control circuit 170. As described below, the PFC control circuit 170 may regulate the output voltage V of the boost converter 110. 输出 and the average coil current I L and can be based in part on the feedback signal V FB To control the operation mode of the boost converter 110 .

[0019] The power output monitor 130 may be implemented in any suitable manner according to the operations described in this disclosure. The power output monitor 130 may monitor the output voltage V 输出 and output current I 输出 , and generates an output power signal P to be provided to the PFC control circuit 170 输出 The power output monitor 130 can be configured to monitor the output voltage V 输出 The measured value is multiplied by the output current I 输出 The output power (P 输出 =V 输出 *I 输出 ). Although the output power signal P 输出 The output power may be represented by the signal, but the signal may take any form suitable for conveying the value of the output power to the PFC control circuit 170, such as a voltage or current. As described below, the PFC control circuit 170 may regulate the output voltage V of the boost converter 110. 输出 and the average coil current I L and can be based in part on the output power signal P 输出 To control the operation mode of the boost converter 110 .

[0020] The rectifier circuit 140 may be implemented in any suitable manner according to the operations described in this disclosure. The rectifier circuit 140 may include diodes 141 and 142 and a resistor 143. Figure 1 As shown, the anodes of diodes 141 and 142 can be coupled to opposite AC lines at the output of EMI filter 101. The cathodes of diodes 141 and 142 can be coupled together and to resistor 143. Rectifier circuit 140 can thus rectify the AC signal filtered by EMI filter 101 to generate a full-wave rectified signal AC. 整流 The rectifier circuit 140 can rectify the full-wave signal AC 整流is provided to the PFC control circuit 170. And as described below, the PFC control circuit 170 can regulate the output voltage V 输出 and average coil current I L and can control the operating mode of the boost converter 110 based in part on the full-wave rectified signal AC 整流 .

[0021] The current sense circuit 150 can be implemented in any suitable manner in accordance with the operations described in this disclosure. The current sense circuit 150 can include a resistor 151, a resistor 152, and a capacitor 153. The resistor 151 can be coupled in the current return path between the ground GND and the negative output terminal of the diode bridge 102. Thus, the voltage developed across the resistor 151 can serve as a current sense signal CS representative of the instantaneous coil current through the inductor 111. The resistor 152 and the capacitor 153 can be coupled in series between the node of the current sense signal CS and the ground GND. The resistor 152 and the capacitor 153 can be configured as an RC filter that filters the current sense signal CS to provide an average current sense signal CS AVG . Figure 1 Embodiments are shown in which a resistor and a capacitor are utilized to generate the current sense signal CS and the average current sense signal CS AVG representative of the instantaneous coil current and the average coil current through the inductor 111 in the form of a voltage. In other embodiments, the current sense circuit 150 can utilize any other suitable circuitry to generate signals that can take any form suitable to convey values representative of one or both of the instantaneous coil current and the average coil current through the inductor 111, such as a voltage or a current.

[0022] As Figure 1 shown, both the current sense signal CS and the average current sense signal CS AVG are provided to the PFC control circuit 170. And as described below, the PFC control circuit 170 can regulate the output voltage V 输出 and average coil current I L of the boost converter 110 and can control the operating mode of the boost converter 110 based in part on the current sense signal CS and the average current sense signal CS AVG .

[0023] The zero crossing circuit 160 can be implemented in any suitable manner in accordance with the operations described in this disclosure. The zero crossing circuit 160 can include a capacitor 161, a diode 162, and a resistor 163. As Figure 1As shown, capacitor 161 may be coupled between the drain of switch 112 and node 165. Diode 162 may be coupled between node 165 and ground GND. Diode 162 may be oriented so that its cathode is coupled to node 165 and its anode is coupled to ground GND. A resistor may be coupled between node 165 and ground GND. Figure 2 As mentioned above, the voltage V at the drain of the switch 112 D can decrease sharply, and then the coil current I L When the zero crossing detection signal ZCD is generated, the zero crossing detection signal ZCD is generated at the node 165. Figure 1 As shown, the zero-crossing circuit 160 can provide the zero-crossing detection signal ZCD to the PFC control circuit 170. As described below, the PFC control circuit 170 can adjust the output voltage V of the boost converter 110. 输出 and the average coil current I L , and the operating mode of the boost converter 110 may be controlled based in part on the zero-crossing detection signal ZCD.

[0024] The PFC control circuit 170 can be implemented in any suitable manner according to the operations described herein. The PFC control circuit 170 can utilize an average current mode control scheme to control the switch 112 to regulate the output of the boost converter 110 while maintaining a high power factor. As described below, the PFC control circuit 170 can utilize the same average current mode control scheme for different operating modes of the boost converter 110, including CCM, CrM, and DCM. As a result, the PFC controller can seamlessly transition between different CCM, CrM, and DCM operating modes within each single half-cycle of the AC line voltage received at the AC input.

[0025] The PFC control circuit 170 may include a reference generator 172, a voltage regulation circuit 174, a multiplier 175, a current regulation circuit 176, a mode control circuit 178, and a pulse width modulation ("PWM") circuit 180. In some embodiments, one or more components of the PFC control circuit 170 may be integrated onto a semiconductor die to form an integrated circuit. One or more other components of the PFC circuit 100 (e.g., the switch 112 or the feedback resistors 121 and 122) may also be integrated onto a semiconductor die with the components of the PFC control circuit 170 to form an integrated circuit. In some embodiments, the components of the PFC control circuit 170 and other components of the PFC circuit 100 (such as the switch 112) may be implemented on multiple semiconductor dies and co-packaged into a single multi-chip integrated circuit package.

[0026] The reference generator 172 may receive the full-wave rectified signal AC from the rectifier circuit 140. 整流 The reference generator 172 may also receive the output power signal P from the power output monitor 130. 输出 Based on full-wave rectified signal AC 整流 And the output power signal P 输出 signal, the reference generator 172 can generate a reference signal REF P .

[0027] Figure 3 FIG2 shows a block diagram of a reference generator 172 according to an embodiment of the present disclosure. The reference generator 172 may be implemented in any suitable manner according to the operations described in the present disclosure. The reference generator 172 may include an RMS detector 302, a sinusoidal reference generator 304, a divider 306, and a multiplier 308. The RMS detector 302 may receive a full-wave rectified signal AC 整流 Based on full-wave rectified signal AC 整流 , the RMS detector 302 may generate a signal representing AC 整流 The root mean square signal V RMS The divider 306 can then divide the output power signal P 输出 Divide by V RMS To generate the current reference signal C REF Although the current reference signal C REF Can represent the output power signal P 输出 Divide by V RMS , but the signal may take any suitable form for conveying the output value of the divider 306, such as a voltage or current. The sine reference generator 304 may generate a signal having a value similar to the full-wave rectified signal AC RECT Synchronous phase full-wave rectified sine wave signal SINE REF Although SINE REF The phase can be with AC 整流 Phase synchronization, but in some embodiments, SINE REF can be normalized so that its amplitude does not depend on AC 整流 The multiplier 308 can multiply C REF Multiply by SINE REF To generate the reference signal REF P .

[0028] Return Reference Figure 1 The PFC control circuit 170 may include a voltage regulating circuit 174, a multiplier 175, a current regulating circuit 176, and a PWM circuit 180. The voltage regulating circuit 174, the multiplier 175, the current regulating circuit 176, and the PWM circuit 180 may work together to regulate the output voltage V of the boost converter 110.输出 , while also regulating the average coil current of inductor 111 in boost converter 110. Voltage regulation circuit 174 may form part of what may be referred to as an outer regulation loop or outer voltage regulation loop. Current regulation circuit 176 may form part of what may be referred to as an inner regulation loop or inner current regulation loop.

[0029] The voltage regulation circuit 174 may be implemented in any suitable manner according to the operations described in this disclosure. The voltage regulation circuit 174 may receive a feedback signal V from the feedback network 120. FB As mentioned above, the feedback signal V FB Can represent the output voltage V 输出 The voltage regulation circuit 174 can be based on the feedback signal V FB and the voltage reference V representing the desired output voltage ref The voltage regulation signal V is generated by the difference between REG Therefore, the voltage regulation circuit 174 can be combined with the multiplier 175, the current regulation circuit 176, and the PWM circuit 180 to adjust the current based on the feedback signal V FB Modulation V REG To adjust the output voltage V of the boost converter 110 输出 .

[0030] The multiplier 175 may be implemented in any suitable manner according to the operations described in this disclosure. The multiplier 175 may be based on the voltage regulation signal V from the voltage regulation circuit 174. REG Multiply or attenuate the reference signal REF P To generate a reference signal REF to be used by the current regulation circuit 176 and the mode control circuit 178 I .

[0031] The current regulation circuit 176 may be implemented in any suitable manner according to the operations described in this disclosure. The current regulation circuit 176 may receive the reference signal REF from the multiplier 175. I and the average current sensing signal CS from the current sensing circuit 150 AVG The current regulation circuit 176 can be based on CS AVG and reference signal REF I To generate the current regulation signal IREG. For example, the current regulation circuit 176 can be based on CS AVG With the reference signal REF I The current regulation circuit 176 can provide IREG to the PWM circuit 180. Therefore, the current regulation circuit 176 can be combined with the PWM circuit 180 to modulate the IREG by the difference between the CS and the PWM circuit 180. AVG With the reference signal REF IThe difference between them is modulated IREG to adjust the average coil current of the inductor 111 in the boost converter 110 .

[0032] The PWM circuit 180 can be implemented in any suitable manner in accordance with the operations described in this disclosure. The PWM circuit 180 can include a driver that drives the gate of the switch 112 and, therefore, controls the on and off switching cycles of the switch 112. The PWM circuit 180 can pulse-width modulate the on-time, and, therefore, the duty cycle, of the switch 112 during each switching cycle based at least in part on the IREG. Thus, the current regulation circuit 176 can be combined with the PWM circuit 180 to provide a current regulation circuit based on the CS AVG With the reference signal REF I The difference between the two values ​​modulates the IREG signal provided to the PWM circuit 180 to regulate the average coil current of the inductor 111 in the boost converter 110. As described below, the PWM circuit 180 can initiate the start of a given switching cycle in response to a trigger signal from the mode control circuit 178. Thus, the PWM circuit 180 can determine when to initiate a given switching cycle based on the trigger signal from the mode control circuit 178, and can also control the on-time of the switching cycle based on the IREG signal from the current regulation circuit 176.

[0033] like Figure 1 As shown, the PFC control circuit 170 may include a mode control circuit 178. The mode control circuit 178 may provide a trigger signal to the PWM circuit 180 to control the start point of each switching cycle. For example, based on the trigger signal, the PWM circuit 180 may control when the switch 112 is turned on to start the next switching cycle. As described above, in the CCM operating mode, the coil current I L A new switching cycle is started by turning on the switch before the discharge reaches zero. In the CrM operating mode, the coil current I L Immediately or shortly after reaching zero, the switch is turned on to start a new switching cycle. In contrast, in DCM operation mode, the coil current I L The mode control circuit 178 may control whether the boost converter 110 operates in CCM, CrM, or DCM by controlling the starting point of each switching cycle.

[0034] Mode control circuit 178 may be implemented in any suitable manner in accordance with the operations described in this disclosure. Figure 4A block diagram of a mode control circuit 178 according to embodiments of the disclosure is shown. In some embodiments, the mode control circuit 178 can include a comparator array 402, a mode selector 410, a valley counter 430, a minimum threshold generator 440, a comparator 450, and a flip-flop 460.

[0035] The comparator array 402 can be implemented in any suitable manner according to the operations described in this disclosure. The comparator array 402 can receive a reference signal REF I and can include N comparators 404-1, 404-2, 404-3, 404-4,..., and 404-N that respectively compare REF I to N threshold values V TH-1 , V TH-2 , V TH-3 , V TH-4 ,..., and V TH-N . The outputs from the individual comparators 404-1 to 404-N within the comparator array 402 can be provided to the mode selector 410. Based on the outputs of the comparator array 402, the mode selector 410 can select and enable one of a CCM operating mode, a CrM operating mode, or a DCM operating mode.

[0036] Figure 5A A plot of a reference signal REF I versus N threshold values V TH-1 , V TH-2 , V TH-3 , V TH-4 ,..., and V TH-N according to embodiments of the disclosure is shown. As described above with reference to Figure 1 , to generate REF I , a multiplier 175 can multiply or attenuate a reference signal REF REG based on a voltage regulation signal V P from a voltage regulation circuit 174. And as described above with reference to Figure 3 , REF 输出 may be generated based in part on an output power signal P P . Thus, REF I may have an amplitude that is based at least in part on an output power of the boost converter 110. Furthermore, the reference signal REF P may be generated by multiplying C REF by a full-wave rectified sinusoidal wave signal SINE REF , which can have a phase that is synchronized with a phase of a full-wave rectified signal AC 整流 . Thus, the reference signal REF I may be a signal that has an amplitude that is based at least in part on an output power of the boost converter 110 and a phase that is synchronized with a phase of the full-wave rectified signal AC整流 The mode selector 410 can be configured to generate a cyclic signal in the shape of a full-wave rectified AC signal that is in phase with the AC line voltage received at the AC input of the PFC circuit 100. I Different operating modes, including DCM, CrM, and CCM, are cyclically selected at different times during each half cycle of the AC line voltage at the AC input as it traverses its full-wave rectified shape. I As the AC line voltage traverses its full-wave rectified shape during a half-cycle of the AC line voltage, the mode selector 410 can cycle the mode selection as follows: DCM to CrM to CCM to CrM to DCM, and then restart at the beginning of a new half-cycle of the AC line voltage. Furthermore, selecting different conduction modes at different times within each half-cycle of the AC line voltage can also take into account the output power of the boost converter 110.

[0037] Mode selector 410 may be implemented in any suitable manner according to the operations described in this disclosure. Figure 5A As shown, when REF I Greater than the first threshold V TH-1 , the mode selector 410 may select and enable the CCM mode of operation. Conversely, when REF I Less than the first threshold V TH-1 , the mode selector 410 may select and enable one of the CrM operation mode and the DCM operation mode. For example, when REF I At the first threshold V TH-1 With the second threshold V TH-2 When the first valley is between 0 and 1, the mode selector 410 may select the first valley to trigger the start of the next switching cycle. As another example, the mode selector 410 may select the first valley to trigger the start of the next switching cycle based on REF I One of the second valley, the third valley, the fourth valley, ... or the Nth valley is selected relative to the values ​​of the second threshold, the third threshold, the fourth threshold, ... and the Nth threshold to trigger the start of the next switching cycle. Figure 2 The first valley is immediately followed by the coil current I L occurs after reaching zero during the off-time of the switch 112. Thus, by selecting the first valley to trigger the start of the next switching cycle, the mode selector 410 may select and enable the CrM mode of operation. Figure 2 As shown, the coil current I L After reaching zero and the switch 112 remains off for a period of time, the second, third, fourth, ..., and Nth valleys occur. Therefore, by selecting any one of the second, third, fourth, ..., or Nth valleys, the mode selector 410 can select and enable the DCM operation mode.

[0038] although Figure 5A shows that when REF I The selection of each of the three operating modes—CCM, CrM, and DCM—is made at different points in time as the AC line voltage at the AC input traverses its full-wave rectified shape during each half-cycle, but in some embodiments the mode selector 410 may also be configured to select between two operating modes. For example, in some embodiments the mode selector 410 may be configured to select between two operating modes at the REF I Higher than V TH-1 Select CCM operation when REF I Lower than V TH-1 DCM operation is selected when (at any of the second valley, the third valley, the fourth valley, or the Nth valley).

[0039] Return Reference Figure 4 The mode selector 410 may select and enable the CCM operation mode by sending a CCM enable signal CCM_EN to components of the mode control circuit 178 that implement CCM operation. For example, the mode selector 410 may send the CCM enable signal CCM_EN to the minimum threshold generator 440 and the comparator 450.

[0040] The minimum threshold generator 440 may be implemented in any suitable manner in accordance with the operations described herein. The minimum threshold generator 440 may be based at least in part on the REF I Generates the minimum coil current threshold CCM TH-MIN . Minimum coil current threshold CCM TH-MIN Can control the minimum coil current I L (during the off-time of switch 112), at which minimum coil current switch 112 will be turned on to start the next switching cycle during CCM operation. TH-MIN The coil current I of the inductor 111 is indicated by L When the coil current I L Reaching the minimum coil current threshold CCM TH-MIN When , the comparator 450 can trip the trigger 460. Return to reference Figure 1 , the PWM circuit 180 may then initiate the next switching cycle by turning on the switch 112 in response to a trigger signal from the flip-flop 460 within the mode control circuit 178 .

[0041] Figure 5B shows the current regulation reference signal REF according to an embodiment of the present disclosure I and the minimum coil current threshold CCM TH-MINof the plot. Minimum coil current threshold CCM TH-MIN may be generated by applying a negative offset to the reference signal REF I In some embodiments, the minimum value of CCM TH-MIN may be clamped at, for example, 0 volts. As described above with reference to Figure 1 , REF I may also be used as a reference for the current regulation circuit 176. When operating in CCM, REF I may be offset from the minimum coil current threshold CCM TH-MIN by an amount that can thus control the ripple of the inductor 111 coil current I L . In addition, the switching frequency of the boost converter 110 can vary during CCM based on a variety of factors including, for example, the ripple of the inductor 111 coil current I TH-MIN controlled by the minimum coil current threshold CCM L , the voltage at the input of the boost converter 110, the output voltage Vout at the output 116 of the boost converter 110, and the inductance value of the inductor 111.

[0042] Different amounts of ripple current can be desired based on operating conditions and / or the application in which the embodiments of the PFC circuit 100 can be used. For example, different amounts of ripple current can be needed during CCM depending on the size of the inductor 111 used in the boost converter 110. In addition, different amounts of ripple current can be desired based on the amplitude of the AC line voltage received at the AC input, for example whether the AC input receives 120 volt or 240 volt AC line voltage. In some embodiments, the minimum threshold generator 440 can generate CCM TH-MIN based on a static offset tailored for a particular application in which the PFC circuit 100 will be used. In some embodiments, the minimum threshold generator 440 can generate CCM TH-MIN based on a programmable offset, which can enable a user to tailor the offset for different applications of the PFC circuit 100. And in some embodiments, the minimum threshold generator 440 can generate CCM TH-MIN based on an offset that is responsive to operating conditions of the PFC circuit 100, such as the amplitude of the AC line voltage received at the AC input.

[0043] Referring back to Figure 4, the mode selector 410 may also select and enable one of the CrM mode of operation and the DCM mode of operation. In some embodiments, the mode selector 410 may select and enable one of the CrM mode of operation and the DCM mode of operation by sending a VALLEY SELECT signal to the valley counter 430. In other embodiments, the mode selector 410 may enable the CrM mode and the DCM mode by sending a separate enable signal (not shown) to the valley counter 430 and then selecting between the CrM mode and the DCM mode based on the value of the VALLEY SELECT signal. As described above with reference to Figure 5A As described, selection of the first valley may enable CrM operation, while selection of any of the second valley, the third valley, the fourth valley, ..., or the Nth valley may enable DCM operation.

[0044] The valley counter 430 may be implemented in any suitable manner according to the operations described in the present disclosure. The valley counter 430 may utilize the zero-crossing detection signal ZCD from the zero-crossing circuit 160 to detect the coil current I of the inductor 111 during the off-time of the switch 112. L The valley of the oscillating signal present at the drain of switch 112 after reaching zero. For example, Figure 1 As shown in FIG, capacitor 161 can capacitively couple the drain of switch 111 to node 165. D The zero-crossing detection signal ZCD at the node 165 may therefore have a negative slope at the beginning of each valley due to the negative slope at the beginning of each valley. The valley counter 430 may utilize the negative slope of ZCD to detect and count each valley of the oscillation signal present at the drain of the switch 112. When the valley count reaches the number indicated by the VALLEY SELECT signal, the valley counter 430 may trip the flip-flop 460. Return to Reference Figure 1 , the PWM circuit 180 may then initiate the next switching cycle by turning on the switch 112 in response to a trigger signal from the flip-flop 460 within the mode control circuit 178 .

[0045] As mentioned above Figure 5A As mentioned above, the reference signal REF I Can be with AC 整流 The mode selector 410 can be configured to generate a cyclic signal in the shape of a full-wave rectified AC signal in phase with the AC line voltage received at the AC input of the PFC circuit 100. IDifferent operating modes, including DCM, CrM, and CCM, are selected in a different time cycle that traverses the full-wave rectified shape of the AC input during each half-cycle of the AC input. Moreover, during each operating mode including DCM, CrM, and CCM, the PFC control circuit 170 can utilize the same regulation loop, including the voltage regulation circuit 174, the current regulation circuit 176, and the PWM circuit 180. Thus, the PFC control circuit 170 can advantageously provide seamless transitions between different operating modes (including DCM, CrM, and CCM) within each half-cycle of the AC input.

[0046] Figure 6 Operation of an exemplary method 600 for controlling a PFC circuit in accordance with an embodiment of the disclosure is shown. The method 600 can be performed by any suitable mechanism, such as the PFC control circuit 170. The method 600 can be performed with fewer or more steps than shown in Figure 6 FIG. 6. Moreover, steps of the method 600 can be omitted, repeated, performed in parallel, performed in an order different than shown in Figure 6 FIG. 6, or performed recursively. One or more steps of the method 600, although shown in an order, can be performed simultaneously or in a reordered manner.

[0047] At step 610, a switch of a switching power converter can be pulse width modulated. For example, the boost converter 110 can include the switch 112. The PWM circuit 180 can drive a gate of the switch 112 and thus control on and off switching cycles of the switch 112. Based on the current regulation signal IREG from the current regulation circuit 176, the PWM circuit 180 can modulate a pulse width of the on time of the switch 112 during each switching cycle.

[0048] At step 620, each of a plurality of conduction modes for the switching power converter can be cyclically selected. For example, as described above with reference to Figure 4 FIG. 5, the comparator array 402 can include a plurality of comparators 404-1, 404-2, 404-3, 404-4,... and 404-N configured to compare the reference signal REF I to a plurality of thresholds. The comparator array 402 can provide comparison results to the mode selector 410. As described above with reference to Figure 1 and Figure 5A FIG. 5, the reference signal REF I may be a cyclic signal that can have a shape of a full-wave rectified AC signal and can also depend in part on the output power signal P 输出 . Thus, the mode selector 410 can select a conduction mode based on the cyclic reference signal REF IThe different operating modes, including DCM, CrM, and CCM, are selected in a loop with comparisons to multiple thresholds. Further, the selection of the different conduction modes at different times within each half-cycle of the AC line voltage can also be based at least in part on the output power of the boost converter 110.

[0049] When CCM operation is selected, the method 600 can perform step 630. At step 630, a switching cycle can be initiated in response to the current sense signal reaching a minimum coil current threshold. For example, the minimum threshold generator 440 can generate the minimum coil current threshold CCM I The minimum coil current threshold CCM TH-MIN may be based at least in part on the reference voltage REF TH-MIN may be controlled to be a function of the output voltage VOUT L At the minimum coil current, the switch 112 will be turned on to start the next switching cycle (during the off time of the switch 112). For example, the comparator 450 can compare the CCM TH-MIN to the current sense signal CS, which can be indicative of the coil current I L of the inductor 111. When the coil current I L of the inductor 111 reaches the minimum coil current threshold CCM TH-MIN , the comparator 450 can trip the flip-flop 460. Referring back to Figure 1 , the PWM circuit 180 can then initiate the next switching cycle by turning on the switch 112 in response to the trigger signal from the flip-flop 460 within the mode control circuit 178.

[0050] When CrM operation is selected, the method 600 can perform step 640. At step 640, a switching cycle can be initiated in response to detecting a first trough. For example, as Figure 2 shown, the boost converter 110 can generate an oscillating signal at the drain of the switch 112 after the coil current I L reaches zero during the off time of the switch 112. The first trough occurs immediately after the coil current I L of the inductor 111 reaches zero during the off time of the switch 112. When the REF I is between a first threshold V TH-1 and a second threshold V TH-2 , the mode selector 410 can select the first trough to trigger the start of the next switching cycle. In response to detecting the first trough of the oscillating signal, the trough counter 430 can trip the flip-flop 460, which can in turn instruct the PWM circuit 180 to initiate the next switching cycle by turning on the switch 112.

[0051] When DCM operation is selected, method 600 may proceed to step 650. At step 650, a switching cycle may be initiated in response to detecting a second or subsequent valley. Figure 2 As shown, the boost converter 110 can switch the coil current I L After reaching zero, an oscillation signal is generated at the drain of the switch 112. The second valley, the third valley, the fourth valley, ... and the Nth valley are generated when the coil current I of the inductor 111 is at zero during the off time of the switch 112. L A period of time occurs after the oscillation signal reaches zero. For DCM operation, the mode selector 410 may select any of the second valley, the third valley, another valley, ..., or the Nth valley to trigger the start of the next switching cycle. In response to detecting the selected valley of the oscillation signal, the valley counter 430 may trip the trigger 460, which in turn may instruct the PWM circuit 180 to start the next switching cycle by turning on the switch 112.

[0052] At step 660, the average coil current may be adjusted during each of the plurality of conduction modes. For example, the current regulation circuit 176 may receive the reference signal REF from the multiplier 175. I and the average current sensing signal CS from the current sensing circuit 150 AVG The current regulation circuit 176 can be based on CS AVG and reference signal REF I To generate the current regulation signal IREG. The current regulation circuit 176 can be based on, for example, CS AVG With the reference signal REF I The current regulation circuit 176 can provide IREG to the PWM circuit 180, which controls the on and off switching of the switch 112. Therefore, in combination with the PWM circuit 180, the current regulation circuit 176 can modulate the IREG by AVG With the reference signal REF I The difference between them is modulated IREG to adjust the average coil current of the inductor 111 in the boost converter 110 .

[0053] Although examples have been described above, other modifications and variations may be made from this disclosure without departing from the spirit and scope of these examples. The above description of various embodiments illustrates the principles of the present invention. Based on the above disclosure, many variations and modifications will become apparent to those skilled in the art. The following claims are intended to cover all such variations and modifications.

Claims

1. A power factor correction (PFC) control circuit, the PFC control circuit comprising: a pulse width modulation (PWM) circuit configured to control a switch of a switching power converter; a mode control circuit configured to select a conduction mode from a plurality of conduction modes for the switching power converter and to control a start of a switching cycle of the switching power converter based on the selected conduction mode; and a current regulation circuit configured to provide a regulation signal to the PWM circuit to regulate an average winding current of the switching power converter in each of the plurality of conduction modes.

2. The PFC control circuit of claim 1, wherein the plurality of conduction modes for the switching power converter includes a continuous conduction mode and one or more of a critical conduction mode and a discontinuous conduction mode.

3. The PFC control circuit of claim 1, wherein the mode control circuit is configured to cyclically select each of the plurality of conduction modes at different times within a time period of a half cycle of an AC line voltage received at an AC input of the switching power converter.

4. The PFC control circuit of claim 1, wherein the mode control circuit is configured to select the conduction mode based at least in part on an output power of the switching power converter.

5. The PFC control circuit of claim 1, wherein the mode control circuit comprises: a threshold generator configured to generate a minimum winding current threshold; and a comparator configured to compare the minimum winding current threshold to a current sense signal indicative of a winding current of the switching power converter.

6. The PFC control circuit of claim 5, wherein the mode control circuit is configured to send a trigger signal to the PWM circuit to control the start of the switching cycle in response to the comparator when a continuous conduction mode has been selected from the plurality of conduction modes.

7. The PFC control circuit of claim 1, wherein the mode control circuit comprises a valley counter configured to detect a valley of an oscillating signal present at a node of the switching power converter after a winding current of the switching power converter has reached zero.

8. The PFC control circuit of claim 7, wherein the mode control circuit is configured to send a trigger signal to the PWM circuit to control the start of the switching cycle in response to the valley counter when a critical conduction mode or a discontinuous conduction mode has been selected from the plurality of conduction modes.

9. A power factor correction (PFC) circuit, the PFC circuit comprising: a boost converter including a switch and an inductor; a feedback network configured to generate a feedback signal representative of an output voltage of the boost converter; and a power factor correction control circuit comprising: a pulse width modulation (PWM) circuit configured to control the switch of the boost converter; and a mode control circuit configured to select a conduction mode from a plurality of conduction modes for the boost converter and to control a start of a switching cycle of the boost converter based on the selected conduction mode. ​ a pulse width modulation (PWM) circuit configured to control the switches of the boost converter; a mode control circuit configured to select a conduction mode from a plurality of conduction modes for the boost converter, and to control a start of a switching cycle of the boost converter based on the selected conduction mode; a voltage regulation circuit configured to regulate the output voltage based at least in part on the feedback signal; and a current regulation circuit configured to provide a regulation signal to the PWM circuit to regulate an average winding current of the boost converter in each of the plurality of conduction modes.

10. The PFC circuit of claim 9, wherein the plurality of conduction modes for the boost converter includes a continuous conduction mode, and one or more of a critical conduction mode and a discontinuous conduction mode.

11. The PFC circuit of claim 9, wherein the mode control circuit is configured to select the conduction mode based at least in part on an output power of the switching power converter.

12. The PFC circuit of claim 9, wherein the mode control circuit includes: a threshold generator configured to generate a minimum winding current threshold; and a comparator configured to compare the minimum winding current threshold to a current sense signal indicative of a winding current of the boost converter; and wherein the mode control circuit is configured to send a trigger signal to the PWM circuit to control the start of the switching cycle in response to the comparator when a continuous conduction mode has been selected from the plurality of conduction modes.

13. The PFC circuit of claim 9, wherein: the mode control circuit includes a valley counter configured to detect a valley of an oscillating signal present at a node of the boost converter after a winding current of the boost converter has reached zero; and the mode control circuit is configured to send a trigger signal to the PWM circuit to control the start of the switching cycle in response to the valley counter when a critical conduction mode or a discontinuous conduction mode has been selected from the plurality of conduction modes.

14. A method for controlling a power factor correction (PFC) circuit, the method comprising: pulse width modulating switches of a switching power converter; selecting, cyclically, individual conduction modes from a plurality of conduction modes for the switching power converter at different times within each half cycle of an AC line voltage received at an AC input of the switching power converter; and regulating, with a current regulation circuit, an average winding current of the switching power converter during each of the plurality of conduction modes.

15. The method of claim 14, wherein the plurality of conduction modes includes a continuous conduction mode, and one or more of a critical conduction mode and a discontinuous conduction mode.

16. The method of claim 14, wherein selecting, cyclically, each of the plurality of conduction modes includes: ​ ​ ​ ​ generating a cycle reference signal having a shape of a full-wave rectified AC signal in phase with the AC line voltage; and comparing the cycle reference signal to a plurality of thresholds.

17. The method of claim 14, wherein cyclically selecting each of a plurality of conduction modes includes selecting a conduction mode based at least in part on an output power of the switching power converter.

18. The method of claim 14, the method further comprising: generating a minimum coil current threshold; comparing the minimum coil current threshold to a current sense signal indicative of a coil current of the switching power converter; and when operating the switching power converter in continuous conduction mode, turning on the switch to initiate a switching cycle of the switching power converter in response to the current sense signal reaching the minimum coil current threshold.

19. The method of claim 14, the method further comprising: after the coil current of the switching power converter has reached zero, detecting a first trough of an oscillating signal present at a node of the switching power converter; and when operating the switching power converter in critical conduction mode, turning on the switch to initiate a switching cycle of the switching power converter in response to detecting the first trough of the oscillating signal.

20. The method of claim 14, the method further comprising: after the coil current of the switching power converter has reached zero, detecting a plurality of troughs of an oscillating signal present at a node of the switching power converter; and when operating the switching power converter in discontinuous conduction mode, turning on the switch to initiate a switching cycle of the switching power converter in response to detecting a second or subsequent trough of the oscillating signal.

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