Image sensor

Abstract

An image sensor includes a pixel array including pixels, and a peripheral circuit connected to the pixels. Each pixel includes a first photodiode, a second photodiode having a light receiving area smaller than a light receiving area of the first photodiode, and a pixel circuit connecting the first photodiode and the second photodiode to a peripheral circuit. The peripheral circuit obtains a first pixel signal by performing a first readout operation on each of the pixels after a first exposure period, and obtains a second pixel signal by performing a second readout operation on a portion of the pixels after a second exposure period shorter than the first exposure period, the second readout operation is different from the first readout operation. The peripheral circuit generates first image data using the first pixel signal and generates second image data using the second pixel signal.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority from Korean Patent Application No. 10-2024-0109563 filed on August 16, 2024, in the Korean Intellectual Property Office, and Korean Patent Application No. 10-2024-0054863 filed on April 24, 2024, in the Korean Intellectual Property Office, the disclosure of each of which is incorporated herein by reference in its entirety. Technical Field

[0003] Example embodiments relate to an image sensor. Background Art

[0004] Image sensors receive light and generate electrical signals based on the received light, thereby capturing images. Recently, with the adoption of image sensors in fields such as automotive technology, methods for accurately capturing images of various types of objects have been proposed. While various image sensor configurations can be used to accurately capture a wide range of objects, this approach can require significant space and be expensive. Consequently, various methods have been proposed for accurately capturing a variety of objects with diverse characteristics using image sensors. Summary of the Invention

[0005] On the one hand, an image sensor is provided. In an image sensor having a structure including a first photodiode and a second photodiode, the image sensor improves a dynamic range and a signal-to-noise ratio by differently configuring a first readout operation performed after a first exposure time period and a second readout operation performed after a second exposure time period, wherein the first photodiode and the second photodiode have different light receiving areas.

[0006] According to an aspect of one or more example embodiments, an image sensor is provided that includes a pixel array including a plurality of pixels arranged along a first direction and a second direction that crosses the first direction, and a peripheral circuit connected to the plurality of pixels through a plurality of row lines and a plurality of column lines, the peripheral circuit configured to drive the plurality of pixels. Each of the plurality of pixels includes a first photodiode, a second photodiode having a light-receiving area smaller than a light-receiving area of the first photodiode, and a pixel circuit connecting the first photodiode and the second photodiode to the peripheral circuit. The peripheral circuit is configured to obtain first pixel signals by performing a first readout operation on each of the plurality of pixels after a first exposure time period, and obtain second pixel signals by performing a second readout operation on at least a portion of the plurality of pixels after a second exposure time period shorter than the first exposure time period, the second readout operation being different from the first readout operation, and the peripheral circuit is configured to generate first image data using the first pixel signals and generate second image data using the second pixel signals.

[0007] According to another aspect of one or more example embodiments, an image sensor is provided that includes a plurality of pixels, each of the plurality of pixels including a first photodiode, a second photodiode having a light-receiving area smaller than a light-receiving area of the first photodiode, and a pixel circuit connected to the first photodiode and the second photodiode, and a peripheral circuit configured to sequentially perform a first shutter operation, a first time period exposure operation, a first readout operation, a second shutter operation, a second time period exposure operation, and a second readout operation on each of the plurality of pixels. The first readout operation includes a plurality of main readout operations performed sequentially, and the second readout operation includes a plurality of sub readout operations performed sequentially, and the peripheral circuit is configured to perform at least one of the plurality of sub readout operations differently from the plurality of main readout operations.

[0008] According to yet another aspect of one or more example embodiments, an image sensor is provided that includes a plurality of pixels, each of the plurality of pixels including a first photodiode, a second photodiode having a light-receiving area smaller than a light-receiving area of the first photodiode, and a pixel circuit connected to the first photodiode and the second photodiode, and a peripheral circuit configured to drive the plurality of pixels. The pixel circuit is configured to output a signal by performing a plurality of main readout operations after a first exposure time period, and output a signal by performing a plurality of sub readout operations after a second exposure time period shorter than the first exposure time period, and among the plurality of sub readout operations, a number of times that the pixel circuit outputs a signal corresponding to charge generated by the first photodiode is greater than a number of times that the pixel circuit outputs a signal corresponding to charge generated by the second photodiode. BRIEF DESCRIPTION OF DRAWINGS

[0009] The above and other aspects will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0010] Figure 1 is a block diagram illustrating an image sensor according to some example embodiments;

[0011] Figure 2 and Figure 3 is a diagram illustrating a pixel array structure of an image sensor according to some example embodiments;

[0012] Figure 4 is a circuit diagram illustrating a pixel included in an image sensor according to some example embodiments;

[0013] Figure 5 and Figure 6 is a diagram illustrating the operation of an image sensor according to some example embodiments;

[0014] Figures 7 to 15 is a diagram illustrating the operation of an image sensor according to some example embodiments;

[0015] Figures 16 to 18 is a diagram illustrating the operation of an image sensor according to some example embodiments;

[0016] Figure 19 is a diagram illustrating the operation of an image sensor according to some example embodiments;

[0017] Figure 20 and Figure 21 is a diagram illustrating the operation of an image sensor according to some example embodiments;

[0018] Figure 22 is a diagram illustrating the operation of an image sensor according to some example embodiments;

[0019] Figure 23 is a diagram illustrating operations of an image sensor according to some example embodiments; and

[0020] Figure 24 is a diagram illustrating operations of an image sensor according to some example embodiments. DETAILED DESCRIPTION

[0021] Hereinafter, various embodiments will be described with reference to the accompanying drawings as follows.

[0022] Figure 1 is a block diagram illustrating an image sensor according to some example embodiments.

[0023] Reference Figure 1The image sensor 10 can include a pixel array 20 and a peripheral circuit 30. The pixel array 20 can include a plurality of pixel regions arranged in an array along a plurality of rows and a plurality of columns. Each of the plurality of pixel regions can include a photoelectric conversion element configured to generate electric charge in response to light, and the photoelectric conversion element can be connected to pixel circuitry configured to generate and output a signal corresponding to the electric charge generated by the photoelectric conversion element.

[0024] A pixel can be implemented by a photoelectric conversion element and pixel circuitry. The photoelectric conversion element can include a photodiode formed of a semiconductor material and / or an organic photodiode formed of an organic material. In an example embodiment, a pixel can include a first photodiode and a second photodiode having different light-receiving areas.

[0025] For example, the pixel circuitry can include a plurality of transistors and a capacitor. In some example embodiments, the pixel circuitry can include a plurality of capacitors. The capacitor can store electric charge generated in excess by the photodiode, and can be connected to the photodiode through at least one of the plurality of transistors. In an example embodiment, the capacitor can be a metal-insulator-metal (MIM) capacitor.

[0026] The peripheral circuit 30 can include circuitry for controlling the pixel array 20. For example, the peripheral circuit 30 can include a row driver 31, a readout circuit 32, a data output circuit 33, and control logic 34. The row driver 31 can drive the pixel array 20 in units of row (ROW) lines. For example, the row driver 31 can input a control signal for controlling the on / off of each transistor included in the pixel circuitry to the pixel array 20 in units of row lines.

[0027] In a pixel, pixels disposed at the same position in the horizontal direction in the row direction (vertical direction in the Figure 1 For example, pixels disposed at the same position in the column (COLUMN) direction (horizontal direction in the Figure 1 may be simultaneously selected by the row driver 31 and can output a pixel signal through a column line. In an example embodiment, the readout circuit 32 can simultaneously receive a signal from the pixels selected by the row driver 31 through the column line. For example, the readout circuit 32 can receive a reset voltage and a signal voltage from each pixel in order, and can configure the signal voltage by reflecting the electric charge generated by the photodiode of each pixel in the reset voltage.

[0028] The readout circuit 32 can include a plurality of correlated double samplers and a plurality of counters, and the correlated double samplers can be connected to each other through the pixel and the column line. For example, the correlated double samplers and the counters can be connected to the column line. The correlated double samplers can read a voltage signal from the pixel of the row line selected by the row line selection signal connected to the row line through the row driver 31 through the column line. One of the input terminals of each of the correlated double samplers can be connected to the column line, and the other input terminal can receive a lamp voltage.

[0029] The output terminal of each of the correlated double samplers can be connected to the counter, and the counter can generate a digital pixel signal by counting a time period for which the output of each of the correlated double samplers is maintained at a certain voltage. For example, the counter can count a time period for which the lamp voltage input to the correlated double sampler is greater than the voltage of the column line, and can convert the output of the correlated double sampler into a digital pixel signal. The data output circuit 33 can include a memory such as a latch or a buffer circuit for temporarily storing the digital pixel signal.

[0030] The control logic 34 can include a timing controller for controlling the operation timing of the row driver 31, the readout circuit 32, and the data output circuit 33. According to an example embodiment, the control logic 34 can determine the data format output by the data output circuit 33, or can perform preprocessing on the data to be output by the data output circuit 33.

[0031] In an example embodiment, the readout circuit 32 can perform two or more readout operations for each of a plurality of pixels. For example, when one of a plurality of row lines is selected, the readout circuit 32 can read a signal corresponding to the charge generated by exposing the pixels arranged along the selected row line to light. In an example embodiment, the readout circuit 32 can read a signal corresponding to the charge generated by the pixels during a single exposure time period multiple times.

[0032] The readout circuit 32 can obtain a signal from the pixels under different operating conditions. For example, the readout circuit 32 can perform at least one readout operation under each of a condition in which the conversion gain of each pixel is relatively large and a condition in which the conversion gain of each pixel is relatively small. For example, in an example embodiment, the readout circuit 32 can perform a readout operation under a condition in which the conversion gain of each pixel is relatively large, and can perform a readout operation under a condition in which the conversion gain of each pixel is relatively small. The conversion gain of each pixel can vary according to the on / off of a transistor connected to a floating diffusion node of each pixel.

[0033] As described above, each of the plurality of pixels can include a capacitor. During an exposure time period, charges generated by the photodiode and exceeding a full well capacity (FWC) of the photodiode can be transferred to the capacitor and stored, and the readout circuit 32 can perform a readout operation of obtaining a signal corresponding to the charges stored in the capacitor. By generating an image using signals obtained by the pixels under different operation conditions, the readout circuit 32 can extend a light intensity range that the image sensor 10 can represent, and can improve a dynamic range.

[0034] In an example embodiment, the first readout operation after the first exposure time period and the second readout operation after the second exposure time period shorter than the first exposure time period can be performed differently. By performing the first readout operation and the second readout operation in an optimized manner according to the length of the exposure time period, a signal-to-noise ratio, a dynamic range, and the like of the first image data generated from the charges generated in the first exposure time period and the second image data generated from the charges generated in the second exposure time period can be improved.

[0035] Figure 2 and Figure 3 is a diagram showing a pixel array structure of an image sensor according to some example embodiments. Figure 3 may be Figure 2 is an enlarged view of a portion of the region 60 in

[0036] Referring to Figure 2 , the pixel array 50 can include a plurality of pixels PX arranged along a first direction (X-axis direction) and a second direction (Y-axis direction). Each of the plurality of pixels PX can include a first photodiode PD1 and a second photodiode PD2. In an example embodiment, a light-receiving area of the first photodiode PD1 can be larger than a light-receiving area of the second photodiode PD2. In other words, the light-receiving area of the second photodiode PD2 can be smaller than the light-receiving area of the first photodiode PD1. In Figure 2 In the example embodiment shown in

[0037] Each of the plurality of pixels PX can include a color filter, and the color filter can transmit light corresponding to a wavelength of one color among red, green, and blue. Each of the plurality of pixels PX can include one of a red color filter, a green color filter, and a blue color filter.

[0038] As described above, Figure 3 may be Figure 2 is an enlarged view of a portion of the region 60 in Figure 3In the plurality of pixels PX, four pixels PX arranged in a 2x2 array can be arranged in a Bayer pattern. As shown in FIG. 1A, in the four pixels PX arranged in a 2x2 array, each of two pixels PX arranged in a diagonal direction can include a green color filter, and each of the other two pixels PX can include a red color filter or a blue color filter. Figure 3

[0039] In the example embodiment shown in FIG. 1A, each of the plurality of pixels PX can include a first microlens ML1 and a second microlens ML2. The first microlens ML1 can be disposed on the first photodiode PD1 in the first light-receiving region A1, and the second microlens ML2 can be disposed on the second photodiode PD2 in the second light-receiving region A2. Figure 2 Figure 3 In the example embodiment shown in FIG. 1A, each of the plurality of pixels PX can include a first microlens ML1 and a second microlens ML2. The first microlens ML1 can be disposed on the first photodiode PD1 in the first light-receiving region A1, and the second microlens ML2 can be disposed on the second photodiode PD2 in the second light-receiving region A2.

[0040] However, example embodiments are not limited to the arrangement shown in FIG. 1A. For example, four pixels PX arranged in a 2x2 array in the first direction and the second direction can be arranged in a tetrapattern including color filters of the same color. In some example embodiments, a portion of the plurality of pixels PX can omit a color filter, or can include a color filter that transmits red, green, blue, and other colors of light. Figure 2 Figure 3 In each of the plurality of pixels PX, the first photodiode PD1 and the second photodiode PD2 can be connected to a column line through a single pixel circuit. The single pixel circuit can include a plurality of transistors and a capacitor. Charge generated during an exposure time period and exceeding a full well capacity (FWC) of the first photodiode PD1 and the second photodiode PD2 can be transferred to the capacitor and stored.

[0041] In an image sensor including the pixel array 50 according to an example embodiment, a readout operation can be performed differently according to a length of an exposure time period. For example, when the image sensor is mounted on a vehicle (e.g., a car, etc.), the exposure time period can be configured to be longer than a predetermined time so that the image sensor can accurately identify a flickering light source. However, when the exposure time period is configured to be relatively long as described above, other objects other than the flickering light source can not be accurately imaged. For example, in an image of a high-speed moving object obtained, a shape of the object can be distorted.

[0042] In an image sensor including the pixel array 50 according to an example embodiment, a readout operation can be performed differently according to a length of an exposure time period. For example, when the image sensor is mounted on a vehicle (e.g., a car, etc.), the exposure time period can be configured to be longer than a predetermined time so that the image sensor can accurately identify a flickering light source. However, when the exposure time period is configured to be relatively long as described above, other objects other than the flickering light source can not be accurately imaged. For example, in an image of a high-speed moving object obtained, a shape of the object can be distorted.

[0043] ​​​In an example embodiment, to address the above-described problems, first image data can be generated as pixel signals corresponding to charges generated through a first exposure time period, and second image data can be generated as pixel signals corresponding to charges generated through a second exposure time period shorter than the first exposure time period. Assuming that the image sensor is mounted on a vehicle (e.g., a car, etc.), the first image data can be used to accurately image a flickering light source, and the second image data can be used to image other objects except for the flickering light source without distortion.

[0044] In an example embodiment, the first readout operation after the first exposure time period and the second readout operation after the second exposure time period can be performed differently. Due to the difference in the exposure time period, when the first readout operation and the second readout operation are performed in the same scheme, the signal-to-noise ratio, dynamic range, etc. of the first image data and / or the second image data can be degraded. In an example embodiment, by performing the first readout operation in a first scheme optimized for the relatively long first exposure time period and performing the second readout operation in a second scheme optimized for the relatively short second exposure time period, each of the signal-to-noise ratio and the dynamic range of the first image data and the second image data can be improved.

[0045] Figure 4 is a circuit diagram showing a pixel included in an image sensor according to some example embodiments.

[0046] Referring to Figure 4 , the pixel PX according to an example embodiment can include a first photodiode PD1, a second photodiode PD2, and a pixel circuit. In an example embodiment, the pixel circuit can include a floating diffusion node FD, a first transfer transistor TX1, a second transfer transistor TX2, a gain control transistor DRX, a capacitor CAP, a first switch transistor SW1, a second switch transistor SW2, a third switch transistor SW3, a reset transistor RX, an amplification transistor SF, and a selection transistor SX. Control signals TG1, TG2, RG, SG1, SG2, SG3, DRG, and SEL for controlling the plurality of transistors included in the pixel circuit can be output by a row driver.

[0047] The floating diffusion node FD can be connected to the first photodiode PD1 through the first transfer transistor TX1, and the charge of the first photodiode PD1 can be stored in the floating diffusion node FD when the first transfer transistor TX1 is turned on by the first transfer control signal TG1. The floating diffusion node FD can be connected to the second photodiode PD2 through the second transfer transistor TX2, the first switch transistor SW1, and the gain control transistor DRX. In an operation of transferring the charge generated by the second photodiode PD2 to the floating diffusion node FD, the second transfer transistor TX2, the first switch transistor SW1, and the gain control transistor DRX can be turned on by the row driver.

[0048] The gain control transistor DRX can be connected between the floating diffusion node FD and the first node N1. When the gain control transistor DRX is turned on by the gain control signal DRG, the capacitance of the floating diffusion node FD can increase, so that the conversion gain of the pixel PX can decrease. Conversely, when the gain control transistor DRX is turned off, the conversion gain of the pixel PX can increase.

[0049] The first switch transistor SW1 can be connected between the first node N1 and the second node N2, and the capacitor CAP and the second switch transistor SW2 can be connected between the second node N2 and the first power supply node. The first power supply node can be configured to supply the first power supply voltage VDD1. Between the second node N2 and the first power supply node, the second switch transistor SW2 and the capacitor CAP can be connected in series to each other.

[0050] The reset transistor RX can be connected between the first node N1 and the second power supply node. The second power supply node can be configured to supply the second power supply voltage VDD2, and can be connected to the drain of the reset transistor RX. According to an example embodiment, the second power supply voltage VDD2 can be the same voltage as the first power supply voltage VDD1. In some example embodiments, the second power supply voltage VDD2 can be a different voltage from the first power supply voltage VDD1. In an example embodiment, the second power supply voltage VDD2 can be greater than the first power supply voltage VDD1. The third switch transistor SW3 can be connected between the first power supply node and the second power supply node.

[0051] The gate of the amplification transistor SF can be connected to the floating diffusion node FD, and the amplification transistor SF can be connected between the third power supply node and the selection transistor SX. The third power supply node can be configured to supply a third power supply voltage VDD3. According to an example embodiment, the third power supply voltage VDD3 can be equal to at least one of the first power supply voltage VDD1 and the second power supply voltage VDD2. In an example embodiment, the third power supply voltage VDD3 can be equal to the second power supply voltage VDD2, and can be greater than the first power supply voltage VDD1. In an example embodiment, the third power supply voltage VDD3 can be greater than the first power supply voltage VDD1 and the second power supply voltage VDD2.

[0052] The amplification transistor SF can operate as a source follower amplifier, and can generate a signal by amplifying the voltage of the floating diffusion node FD. The signal generated by the amplification transistor SF can be output to the column line COL through the on operation of the selection transistor SX. The column line COL can be connected to one of the input terminals of the correlated double sampler, and the correlated double sampler can transmit an output signal determined by the signal output to the column line COL and a lamp voltage to the counter.

[0053] The operation of the pixel PX can include a shutter operation, an exposure operation, and a readout operation. In the shutter operation, the charges of the floating diffusion node FD and the photodiode PD (e.g., the first photodiode PD1 and / or the second photodiode PD2) can be removed, and in the exposure operation, the photodiode PD can be exposed to light for an exposure period and can generate charges. The exposure period can be predetermined. In the readout operation, the voltage of the floating diffusion node FD can be amplified and can be output to the column line COL, and, for example, a reset voltage and a signal voltage can be output to the column line COL. The reset voltage can be a voltage that can be output to the column line COL by the pixel circuit in a state in which the floating diffusion node FD is reset, and the signal voltage can be a voltage that can be output to the column line COL by the pixel circuit in a state in which at least a part of the charges generated by the photodiode PD is stored in the floating diffusion node FD.

[0054] In an example embodiment, the operation in which the pixel circuit outputs a voltage to the column line COL after a single exposure period can be performed two or more times. For example, the readout operation performed after a single exposure period can include a plurality of sub-readout operations performed in order. In at least a part of the plurality of sub-readout operations, the conversion gain of the pixel PX can be configured differently.

[0055] In example embodiments, the readout operation can include a relatively high conversion gain (HCG) sub-readout operation performed on the condition that the pixel PX has a relatively large conversion gain, and a relatively low conversion gain (LCG) sub-readout operation performed on the condition that the pixel PX has a relatively small conversion gain. In example embodiments, the readout operation can include a lateral overflow integrated capacitor (LOFIC) readout operation that reads a voltage corresponding to the charge generated during the exposure time period equal to or more than the FWC of the photodiodes PD1 and PD2 and stored in the capacitor CAP through overflow.

[0056] As described above, by performing two or more sub-readout operations after a single exposure time period, the signal-to-noise ratio and dynamic range of the image sensor can be improved. In example embodiments, depending on the length of the exposure time period, the number of sub-readout operations performed after the exposure time period and the method of performing each sub-readout operation can change. By selecting and combining the sub-readout operations and performing the operations in an optimized manner according to the length of the exposure time period, the signal-to-noise ratio and dynamic range of the image data generated by the image sensor can be improved regardless of the length of the exposure time period.

[0057] Figure 5 and Figure 6 is a diagram illustrating an operation of an image sensor according to some example embodiments.

[0058] Figure 5 may be a diagram illustrating an operation of a pixel included in an image sensor according to example embodiments. The pixel can include a first photodiode PD1, a second photodiode PD2 having a light-receiving area smaller than that of the first photodiode PD1, and a pixel circuit. In example embodiments, pixels included in a pixel array can be arranged in a row direction and a column direction, and can be connected to a row driver in the row direction and to a readout circuit in the column direction. The row driver can simultaneously drive pixels arranged in the row direction, and thus, the operations illustrated can be simultaneously performed in two or more pixels arranged in the row direction. Figure 5 For example, in some embodiments, the pixel can be the pixel PX described above with reference to Figures 1 to 4 .

[0059] The operation of the pixel can include a first shutter operation SH1, a first time period exposure EIT1, a first readout operation RD1, a second shutter operation SH2, a second time period exposure EIT2, and a second readout operation RD2. The first time period exposure EIT1 and the second time period exposure EIT2 can be different, and for example, the first time period exposure EIT1 can be longer than the second time period exposure EIT2.

[0060] The first image data can be generated by performing a first shutter operation SH1, a first time period exposure EIT1, and a first readout operation RD1 per pixel, and the second image data can be generated by performing a second shutter operation SH2, a second time period exposure EIT2, and a second readout operation RD2 per pixel. When the image sensor is mounted on a vehicle (e.g., a car, etc.), the first image data and the second image data can be output in each of repeated frame periods, or the first image data and the second image data can be output in a part of frame periods.

[0061] For example, the first image data can be image data for accurately capturing a flickering light source, and the second image data can be image data for accurately capturing an object without distortion. According to an example embodiment, the resolution of the first image data can be higher than the resolution of the second image data. According to an example embodiment, the frame rate of the first image data can be lower than the frame rate of the second image data, and the frame period in which the first image data is output in units of frames can be longer than the frame period in which the second image data is output in units of frames.

[0062] In each of the first shutter operation SH1 and the second shutter operation SH2, a reset operation can be performed to remove the charges of the photodiode and the floating diffusion node of the pixel. For example, in the first shutter operation SH1 and the second shutter operation SH2, the photodiode and the floating diffusion node can be electrically connected to a power source node.

[0063] During the first time period exposure EIT1 and the second time period exposure EIT2, the photodiode can be exposed to light and can generate charges. For example, in each of the first time period exposure EIT1 and the second time period exposure EIT2, a transfer transistor can be turned off, and the photodiode and the floating diffusion node can be electrically isolated from each other. Thus, the charges generated by the photodiode can not move to the floating diffusion node.

[0064] However, in an environment in which the intensity of light entering the photodiode is extremely strong, charges exceeding the FWC of the photodiode can be generated. In this case, the excess charges generated in the photodiode cause a voltage drop at a node at which the photodiode and the transfer transistor are connected to each other, which can cause leakage through the transfer transistor, and the charges generated by the photodiode can move to the floating diffusion node.

[0065] In an example embodiment, the pixel can be configured such that the charge transferred from the photodiode to the floating diffusion node during the first time period exposure EIT1 and / or the second time period exposure EIT2 can move to a capacitor connected to the floating diffusion node. Thus, in an environment where the light intensity is extremely strong, the generated charge that exceeds the FWC of the photodiode can pass through the floating diffusion node and can be stored in the capacitor. Thereafter, in at least one of the first readout operation and the second readout operation, the pixel circuit can output a voltage corresponding to the charge stored in the capacitor. Thus, even in an environment having an extremely high illuminance, image data that accurately represents an object can be generated, and the dynamic range of the image sensor can be improved.

[0066] Figure 6 may be a diagram showing the operation of the image sensor during a single frame period FT in which the first image data and the second image data are output. Referring to Figure 6 In the pixel array of the image sensor, pixels can be selected along the row lines ROW, and the first shutter operation SH1 can be performed. The first shutter operation SH1 can be performed in order from the pixels of the row lines whose second readout operation RD2 has ended in the previous frame period. As described above, when the first shutter operation SH1 is performed in the pixels arranged along one of the row lines ROW, a reset operation that removes the charges of the floating diffusion nodes and the photodiodes of the pixels can be performed.

[0067] For example, when the first shutter operation SH1 is completed for the pixels arranged along the first row line ROW 1, the pixels can be exposed to light during the first time period exposure EIT1. The first time period exposure EIT1 can be defined as a period of time from when the first shutter operation SH1 is completed for the pixels in the first row line ROW 1 to when the first readout operation RD1 is performed for the pixels in the first row line ROW 1. While the pixels arranged along the first row line ROW 1 are exposed to light, the first shutter operation SH1 can be performed in order for each of the other row lines ROW 2 to ROWm.

[0068] The first readout operation RD1 can be performed for the pixels that have undergone the first time period exposure EIT1. In an example embodiment, the first readout operation RD1 can include a plurality of main readout operations performed in order, and for example, in each of the plurality of main readout operations, the pixel can output a signal using a different scheme.

[0069] When the first readout operation RD1 is completed for the pixels connected to the row line ROW, a second shutter operation SH2 may be initiated. Similar to the first shutter operation SH1, the second shutter operation SH2 may include operations for selecting pixels along the row line ROW and resetting the charge of the floating diffusion node and the photodiode. Pixels that have completed the second shutter operation SH2 may be exposed to light for a second exposure time period EIT2. The second exposure time period EIT2 may be shorter than the first exposure time period EIT1. For pixels that have completed the second exposure time period EIT2, the second readout operation RD2 may be performed.

[0070] As described above, the first image data generated based on the signal output by the pixel in the first readout operation RD1 and the second image data generated based on the signal output by the pixel in the second readout operation RD2 can be different from each other. For example, the first image data and the second image data can be different from each other in terms of resolution, color information, etc.

[0071] Since the first exposure period EIT1 and the second exposure period EIT2 are different, when the first readout operation RD1 and the second readout operation RD2 are performed in the same scheme, the signal-to-noise ratio, dynamic range, etc. of the first image data and / or the second image data may be deteriorated. In example embodiments, the first readout operation RD1 and the second readout operation RD2 may be performed in different manners, thereby improving the signal-to-noise ratio, dynamic range, etc. of each of the first image data and the second image data.

[0072] exist Figure 5 In the example embodiment shown, the first read operation RD1 may include a plurality of main read operations MRD, and the second read operation RD2 may include a plurality of secondary read operations SRD. In an example embodiment, the plurality of main read operations MRD may include a first main read operation MRD1, a second main read operation MRD2, a third main read operation MRD3, and a fourth main read operation MRD4. In an example embodiment, the plurality of secondary read operations SRD may include a first read operation SRD1, a second read operation SRD2, a third read operation SRD3, and a fourth read operation SRD4. Figure 5 Each of the first main readout operation MRD1 and the first readout operation SRD1 may be an operation of reading a pixel signal corresponding to charges generated by the first photodiode PD1 under a condition that the pixel has a relatively high conversion gain.

[0073] The second main readout operation MRD2 and the second sub readout operation SRD2 can be operations for reading a pixel signal corresponding to the charge generated by the first photodiode PD1 under a condition that the pixel has a relatively low conversion gain. The third main readout operation MRD3 and the third sub readout operation SRD3 can be operations for reading a pixel signal corresponding to the charge generated by the second photodiode PD2 under a condition that the pixel has a relatively high conversion gain. In Figure 5 In the example embodiment illustrated, the first to third main readout operations MRD1 to MRD3 can be executed in the same manner as the first to third sub readout operations SRD1 to SRD3.

[0074] The fourth main readout operation MRD4 and the fourth sub readout operation SRD4 can be executed in different manners. Referring to Figure 5 The fourth main readout operation MRD4 can be an operation for reading a pixel signal corresponding to the charge generated to exceed the FWC of the second photodiode PD2 and stored in the capacitor. The fourth sub readout operation SRD4 can be an operation for reading a pixel signal corresponding to the charge generated to exceed the FWC of each of the first photodiode PD1 and the second photodiode PD2 and stored in the capacitor.

[0075] By configuring the second readout operation RD2 after the relatively short second time period exposure EIT2 to be different from the first readout operation RD1 after the relatively long first time period exposure EIT1, the signal-to-noise ratio and the dynamic range of the second image data generated by the second readout operation RD2 can be improved. For example, by reading a pixel signal corresponding to the charge generated to exceed the FWC of each of the first photodiode PD1 and the second photodiode PD2 in the fourth sub readout operation SRD4, the pixel signal in a low illumination region rather than an unnecessary high illumination region can be ensured. Thus, in an illumination region necessary for representing an object to be imaged with the second image data, the signal-to-noise ratio can be improved. In Figure 5 In the example embodiment illustrated, the fourth sub readout operation SRD4 executed last in the second readout operation RD2 can be executed in a different manner from each of the main readout operations MRD1 to MRD4.

[0076] In the example embodiment, when the plurality of sub readout operations SRD1 to SRD4 are executed, the number of times the pixel outputs a signal corresponding to the charge generated by the first photodiode PD1 can be greater than the number of times the pixel outputs a signal corresponding to the charge generated by the second photodiode PD2. Referring to Figure 5When the plurality of sub readout operations SRD1 to SRD4 are performed, a signal corresponding to the charge generated by the first photodiode PD1 can be output from the first sub readout operation SRD1, the second sub readout operation SRD2, and the fourth sub readout operation SRD4, and a signal corresponding to the charge generated by the second photodiode PD2 can be output from the third sub readout operation SRD3 and the fourth sub readout operation SRD4.

[0077] Figures 7 to 15 is a diagram illustrating an operation of an image sensor according to some example embodiments.

[0078] Referring to Figures 7 to 15 Each pixel PX included in the image sensor described above can have a structure similar to that described above with reference to Figures 1 to 4 The foregoing example embodiments described above can have similar structures. Figure 7 may be a timing chart illustrating the first shutter operation SH1, the first time period exposure EIT1, and the first readout operation RD1 described above with reference to Figure 5 may be a timing chart illustrating the first shutter operation SH1, the first time period exposure EIT1, and the first readout operation RD1 described above with reference to Figures 7 to 15 In the operation of the pixel PX described above, the conduction / cutoff of each of the transistors TX1, TX2, RX, SW1, SW2, SW3, DRX, and SX included in the pixel PX can be determined by the control signals TG1, TG2, RG, SG1, SG2, SG3, DRG, and SEL output by the row driver.

[0079] Figure 8 may be a diagram illustrating the operation of the pixel PX during the first shutter operation time period TSH1 shown in Figure 7 may be a diagram illustrating the operation of the pixel PX during the first shutter operation time period TSH1 shown in Figure 7 and Figure 8 As shown in

[0080] Referring to Figure 7 and Figure 9During the first-time period exposure EIT1, the second switch transistor SW2 can be turned on, and the other transistors SW1, TX1, TX2, SW3, RX, DRX, and SX can be turned off. The first photodiode PD1 and the second photodiode PD2 can generate charges in response to light, and the generated charges can be retained in the first photodiode PD1 and the second photodiode PD2. However, in an environment in which an extremely strong light is input, charges equal to or more than the FWC of the first photodiode PD1 and the second photodiode PD2 can be generated. Hereinafter, for convenience of description, the charges generated to exceed the FWC of each of the first photodiode PD1 and the second photodiode PD2 can be defined as excess charges.

[0081] For example, when the second photodiode PD2 generates excess charges, the voltage of the node at which the second transfer transistor TX2 and the second photodiode PD2 are connected to each other (for example, the source voltage of the second transfer transistor TX2) can decrease due to the charges. Thus, even if the second transfer control signal TG2 input to the gate of the second transfer transistor TX2 remains at a voltage corresponding to logic low, a path for charge movement can be formed through the channel of the second transfer transistor TX2, and the excess charges of the second photodiode PD2 can move to the second node N2.

[0082] In an example embodiment, the second switch transistor SW2 connected to the capacitor CAP can be turned on during the first-time period exposure EIT1, so that the excess charges moved to the second node N2 can move to and be stored in the capacitor CAP. The first switch transistor SW1 can be turned off, so that the excess charges can not move to the floating diffusion node FD. According to an example embodiment, the gain control transistor DRX can be turned off together with the first switch transistor SW1 during the first-time period exposure EIT1.

[0083] Referring to Figure 7 and Figure 9 During the first-time period exposure EIT1, the first transfer control signal TG1 can be configured to have a lower voltage than the voltage of the second transfer control signal TG2. The first transfer transistor TX1 can be turned off more strongly than the second transfer transistor TX2, and the first transfer transistor TX1 can not generate a path for charge movement due to excess charges generated by the first photodiode PD1. Thus, the excess charges generated by the second photodiode PD2 can be mainly stored in the capacitor CAP.

[0084] In Figure 7 the example embodiment illustrated, the pixel PX can perform the first readout operation RD1 after the first-time period exposure EIT1 has elapsed. As described above with reference to Figure 5The first read operation RD1 can include a plurality of main read operations MRD1 to MRD4.

[0085] Referring to Figure 7 During the first main read period TMR1, the selection transistor SX can be turned on by the selection control signal SEL, and the reset transistor RX can be turned off. When the selection transistor SX is turned on, the amplification transistor SF can amplify the voltage of the floating diffusion node FD and can output a reset voltage.

[0086] Referring to Figure 7 The reset voltage can be output twice. The first reset voltage can be output in a state in which the gain control transistor DRX is turned on, and the second reset voltage can be output in a state in which the gain control transistor DRX is turned off. The first reset voltage can be a reset voltage output in a condition in which the pixel PX has a relatively low conversion gain, and the second reset voltage can be a reset voltage output in a condition in which the pixel PX has a relatively high conversion gain.

[0087] When the reset voltage is output, as shown in Figure 7 and Figure 10 , the first transfer transistor TX1 can be turned on, and the charge of the first photodiode PD1 can be moved to the floating diffusion node FD. The amplification transistor SF can output a signal voltage obtained by amplifying the voltage of the floating diffusion node FD to the column line COL. The readout circuit connected to the column line COL can derive a first pixel signal from a difference between the reset voltage and the signal voltage.

[0088] The first pixel signal can be a signal for covering a relatively low first range of illuminance. Referring to Figure 10 and Figure 11 , the gain control transistor DRX can be turned off while the pixel PX outputs the signal voltage to the column line COL. Accordingly, the capacitance of the floating diffusion node FD can be kept sufficiently low, and the signal voltage can be output in a condition in which the pixel PX has a relatively high conversion gain.

[0089] Referring to Figure 11 The first transfer transistor TX1 can be turned on by the first transfer control signal TG1 so that a part of the charge of the first photodiode PD1 can be transferred to the floating diffusion node FD. Since the gain control transistor DRX is turned off, the first node N1 and the floating diffusion node FD are separated from each other so that the charge can be stored in the floating diffusion node FD having a relatively low capacitance, and the signal voltage can be output to the column line COL in a condition of a relatively high conversion gain.

[0090] Thereafter, referring to Figure 7 and Figure 12During the second main readout period TMR2, the gain control transistor DRX can be turned on, and the first node N1 can be connected to the floating diffusion node FD. Thus, during the second main readout period TMR2, the capacitance of the floating diffusion node FD can be added to the capacitance of the gain control transistor DRX and the capacitance of the first node N1, such that the pixel PX can output a signal under a relatively low conversion gain condition.

[0091] While the gain control transistor DRX is turned on and the capacitance of the floating diffusion node FD is increased, the first transfer transistor TX1 can be turned on, such that residual charge remaining in the first photodiode PD1 can be transferred to the floating diffusion node FD. Referring to Figure 13 When the first transfer transistor TX1 is turned on during the second main readout period TMR2, residual charge remaining in the first photodiode PD1, which can not have moved to the floating diffusion node FD during the first main readout period TMR1, can move to the floating diffusion node FD.

[0092] As Figure 13 shown, the capacitance of the floating diffusion node FD can be the sum of the capacitance of the floating diffusion node FD and the capacitance CN1 of the first node N1 and the gain control transistor DRX. As such, a signal voltage can be output to the column line COL during the second main readout period TMR2 under a condition that the pixel PX has a relatively low conversion gain.

[0093] Since at least a portion of the charge of the first photodiode PD1 has moved to the floating diffusion node FD during the first main readout period TMR1, a reset voltage can not be output prior to the signal voltage during the second main readout period TMR2. In an example embodiment, the reset voltage can be output twice during the first main readout period TMR1 as described above, and the first reset voltage can be the reset voltage output under a condition that the pixel PX has a low conversion gain. The readout circuit can generate a second pixel signal under a low conversion gain condition using a difference between the first reset voltage output by the pixel PX during the first main readout period TMR1 and the signal voltage output by the pixel PX during the second main readout period TMR2. The second pixel signal can be a signal for covering an illumination of a second range higher than the first range.

[0094] Referring to Figure 7 The reset transistor RX can be turned on prior to termination of the second main readout period TMR2 or after termination of the second main readout period TMR2, such that the floating diffusion node FD can be reset. Thus, in a third main readout period TMR3, the pixel PX can output a reset voltage. When the reset voltage is output, the second transfer transistor TX2, the first switch transistor SW1, and the gain control transistor DRX can be turned on as shown in Figure 7 and Figure 14 shown.

[0095] Accordingly, the charge of the second photodiode PD2 can move to the floating diffusion node FD, and the amplification transistor SF can amplify the voltage of the floating diffusion node FD and can output a signal voltage. The readout circuit can generate a third pixel signal using a difference between the reset voltage and the signal voltage output by the pixel PX in the third main readout period TMR3. The third pixel signal can be a signal for covering a third range of illuminance higher than the second range of illuminance.

[0096] Figure 15 may be a diagram showing the operation of the pixel PX in the fourth main readout period TMR4. Referring to Figure 7 and Figure 15 During the fourth main readout period TMR4, the first to third switch transistors SW1 to SW3, the gain control transistor DRX, and the second transfer transistor TX2 can be turned on. Since the first to third switch transistors SW1 to SW3 and the gain control transistor DRX are turned on, the charge stored in the capacitor CAP can be transferred to the floating diffusion node FD. Through the column line COL, a signal voltage corresponding to the charge stored in the capacitor CAP can be output.

[0097] When the signal voltage is output, the row driver can turn on the reset transistor RX. Accordingly, a reset operation of removing the charge of the floating diffusion node FD is performed, and a reset voltage can be output through the column line COL. In the fourth main readout period TMR4, the signal voltage can be output before the reset voltage. The readout circuit can generate a fourth pixel signal using a difference between the reset voltage and the signal voltage output by the pixel PX. The fourth pixel signal can be a signal for covering a fourth range of illuminance higher than the third range of illuminance.

[0098] As described above, the capacitor CAP can store the excess charge generated as exceeding the FWC of the second photodiode PD2 during the exposure period. In a condition in which strong light configured to generate the charge exceeding the FWC of the second photodiode PD2 enters the pixel PX, the charge can be stored in the capacitor CAP. Accordingly, the fourth pixel signal generated according to the charge stored in the capacitor CAP can be used to cover an extremely high illuminance.

[0099] When the first shutter operation SH1, the first period exposure EIT1, and the first readout operation RD1 are completed as in the example embodiment described with reference to Figures 7 to 15 When the first shutter operation SH1, the first period exposure EIT1, and the first readout operation RD1 are completed as in the example embodiment described with reference to

[0100] For example, first image data can be generated from the signal output by the pixel PX in the first readout operation RD1, and second image data can be generated from the signal output by the pixel PX in the second readout operation RD2. The first image data and the second image data can have different characteristics, and can be used for different purposes. For example, the first image data can be used to accurately capture a flickering light source, and the second image data can be used to accurately capture an object without distortion. Hereinafter, the second shutter operation SH2, the second time period exposure EIT2, and the second readout operation RD2 of the pixel PX will be described with reference to Figures 16 to 18

[0101] Figures 16 to 18 is a diagram illustrating an operation of an image sensor according to some example embodiments.

[0102] Each pixel PX included in the image sensor described with reference to Figures 16 to 18 may have a similar structure to the foregoing example embodiments described with reference to Figures 1 to 4 Figure 16 may be a timing diagram illustrating the second shutter operation SH2, the second time period exposure EIT2, and the second readout operation RD2. In the operation of the pixel PX described with reference to Figures 16 to 18

[0103] With reference to Figure 16 , the second shutter operation SH2 can be performed in the same manner as the first shutter operation SH1 described with reference to Figure 7 and Figure 8 As shown in Figure 16 , in the second shutter operation time period TSH2, the first switch transistor SW1, the second switch transistor SW2, the third switch transistor SW3, the reset transistor RX, and the gain control transistor DRX can be turned on, and the selection transistor SX can be turned off. When the first transfer transistor TX1 and the second transfer transistor TX2 are turned on, the charges of the first photodiode PD1, the second photodiode PD2, the floating diffusion node FD, and the capacitor CAP can be removed by the first power supply voltage VDD1 and the second power supply voltage VDD2.

[0104] As shown in Figure 17 ​​​As shown, during the second time period exposure EIT2, in the pixel PX, the first switch transistor SW1, the second switch transistor SW2, and the gain control transistor DRX can be turned on, and the other transistors TX1, TX2, SW3, RX, and SX can be turned off. The first photodiode PD1 and the second photodiode PD2 can generate charges in response to light. In an environment where an input light is strong, excess charges equal to or more than the FWC of the first photodiode PD1 and the second photodiode PD2 can be generated.

[0105] During the second time period exposure EIT2, the excess charges generated by each of the first photodiode PD1 and the second photodiode PD2 can be stored in the capacitor CAP. The gain control transistor DRX and the first switch transistor SW1 can be turned on to provide a charge path through which the excess charges of the first photodiode PD1 can move to the capacitor CAP. The excess charges of the first photodiode PD1 can move to the capacitor CAP through the first node N1 and the second node N2, and the excess charges of the second photodiode PD2 can move to the capacitor CAP through the second node N2. Unlike the first time period exposure EIT1, the first transfer control signal TG1 and the second transfer control signal TG2 can be configured to have the same voltage.

[0106] The second readout operation RD2 performed after the second time period exposure EIT2 can be performed in a different manner from the first readout operation RD1 performed after the first time period exposure EIT1. As described above with reference to Figure 5 The second readout operation RD2 can include a plurality of sub readout operations SRD1 to SRD4, and the first to third sub readout operations SRD1 to SRD3 can be performed in the same manner as the first to third main readout operations MRD1 to MRD3. Thus, the operation of the pixel PX in each of the first to third sub readout time periods TSR1 to TSR3 can be the same as the operation of the pixel PX in each of the first to third main readout time periods TMR1 to TMR3 described above.

[0107] Figure 18 may be a diagram showing the operation of the pixel PX in the fourth sub readout time period TSR4. With reference to Figure 16 and Figure 18During the fourth readout period TSR4, the first to third switch transistors SW1 to SW3, the gain control transistor DRX, the first transfer transistor TX1, and the second transfer transistor TX2 can be turned on. Due to the first to third switch transistors SW1 to SW3 and the gain control transistor DRX being turned on, the charge stored in the capacitor CAP can move to the floating diffusion node FD. The signal voltage corresponding to the charge stored in the capacitor CAP can be output through the column line COL.

[0108] When the signal voltage is output, the row driver can turn on the reset transistor RX. Accordingly, a reset operation of removing the charge of the floating diffusion node FD can be performed, and a reset voltage can be output through the column line COL. During the fourth readout period TSR4, the signal voltage can be output before the reset voltage. The readout circuit can use a difference between the reset voltage and the signal voltage output by the pixel PX, and can generate a pixel signal.

[0109] As described above, the capacitor CAP can store the excess charge generated to exceed the FWC of the first and second photodiodes PD1 and PD2 during the exposure period. The charge can be stored in the capacitor CAP under a condition in which strong light enters the pixel PX configured to generate the charge exceeding the FWC of the first and second photodiodes PD1 and PD2.

[0110] During the second exposure period EIT2, the charge generated to exceed the FWC of each of the first and second photodiodes PD1 and PD2 can be stored in the capacitor CAP, and a pixel signal corresponding to the charge stored in the capacitor CAP can be read out during the fourth readout period TSR4. Accordingly, it is possible to improve a signal-to-noise ratio of a pixel signal in an illumination region for clearly capturing an object rather than a high-illumination region.

[0111] Figure 19 is a diagram illustrating an operation of an image sensor according to some example embodiments.

[0112] Figure 19 may be a diagram illustrating an operation of a pixel included in an image sensor according to an example embodiment. In an example embodiment, the pixel included in the pixel array can be arranged along a row direction and a column direction, can be connected to a row driver along the row direction, and can be connected to a readout circuit along the column direction. The operation illustrated in can be simultaneously performed in two or more pixels arranged along the row direction. Figure 19

[0113] ​The operations of the pixel can include a first shutter operation SH1, a first time period exposure EIT1, a first readout operation RD1, a second shutter operation SH2, a second time period exposure EIT2, and a second readout operation RD2. The first time period exposure EIT1 and the second time period exposure EIT2 can be different, and for example, the first time period exposure EIT1 can be longer than the second time period exposure EIT2. First image data can be generated by performing the first shutter operation SH1, the first time period exposure EIT1, and the first readout operation RD1 for each pixel, and second image data can be generated by performing the second shutter operation SH2, the second time period exposure EIT2, and the second readout operation RD2 for each pixel. In an example embodiment, a resolution of the first image data can be higher than a resolution of the second image data.

[0114] In the example embodiments described with reference to Figure 19 The first shutter operation SH1, the first time period exposure EIT1, the first readout operation RD1, the second shutter operation SH2, and the second time period exposure EIT2 can be similar to those described with reference to Figure 5 For example, in each of the first shutter operation SH1 and the second shutter operation SH2, a reset operation that removes charge of a photodiode and a floating diffusion node of the pixel can be performed. During the first time period exposure EIT1 and the second time period exposure EIT2, the photodiode can be exposed to light and charge can be generated.

[0115] The first readout operation RD1 can include a first main readout operation MRD1 to a fourth main readout operation MRD4, and the first main readout operation MRD1 to the fourth main readout operation MRD4 can be the same as those described above with reference to Figures 10 to 15 The second readout operation RD2 can include a first sub readout operation SRD1 to a fourth sub readout operation SRD4, and the first sub readout operation SRE1 to the third sub readout operation SRD3 can be performed in the same manner as the first main readout operation MRD1 to the third main readout operation MRD3. The fourth sub readout operation SRD4 can be performed in a different manner than the fourth main readout operation MRD4.

[0116] In an example embodiment, the fourth sub readout operation SRD4 can be an operation of reading, from the pixel, a signal corresponding to charge that is generated as exceeding a FWC of a first photodiode of the pixel during the second time period exposure EIT2 and is stored in a capacitor. The first transfer transistor and the second transfer transistor can be controlled differently during the second time period exposure EIT2 so that the charge generated as exceeding the FWC of the first photodiode can be stored mainly in the capacitor, which will be described in more detail with reference to Figure 20 and Figure 21 In an example embodiment, the fourth sub readout operation SRD4 can be an operation of reading, from the pixel, a signal corresponding to charge that is generated as exceeding a FWC of a first photodiode of the pixel during the second time period exposure EIT2 and is stored in a capacitor. The first transfer transistor and the second transfer transistor can be controlled differently during the second time period exposure EIT2 so that the charge generated as exceeding the FWC of the first photodiode can be stored mainly in the capacitor, which will be described in more detail with reference to

[0117] In example embodiments, when performing the plurality of readout operations SRD1 to SRD4, the number of times the pixel outputs a signal corresponding to the charges generated by the first photodiode PD1 may be greater than the number of times the pixel outputs a signal corresponding to the charges generated by the second photodiode PD2. Figure 19 When multiple read-out operations SRD1 to SRD4 are performed, signals corresponding to the charges generated by the first photodiode PD1 can be output from the first read-out operation SRD1, the second read-out operation SRD2, and the fourth read-out operation SRD4, and a signal corresponding to the charges generated by the second photodiode PD2 can be output from the third read-out operation SRD3.

[0118] Figure 20 and Figure 21 is a diagram illustrating operations of an image sensor according to some example embodiments.

[0119] Figure 20 Can be shown in reference Figure 19 A diagram illustrating the operation of the pixel PX during the second exposure period EIT2 in an example embodiment is described. Figure 21 Can be shown in reference Figure 19 A diagram illustrating a fourth readout operation SRD4 of a pixel PX in the described example embodiment.

[0120] First, refer to Figure 20 During the second exposure period EIT2, the first transfer transistor TX1, the second transfer transistor TX2, the third switch transistor SW3 and the reset transistor RX may be turned off. During the second exposure period EIT2, the gain control transistor DRX, the first switch transistor SW1 and the second switch transistor SW2 may be turned on.

[0121] The first photodiode PD1 and the second photodiode PD2 may generate charge in response to light entering from the outside. The generated charge may not pass through the first transfer transistor TX1 and the second transfer transistor TX2 and may remain in the first photodiode PD1 and the second photodiode PD2. However, in an environment with extremely strong input light, some of the charge generated by the first photodiode PD1 and the second photodiode PD2 may move.

[0122] For example, the voltage of the source of the first transfer transistor TX1 can decrease due to the charge generated to exceed the FWC of the first photodiode PD1. Therefore, even if the first transfer control signal TG1 input to the gate of the first transfer transistor TX1 is maintained at a voltage corresponding to logic low, a path for charge movement can be formed through the channel of the first transfer transistor TX1. The charge that has passed through the first transfer transistor TX1 can be moved to the capacitor CAP through the gain control transistor DRX, the first switch transistor SW1, and the second switch transistor SW2, and can be stored in the capacitor CAP.

[0123] In Figure 20 In the example embodiment illustrated, during the second time period exposure EIT2, the second transfer control signal TG2 can be configured to be lower in voltage than the first transfer control signal TG1, and the second transfer transistor TX2 can be more strongly turned off than the first transfer transistor TX1. Therefore, the charge generated to exceed the FWC of the second photodiode PD2 can not pass through the second transfer transistor TX2, and the charge transferred from the first photodiode PD1 can be stored mainly in the capacitor CAP.

[0124] Thereafter, referring to Figure 21 In order to perform the fourth readout operation SRD4, the second transfer transistor TX2 and the reset transistor RX in the pixel PX can be turned off. The charge stored in the capacitor CAP can be moved to the floating diffusion node FD through the second node N2 and the first node N1, and the first transfer transistor TX1 can be turned on so that the residual charge remaining in the first photodiode PD1 can also be moved to the floating diffusion node FD. The amplification transistor SF can amplify the voltage of the floating diffusion node FD, and can output a signal voltage to the column line COL.

[0125] In the fourth readout operation SRD4, a reset voltage can be output to the column line COL after the signal voltage is output. Upon output of the signal voltage, before the reset voltage is output, a reset operation of removing the charge of the floating diffusion node FD by turning on the reset transistor RX can be performed.

[0126] Figure 22 is a diagram illustrating an operation of an image sensor according to some example embodiments.

[0127] Figure 22 may be a diagram illustrating an operation of a pixel included in an image sensor according to an example embodiment. In Figure 22In the example embodiment shown, the operations of the pixel can include a first shutter operation SH1, a first time period exposure EIT1, a first readout operation RD1, a second shutter operation SH2, a second time period exposure EIT2, and a second readout operation RD2. The first time period exposure EIT1 and the second time period exposure EIT2 can be different, and for example, the first time period exposure EIT1 can be longer than the second time period exposure EIT2. First image data can be generated by performing the first shutter operation SH1, the first time period exposure EIT1, and the first readout operation RD1 for each pixel, and second image data can be generated by performing the second shutter operation SH2, the second time period exposure EIT2, and the second readout operation RD2 for each pixel.

[0128] In the example embodiment described with reference to Figure 22 , the first shutter operation SH1, the first time period exposure EIT1, the first readout operation RD1, the second shutter operation SH2, and the second time period exposure EIT2 can be similar to those described above with reference to Figure 5 . For example, in each of the first shutter operation SH1 and the second shutter operation SH2, a reset operation that removes charge of the photodiode and the floating diffusion node of the pixel can be performed. During the first time period exposure EIT1 and the second time period exposure EIT2, the photodiode can be exposed to light and charge can be generated. The first readout operation RD1 can include a first main readout operation MRD1 to a fourth main readout operation MRD4, and the first main readout operation MRD1 to the fourth main readout operation MRD4 can be the same as those described above with reference to Figures 10 to 15 .

[0129] With reference to Figure 22 , the second readout operation RD2 can include a first sub readout operation SRD1 to a third sub readout operation SRD3, and the number of times that the pixel outputs a signal in the second readout operation RD2 can be less than the number of times that the pixel outputs a signal in the first readout operation RD1. In Figure 22 the example embodiment shown, the first sub readout operation SRD1 can be an operation of reading a pixel signal corresponding to charge generated by the first photodiode PD1 under a condition in which the pixel has a relatively high conversion gain.

[0130] The second sub readout operation SRD2 can be an operation of reading a pixel signal corresponding to charge generated by the first photodiode PD1 under a condition in which the pixel has a relatively low conversion gain. The third sub readout operation SRD3 can be an operation of reading a pixel signal corresponding to charge that is generated to exceed the FWC of each of the first photodiode PD1 and the second photodiode PD2 and is stored in the capacitor. As Figure 22As shown, by configuring the sub-reading operations SRD1 to SRD3 included in the second readout operation RD2, the signal-to-noise ratio in the low-light area can be increased, so that the dynamic range can be extended to the low-light area, and the signal-to-noise ratio in the light area representing the object can be improved.

[0131] In example embodiments, when performing the plurality of readout operations SRD1 to SRD3, the number of times the pixel outputs a signal corresponding to the charges generated by the first photodiode PD1 may be greater than the number of times the pixel outputs a signal corresponding to the charges generated by the second photodiode PD2. Figure 23 , when performing multiple readout operations SRD1 to SRD3, a signal corresponding to the charge generated by the first photodiode PD1 can be output in the first readout operation SRD1 to the third readout operation SRD3, and a signal corresponding to the charge generated by the second photodiode PD2 can be output in the third readout operation SRD3.

[0132] Figure 23 is a diagram illustrating operations of an image sensor according to some example embodiments.

[0133] Figures 1 to 4 It can be shown according to Figure 23 Schematic diagram of the operation of pixels included in an image sensor. Figure 23 In the illustrated example embodiment, pixel operations may include a first shutter operation SH1, a first exposure time EIT1, a first readout operation RD1, a second shutter operation SH2, a second exposure time EIT2, and a second readout operation RD2. The first exposure time EIT1 and the second exposure time EIT2 may be different, and for example, the first exposure time EIT1 may be longer than the second exposure time EIT2. First image data may be generated by performing the first shutter operation SH1, the first exposure time EIT1, and the first readout operation RD1 on each pixel, and second image data may be generated by performing the second shutter operation SH2, the second exposure time EIT2, and the second readout operation RD2 on each pixel.

[0134] In reference Figure 22 In the described example embodiment, the first shutter operation SH1, the first exposure time period EIT1, the second shutter operation SH2, the second exposure time period EIT2, and the second readout operation RD2 may be the same as those described above with reference to FIG. Figure 23 Similar to those described in . However, in Figure 23 In the example embodiment shown, the first read operation RD1 may include first to third main read operations MRD1 to MRD3. Figure 23In the example embodiment shown, the number of times the pixel outputs a signal in the first readout operation RD1 can be equal to the number of times the pixel outputs a signal in the second readout operation RD2.

[0135] Referring to Figure 24 , the first main readout operation MRD1 can be an operation of reading a pixel signal corresponding to the charge generated by the first photodiode PD1 from the pixel under a condition in which the pixel has a relatively high conversion gain. According to an example embodiment, the first main readout operation MRD1 can be an operation of reading a pixel signal corresponding to the charge generated by the first photodiode PD1 from the pixel under a condition in which the pixel has a relatively low conversion gain. The second main readout operation MRD2 can be an operation of reading a pixel signal corresponding to the charge generated by the second photodiode PD2 from the pixel under a condition in which the pixel has a relatively high conversion gain. The third main readout operation MRD3 can be an operation of reading a pixel signal corresponding to the charge generated to exceed the FWC in the second photodiode PD2 and stored in the capacitor.

[0136] Figure 24 is a diagram illustrating an operation of an image sensor according to an example embodiment.

[0137] Figures 1 to 4 may be a diagram illustrating an operation of a pixel included in an image sensor according to Figure 24 . The operation of the pixel can include a first shutter operation SH1, a first time period exposure EIT1, a first readout operation RD1, a second shutter operation SH2, a second time period exposure EIT2, and a second readout operation RD2. For example, the first time period exposure EIT1 can be longer than the second time period exposure EIT2. A first image data can be generated by each pixel performing the first shutter operation SH1, the first time period exposure EIT1, and the first readout operation RD1, and a second image data can be generated by each pixel performing the second shutter operation SH2, the second time period exposure EIT2, and the second readout operation RD2.

[0138] In the example embodiment described with reference to Figure 23 , the first shutter operation SH1, the first time period exposure EIT1, the first readout operation RD1, the second shutter operation SH2, and the second time period exposure EIT2 can be similar to those described above with reference to Figure 24 . However, in the example embodiment shown in Figure 24 , the first to third readout operations SRD1 to SRD3 included in the second readout operation RD2 can be performed differently from the example embodiment described above. According to an example embodiment, the first to third readout operations SRD1 to SRD3 included in the second readout operation RD2 can be performed in a manner similar to the first to third readout operations SRD1 to SRD3 included in the first readout operation RD1. Figure 24The first main readout operation MRD1 can be an operation of reading a pixel signal corresponding to the charge generated by the first photodiode PD1 from the pixel under a condition in which the pixel has a relatively low conversion gain, as shown.

[0139] Referring to Figure 5 The first readout operation SRD1 can be an operation of reading a pixel signal corresponding to the charge generated by the first photodiode PD1 from the pixel under a condition in which the pixel has a relatively high conversion gain. The second readout operation SRD2 can be an operation of reading a pixel signal corresponding to the charge generated by the first photodiode PD1 from the pixel under a condition in which the pixel has a relatively low conversion gain. The third readout operation SRD3 can be an operation of reading a pixel signal corresponding to the charge generated by exceeding the FWC in the first photodiode PD1 and stored in the capacitor.

[0140] In the image sensor according to the example embodiment, the first readout operation can be performed after a first exposure time period, and the second readout operation can be performed after a second exposure time period. The first exposure time period can be longer than the second exposure time period, and first image data can be generated by the first readout operation, and second image data can be generated by the second readout operation. For example, the first image data can have a higher resolution than the second image data, and the second image data can be generated by applying binning to the pixel array.

[0141] In the example embodiment, unlike the first image data, the second image data can be generated only for a window of interest (WOI). The first image data can be generated based on signals obtained by performing the first readout operation on each of a plurality of pixels included in the pixel array, and the second image data can be generated based on signals obtained by performing the second readout operation on a part of the plurality of pixels.

[0142] The first image data and the second image data can be used for different purposes. For example, when the image sensor is mounted on a vehicle (e.g., a car, etc.), the first image data can be used to accurately capture and recognize a flickering light source, and the second image data can be used to accurately capture and recognize an object other than the flickering light source without distortion.

[0143] As described with reference to various example embodiments, the first readout operation and the second readout operation can be performed in different ways. For example, the first readout operation can include a plurality of main readout operations, and the second readout operation can include a plurality of sub readout operations. When the number of the plurality of main readout operations and the number of the plurality of sub readout operations are equal, at least one of the plurality of sub readout operations can be performed differently from the plurality of main readout operations. As an example, referring to Figure 23The fourth read operation SRD4 can be performed differently from the first to fourth main read operations MRD1 to MRD4. As another example, referring to Figure 22 The second and third read operations SRD2 and SRD3 can be performed differently from the first to third main read operations MRD1 to MRD3.

[0144] The number of the plurality of main read operations and the number of the plurality of sub read operations can be different. As an example, referring to ​ The first read operation RD1 can include the first to fourth main read operations MRD1 to MRD4, and the second read operation RD2 can include the first to third sub read operations SRD1 to SRD3. The third sub read operation SRD3 can be performed differently from the first to fourth main read operations MRD1 to MRD4. By performing the first and second read operations differently in consideration of the difference between the first and second exposure time periods, the signal-to-noise ratio and the dynamic range of each of the first and second image data can be improved.

[0145] According to the foregoing example embodiments, each pixel can include a first photodiode, a second photodiode, and a pixel circuit, and the second photodiode can have a light-receiving area smaller than that of the first photodiode. By performing the first read operation for obtaining a pixel signal corresponding to charges generated by the first and second photodiodes during the first exposure time period and the second read operation for obtaining a pixel signal corresponding to charges generated by the first and second photodiodes during the second exposure time period differently, the signal-to-noise ratio, the dynamic range, and the frames per second can be improved.

[0146] While example embodiments have been shown and described above, it will be clear to those of ordinary skill in the art that modifications and changes can be made without departing from the scope of the present disclosure defined by the appended claims.

Claims

1. An image sensor comprising: a pixel array including a plurality of pixels arranged along a first direction and a second direction intersecting the first direction; and a peripheral circuit connected to the plurality of pixels through a plurality of row lines and a plurality of column lines, the peripheral circuit configured to drive the plurality of pixels, wherein each of the plurality of pixels includes a first photodiode, a second photodiode having a light-receiving area smaller than that of the first photodiode, and a pixel circuit connecting the first photodiode and the second photodiode to the peripheral circuit, wherein the peripheral circuit is configured to obtain first pixel signals by performing a first readout operation on each of the plurality of pixels after a first exposure time period, and to obtain second pixel signals by performing a second readout operation on at least a part of the plurality of pixels after a second exposure time period shorter than the first exposure time period, the second readout operation being different from the first readout operation, and wherein the peripheral circuit is configured to generate first image data using the first pixel signals and to generate second image data using the second pixel signals.

2. The image sensor according to claim 1, the pixel circuit includes a floating diffusion node, a first transfer transistor connected between the floating diffusion node and the first photodiode, a second transfer transistor connected between the floating diffusion node and the second photodiode, and a gain control transistor connected to the floating diffusion node, and wherein wherein the peripheral circuit is configured to select a high conversion gain condition by turning off the gain control transistor, and to select a low conversion gain condition by turning on the gain control transistor. the pixel circuit includes a capacitor, and 3. The image sensor of claim 2, wherein, wherein in the first readout operation, each of the plurality of pixels is configured to output, in order, a voltage corresponding to charge generated by the first photodiode in the high conversion gain condition, a voltage corresponding to charge generated by the second photodiode in the high conversion gain condition, and a voltage corresponding to charge generated by the second photodiode and stored in the capacitor of the pixel circuit. in the second readout operation, each of the at least a part of the pixels is configured to output, in order, a voltage corresponding to charge generated by the first photodiode in the high conversion gain condition, a voltage corresponding to charge generated by the second photodiode in the high conversion gain condition, and a voltage corresponding to charge generated by the first photodiode and the second photodiode and stored in the capacitor.

4. The image sensor of claim 3, wherein, ​ 5. The image sensor of claim 3, wherein, In the second readout operation, each of the at least a portion of the pixels is configured to output, in sequence, a voltage corresponding to charge generated by the first photodiode in the high conversion gain condition and the low conversion gain condition, a voltage corresponding to charge generated by the second photodiode, and a voltage corresponding to charge generated by the first photodiode and stored in the capacitor.

6. The image sensor of claim 3, wherein, In the second readout operation, each of the at least a portion of the pixels is configured to output, in sequence, a voltage corresponding to charge generated by the first photodiode in the high conversion gain condition and the low conversion gain condition, and a voltage corresponding to charge generated by the first photodiode and stored in the capacitor.

7. The image sensor of claim 3, wherein, In the second readout operation, each of the at least a portion of the pixels is configured to output, in sequence, a voltage corresponding to charge generated by the first photodiode in the high conversion gain condition and the low conversion gain condition, and a voltage corresponding to charge generated by the first photodiode and stored in the capacitor.

8. The image sensor of claim 1, wherein, In the first readout operation, each of the plurality of pixels is configured to output a voltage corresponding to charge generated by the first photodiode in one of a high conversion gain condition and a low conversion gain condition, a voltage corresponding to charge generated by the second photodiode in the high conversion gain condition, and a voltage corresponding to charge generated by the second photodiode and stored in a capacitor of the pixel circuit.

9. The image sensor of claim 8, wherein, In the second readout operation, each of the at least a portion of the pixels is configured to output, in sequence, a voltage corresponding to charge generated by the first photodiode in the high conversion gain condition and the low conversion gain condition, and a voltage corresponding to charge generated by the first photodiode and stored in the capacitor.

10. The image sensor of claim 8, wherein, In the second readout operation, each of the at least a portion of the pixels is configured to output, in sequence, a voltage corresponding to charge generated by the first photodiode in the high conversion gain condition and the low conversion gain condition, and a voltage corresponding to charge generated by the first photodiode and stored in the capacitor.

11. The image sensor of claim 1, wherein, The frame rate of the first image data is lower than the frame rate of the second image data.

12. The image sensor of claim 1, wherein, The resolution of the first image data is higher than the resolution of the second image data.

13. An image sensor comprising: a plurality of pixels, each of the plurality of pixels including a first photodiode, a second photodiode having a light-receiving area smaller than a light-receiving area of the first photodiode, and a pixel circuit connected to the first photodiode and the second photodiode; and a peripheral circuit configured to perform, in order, a first shutter operation, a first time period exposure operation, a first readout operation, a second shutter operation, a second time period exposure operation, and a second readout operation on each of the plurality of pixels, wherein the first readout operation comprises a plurality of primary readout operations performed in order, and the second readout operation comprises a plurality of secondary readout operations performed in order, and wherein the peripheral circuit is configured to perform at least one of the plurality of secondary readout operations differently from the plurality of primary readout operations.

14. The image sensor of claim 13, wherein the first readout operation comprises a first primary readout operation, a second primary readout operation, a third primary readout operation, and a fourth primary readout operation, and the second readout operation comprises a first secondary readout operation, a second secondary readout operation, a third secondary readout operation, and a fourth secondary readout operation, and wherein the peripheral circuit is configured to perform the fourth secondary readout operation differently from each of the first primary readout operation, the second primary readout operation, the third primary readout operation, and the fourth primary readout operation.

15. The image sensor of claim 13, wherein, the first readout operation comprises a first primary readout operation, a second primary readout operation, and a third primary readout operation, and the second readout operation comprises a first secondary readout operation, a second secondary readout operation, and a third secondary readout operation, and wherein the peripheral circuit is configured to perform the third secondary readout operation differently from each of the first primary readout operation, the second primary readout operation, and the third primary readout operation.

16. The image sensor of claim 15, wherein, the peripheral circuit is configured to perform the second secondary readout operation differently from each of the first primary readout operation, the second primary readout operation, and the third primary readout operation.

17. The image sensor of claim 13, wherein the first readout operation comprises a first primary readout operation, a second primary readout operation, a third primary readout operation, and a fourth primary readout operation, and the second readout operation comprises a first secondary readout operation, a second secondary readout operation, and a third secondary readout operation, and wherein the peripheral circuit is configured to perform the third secondary readout operation differently from each of the first primary readout operation, the second primary readout operation, the third primary readout operation, and the fourth primary readout operation.

18. The image sensor of claim 13, wherein each of the plurality of pixels comprises a capacitor, and wherein a last secondary readout operation of the plurality of secondary readout operations, which is performed last, is configured to be performed differently from the plurality of primary readout operations, and the last secondary readout operation is an operation of reading a signal corresponding to charge generated by at least one of the first photodiode and the second photodiode during the second time period exposure operation and stored in the capacitor.

19. An image sensor, comprising: a plurality of pixels each including a first photodiode, a second photodiode having a light-receiving area smaller than a light-receiving area of the first photodiode, and a pixel circuit connected to the first photodiode and the second photodiode; and a peripheral circuit configured to drive the plurality of pixels, wherein the pixel circuit is configured to output a signal by performing a plurality of main readout operations after a first exposure time period, and output a signal by performing a plurality of sub readout operations after a second exposure time period shorter than the first exposure time period, and wherein in the plurality of sub readout operations, a number of times the pixel circuit outputs a signal corresponding to a charge generated by the first photodiode is greater than a number of times the pixel circuit outputs a signal corresponding to a charge generated by the second photodiode.

20. The image sensor of claim 19, wherein, The number of the plurality of sub readout operations is equal to or smaller than the number of the plurality of main readout operations.

Images