Memory control method and device, electronic equipment and storage medium

Abstract

The invention discloses a memory control method and device, electronic equipment and a storage medium, and relates to the technical field of computers. Access feature information of a target memory is obtained, a cache retention evaluation value and memory allocation granularity are determined according to the memory access feature information, and the memory allocation granularity is allocated according to a current memory access mode represented by the cache retention evaluation value. And determining a target replacement strategy of the cache, determining a target allocation strategy of the main memory according to the memory allocation granularity, and further controlling the target memory through the target replacement strategy and the target allocation strategy. The target replacement strategy and the target allocation strategy selection matched with the memory control requirements of different task stages are determined through the cache retention evaluation value and the memory allocation granularity, so that data blocks which are frequently accessed in the cache can be prevented from being replaced, the access frequency of a main memory is reduced, meanwhile, memory fragments in the memory are reduced, and the memory efficiency is improved. The waste of the memory space is avoided, so that the performance of the memory is improved.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a memory control method, apparatus, electronic device, and storage medium. Background Art

[0002] Memory consists of three layers: cache, main memory, and secondary storage. Memory control is achieved by selecting control strategies among these three layers to allocate and use computer memory resources. Control strategies include cache replacement algorithms and memory allocation algorithms. Therefore, how to reasonably control memory has become a key research topic.

[0003] In related technologies, since memory itself has multiple access modes and memory control requirements are different at different task stages, if control strategies such as cache replacement strategy and memory allocation strategy are not chosen reasonably, frequently accessed data blocks in the cache will be replaced, increasing the number of accesses to main memory. At the same time, it will also cause a large number of memory fragments in memory, resulting in a waste of memory space and a reduction in memory performance. Summary of the Invention

[0004] This application provides a memory control method, apparatus, electronic device, and storage medium to at least solve the problem of low memory performance caused by unreasonable selection of control strategies such as cache replacement strategy and memory allocation strategy in related technologies.

[0005] This application provides a memory control method, including:

[0006] Obtain access characteristic information of the target memory; wherein the target memory includes at least cache and main memory;

[0007] Based on memory access characteristics, determine the cache retention evaluation value and memory allocation granularity;

[0008] Based on the current memory access pattern represented by the cache retention evaluation value, determine the target replacement strategy for the cache;

[0009] Determine the target allocation strategy for main memory based on the memory allocation granularity;

[0010] Control the target memory based on the target replacement strategy and the target allocation strategy.

[0011] This application also provides a memory control device, including:

[0012] The acquisition module is used to acquire access characteristic information of the target memory; wherein the target memory includes at least cache and main memory;

[0013] The first determining module is used to determine the cache retention evaluation value and memory allocation granularity based on memory access characteristic information;

[0014] The second determining module is used to determine the target replacement strategy for the cache based on the current memory access pattern represented by the cache retention evaluation value;

[0015] The third determining module is used to determine the target allocation strategy for main memory based on the memory allocation granularity.

[0016] The control module is used to control the target memory according to the target replacement strategy and the target allocation strategy.

[0017] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for implementing the steps of any of the above memory control methods when executing the computer program.

[0018] This application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-described memory control methods.

[0019] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described memory control methods.

[0020] This application discloses a memory control method, apparatus, electronic device, and storage medium, relating to the field of computer technology. By acquiring access characteristic information of the target memory, and determining a cache retention evaluation value and memory allocation granularity based on this information, the application determines a target replacement strategy for the cache based on the current memory access pattern represented by the cache retention evaluation value, and a target allocation strategy for main memory based on the memory allocation granularity. This allows for the control of the target memory through the target replacement and allocation strategies. By determining the target replacement and allocation strategies to match the memory control requirements of different task stages using the cache retention evaluation value and memory allocation granularity, the application not only avoids frequently accessed data blocks in the cache from being replaced, reducing the number of main memory accesses, but also reduces memory fragmentation, preventing wasted memory space and thus improving memory performance. Attached Figure Description

[0021] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a schematic diagram of the memory control system on which the embodiments of this application are based;

[0023] Figure 2A flowchart illustrating the memory control method provided in an embodiment of this application;

[0024] Figure 3 A flowchart illustrating an exemplary memory control method provided in an embodiment of this application;

[0025] Figure 4 This is a schematic diagram of the structure of the memory control device provided in the embodiments of this application;

[0026] Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0027] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0028] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0029] In modern computer systems, multi-level memory architectures (such as cache, main memory, and secondary storage) and multi-granularity management (paged, segmented, and segmented-paged) have become standard. However, existing memory management schemes have many problems. Current cache replacement algorithms, including Least Recently Used (LRU) and First-In-First-Out (FIFO), are mostly based on fixed rules and cannot fully consider the memory access characteristics of applications at different stages of operation. For example, some real-time applications frequently access specific data areas during critical data processing phases, but traditional cache replacement algorithms may mistakenly replace this data that is about to be accessed again, resulting in low cache hit rates, increased access to main memory, and reduced system efficiency.

[0030] In terms of memory allocation, existing allocation algorithms, including first-fit and best-fit algorithms, struggle to achieve efficient allocation when faced with dynamically changing memory requirements of applications. When an application's memory demands fluctuate irregularly, these algorithms may generate a large amount of memory fragmentation, reducing memory utilization and potentially causing system performance bottlenecks or crashes due to insufficient memory.

[0031] In related technologies, since memory itself has multiple access modes and memory control requirements are different at different task stages, if control strategies such as cache replacement strategy and memory allocation strategy are not chosen reasonably, frequently accessed data blocks in the cache will be replaced, increasing the number of accesses to main memory. At the same time, it will also cause a large number of memory fragments in memory, resulting in a waste of memory space and a reduction in memory performance.

[0032] To address the aforementioned technical problems, this application provides a memory control method, apparatus, electronic device, and storage medium. The method includes: acquiring access characteristic information of target memory; wherein the target memory includes at least cache and main memory; determining a cache retention evaluation value and memory allocation granularity based on the memory access characteristic information; determining a target replacement strategy for the cache based on the current memory access mode represented by the cache retention evaluation value; determining a target allocation strategy for the main memory based on the memory allocation granularity; and controlling the target memory based on the target replacement strategy and the target allocation strategy. This application discloses a memory control method, apparatus, electronic device, and storage medium, relating to the field of computer technology. By acquiring access characteristic information of the target memory, determining a cache retention evaluation value and memory allocation granularity based on the memory access characteristic information, determining a target replacement strategy for the cache based on the current memory access mode represented by the cache retention evaluation value, determining a target allocation strategy for the main memory based on the memory allocation granularity, and then controlling the target memory through the target replacement strategy and the target allocation strategy. By determining the target replacement strategy and target allocation strategy selection to match the memory control requirements of different task stages through cache retention evaluation value and memory allocation granularity, it is possible not only to avoid replacing frequently accessed data blocks in the cache and reduce the number of main memory accesses, but also to reduce memory fragmentation in memory and avoid wasting memory space, thereby improving memory performance.

[0033] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0034] The specific application environment architecture or specific hardware architecture on which the execution of the memory control method depends is described here.

[0035] First, the structure of the memory control system upon which this application is based will be described:

[0036] The memory control method, apparatus, electronic device, and storage medium provided in the embodiments of this application are applicable to selecting memory cache replacement strategies and memory allocation strategies, such as... Figure 1 The diagram shows the structure of the memory control system based on the embodiments of this application, mainly including a target replacement strategy and a target allocation strategy to be selected, a data acquisition device, and a strategy selection device. The data acquisition device is used to acquire memory access characteristic information. The strategy selection device calculates and determines the cache retention evaluation value and memory allocation granularity based on the memory access characteristic information, and then selects the target replacement strategy and the target allocation strategy based on the cache retention evaluation value and the memory allocation granularity.

[0037] This application provides a memory control method for selecting a control strategy that matches the target memory situation, thereby improving memory performance. The execution subject of this application embodiment is an electronic device, such as a server, desktop computer, laptop computer, tablet computer, and other electronic devices that can be used for memory control.

[0038] like Figure 2 The diagram shown is a flowchart illustrating a memory control method provided in an embodiment of this application. The method includes:

[0039] Step 201: Obtain access characteristic information of the target memory; wherein, the target memory includes at least cache and main memory.

[0040] Specifically, the memory is monitored in real time through the computer system's Memory Management Unit (MMU) and the operating system's memory access interface. For any application, the virtual address of each memory access is obtained, and the MMU converts it into a physical address to determine the accessed memory region. The application's access behavior data to the target memory is obtained as the access characteristic information of the target memory.

[0041] Accordingly, by obtaining the access characteristics of the target memory, data is provided for subsequent calculations of cache retention evaluation values ​​and memory allocation granularity.

[0042] Step 202: Determine the cache retention evaluation value and memory allocation granularity based on memory access characteristic information.

[0043] Specifically, memory access characteristics can characterize the access frequency of data stored in any space in the cache. Based on the characteristics, a cache retention evaluation value for that data is calculated. A higher cache retention evaluation value indicates that the data is accessed more frequently and therefore needs to be stored in the cache. The space required by the application is allocated in units of memory allocation granularity (G value).

[0044] Accordingly, by caching and retaining evaluation values ​​and memory allocation granularity, a basis is provided for selecting subsequent target replacement and target allocation strategies.

[0045] Step 203: Determine the target replacement strategy for the cache based on the current memory access pattern represented by the cache retention evaluation value.

[0046] Specifically, cache replacement strategies typically include Least Recently Used (LRU) and First In First Out (FIFO) algorithms, while current memory access patterns include random access and sequential access. For example, when cache retention evaluation values ​​are scattered and irregular, it indicates a random access pattern, making the Least Recently Used algorithm more suitable. If the cache retention evaluation values ​​of consecutive data blocks increase simultaneously, it indicates a sequential access pattern, making a block-level replacement algorithm more suitable. Based on the cache retention evaluation values, a suitable cache replacement strategy is selected.

[0047] Correspondingly, different memory access modes allow for the selection of corresponding target replacement algorithms, which improves cache hit rate, reduces the number of accesses to main memory, and increases data reading speed.

[0048] Step 204: Determine the target allocation strategy for main memory based on the memory allocation granularity.

[0049] Specifically, main memory allocation strategies typically include first-fit and best-fit algorithms. Based on the size of memory space typically requested by applications, memory allocation granularity can be broadly categorized into three types. Memory space is allocated according to the application's specific needs and the corresponding memory allocation granularity. Finally, a suitable main memory allocation strategy is selected based on the memory allocation granularity.

[0050] Accordingly, depending on the granularity of memory allocation, a target allocation strategy can be selected according to the needs of the application, reducing memory fragmentation and improving memory utilization.

[0051] Step 205: Control the target memory according to the target replacement strategy and the target allocation strategy.

[0052] Specifically, when the cache space is insufficient, data is filtered and replaced according to the determined target replacement strategy. When the application requests memory for the first time, and when the application changes its space requirements during operation, the target allocation strategy allocates memory space for the application.

[0053] Correspondingly, by selecting the target replacement strategy based on cache retention evaluation values ​​and the target allocation strategy with defined memory allocation granularity, the cache hit rate and memory utilization are improved. This allows applications to obtain the required data more quickly during runtime, reducing waiting time and thus improving application efficiency. It also reduces the risk of performance bottlenecks and crashes caused by memory issues, enhancing system stability and reliability.

[0054] Based on the above embodiments, as an implementable approach, in one embodiment, determining the cache retention evaluation value and memory allocation granularity according to memory access characteristic information includes:

[0055] Step 2021: Determine the cache retention evaluation value based on the cache access frequency information and access interval time information;

[0056] Step 2022: Determine the memory allocation granularity based on the average memory requests of the application.

[0057] The memory access characteristic information includes access frequency information, access interval time information, and average memory request value.

[0058] Specifically, the memory management unit monitors the access frequency and access interval of the cache space. Access frequency refers to the number of times any cache space is accessed within a unit of time. The memory management unit records the timestamp of each access and calculates the time interval between two consecutive accesses, which is used as the access interval information. Based on the cache access frequency and access interval information, and according to their importance, their respective weights are determined, and a cache retention evaluation value is calculated, characterizing the priority of whether data in the cache space will be replaced.

[0059] Specifically, the memory management unit periodically monitors the amount of memory used by applications, obtaining an average value over a period of time. Based on this average value, it calculates the average memory request size, determines the corresponding memory allocation granularity, and dynamically adjusts the amount of memory allocated to the application. For example, the memory allocation granularity can be divided into three categories: when the average memory request size is less than or equal to 16KB, the memory allocation granularity is 16KB; when the average memory request size is greater than 16KB but less than 64KB, the memory allocation granularity is 64KB; and when the average memory request size is greater than 64KB, the memory allocation granularity is 256KB.

[0060] Accordingly, by calculating the cache retention evaluation value, the data in the cache space can be evaluated, and data with low evaluation values ​​can be replaced from the cache, thus improving space utilization. Dividing and allocating memory according to memory allocation granularity reduces memory fragmentation and improves memory space utilization.

[0061] Specifically, in one embodiment, the cache retention evaluation value can be determined based on the cache access frequency information and access interval time information according to the following formula:

[0062]

[0063] Where K represents the cache retention evaluation value, F represents the total access frequency, f represents the recent access frequency, T represents the average access interval time, a and b represent the preset weight coefficients, a+b=1, the access frequency information includes the total access frequency and the recent access frequency, and the access interval time information includes the average access interval time.

[0064] Specifically, F represents the total access frequency, and f represents the recent access frequency. The total access frequency is typically set in hours, while the recent access frequency is set in minutes. For example, the total access frequency is the number of times any cached space is accessed within one hour, and the recent access frequency is the number of times that cached space is accessed within 10 minutes. T represents the average access interval, calculated by recording the time interval between every two accesses within a unit of time. The weighting coefficients 'a' and 'b' are typically set to 0.6 and 0.4, respectively, but can be adjusted according to actual needs. A cache retention evaluation value is then calculated; a higher value indicates that data in that space is preferentially retained in the cache.

[0065] Correspondingly, the cache retention evaluation value, by comprehensively considering access frequency and access interval, can filter out data with higher retention value, avoid the power consumption caused by frequent swapping of frequently used data, and improve memory performance.

[0066] Based on the above embodiments, as an implementable approach, in one embodiment, determining the target allocation strategy for main memory according to the memory allocation granularity includes:

[0067] Step 2041: Determine whether the memory allocation granularity is greater than the preset decision threshold;

[0068] Step 2042: If the memory allocation granularity is greater than the preset decision threshold, the first allocation strategy is used as the target allocation strategy for main memory.

[0069] The first allocation strategy includes dividing the main memory into multiple contiguous blocks to be allocated, according to the memory allocation granularity.

[0070] Specifically, the first allocation strategy includes a buddy system algorithm. Based on the average memory request granularity, a preset decision threshold is determined. When the memory allocation granularity exceeds the preset decision threshold, it indicates that the application is requesting a large block of memory. In this case, the target allocation strategy for main memory is determined as the first allocation strategy. The first allocation strategy involves dividing the main memory space into units based on the memory allocation granularity. During allocation, the required memory space size for the application is determined based on the average memory request granularity. Based on the required memory space size, a number of contiguous main memory blocks sufficient for the application's needs are allocated. During release, if adjacent main memory blocks are free, they are merged to gradually form larger blocks.

[0071] Correspondingly, by dividing main memory into main memory blocks according to memory allocation granularity and merging them according to application needs, memory fragmentation is reduced, large-granularity allocation needs are adapted, and the utilization rate of main memory is improved.

[0072] Specifically, in one embodiment, the memory control method further includes: when the memory allocation granularity is not greater than a preset decision threshold, using a second allocation strategy as the target allocation strategy for main memory. The second allocation strategy includes collecting memory fragments in main memory and dividing the memory fragments into multiple main memory blocks to be allocated according to the memory allocation granularity.

[0073] Specifically, the second allocation strategy includes object pooling. When the memory allocation granularity is no greater than a preset decision threshold, it indicates that the application is requesting small blocks of memory, and the target allocation strategy for main memory is determined to be the second allocation strategy. The second allocation strategy involves pre-collecting memory fragments in main memory and merging these fragments into multiple unallocated main memory blocks according to the memory allocation granularity. During allocation, a main memory block with a matching size is selected based on the application's needs and allocated. During release, it is still released in the form of a main memory block, reducing fragmentation.

[0074] Correspondingly, by merging memory fragments, memory utilization is improved, and memory is still released in the form of main memory blocks, reducing the power consumption of repeatedly merging fragments, which is suitable for applications with small average memory requests.

[0075] Based on the above embodiments, as an implementable approach, in one embodiment, the memory control method further includes:

[0076] Step 301: Obtain the remaining space in main memory;

[0077] Step 302: If the remaining space in the main memory is lower than a preset remaining space threshold, filter the data to be exchanged in the main memory.

[0078] Step 303: Exchange the data to be exchanged to secondary storage; wherein, the target memory also includes secondary storage.

[0079] Specifically, the preset remaining space threshold is typically set to 20%. When the remaining space (M_free) in main memory is less than 20%, data to be swapped is filtered in main memory. Data to be swapped refers to the data access frequency (f) of the memory space corresponding to the monitored data. When the data access frequency is less than the preset access frequency threshold, it indicates that the data has been accessed less frequently recently and is considered "cold data," therefore, this data is identified as data to be swapped. The data to be swapped is then swapped to secondary storage.

[0080] Correspondingly, by storing data with low access frequency as data to be swapped in secondary storage, space can be freed up in primary storage to store data with higher access frequency, reducing power consumption caused by frequent data swapping and improving memory performance.

[0081] Specifically, in one embodiment, the memory control method further includes: determining whether the data to be accessed by the application is stored in secondary storage based on the application's data access requirements to the main memory; and if the data to be accessed is stored in secondary storage, prefetching the data to be accessed from secondary storage to the main memory.

[0082] Specifically, important and urgent data required by the application are treated as data to be accessed. It is determined whether the data is stored in main memory. If the data is not stored in main memory but is stored in secondary storage, the data to be accessed is prefetched from secondary storage to main memory in advance.

[0083] For example, such as Figure 3 The diagram illustrates an exemplary memory control method provided in this application. First, the system or application starts and enters the initialization phase. During this phase, the memory management unit and the operating system's memory access interface collect memory access behavior data. Then, a preset dynamic evaluation model and related parameter configurations are loaded. These configurations are initial values ​​obtained based on the analysis and optimization of memory access behavior from a large number of applications. Simultaneously, based on the initial parameter configurations, the initial states of cache replacement strategies, memory allocation strategies, and memory-level data interaction strategies are set. Based on the memory access behavior data, memory access characteristic information, such as access frequency and access time intervals, is calculated. Next, the dynamic evaluation phase begins. The data is preprocessed, for example, by removing abnormal data. Based on the preprocessed access characteristic information, the data is analyzed to determine the memory access pattern, and the cache retention evaluation value and memory allocation granularity are calculated. The corresponding target replacement strategy and target allocation strategy are determined based on the cache retention evaluation value and memory allocation granularity, respectively. Simultaneously, based on the remaining space in main memory and the data access frequency, data interaction is performed to adjust the data storage location.

[0084] Correspondingly, by predicting the data to be accessed and then prefetching it, the main memory stores valid data that will be used soon, thus improving the utilization rate of the main memory space.

[0085] Specifically, in one embodiment, data with high correlation to data in the cache is assigned the same cache retention evaluation value as the data in the cache when calculating the cache retention evaluation value. For example, when a data block is accessed frequently, the cache retention evaluation value of its highly correlated data is equal to that data, and both are stored in the cache. When cache space is insufficient, data with no or low correlation is preferentially replaced as data to be swapped and stored in secondary storage. Prioritizing the retention of highly correlated data and replacing data with no or low correlation in secondary storage reduces the power consumption caused by migrating between the cache, main memory, and secondary storage due to correlated data not being in the cache, thus improving memory performance.

[0086] The memory control method provided in this application includes: acquiring access characteristic information of target memory; wherein the target memory includes at least cache and main memory; determining a cache retention evaluation value and memory allocation granularity based on the memory access characteristic information; determining a target replacement strategy for the cache based on the current memory access mode represented by the cache retention evaluation value; determining a target allocation strategy for the main memory based on the memory allocation granularity; and controlling the target memory based on the target replacement strategy and the target allocation strategy. This application discloses a memory control method, apparatus, electronic device, and storage medium, relating to the field of computer technology. By acquiring access characteristic information of the target memory, determining a cache retention evaluation value and memory allocation granularity based on the memory access characteristic information, determining a target replacement strategy for the cache based on the current memory access mode represented by the cache retention evaluation value, determining a target allocation strategy for the main memory based on the memory allocation granularity, and then controlling the target memory through the target replacement strategy and the target allocation strategy. By determining the target replacement and allocation strategies to match the memory control requirements of different task stages through cache retention evaluation values ​​and memory allocation granularity, not only can frequently accessed data blocks in the cache be prevented from being replaced, reducing the number of main memory accesses, but also memory fragmentation is reduced, avoiding memory space waste and thus improving memory performance. Furthermore, by obtaining the access characteristics of the target memory, data is provided for subsequent calculation of cache retention evaluation values ​​and memory allocation granularity. The cache retention evaluation value and memory allocation granularity provide a basis for the selection of subsequent target replacement and allocation strategies. Different memory access patterns allow for the selection of corresponding target replacement algorithms, improving memory utilization. Depending on the memory allocation granularity, target allocation strategies can be selected according to the application's needs, reducing memory fragmentation and improving memory utilization. The target replacement strategy selected through cache retention evaluation values ​​and the target allocation strategy determined by memory allocation granularity improve the space utilization of target memory, thereby improving target memory performance. By calculating the cache retention evaluation value, data in the cache space can be evaluated, and data with low evaluation values ​​can be replaced from the cache, improving space utilization. Dividing and allocating memory according to memory allocation granularity reduces memory fragmentation and improves memory space utilization. Cache retention evaluation, by comprehensively considering access frequency and access interval, can filter out data with higher retention value, avoiding power consumption caused by frequent swapping of frequently used data and improving memory performance. Dividing main memory into main memory blocks according to memory allocation granularity and merging them according to application needs reduces memory fragmentation, adapts to large-granularity allocation requirements, and improves main memory utilization. Merging memory fragments improves memory utilization, and releases memory in the form of main memory blocks, reducing the power consumption of repeatedly merging fragments, making it suitable for applications with low average memory allocation values.By storing infrequently accessed data in secondary storage as data to be swapped out, space can be freed up in main memory to store more frequently accessed data. This reduces power consumption caused by frequent data swapping and improves memory performance. By predicting the data to be accessed and then prefetching, the main memory stores only the valid data that will be used soon, improving the utilization rate of main memory space.

[0087] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0088] Embodiments of this application also provide a memory control device for executing the memory control method provided in the above embodiments.

[0089] like Figure 4 The diagram shown is a structural schematic of a memory control device provided in an embodiment of this application. The memory control device 40 includes: an acquisition module 401, a first determination module 402, a second determination module 403, a third determination module 404, and a control module 405.

[0090] The system includes: an acquisition module for acquiring access characteristic information of the target memory, wherein the target memory includes at least cache and main memory; a first determination module for determining a cache retention evaluation value and memory allocation granularity based on the memory access characteristic information; a second determination module for determining a target cache replacement strategy based on the current memory access pattern represented by the cache retention evaluation value; a third determination module for determining a target main memory allocation strategy based on the memory allocation granularity; and a control module for controlling the target memory based on the target replacement strategy and the target allocation strategy.

[0091] For a description of the features in the embodiment corresponding to the memory control device, please refer to the relevant description of the embodiment corresponding to the memory control method, which will not be repeated here.

[0092] Embodiments of this application also provide an electronic device, such as... Figure 5 The diagram shown is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, including a processor 10 and a memory 20. The memory 20 stores a computer program, and the processor 10 is configured to run the computer program to execute the steps in any of the above-described memory control method embodiments.

[0093] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described memory control method embodiments when it is run.

[0094] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0095] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the memory control method embodiments described above.

[0096] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described memory control method embodiments.

[0097] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0098] The foregoing has provided a detailed description of a memory control method, apparatus, electronic device, and storage medium provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only intended to aid in understanding the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A memory control method, characterized in that, include: Obtain access characteristic information of the target memory; wherein, the target memory includes at least cache and main memory; Based on the memory access characteristic information, determine the cache retention evaluation value and memory allocation granularity; The target replacement strategy for the cache is determined based on the current memory access pattern represented by the cache retention evaluation value; Based on the memory allocation granularity, determine the target allocation strategy for the main memory; The target memory is controlled according to the target replacement strategy and the target allocation strategy.

2. The memory control method according to claim 1, characterized in that, The step of determining the cache retention evaluation value and memory allocation granularity based on the memory access feature information includes: The cache retention evaluation value is determined based on the cache access frequency information and access interval time information; The memory allocation granularity is determined based on the average memory requests made by the application. The memory access characteristic information includes the access frequency information, access interval time information, and average memory request value.

3. The memory control method according to claim 2, characterized in that, The step of determining the cache retention evaluation value based on the cache access frequency information and access interval time information includes: The cache retention evaluation value is determined based on the following formula: Wherein, K represents the cache retention evaluation value, f represents the total access frequency, f represents the recent access frequency, T represents the average access interval time, a and b represent preset weight coefficients, a+b=1, the access frequency information includes the total access frequency and the recent access frequency, and the access interval time information includes the average access interval time.

4. The memory control method according to claim 1, characterized in that, The step of determining the target allocation strategy for main memory based on the memory allocation granularity includes: Determine whether the memory allocation granularity is greater than a preset decision threshold; If the memory allocation granularity is greater than a preset decision threshold, the first allocation strategy will be used as the target allocation strategy for the main memory. The first allocation strategy includes dividing the main memory into multiple consecutive main memory blocks to be allocated according to the memory allocation granularity.

5. The memory control method according to claim 4, characterized in that, The method further includes: If the memory allocation granularity is not greater than a preset decision threshold, the second allocation strategy will be used as the target allocation strategy for the main memory. The second allocation strategy includes collecting memory fragments in the main memory and dividing the memory fragments into multiple main memory blocks to be allocated according to the memory allocation granularity.

6. The memory control method according to claim 1, characterized in that, The method further includes: Obtain the remaining space in the main memory; If the remaining space in the main memory is lower than a preset remaining space threshold, the data to be exchanged is filtered in the main memory. The data to be exchanged is transferred to secondary storage; wherein, the target memory also includes secondary storage.

7. The memory control method according to claim 6, characterized in that, The method further includes: Based on the application's data access requirements to the main memory, determine whether the data to be accessed by the application is stored in the secondary storage; When the data to be accessed is stored in the secondary storage, the data to be accessed is prefetched from the secondary storage to the main memory.

8. A memory control device, characterized in that, include: An acquisition module is used to acquire access characteristic information of the target memory; wherein, the target memory includes at least cache and main memory; The first determining module is used to determine the cache retention evaluation value and memory allocation granularity based on the memory access feature information. The second determining module is used to determine the target replacement strategy of the cache based on the current memory access mode represented by the cache retention evaluation value; The third determining module is used to determine the target allocation strategy of the main memory based on the memory allocation granularity. The control module is used to control the target memory according to the target replacement strategy and the target allocation strategy.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for implementing the steps of the memory control method as described in any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the memory control method as described in any one of claims 1 to 7.

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