Computer cross-scale integrated analysis method based on multi-physics coupling mechanism

Abstract

The invention provides a computer cross-scale integrated analysis method based on a multi-physics field coupling mechanism, and the method comprises the steps: constructing a multi-level finite element model from a system level to a micro-area level, and integrating thermal-mechanical-electric coupling modeling; therefore, the technical problems that in a traditional method, multi-physics field coupling lacks, local area modeling is not fine, and electrical performance evolution is not introduced are solved, high-precision simulation of a typical device failure mechanism is achieved, and the method is suitable for device packaging reliability evaluation in special electronic systems such as military and high-reliability civil use and the like. The method can be widely popularized in microelectronic structures such as a power supply module, a processor and a memory, and can improve the evaluation precision of the high-frequency signal transmission performance of complex electronic equipment, thereby improving the precision of predicting the service life.

Description

Technical Field

[0001] This invention belongs to the field of computer reliability analysis technology, specifically relating to a computer cross-scale integrated analysis method based on a multi-physics coupling mechanism. Background Art

[0002] With the widespread application of specialized computers and high-density packaged electronic products in complex and harsh environments (such as strong vibration, high-temperature cycling, and high current density), traditional thermo-mechanical single-field coupling methods are no longer sufficient to comprehensively evaluate their service reliability. Electronic devices, such as solder joints, lead frames, and chip interconnect regions, exhibit typical cross-scale response characteristics. Their structural features and failure modes are simultaneously influenced by multiple physical fields, including heat, force, and electricity. Therefore, reliability analysis becomes particularly important.

[0003] Most existing studies adopt the following types of approaches: (1) Traditional thermo-mechanical coupling simulation platforms: such as ANSYS, COMSOL, etc., are used for thermo-mechanical fatigue analysis and are suitable for predicting the fatigue life of weld joints, but usually do not consider changes in electrical performance and lack the ability to model electrical failures.

[0004] (2) Single field electromigration analysis method: Some studies are based on electromigration models for analysis, but most of them are two-dimensional simplified structures and independent simulations, which cannot be linked with the thermo-mechanical analysis results and are difficult to reflect the real response under actual multi-field coupling conditions.

[0005] (3) Layered manual cross-scale modeling method: In engineering practice, system structure, circuit layout, packaging structure and micromaterials are often modeled separately, and information is transferred by manually importing boundary conditions. This method is inefficient, has inconsistent interfaces, and large errors, making it difficult to meet the needs of rapid iterative design of various types of electronic products.

[0006] Existing solutions generally suffer from shortcomings such as incomplete multi-physics coupling, low lifetime prediction accuracy, fragmented modeling, and poor automation. There is an urgent need for an analytical method that integrates thermo-mechanical-electric multi-field analysis, electrical failure mechanism modeling, and unified cross-scale modeling. Summary of the Invention

[0007] To address the aforementioned problems in the existing technology, this invention provides a computer-based cross-scale ensemble analysis method based on a multiphysics coupling mechanism. The technical problem to be solved by this invention is achieved through the following technical solution: A computer-based cross-scale ensemble analysis method based on multiphysics coupling mechanisms includes: S100, establish the original CAE model corresponding to each component of a single computer, wherein each component includes the chassis, original motherboard, original chip and original solder joint; S200, by simplifying the original motherboard and original chips, forms the initial CAE model of the chassis with the original solder joints; S300, the initial CAE model of the chassis is coarsely meshed, the temperature field of each mesh is calculated and the temperature field of the chassis is formed, and the simplified thermal boundary temperature data of the motherboard is extracted from it, so as to be loaded into the original motherboard CAE model to obtain the initial CAE model of the original motherboard. S400 records simulation conditions and fine mesh generation on the initial CAE model of the original motherboard, thereby solving the temperature field of the original motherboard and extracting the thermal boundary temperature data of the simplified chip, which is then loaded into the CAE model corresponding to the original chip to obtain the initial CAE model of the original chip. S500, the initial CAE model of the original chip is divided into fine meshes, and the stress-strain distribution of each mesh is solved to form the stress-strain distribution of the original chip. S600 generates a solder joint and circuit analysis model corresponding to each circuit based on the stress and strain distribution of the original chip, and performs electrical performance analysis on the solder joint and circuit analysis model corresponding to any circuit with deformed solder joints.

[0008] A computer-based cross-scale integrated analysis device based on a multiphysics coupling mechanism includes: The building module is configured to build the original CAE models corresponding to each component of a single computer, including the chassis, original motherboard, original chips, and original solder joints. The simplification module is configured to form an initial CAE model of the chassis by simplifying the original motherboard and original chips, along with the original solder joints; The motherboard simulation module is configured to perform coarse mesh generation on the initial CAE model of the chassis, calculate the temperature field of each mesh to form the temperature field of the chassis, and extract simplified thermal boundary temperature data of the motherboard from it, thereby loading it into the original motherboard CAE model to obtain the original motherboard initial CAE model. The chip simulation module is configured to record simulation conditions and fine mesh generation on the initial CAE model of the original motherboard, thereby solving the temperature field of the original motherboard and extracting simplified thermal boundary temperature data of the chip, which is then loaded into the CAE model corresponding to the original chip to obtain the initial CAE model of the original chip. The solver module is configured to perform fine mesh generation on the initial CAE model of the original chip and solve the stress-strain distribution of each mesh to form the stress-strain distribution of the original chip. The performance simulation module is configured to generate solder joint and circuit analysis models for each circuit based on the stress-strain distribution of the original chip, and to perform electrical performance analysis on the solder joint and circuit analysis models corresponding to any circuit with deformed solder joints.

[0009] An electronic device, characterized in that it includes a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; Memory, used to store computer programs; A processor, when executing a program stored in memory, implements any of the steps described above.

[0010] A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program, which, when executed by a processor, implements any of the steps of the method described.

[0011] Beneficial effects: This invention provides a computer-based cross-scale integrated analysis method based on multi-physics coupling mechanisms. By constructing multi-level finite element models from the system level to the micro-area level and integrating thermo-mechanical-electrical coupling modeling, it solves the technical problems of "lack of multi-physics coupling, imprecise modeling of local regions, and lack of introduction of electrical performance evolution" in traditional methods. It achieves high-precision simulation of failure mechanisms of typical devices and is suitable for reliability assessment of device packaging in special electronic systems such as military and high-reliability civilian applications. It can be widely applied to microelectronic structures such as power modules, processors, and memory, improving the accuracy of high-frequency signal transmission performance assessment for complex electronic equipment and thus improving the accuracy of service life prediction.

[0012] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0013] Figure 1 This is a flowchart of a computer-based cross-scale integrated analysis method based on a multi-physics coupling mechanism provided by the present invention; Figure 2 This is a schematic diagram of the computer-based cross-scale integrated analysis process provided by the present invention; Figure 3 This is a cross-sectional view of the motherboard temperature cycle provided by the present invention; Figure 4 This is the solder joint temperature cycle curve provided by the present invention; Figure 5 This is the overall flowchart of structural displacement field information transmission provided by the present invention; Figure 6 This is a schematic diagram of the coupling relationship between various physical fields provided by the present invention; Figure 7 This is a schematic diagram of the three-dimensional model of the solder joint provided by the present invention; Figure 8 This is a schematic diagram of the PCIE-TX0 circuit structure model provided by the present invention; Figure 9This is the three-level architecture diagram of system-component-mesh level provided by the present invention. Detailed Implementation

[0014] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0015] Combination Figure 1 and Figure 2 , Figure 1 This is a flowchart of a computer-based cross-scale integrated analysis method based on a multi-physics coupling mechanism provided by the present invention. Figure 2 This is a schematic diagram of the process of computer-based cross-scale integrated analysis.

[0016] Combination Figure 1 and Figure 2 The present invention provides a computer-based cross-scale integrated analysis method based on a multi-physics coupling mechanism, comprising: S100, establish the original CAE model corresponding to each component of a single computer, wherein each component includes the chassis, original motherboard, original chip and original solder joint; S200, by simplifying the original motherboard and original chips, forms the initial CAE model of the chassis with the original solder joints; S300, the initial CAE model of the chassis is coarsely meshed, the temperature field of each mesh is calculated and the temperature field of the chassis is formed, and the simplified thermal boundary temperature data of the motherboard is extracted from it, so as to be loaded into the original motherboard CAE model to obtain the initial CAE model of the original motherboard. S400 records simulation conditions and fine mesh generation on the initial CAE model of the original motherboard, thereby solving the temperature field of the original motherboard and extracting the thermal boundary temperature data of the simplified chip, which is then loaded into the CAE model corresponding to the original chip to obtain the initial CAE model of the original chip. S500, the initial CAE model of the original chip is divided into fine meshes, and the stress-strain distribution of each mesh is solved to form the stress-strain distribution of the original chip; wherein, the stress-strain distribution of the original chip includes the stress-strain distribution of the simplified chip and the original solder joints.

[0017] S600 generates a solder joint and circuit analysis model for each circuit based on the stress-strain distribution of the original chip, and performs electrical performance analysis on the solder joint and circuit analysis model corresponding to any circuit with deformed solder joints. The electrical performance analysis mainly focuses on the high-frequency signal transmission performance.

[0018] In one specific embodiment of the present invention, S100 includes: S110, establish the three-dimensional models corresponding to each component of a single computer; S120: Set simulation parameters for the 3D model corresponding to each component to obtain the CAE model for each component; wherein, the simulation parameters include material parameters, boundary conditions, and loads. The material parameters include the thermal, mechanical, and electrical properties of the chassis, motherboard, chip, and solder joints.

[0019] The transfer of multi-level temperature cyclic loads in this application follows the multi-level coupling principle of "chassis-motherboard-solder joint", and cross-scale correlation is achieved through the step-by-step mapping of thermal boundary conditions.

[0020] (1) Calculation of temperature field at the chassis level Based on the GJB150.3A-2009 standard, a system-level steady-state thermal analysis model was established. The chassis and heat dissipation structure are made of aluminum alloy, and heat is transferred through natural convection and radiation. The natural convection coefficient is expressed by the empirical formula as follows:

[0021] In the formula, Surface temperature, The ambient temperature.

[0022] Radiative heat transfer is governed by the Stefan-Boltzmann law, as shown in the equation:

[0023] In the formula, emissivity Take 0.85, It is a constant of 5.67 × 10⁻ 8 W / (m²·K 4 The chip heat source is applied in a non-uniform distribution, with a heat flux density of 15 W / cm² in the CPU center area and 4.2 W uniformly distributed in the DDR memory.

[0024] (2) Motherboard-level temperature cyclic loading The transient temperature field of the motherboard mounting surface is extracted from the chassis model as the input boundary, and a temperature cyclic load is superimposed. The temperature loading function is as follows:

[0025] In the formula, This is the chassis temperature time history curve. This is a GJB standard cyclic component.

[0026] like Figure 4 The temperature cycling curve shown simulates the ambient temperature of 20 ℃ at the starting point. One cycle lasts for 1200 seconds to characterize the transient temperature change stage. Maintaining 125 ℃ for 240 seconds reflects the high-temperature working state, and maintaining -55 ℃ for 240 seconds simulates the thermal contraction effect in an extremely cold environment.

[0027] (3) Thermal load mapping at solder joints at the circuit level ANSYS sub-modeling technology is used to interpolate the motherboard-level temperature field to the solder joint micro-model. A cubic spline interpolation algorithm is employed to ensure that the local boundary temperature error does not exceed 2 °C. The fitted temperature cycle curve is shown below. Figure 4 Show.

[0028] Mechanical loads interact with the temperature field through sequential coupling. First, transient thermo-mechanical coupling calculations are performed, and the temperature field results are then imported into the structural field as thermal strain loads. Thermal strain The CTE of the material is determined by the temperature increment, among which The coefficient of thermal expansion is... This represents the temperature change. For SnAgCu solder, its CTE is 21.5 ppm / ℃ at 20 ℃ and rises to 23.5 ppm / ℃ at 125 ℃, requiring the use of a temperature-dependent material model.

[0029] Using the thermal deformation result as the initial state, random vibration and mechanical impact loads were applied sequentially. According to the GJB150.16A-2019 standard, the PSD triaxial vibration spectrum shown in Table 1.1 was applied to the motherboard mounting holes, and the dynamic response was solved using the modal superposition method.

[0030] Table 1.1 PSD G-acceleration spectrum

[0031] According to GJB150.18A-2009, the rear peak sawtooth wave mechanical impact loads shown in Table 1.2 are applied to the six sides of the whole machine.

[0032] Table 1.2 Mechanical Impact Loads

[0033] In one specific embodiment of the present invention, S200 includes: S210, the three-dimensional models corresponding to the original motherboard and the original chip are simplified to obtain simplified three-dimensional models of the simplified motherboard and the simplified chip; S220, the simplified three-dimensional models of the simplified motherboard and the simplified chip are combined with the three-dimensional models corresponding to the original solder points to form the initial CAE model of the chassis.

[0034] In one specific embodiment of the present invention, S300 includes: S310, perform coarse mesh generation on the initial CAE model of the chassis, calculate the temperature field of each mesh to form the temperature field of the chassis; the temperature field of the chassis includes the temperature fields of the chassis, the simplified motherboard and the simplified chip; S320: Extract simplified motherboard thermal boundary temperature data from the temperature field of the chassis, and load it into the original motherboard CAE model to obtain the initial CAE model of the original motherboard.

[0035] In one specific embodiment of the present invention, S400 includes: S410, load simulation conditions onto the initial CAE model of the original motherboard to obtain a CAE model with loading conditions; wherein, the simulation conditions include boundary conditions and loads; S420, The CAE model under loading conditions is divided into fine meshes, and the electric field, temperature field and mechanical field distribution of each mesh are obtained; The overall process of information transfer from the structural displacement field to the temperature field and electromagnetic field is as follows: Figure 5 As shown. First, the parametric CAD solid model is imported into structural analysis software for structural analysis calculations. Then, the deformed thermal and electromagnetic analysis meshes are extracted for corresponding thermal and electromagnetic analyses. If structural analysis is not required, the parametric CAD model can be directly converted into electromagnetic and thermal analysis models, in which case the traditional analysis method is used.

[0036] During the service life of computer systems, the coupling effects of multiple internal thermal, mechanical, and electrical fields are significant, affecting their stability and reliability. Since computer systems are composed of multiple functional modules (CPU, GPU, memory, circuit boards, power supply, etc.) and complex internal electronic components, various physical fields such as current transmission, heat conduction, and stress changes interact within the system. Therefore, a theoretical analysis of the multiphysics coupling effects in computers is necessary. In studying the electrical failure process of computers, the coupling relationships between various physical fields are as follows: Figure 6 As shown.

[0037] 1) Thermo-electric coupling effect During computer system operation, key components such as the CPU, DDR, and GPU generate significant Joule heat during data processing, leading to localized temperature increases. Simultaneously, the conductivity of conductive materials such as copper leads and solder joints on the circuit board is temperature-dependent; changes in temperature cause variations in conductivity, thus affecting current density and electric field distribution. The influence of the temperature field on the electric field is illustrated in the following equation:

[0038] In the formula, For resistance, For temperature, For temperature The resistivity of a conductor. Its physical meaning is: when the temperature of a conductor on a computer motherboard increases, the resistance of the conductor will increase accordingly.

[0039] Furthermore, during high-speed signal transmission, the skin effect and dielectric loss cause the PCB traces to heat up, further exacerbating the non-uniformity of the temperature field. Localized overheating can affect the clock stability of the chip and may even lead to performance degradation or permanent damage to electronic devices. The effect of the electric field on the temperature field is shown in the following equation:

[0040] In the formula, It is Joule heat. For electrical conductivity, Let be the electric potential. Its physical meaning is: when a conductor in a computer motherboard is energized, the Joule heat generated in the conductor is proportional to the square of the potential gradient, and also proportional to the conductivity of the conductor.

[0041] 2) Force-electric coupling effect Various components inside a computer undergo thermal expansion or contraction during temperature changes. Due to the mechanical constraints of the overall computer structure, the thermal deformation of the circuit board is limited, resulting in thermal stress within the circuit board. Furthermore, computers contain various materials such as copper, solder, and FR4, each with different coefficients of thermal expansion (CTE), leading to stress gradients between components during thermal cycling. For example, between a chip and the PCB, because the solder joint material and the PCB have different CTEs, repeated temperature changes may cause fatigue failure and cracks in the solder joint, reducing soldering reliability. This thermo-mechanical field coupling effect not only affects the structural integrity of the computer system but may also cause deformation of high-speed signal transmission paths, thus affecting signal integrity.

[0042] The effect of the temperature field on the structural field is shown in the equation:

[0043] In the formula, For stress, In response, The elastic coefficient, The thermoelastic coefficient, Temperature. Its physical meaning is: temperature differences within a computer structure cause deformation of unit cells, thus generating stress. In multi-field coupling analysis, the feedback effect of the structural field on the temperature field exhibits weak coupling characteristics; in engineering practice, the unidirectional coupling assumption is often used to improve computational efficiency.

[0044] In real-world computer applications, systems may be subjected to external vibrations or shocks. Due to the varying elastic moduli of different components within the board-level circuitry, uneven mechanical loading can lead to localized stress concentrations, resulting in changes in resistance. The influence of the structural field on the resistance in the electric field can be expressed by the following equation:

[0045] In the formula, For conductor resistance, Poisson's ratio, For linear strain, Let be the resistivity of the conductor. Its physical meaning is: changes in the strain of the structural field will cause changes in resistance.

[0046] When a computer motherboard experiences a mechanical impact, solder joints and wires may undergo minor deformation. Under the combined influence of multiple factors such as electric field, temperature, stress, and concentration, metal atoms migrate, affecting the current path and leading to an increase in local current density, thus triggering electromigration. Driven by various migration forces, metal atoms in the solder joint move directionally, forming voids within the joint. This change hinders current transmission, restricting electrical transmission in the board-level circuitry and ultimately causing failure.

[36] .

[0047] Furthermore, high current density can cause metal atoms to migrate within the solder joint material, leading to voids and affecting the mechanical strength of the solder joint. After prolonged service, the solder joint may crack or even fail due to electromigration. The effect of the electric field on the structural field can be expressed by the following equation:

[0048] In the formula, The force vector per unit volume of the structure. The current density vector in the conductor. For electric field strength, The speed at which light travels through the air. It is the current density vector. It is the thermoelastic coefficient. Its physical meaning is: the combined effect of electric and magnetic fields will exert a force on the conductors inside the computer, thus affecting them.

[0049] 3) Atom concentration migration effect Atoms undergo directional motion under the influence of electron wind, thermal gradient, and stress gradient. As electromigration proceeds, an imbalance in atomic concentration distribution occurs. According to Le Chatelier's principle, this uneven concentration distribution generates a driving force that propels atoms towards lower concentrations, inhibiting electromigration. This influence increases with the concentration gradient; migration caused by atomic concentration gradients is called chemical migration. Its atomic diffusion flux can be expressed as:

[0050] In the formula, The concentration gradient is the driving force for diffusion, the chemical potential gradient is the driving force, and the migration force is along the direction of decreasing concentration.

[0051] Therefore, electromigration failure is the result of the combined effects of driving forces such as electron wind, thermal gradient, stress gradient and atomic concentration gradient. Thus, the study of electromigration failure mechanism should take into account various driving mechanisms and requires multi-physics coupling analysis.

[0052] S430, the temperature field of each grid is combined to form the temperature field of the original motherboard; wherein, the temperature field of the original motherboard includes the temperature fields of the simplified chip and the original solder joint.

[0053] S440 extracts the thermal boundary temperature data of the simplified chip from the simplified chip temperature field and loads it into the CAE model corresponding to the original chip to obtain the initial CAE model of the original chip.

[0054] In one specific embodiment of the present invention, S600 includes: S610, the stress-strain distribution of the original solder joints is grouped according to the line to obtain the stress-strain distribution of two original solder joints on each line; S620 uses the stress-strain distribution of the original solder joints on each line to generate an analysis model of the solder joints and the line itself. S630: For any line, if there is a deformed solder joint on the line, then perform electrical performance analysis on the solder joint and the line analysis model.

[0055] To elucidate the multi-scale temperature transfer mechanism between the motherboard and solder joints, and to reveal the cross-scale correlation between high-frequency transmission line impedance mismatch and fatigue failure of dangerous solder joints.

[0056] Six critical solder joints (deformed solder joints) in the thermal stress concentration area of ​​the motherboard were selected, and a model was created in ANSYS SpaceClaim as follows: Figure 7 The three-dimensional model shown has a BGA solder ball diameter of 0.5 mm, a solder ball spacing of 1 mm, and a solder ball height of 0.3 mm.

[0057] Based on the structural characteristics and dimensional parameters of the chip solder joints, the 3D modeling software SOLIDWORKS was used to create a model. Finally, the various components were assembled to generate a complete solder joint model. Figure 7 Figure b shows the internal cross-sectional view of the interconnection structure of the dangerous solder joint, and Table 1.3 shows the material properties of SnAgCu for the solder joint.

[0058] Table 1.3 Material properties of SnAgCu solder joints

[0059] In high-speed motherboard circuit systems, the anti-interference capability of differential signal transmission is significantly reduced by environmental stress. When the system is subjected to extreme temperature fluctuations, the difference in thermal expansion coefficients between different materials can induce structural mismatch. If mechanical vibration or impact loads are superimposed, the multi-physics coupling effect will exacerbate the stress concentration effect. This synergistic effect can trigger two typical failure modes: first, the geometric symmetry of the differential pair is disrupted, resulting in a common-mode to differential-mode conversion effect; second, the transmission line undergoes micron-level deformation, leading to impedance continuity degradation. In addition, the resistance of conductor materials exhibits a positive temperature coefficient characteristic with temperature changes, causing thermal drift in the DC impedance of the line; the dielectric constant of the dielectric material also changes nonlinearly with temperature, causing changes in distributed capacitance parameters. These structural damages and changes in electrical parameters significantly reduce signal transmission quality and cause signal integrity problems due to signal amplitude fluctuations.

[0060] Therefore, a set of differential lines in the 3A5000 motherboard was selected as the analysis object to study in detail the effects of extreme temperature and shock vibration on its electrical performance. Specifically, differential lines PCIE-TX0-N and PCIE-TX0-P were selected, a solder joint-circuit model was established, and the coupled model was extracted. The PCB file was imported into SIWAVE, the corresponding circuits were selected and cut, and the cut circuit structure is shown below. Figure 8 As shown in Figure a, the selected circuit file is then imported into HFSS to generate a circuit structure model, and a model of the solder joints of the connected chips is established, as shown below. Figure 8 Figure b shows the PCIE-TX0 solder joint-circuit structure.

[0061] This application establishes a three-tier architecture: system-level, component-level, and mesoscopic-level. Figure 9 As shown, cross-scale modeling is based on the three-level architecture of "system-component-mesoscopic level". By establishing a multi-level model that includes the entire system, CPU motherboard components, and 3A5000 chip solder joints, a full-scale analysis from macroscopic thermodynamic response to microscopic solder joint failure is achieved. At the same time, by combining the deformation of specific solder joints and circuits and the changes in physical property parameters, the electrical performance of the computer is analyzed, preparing for the subsequent evaluation of the electrical life of the computer in service.

[0062] A sequential coupling approach was adopted for cross-scale coupled analysis. First, the macroscopic computer system model was solved to obtain temperature and displacement field data. Boundary conditions were then transferred to the component-level model using a node mapping method. In the mesoscale analysis, the strain energy density distribution of the weld array was extracted, and the top 5% of high-energy regions were selected to establish a mesoscale sub-model. The time step was controlled by the Courant-Friedrichs-Lewy criterion to ensure the synchronization of transient analyses at each scale.

[0063] Secondly, the present invention provides a computer-based cross-scale integrated analysis device based on a multi-physics coupling mechanism, comprising: The building module is configured to build the original CAE models corresponding to each component of a single computer, including the chassis, original motherboard, original chips, and original solder joints. The simplification module is configured to form an initial CAE model of the chassis by simplifying the original motherboard and original chips, along with the original solder joints; The motherboard simulation module is configured to perform coarse mesh generation on the initial CAE model of the chassis, calculate the temperature field of each mesh to form the temperature field of the chassis, and extract simplified thermal boundary temperature data of the motherboard from it, thereby loading it into the original motherboard CAE model to obtain the original motherboard initial CAE model. The chip simulation module is configured to record simulation conditions and fine mesh generation on the initial CAE model of the original motherboard, thereby solving the temperature field of the original motherboard and extracting simplified thermal boundary temperature data of the chip, which is then loaded into the CAE model corresponding to the original chip to obtain the initial CAE model of the original chip. The solver module is configured to perform fine mesh generation on the initial CAE model of the original chip and solve the stress-strain distribution of each mesh to form the stress-strain distribution of the original chip. The performance simulation module is configured to generate solder joint and circuit analysis models for each circuit based on the stress-strain distribution of the original chip, and to perform electrical performance analysis on the solder joint and circuit analysis models corresponding to any circuit with deformed solder joints.

[0064] Thirdly, the present invention provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; Memory, used to store computer programs; When a processor executes a program stored in memory, it implements the steps of the method described in the first aspect.

[0065] Fourthly, the present invention provides a computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the method described in the first aspect.

[0066] It is worth noting that the terms "first" and "second" in this invention are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0067] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A computer-based cross-scale ensemble analysis method based on a multiphysics coupling mechanism, characterized in that, include: S100, establish the original CAE model corresponding to each component of a single computer, wherein each component includes the chassis, original motherboard, original chip and original solder joint; S200, by simplifying the original motherboard and original chips, forms the initial CAE model of the chassis with the original solder joints; S300, the initial CAE model of the chassis is coarsely meshed, the temperature field of each mesh is calculated and the temperature field of the chassis is formed, and the simplified thermal boundary temperature data of the motherboard is extracted from it, thereby loading it into the original motherboard CAE model to obtain the initial CAE model of the original motherboard. S400 records simulation conditions and fine mesh generation on the initial CAE model of the original motherboard, thereby solving the temperature field of the original motherboard and extracting the simplified chip's thermal boundary temperature data, which is then loaded into the CAE model corresponding to the original chip to obtain the initial CAE model of the original chip. S500, the initial CAE model of the original chip is divided into fine meshes, and the stress-strain distribution of each mesh is solved to form the stress-strain distribution of the original chip. S600: Based on the stress-strain distribution of the original chip, generate the solder joint and circuit analysis model corresponding to each circuit, and perform electrical performance analysis on the solder joint and circuit analysis model corresponding to any circuit with deformed solder joints.

2. The computer-based cross-scale integrated analysis method based on multiphysics coupling mechanism according to claim 1, characterized in that, S100 includes: S110, establish the three-dimensional models corresponding to each component of a single computer; S120, set simulation parameters for the 3D model corresponding to each component to obtain the CAE model corresponding to each component; wherein, the simulation parameters include material parameters, boundary conditions and loads.

3. The computer-based cross-scale integrated analysis method based on multiphysics coupling mechanism according to claim 2, characterized in that, S200 includes: S210, the three-dimensional models corresponding to the original motherboard and the original chip are simplified to obtain simplified three-dimensional models of the simplified motherboard and the simplified chip; S220, the simplified three-dimensional models of the simplified motherboard and the simplified chip are combined with the three-dimensional models corresponding to the original solder points to form the initial CAE model of the chassis.

4. The computer-based cross-scale integrated analysis method based on multiphysics coupling mechanism according to claim 3, characterized in that, The S300 includes: S310, perform coarse mesh generation on the initial CAE model of the chassis, calculate the temperature field of each mesh to form the temperature field of the chassis; the temperature field of the chassis includes the temperature fields of the chassis, the simplified motherboard and the simplified chip; S320: Extract simplified motherboard thermal boundary temperature data from the temperature field of the chassis, and load it into the original motherboard CAE model to obtain the initial CAE model of the original motherboard.

5. The computer-based cross-scale integrated analysis method based on multiphysics coupling mechanism according to claim 3, characterized in that, The S400 includes: S410, load simulation conditions onto the initial CAE model of the original motherboard to obtain a CAE model with loading conditions; wherein, the simulation conditions include boundary conditions and loads; S420, The CAE model under loading conditions is divided into fine meshes, and the electric field, temperature field and mechanical field distribution of each mesh are obtained; S430, the temperature field of each grid is combined to form the temperature field of the original motherboard; wherein, the temperature field of the original motherboard includes the temperature fields of the simplified chip and the original solder joint; S440 extracts the thermal boundary temperature data of the simplified chip from the simplified chip temperature field and loads it into the CAE model corresponding to the original chip to obtain the initial CAE model of the original chip.

6. The computer-based cross-scale integrated analysis method based on multiphysics coupling mechanism according to claim 1, characterized in that, The stress-strain distribution of the original chip described in S500 includes the stress-strain distribution of the simplified chip and the original solder joints.

7. The computer-based cross-scale integrated analysis method based on multiphysics coupling mechanism according to claim 6, characterized in that, The S600 includes: S610, the stress-strain distribution of the original solder joints is grouped according to the line to obtain the stress-strain distribution of two original solder joints on each line; S620 uses the stress-strain distribution of the original solder joints on each line to generate an analysis model of the solder joints and the line itself. S630: For any line, if there is a deformed solder joint on the line, then perform electrical performance analysis on the solder joint and the line analysis model.

8. A computer-based cross-scale integrated analysis device based on a multiphysics coupling mechanism, characterized in that, include: The building module is configured to build the original CAE models corresponding to each component of a single computer, including the chassis, original motherboard, original chips, and original solder joints. The simplification module is configured to form an initial CAE model of the chassis by simplifying the original motherboard and original chips, along with the original solder joints; The motherboard simulation module is configured to perform coarse mesh generation on the initial CAE model of the chassis, calculate the temperature field of each mesh to form the temperature field of the chassis, and extract simplified thermal boundary temperature data of the motherboard from it, thereby loading it into the original motherboard CAE model to obtain the initial CAE model of the original motherboard. The chip simulation module is configured to record simulation conditions and fine mesh generation on the initial CAE model of the original motherboard, thereby solving the temperature field of the original motherboard and extracting simplified thermal boundary temperature data of the chip, which is then loaded into the CAE model corresponding to the original chip to obtain the initial CAE model of the original chip. The solver module is configured to perform fine mesh generation on the initial CAE model of the original chip and solve the stress-strain distribution of each mesh to form the stress-strain distribution of the original chip. The performance simulation module is configured to generate solder joint and circuit analysis models for each circuit based on the stress-strain distribution of the original chip, and to perform electrical performance analysis on the solder joint and circuit analysis models corresponding to any circuit with deformed solder joints.

9. An electronic device, characterized in that, It includes a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; Memory, used to store computer programs; A processor, when executing a program stored in memory, implements the steps of the method described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the method described in any one of claims 1-7.

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