Image sensors and high dynamic range adaptive imaging methods

Abstract

This application provides an image sensor and a high dynamic range adaptive imaging method. The image sensor includes: a pixel array comprising a dual-conversion gain transistor and a row selection transistor for generating a floating diffusion node readout signal; a readout module for receiving initial sampling, converting the floating diffusion node readout signal into a color-level digital signal based on a comparison between the readout signal and an analog reference voltage signal, and reading the pixel electrical signal under the selected path during the readout phase; a pre-readout module for obtaining a gain path signal based on a comparison between the color-level digital signal and the digital reference voltage signal, thereby changing the state of the dual-conversion gain transistor to obtain the selected path; and a synthesis module for mixing the color-level digital signal, the gain path signal, and the pixel electrical signal to perform high dynamic range image acquisition. This application enables rapid pre-readout judgment before the readout phase, thereby determining the optimal signal gain mode for output and achieving dynamic range optimization.

Description

Technical Field

[0001] This application relates to the field of image sensors, and more specifically, to image sensors and high dynamic range adaptive imaging methods. Background Technology

[0002] An image sensor is an electronic device that converts light signals into electrical signals. It is a crucial component of modern optoelectronic technology and is widely used in cameras, webcams, smartphones, drones, and other devices. The core function of an image sensor is to capture light and generate corresponding image data; its performance directly affects image quality. An image sensor typically includes multiple pixel circuits, each responsible for sensing the light intensity at its corresponding location. Internally, a pixel circuit usually includes a photodiode (PD), multiple transistors, and related circuitry to perform the acquisition, storage, retrieval, and transmission of light signals.

[0003] Currently, image sensors face numerous challenges in high dynamic range (HDR) imaging. Especially in high-contrast lighting scenarios, such as backlit environments and outdoor day-night cycles, existing single-gain imaging methods cannot simultaneously capture details in both dark and bright areas, leading to overexposure or underexposure. To address this issue, the industry has proposed various dynamic range extension technologies, including multi-frame synthesis and dual-conversion gain (DCG). Among these, the LOFIC structure, as an implementation that supports different gain paths at the pixel level, is gradually becoming the mainstream solution.

[0004] Figure 1 This refers to the photodiode acquisition circuit in existing image sensors. For example... Figure 1 As shown, in existing lateral overflow integral capacitor (LOFIC) technology, whenever an electron overflows, the overflowing electron flows sequentially through a photodiode (PD), a floating diffusion node (FD), and the LOFIC capacitor. All electrons are read out, thereby increasing the dynamic range.

[0005] However, existing LOFIC methods typically read the signals from both the high-gain level signal (HCG) and low-gain level signal (LCG) paths simultaneously in each frame (as follows). Figure 1 As shown), its main defects include:

[0006] 1. Because the signals from two paths are read, the reading time and data volume are doubled, which severely limits frame rate performance.

[0007] 2. In actual output, usually only one gain path signal is reserved for display or processing, while reading and transmitting the other path results in wasted resources and increased overall power consumption.

[0008] 3. Dynamic range synthesis relies on a back-end image signal processor (ISP), which increases system latency and reduces flexibility.

[0009] 4. The above problems are particularly prominent in applications such as mobile devices that have high requirements for battery life and real-time response.

[0010] Although the existing LOFIC technology can achieve dynamic range extension through a dual-gain (high-gain HCG and low-gain LCG) path, it still has many shortcomings in practical applications.

[0011] In view of this, the present invention provides an image sensor and a high dynamic range adaptive imaging method.

[0012] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this application, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0013] To address the aforementioned issues, this invention proposes an image sensor and a high dynamic range adaptive imaging method, overcoming the difficulties of existing technologies. By performing rapid pre-reading judgment before the reading stage, it can determine whether to set a pixel to a high-gain or low-gain mode, retaining only the optimal signal for output, effectively improving the frame rate, reducing power consumption, and bringing dynamic range optimization.

[0014] An embodiment of the present invention provides an image sensor, comprising:

[0015] A pixel array, including an array of photodiode acquisition circuits that generate image charge signals in response to incident light, the photodiode acquisition circuit including at least one dual-conversion-gain transistor for switching readout paths and a row selection transistor for generating a floating diffusion node readout signal based on a floating diffusion node;

[0016] The reading module is used to receive the initial sampling of the reading signal of the floating diffusion node before the reading stage, and convert it into a color level digital signal based at least on the comparison result of the reading signal of the floating diffusion node and a preset analog reference voltage signal; and read the pixel electrical signal under the selected path during the reading stage.

[0017] The pre-read module obtains a gain path signal based on the comparison result between the color level digital signal and a preset digital reference voltage signal, and drives at least one selector to output a high level or a low level based on the gain path signal. Each selector corresponds to a dual-conversion gain transistor to change the state of the corresponding dual-conversion gain transistor and obtain the selection path.

[0018] The synthesis module is used to mix the pre-read color level digital signal, gain path signal and pixel electrical signal read in the reading stage according to the pixel mapping relationship, and use them as the pixel output signal corresponding to the photodiode. The pixel output signal is then arranged and combined according to the pixel position to perform high dynamic range image acquisition.

[0019] Preferably, the pixel array includes only a first dual-conversion gain transistor, the pre-read module includes only a first selector, the output of the first selector is connected to the gate of the first dual-conversion gain transistor, the photodiode acquisition circuit forms two readout paths for gain signals based on the state of the first dual-conversion gain transistor, and outputs a gain signal based on only one readout path for gain signal.

[0020] Preferably, the photodiode acquisition circuit includes:

[0021] A photodiode that generates an image charge in response to incident light;

[0022] A floating diffusion node is coupled to receive a first overflow image charge from the photodiode;

[0023] A floating diffusion capacitor is coupled between the floating diffusion node and the ground terminal;

[0024] A transfer transistor is coupled between the photodiode and the floating diffusion node to transfer the image charge to the floating diffusion node;

[0025] A first capacitor connection node is coupled to receive a second overflow image charge from the floating diffusion node, and a first dual-conversion gain transistor is coupled between the floating diffusion node and the first capacitor connection node;

[0026] A reset transistor is coupled between the reset voltage signal and the first capacitor connection node;

[0027] The first transverse overflow integral capacitor is coupled between the first capacitor connection node and the ground terminal;

[0028] A source follower, wherein the first terminal of the source follower is coupled to the drain voltage signal and the gate is coupled to the floating diffusion node, the first terminal of the row selection transistor is coupled to the second terminal of the source follower, and the second terminal of the row selection transistor outputs the floating diffusion node read signal during the pre-readout phase or outputs the pixel electrical signal during the readout phase.

[0029] Preferably, the pre-read module includes:

[0030] An analog signal comparator with a reset function receives a floating diffusion node read signal and compares it with the voltage of a preset analog reference voltage signal at different times. The voltage of the analog reference voltage signal at different times corresponds to a unique color level digital level.

[0031] The counter records the comparison result of the analog signal comparator each time, and generates the corresponding color level digital signal when the comparison result changes.

[0032] Preferably, the reading module includes:

[0033] A digital signal comparator receives the color level digital signal and compares it with a preset digital reference voltage signal to obtain the gain path signal;

[0034] The first selector outputs a corresponding high or low level according to the gain path signal to change the state of the first dual-conversion gain transistor to form one of the two readout paths of the gain signal.

[0035] Preferably, the pixel array includes a first dual-conversion gain transistor and a second dual-conversion gain transistor. The pre-read module includes a first selector and a second selector. The output terminal of the first selector is connected to the gate of the first dual-conversion gain transistor, and the output terminal of the second selector is connected to the gate of the second dual-conversion gain transistor. After the photodiode acquisition circuit forms a readout path corresponding to a first gain signal or a second gain signal based on the state of the first dual-conversion gain transistor, when the first dual-conversion gain transistor is turned on, the photodiode acquisition circuit performs a second pre-readout to obtain the state of the second dual-conversion gain transistor, and forms a readout path corresponding to a third gain signal based on the combination of the states of the first and second dual-conversion gain transistors, and outputs a gain signal based on a readout path with only one gain signal.

[0036] Preferably, the photodiode acquisition circuit includes:

[0037] A photodiode that generates an image charge in response to incident light;

[0038] A floating diffusion node is coupled to receive a first overflow image charge from the photodiode;

[0039] A floating diffusion capacitor is coupled between the floating diffusion node and the ground terminal;

[0040] A transfer transistor is coupled between the photodiode and the floating diffusion node to transfer the image charge to the floating diffusion node;

[0041] A first capacitor connection node is coupled to receive a second overflow image charge from the floating diffusion node, and a first dual-conversion gain transistor is coupled between the floating diffusion node and the first capacitor connection node;

[0042] The second capacitor connection node is coupled to receive the third overflow image charge from the first capacitor connection node.

[0043] The second dual-conversion gain transistor is coupled between the first capacitor connection node and the second capacitor connection node;

[0044] A reset transistor is coupled between the reset voltage signal and the capacitor connection node;

[0045] The first transverse overflow integral capacitor is coupled between the first capacitor connection node and the ground terminal;

[0046] The second transverse overflow integrating capacitor is coupled between the second capacitor connection node and the ground terminal;

[0047] A source follower, wherein the first terminal of the source follower is coupled to the drain voltage signal and the gate is coupled to the floating diffusion node, and the first terminal of the row selection transistor is coupled to the second terminal of the source follower, wherein the second terminal of the row selection transistor outputs the floating diffusion node read signal at the time during the two pre-readout phases or outputs the pixel electrical signal during the readout phase.

[0048] Preferably, the pre-read module includes:

[0049] An analog signal comparator with a reset function receives a floating diffusion node read signal and compares it with the voltage of a preset analog reference voltage signal at different times. The voltage of the analog reference voltage signal at different times corresponds to a unique color level digital level.

[0050] The counter records the comparison result of the analog signal comparator each time, and generates the corresponding color level digital signal when the comparison result changes.

[0051] Preferably, the reading module includes:

[0052] A digital signal comparator receives the color level digital signal and compares it with a preset digital reference voltage signal to obtain a first gain path signal;

[0053] The first selector outputs a corresponding high or low level according to the first gain path signal to adjust the state of the first dual-conversion gain transistor to form one of the two readout paths of the gain signal;

[0054] The second selector, after the first selector adjusts the state of the first dual-conversion gain transistor, performs a second pre-readout based on the state of the first dual-conversion gain transistor when the first dual-conversion gain transistor is in the on state. According to the result of the second comparison by the digital signal comparator, a second gain path signal is obtained. The corresponding high or low level is output according to the second gain path signal to adjust the state of the second dual-conversion gain transistor. Based on the combination of the states of the first dual-conversion gain transistor and the second dual-conversion gain transistor, a readout path corresponding to a third gain signal is formed, and a gain signal is output with a readout path based only on one gain signal.

[0055] Preferably, it further includes:

[0056] The row decoding module is used to select pixels row by row from top to bottom.

[0057] Embodiments of the present invention provide a high dynamic range adaptive imaging method, employing the above-described image sensor, comprising:

[0058] S110. Reset each node to its initial state;

[0059] S120, a photodiode acquisition circuit for image charge signals generated by a pixel array in response to incident light;

[0060] S130: Initial sampling of the floating diffusion node reading signal before the reading phase, and conversion of the floating diffusion node reading signal into a color-level digital signal based on the comparison result between the floating diffusion node reading signal and a preset analog reference voltage signal;

[0061] S140. Obtain a gain path signal based on the comparison result between the color level digital signal and a preset digital reference voltage signal, and drive a selector to output a high level or a low level based on the gain path signal to change the state of the corresponding dual-conversion gain transistor to obtain a selection path.

[0062] S150. The color level digital signal, gain path signal and pixel electrical signal read in the reading stage are mixed according to the pixel mapping relationship to form the pixel output signal corresponding to the photodiode. The pixel output signals are arranged and combined according to the pixel position to perform high dynamic range image acquisition.

[0063] Embodiments of the present invention provide another high dynamic range adaptive imaging method, employing the above-described image sensor, including:

[0064] S210. Reset each node to its initial state;

[0065] S220, a photodiode acquisition circuit for a pixel array that generates an image charge signal in response to incident light;

[0066] S230: Receive initial sampling of the floating diffusion node reading signal before the reading phase; convert the floating diffusion node reading signal into a color level digital signal based on the comparison result between the floating diffusion node reading signal and a preset analog reference voltage signal; and read the pixel electrical signal under the selected path during the reading phase.

[0067] S240. Obtain a first gain path signal based on the comparison result between the color level digital signal and a preset digital reference voltage signal. Drive the first selector to output a high level or a low level based on the first gain path signal to change the state of the corresponding first dual-conversion gain transistor and update the selection path.

[0068] S250. Determine whether the state of the first dual-conversion gain transistor is on. If yes, proceed to step S260. If yes, proceed to step S280.

[0069] S260. Receive the second sampling of the floating diffusion node read signal from the updated pixel array, and convert it into a second color level digital signal based on the comparison result between the second floating diffusion node read signal and the analog reference voltage signal.

[0070] S270. Obtain a second gain path signal based on the comparison result between the second color level digital signal and the digital reference voltage signal. Drive the second selector to output a high level or a low level based on the second gain path signal to change the state of the corresponding second dual-conversion gain transistor and update the selection path again.

[0071] S280. The pre-read color level digital signal, gain path signal, and pixel electrical signal read in the reading stage based on the updated selected path are mixed according to the pixel mapping relationship to form the pixel output signal corresponding to the photodiode. The pixel output signals are arranged and combined according to the pixel position to perform high dynamic range image acquisition.

[0072] This invention proposes an image sensor and a high dynamic range adaptive imaging method. Based on the LOFIC dynamic range readout method with adaptive path selection, it can determine whether to set a pixel to a high-gain or low-gain mode by performing a rapid pre-read judgment before the readout stage, and retain only the optimal signal for output, thus fundamentally solving the limitations of existing LOFIC structures in terms of power consumption, frame rate and processing complexity. Attached Figure Description

[0073] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. It is obvious that the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0074] Figure 1 It is a photodiode acquisition circuit in existing image sensors.

[0075] Figure 2 This is a schematic diagram of the image sensor module provided in an embodiment of this application.

[0076] Figure 3 This is a circuit schematic diagram of the first image sensor provided in the embodiments of this application.

[0077] Figure 4 This is a circuit connection diagram of the first image sensor provided in the embodiments of this application.

[0078] Figure 5 This is a timing diagram of the process of image acquisition by the first image sensor provided in the embodiments of this application.

[0079] Figure 6 This is a circuit schematic diagram of the second type of image sensor provided in the embodiments of this application.

[0080] Figure 7 This is a circuit connection diagram of the second type of image sensor provided in the embodiments of this application.

[0081] Figure 8 This is a timing diagram of the process of image acquisition by the second type of image sensor provided in the embodiments of this application. Detailed Implementation

[0082] The following specific examples illustrate the implementation methods of this application. Those skilled in the art can easily understand the other advantages and effects of this application from the content disclosed herein. This application can also be implemented or applied through other different specific embodiments, and various details in this application can be modified or changed according to different viewpoints and application systems without departing from the spirit of this application. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0083] The embodiments of this application will now be described in detail with reference to the accompanying drawings, so that those skilled in the art can easily implement the application. This application may be embodied in many different forms and is not limited to the embodiments described herein.

[0084] In this application, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics represented in connection with that embodiment or example, which are included in at least one embodiment or example of this application. Furthermore, the specific features, structures, materials, or characteristics represented may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate different embodiments or examples represented in this application, as well as features of different embodiments or examples.

[0085] Furthermore, the terms "first" and "second" are used for illustrative purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the representation of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0086] For the purpose of clearly describing this application, devices that are not relevant to the description are omitted, and the same or similar components throughout the specification are given the same reference numerals.

[0087] Throughout this specification, when it is said that a device is "connected" to another device, this includes not only "direct connection" but also "indirect connection" by placing other components in between. Furthermore, when it is said that a device "comprises" a certain constituent element, unless otherwise stated otherwise, this does not exclude other constituent elements, but rather implies that other constituent elements may be included.

[0088] When we say that a device is "above" another device, this can mean that it is directly above the other device, or it can mean that other devices are present in between. Conversely, when we say that a device is "directly" "above" another device, there are no other devices present in between.

[0089] Although the terms first, second, etc., are used in some instances herein to refer to various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, first interface and second interface, etc., are used. Furthermore, as used herein, the singular forms “a,” “an,” and “the” are intended to also include the plural forms unless the context indicates otherwise. It should be further understood that the terms “comprising,” “including,” indicate the presence of features, steps, operations, elements, components, items, kinds, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, kinds, and / or groups. The terms “or” and “and / or” as used herein are interpreted as inclusive, or mean any one or any combination thereof. Thus, “A, B, or C” or “A, B, and / or C” means “any one of: A; B; C; A and B; A and C; B and C; A, B, and C.” Exceptions to this definition will only occur if the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.

[0090] The technical terms used herein are for reference only to specific embodiments and are not intended to limit the scope of this application. The singular form used herein includes the plural form unless the statement explicitly indicates otherwise. The word "comprising" as used in the specification means to specify a particular characteristic, region, integer, step, operation, element, and / or component, and does not exclude the presence or addition of other characteristics, regions, integers, steps, operations, elements, and / or components.

[0091] Although not explicitly defined, all terms, including technical and scientific terms used herein, shall have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. Terms defined in commonly used dictionaries shall be further interpreted as having a meaning consistent with the relevant technical literature and the content of this present application, and shall not be over-interpreted as having an ideal or formulaic meaning unless otherwise defined.

[0092] Although existing LOFIC technology can achieve dynamic range extension through a dual-gain (high-gain HCG and low-gain LCG) path, it still has many shortcomings in practical applications. (See existing technologies...) Figure 1The main drawbacks of this approach are: 1. Each frame of the image requires simultaneous reading of signals from two gain paths, resulting in a significant increase in data volume and prolonged reading time, severely restricting the system's frame rate performance. 2. Typically, only one gain path signal is used for subsequent image processing or display, while the other is discarded, leading to redundant signal acquisition and transmission, and consequently increased energy consumption. 3. The dynamic range synthesis process relies on the backend image signal processor (ISP), which not only increases system processing latency but also reduces the overall flexibility of the solution. 4. These problems are particularly pronounced in mobile terminal devices with stringent requirements for low power consumption and high response speed, becoming key factors limiting their further application. The technical solution of this invention is an improvement addressing the above-mentioned shortcomings.

[0093] Figure 2 This is a schematic diagram of the image sensor module provided in an embodiment of this application. Figure 2As shown, this invention provides an image sensor, including: a pixel array 1, a pre-read module 2, a read module 3, a row decoding module 4, and a synthesis module 5. The pixel array 1 includes an array of photodiode acquisition circuits that generate image charge signals in response to incident light. The photodiode acquisition circuit includes at least one dual-conversion gain transistor for switching the readout path and a row selection transistor T5 that generates a floating diffusion node readout signal V3 (a foreread voltage signal, used only for gain path selection before the display stage; the voltage signal of the floating diffusion node FD will be read again in subsequent display stages; to distinguish the two signals, the former voltage signal will be simply referred to as the floating diffusion node readout signal) based on the floating diffusion node FD. The read module 3 receives the initial sampling of the floating diffusion node readout signal V3 before the readout stage and converts it into a color level digital signal based on at least the comparison result between the floating diffusion node readout signal V3 and a preset analog reference voltage signal V6. During the readout stage, it reads the pixel electrical signals under the selected path. The pre-read module 2 obtains a gain path signal based on the comparison between the color level digital signal and a preset digital reference voltage signal V7. It then drives at least one selector to output a high or low level based on the gain path signal. Each selector corresponds to a dual-conversion gain transistor, changing the state of the corresponding transistor to obtain a selection path. The synthesis module 5 mixes the pre-read color level digital signal, the gain path signal, and the pixel electrical signals read during the reading stage according to pixel mapping relationships, using this mixture as the pixel output signal for the corresponding photodiode. It then arranges and combines the pixel output signals according to pixel positions for high dynamic range image acquisition. Specifically, based on the mapping relationship between the pixel electrical signals read under a gain path for the same pixel and the corresponding floating diffusion node read signal V3, it generates path tags. Finally, it generates the corresponding pixel information in image 6 based on the pixel electrical signals corresponding to the mapping relationship and the floating diffusion node read signal V3, thus synthesizing image 6. This invention provides a method for improving frame rate, extending dynamic range, and optimizing power consumption in an image sensor based on a LOFIC (Lateral Overflow Integration Capacitor) structure. This method can be widely applied in image acquisition devices requiring high frame rate, high dynamic range, and low power consumption, such as consumer electronics, smart terminals, industrial vision, automotive camera systems, and security monitoring. The LOFIC technology aims to improve the imaging quality of cameras in complex lighting environments. The core principle of LOFIC is to add a high-density capacitor next to each photodiode to collect photoelectrons that may overflow due to saturation. When the number of photoelectrons converted by a photodiode exceeds its carrying capacity, the excess photoelectrons flow into adjacent capacitors, effectively preserving highlight information, avoiding overexposure, and making the captured images closer to real-world lighting effects.

[0094] In a preferred embodiment, the pixel array 1 includes only the first dual-conversion gain transistor T2, the pre-read module 2 includes only the first selector 7, the output terminal of the first selector 7 is connected to the gate of the first dual-conversion gain transistor T2, the photodiode acquisition circuit forms two readout paths for the gain signals based on the state of the first dual-conversion gain transistor T2, and outputs the gain signal based on only one readout path for the gain signal, but is not limited thereto.

[0095] In a preferred embodiment, the photodiode acquisition circuit includes:

[0096] A photodiode (PD) generates an image charge in response to incident light.

[0097] A floating diffusion node FD is coupled to receive the first overflow image charge from a photodiode PD.

[0098] The floating diffusion capacitor C1 is coupled between the floating diffusion node FD and the ground terminal.

[0099] Transmitting transistor T1 is coupled between photodiode PD and floating diffusion node FD to transfer image charge to floating diffusion node FD.

[0100] The first capacitor connection node MIM1 is coupled to receive the second overflow image charge from the floating diffusion node FD, and the first dual-conversion gain transistor T2 is coupled between the floating diffusion node FD and the first capacitor connection node MIM1.

[0101] The reset transistor T3 is coupled between the reset voltage signal V1 and the first capacitor connection node MIM1.

[0102] The first transverse overflow integral capacitor C2 is coupled between the first capacitor connection node MIM1 and the ground terminal.

[0103] Source follower T4 has its first terminal coupled to drain voltage signal V2 and its gate coupled to floating diffusion node FD. The first terminal of row select transistor T5 is coupled to the second terminal of source follower T4. The second terminal of row select transistor T5 outputs floating diffusion node read signal V3 during the pre-readout phase or outputs pixel electrical signal during the readout phase, but is not limited to this.

[0104] In a preferred embodiment, the reading module 3 includes:

[0105] The analog signal comparator 10 with reset function receives the floating diffusion node read signal V3 and compares it with the voltage of a preset analog reference voltage signal V6 at different times. The voltage of the analog reference voltage signal V6 at different times corresponds to a unique color level digital level.

[0106] Counter 9 records the comparison result of analog signal comparator 10 each time, and generates the corresponding color level digital signal when the comparison result changes, but is not limited to this.

[0107] In a preferred embodiment, the pre-read module 2 includes:

[0108] The digital signal comparator 8 receives the color level digital signal and compares it with a preset digital reference voltage signal V7 to obtain the gain path signal.

[0109] The first selector 7 outputs a corresponding high or low level according to the gain path signal to change the state of the first dual-conversion gain transistor T2 to form one of the two readout paths of the gain signal, but is not limited to this.

[0110] In a preferred embodiment, the pixel array 1 includes a first dual-conversion gain transistor T2 and a second dual-conversion gain transistor T6. The pre-read module 2 includes a first selector 7 and a second selector 12. The output terminal of the first selector 7 is connected to the gate of the first dual-conversion gain transistor T2, and the output terminal of the second selector 12 is connected to the gate of the second dual-conversion gain transistor T6. After the photodiode acquisition circuit forms a readout path corresponding to a first gain signal or a second gain signal based on the state of the first dual-conversion gain transistor T2, when the first dual-conversion gain transistor T2 is turned on, the photodiode acquisition circuit performs a second pre-readout to obtain the state of the second dual-conversion gain transistor T6, and forms a readout path corresponding to a third gain signal based on the combination of the states of the first dual-conversion gain transistor T2 and the second dual-conversion gain transistor T6, and outputs a gain signal with a readout path based on only one gain signal, but is not limited thereto.

[0111] In a preferred embodiment, the photodiode acquisition circuit includes:

[0112] A photodiode (PD) generates an image charge in response to incident light.

[0113] A floating diffusion node FD is coupled to receive the first overflow image charge from a photodiode PD.

[0114] The floating diffusion capacitor C1 is coupled between the floating diffusion node FD and the ground terminal.

[0115] Transmitting transistor T1 is coupled between photodiode PD and floating diffusion node FD to transfer image charge to floating diffusion node FD.

[0116] The first capacitor connection node MIM1 is coupled to receive the second overflow image charge from the floating diffusion node FD, and the first dual-conversion gain transistor T2 is coupled between the floating diffusion node FD and the first capacitor connection node MIM1.

[0117] The second capacitor connection node MIM2 is coupled to receive the third overflow image charge from the first capacitor connection node MIM1.

[0118] The second dual-conversion gain transistor T6 is coupled between the first capacitor connection node MIM1 and the second capacitor connection node MIM2.

[0119] The reset transistor T3 is coupled between the reset voltage signal V1 and the second capacitor connection node MIM2.

[0120] The first transverse overflow integral capacitor C2 is coupled between the first capacitor connection node MIM1 and the ground terminal.

[0121] The second transverse overflow integrating capacitor C3 is coupled between the second capacitor connection node MIM2 and the ground terminal.

[0122] The source follower T4 has its first terminal coupled to the drain voltage signal V2 and its gate coupled to the floating diffusion node FD. The first terminal of the row selection transistor T5 is coupled to the second terminal of the source follower T4. The second terminal of the row selection transistor T5 outputs the floating diffusion node read signal V3 at the time during the two pre-readout phases or outputs the pixel electrical signal during the readout phase, but is not limited to this.

[0123] In a preferred embodiment, the reading module 3 includes:

[0124] The analog signal comparator 10 with reset function receives the floating diffusion node read signal V3 and compares it with the voltage of a preset analog reference voltage signal V6 at different times. The voltage of the analog reference voltage signal V6 at different times corresponds to a unique color level digital level.

[0125] Counter 9 records the comparison result of analog signal comparator 10 each time, and generates the corresponding color level digital signal when the comparison result changes, but is not limited to this.

[0126] In a preferred embodiment, the pre-read module 2 includes:

[0127] The digital signal comparator 8 receives the color level digital signal and compares it with a preset digital reference voltage signal V7 to obtain the first gain path signal.

[0128] The first selector 7 outputs a corresponding high or low level according to the first gain path signal to adjust the state of the first dual-conversion gain transistor T2 to form one of the two readout paths of the gain signal.

[0129] After the first selector 7 adjusts the state of the first dual-conversion gain transistor T2, when the first dual-conversion gain transistor T2 is in the on state, the second selector 12 performs a second pre-readout based on the state of the first dual-conversion gain transistor T2. According to the result of the second comparison by the digital signal comparator 8, the second gain path signal is obtained. The corresponding high or low level is output according to the second gain path signal to adjust the state of the second dual-conversion gain transistor T6. The readout path corresponding to the third gain signal is formed based on the combination of the states of the first dual-conversion gain transistor T2 and the second dual-conversion gain transistor T6. The gain signal is output with only one readout path based on the gain signal, but not limited to this.

[0130] In a preferred embodiment, it further includes: a row decoding module 4, used to select pixels row by row from top to bottom, but not limited thereto.

[0131] Figure 3 This is a circuit schematic diagram of the first image sensor provided in the embodiments of this application. Figure 4 This is a circuit connection diagram of the first type of image sensor provided in the embodiments of this application. For example... Figure 3 and 4As shown, the pixel array 1 in the first image sensor of this invention includes only a first dual-conversion gain transistor T2, and the pre-read module 2 includes only a first selector 7. The output terminal of the first selector 7 is connected to the gate of the first dual-conversion gain transistor T2 (DCG transistor). The photodiode acquisition circuit forms readout paths for two gain signals based on the state of the first dual-conversion gain transistor T2, and outputs a gain signal based on only one gain signal readout path. The photodiode acquisition circuit specifically also includes: a photodiode PD, which generates image charge in response to incident light; a floating diffusion node FD, coupled to receive the first overflow image charge from the photodiode PD; a floating diffusion capacitor C1, coupled between the floating diffusion node FD and the ground terminal; a transfer transistor T1, coupled between the photodiode PD and the floating diffusion node FD to transfer the image charge to the floating diffusion node FD; a first capacitor connection node MIM1, coupled to receive the second overflow image charge from the floating diffusion node FD; and a first dual-conversion gain transistor T2 coupled between the floating diffusion node FD and the first capacitor connection node MIM1. Reset transistor T3 is coupled between reset voltage signal V1 and the first capacitor connection node MIM1. First lateral overflow integrating capacitor C2 is coupled between the first capacitor connection node MIM1 and ground. Source follower T4 has its first terminal coupled to drain voltage signal V2, and its gate coupled to floating diffusion node FD. Row select transistor T5 has its first terminal coupled to the second terminal of source follower T4. The second terminal of row select transistor T5 outputs floating diffusion node read signal V3 during the pre-readout phase or outputs a pixel electrical signal during the readout phase, but is not limited to this.

[0132] In a preferred embodiment, the reading module 3 includes: an analog signal comparator 10 with a reset function (reset via a reset switch K1), which receives the floating diffusion node reading signal V3 and compares it with the voltage of a preset analog reference voltage signal V6 at different times, wherein the voltage of the analog reference voltage signal V6 at different times corresponds to a unique color level digital level; and a counter 9, which records the comparison result of the analog signal comparator 10 each time, and generates the corresponding color level digital signal when the comparison result changes, but is not limited thereto.

[0133] In a preferred embodiment, the pre-read module 2 includes: a digital signal comparator 8, which receives a color level digital signal and compares it with a preset digital reference voltage signal V7 to obtain a gain path signal; and a first selector 7, which outputs a corresponding high or low level according to the gain path signal. Figure 4 The first floating diffusion node read signal V4 is used to change the state of the first dual conversion gain transistor T2 to form one of two gain signal (HCG or LCG) readout paths, but not limited thereto.

[0134] To address the aforementioned issues, this invention proposes a LOFIC dynamic range readout method based on adaptive path selection. Before the readout stage, the FD level and a threshold are compared. Based on the comparison result, it is determined whether to set the pixel to high-gain or low-gain mode, reading only those modes. This avoids the problems of long readout times and high power consumption associated with reading both high-gain and low-gain modes simultaneously. This fundamentally solves the problems of power consumption, frame rate, and processing complexity inherent in traditional LOFIC structures. At the system level, the shutter and exposure processes of this invention are the same as traditional LOFIC technology. The difference lies in the subsequent four steps: 1. FD level readout; 2. gain selection; 3. pixel charge signal readout; and 4. signal and gain path merging. The technical solution for these four steps can be implemented using the following approach. Figure 5 This is a timing diagram illustrating the image acquisition process of the first image sensor provided in this application embodiment. (Reference) Figure 5 As shown, the first image sensor of this invention can acquire images that exhibit both high-gain HCG and low-gain LCG gains. The specific usage process is as follows:

[0135] S110. Reset each node to its initial state. By sequentially turning on the reset transistor T3, the first dual-conversion gain transistor T2 (DCG switch), and the transmission transistor T1, the floating diffusion node (FD) and the first capacitor connection node MIM1 (metal-insulated metal-capacitor connection node) in the pixel are reset to their initial levels to ensure the consistency of subsequent operations.

[0136] The S120 pixel array 1 is a photodiode acquisition circuit that generates image charge signals in response to incident light. Next, the pixels enter the exposure process, and the photodiode PD begins to accumulate photogenerated electrons. When the light intensity is low, the electrons do not reach the overflow threshold and are all stored in the photodiode PD, keeping the voltage of the floating diffusion node FD high. When the light intensity is high, electrons overflow to the floating diffusion node FD, causing its voltage to drop. Further excess electrons flow into the first capacitor connection node MIM1 and are collected by the floating diffusion capacitor C1 (LOFIC capacitor), thus achieving a large dynamic range of charge storage. In the LOFIC pixel architecture design, the charge signal in the photodiode PD can overflow to the floating diffusion node FD via the transmission transistor T1. The image sensor converts the level of the floating diffusion node FD during analog-to-digital conversion of the photoelectric signal. Therefore, the gain of the photodiode PD during photoelectric signal conversion can be configured based on the magnitude of the charge signal overflowing to the floating diffusion node FD.

[0137] S130: Initial sampling of the floating diffusion node read signal before the read phase, and conversion of the floating diffusion node read signal into a color-level digital signal based on the comparison result between the floating diffusion node read signal and a preset analog reference voltage signal. For example:

[0138] First, the floating diffusion node FD level is sampled. The specific steps are as follows: First, the row selection signal (SEL signal) is set to a high level during the reading period, and the row selection transistor T5 and the first dual-conversion gain transistor T2 are turned on to balance the levels of the floating diffusion node FD and the floating diffusion capacitor C1. After turning off the first dual-conversion gain transistor T2, depending on the actual pixel design, a middle level can be used to first turn on the transmission transistor T1, and then turn off the transmission transistor T1 before sampling the floating diffusion node FD level. Alternatively, the transmission transistor T1 can be turned off without turning it on and off, and the floating diffusion node FD level can be sampled directly. The analog signal comparator 10 in the reading module 3 compares the acquired floating diffusion node reading signal V3 (floating diffusion node FD level) with the analog reference voltage signal V6. Since the analog reference voltage signal is an analog signal with a constantly changing level, the voltage of the analog reference voltage signal V6 at different times corresponds to a unique color level digital level. The counter 9 records the comparison result of the analog signal comparator 10 each time, and generates the color level digital signal corresponding to the floating diffusion node reading signal V3 at that time when the comparison result changes.

[0139] S140. A gain path signal is obtained based on the comparison result between the color level digital signal and a preset digital reference voltage signal. The gain path signal drives a selector to output a high or low level, thereby changing the state of the corresponding dual-conversion gain transistor to obtain a selection path. The digital signal comparator 8 in the pre-read module 2 receives the color level digital signal and compares it with a preset digital reference voltage signal V7 to obtain the gain path signal. The first selector 7 outputs a corresponding high or low level based on the gain path signal to change the state of the first dual-conversion gain transistor T2, forming one of two readout paths for the gain signal. That is, if the first selector 7 receives a gain path signal of "0", it outputs a high level to turn on the first dual-conversion gain transistor T2. At this time, the floating diffusion node FD is in an LCG (low conversion gain) state; if the first selector 7 receives a gain path signal of "1", it outputs a low level to turn off the first dual-conversion gain transistor T2. At this time, the floating diffusion node FD is in an HCG (high conversion gain) state. Thus, two different readout paths can be achieved by changing the state of the first dual-conversion gain transistor T2.

[0140] S150, the compositing module 5 mixes the pre-read color level digital signal, gain path signal, and pixel electrical signal read in the reading stage according to the pixel mapping relationship, and uses them as the pixel output signal of the corresponding photodiode. It then arranges and combines the pixel output signals according to the pixel position to perform high dynamic range image acquisition. Specifically, the compositing module 5 can select the corresponding preset image algorithm to process the color level digital signal and pixel electrical signal based on the gain path signal. Finally, it can generate a gain path selection map (CG Map, or Conversion Gain Map, used to represent the mapping relationship between the gain path signal of each sub-pixel and the pixel data acquired by that sub-pixel, so that subsequent one-to-one processing can be performed). This map is output along with the pixel data for the backend ISP or processor to correctly parse and composite; while maintaining high dynamic range imaging quality, it simplifies the post-processing workflow.

[0141] This invention features a modular architecture and scalability, and its technology can be adapted to pixel-level, column-level, or global control architectures; it is compatible with existing LOFIC designs, requires minimal hardware modifications, and is easy to integrate into mass production; it can be expanded to more advanced functions such as gain paths, multi-level threshold judgment, and regional control.

[0142] In this application, the DCG control signal is changed to a column-level signal, and the following timing considerations apply to this DCG control signal:

[0143] 1. During the exposure stage, the DCG transistor switch remains off to avoid affecting the normal charge accumulation and transfer within the pixel.

[0144] 2. When entering the readout stage and updating the DCG control signal, pixels in other rows within the same column may still be in an exposed state, potentially introducing a small DCG pulse interference into these pixels. However, during the overflow region stage, the impact of the DCG pulse is relatively small because electrons have already begun to transfer, and its effect on the final image quality can be considered limited.

[0145] 3. Since the DCG transistor is off most of the time, it is only necessary to ensure that when a "shuttering" operation is performed on a row of pixels, pixels in other rows of the same column are not in the pre-reading stage to avoid mutual interference. In this way, the DCG control signal (column-level control signal DCG) can be used to switch DCG gating without affecting pixels in other rows of the same column, achieving the safety and independence of column-level DCG control.

[0146] Furthermore, if there are three conversion gain configurations (HCG, MCG, LCG), the level of the floating diffusion node (FD) needs to be read twice before reading the photoelectric signal. These two readings of the FD level signal can be compared with a threshold, and the conversion gain configuration can be set based on the comparison result. The relevant implementation scheme is described below. Figures 6 to 8 introduce.

[0147] Figure 6 This is a circuit schematic diagram of the second type of image sensor provided in the embodiments of this application. Figure 7 This is a circuit connection diagram of the second type of image sensor provided in the embodiments of this application. For example... Figure 6 and 7As shown, the pixel array 1 in the second type of image sensor of the present invention includes a first dual-conversion gain transistor T2 and a second dual-conversion gain transistor T6. The pre-read module 2 includes a first selector 7 and a second selector 12. The output terminal of the first selector 7 is connected to the gate of the first dual-conversion gain transistor T2, and the output terminal of the second selector 12 is connected to the gate of the second dual-conversion gain transistor T6. After the photodiode acquisition circuit forms a readout path corresponding to a first gain signal or a second gain signal based on the state of the first dual-conversion gain transistor T2, when the first dual-conversion gain transistor T2 is turned on, the photodiode acquisition circuit performs a second pre-readout to obtain the state of the second dual-conversion gain transistor T6, and forms a readout path corresponding to a third gain signal based on the combination of the states of the first dual-conversion gain transistor T2 and the second dual-conversion gain transistor T6, and outputs a gain signal based on a readout path based on only one gain signal. The photodiode acquisition circuit specifically also includes: a photodiode PD, which generates image charge in response to incident light; a floating diffusion node FD, coupled to receive the first overflow image charge from the photodiode PD; and a floating diffusion capacitor C1, coupled between the floating diffusion node FD and the ground terminal. A transfer transistor T1 is coupled between a photodiode PD and a floating diffusion node FD to transfer image charge to the floating diffusion node FD. A first capacitor-connected node MIM1 is coupled to receive a second overflow image charge from the floating diffusion node FD. A first dual-conversion gain transistor T2 is coupled between the floating diffusion node FD and the first capacitor-connected node MIM1. A second capacitor-connected node MIM2 is coupled to receive a third overflow image charge from the first capacitor-connected node MIM1. A second dual-conversion gain transistor T6 is coupled between the first capacitor-connected node MIM1 and the second capacitor-connected node MIM2. A reset transistor T3 is coupled between a reset voltage signal V1 and the second capacitor-connected node MIM2. A first lateral overflow integrating capacitor C2 is coupled between the first capacitor-connected node MIM1 and ground. A second lateral overflow integrating capacitor C3 is coupled between the second capacitor-connected node MIM2 and ground. The source follower T4 has its first terminal coupled to the drain voltage signal V2 and its gate coupled to the floating diffusion node FD. The first terminal of the row selection transistor T5 is coupled to the second terminal of the source follower T4. The second terminal of the row selection transistor T5 outputs the floating diffusion node read signal V3 at the time during the two pre-readout phases or outputs the pixel electrical signal during the readout phase.

[0148] In a preferred embodiment, the reading module 3 includes: an analog signal comparator 10 with a reset function, which receives the floating diffusion node reading signal V3 and compares it with the voltage of a preset analog reference voltage signal V6 at different times, wherein the voltage of the analog reference voltage signal V6 at different times corresponds to a unique color level digital level; and a counter 9, which records the comparison result of the analog signal comparator 10 each time, and generates the corresponding color level digital signal when the comparison result changes, but is not limited thereto.

[0149] In a preferred embodiment, the pre-read module 2 includes: a digital signal comparator 8, which receives a color level digital signal and compares it with a preset digital reference voltage signal V7 to obtain a first gain path signal; and a first selector 7, which outputs a corresponding high level or low level according to the first gain path signal. Figure 7 The first floating diffusion node reads the signal V4 to adjust the state of the first dual-conversion gain transistor T2 to form one of two gain signal (MCG or LCG) readout paths. The second selector 12, after the first selector 7 adjusts the state of the first dual-conversion gain transistor T2, performs a second pre-readout based on the state of the first dual-conversion gain transistor T2 when T2 is in the on state. According to the result of the second comparison by the digital signal comparator 8, the second gain path signal is obtained, and a corresponding high or low level is output based on the second gain path signal. Figure 7 The second floating diffusion node reads the signal V5 to adjust the state of the second dual-conversion gain transistor T6, and forms a readout path corresponding to the third gain signal (HCG) based on the combination of the states of the first dual-conversion gain transistor T2 and the second dual-conversion gain transistor T6, and outputs the gain signal with a readout path based on only one gain signal, but not limited to this.

[0150] Figure 8 This is a timing diagram illustrating the image acquisition process of the second type of image sensor provided in this application embodiment. (Reference) Figure 8 As shown, the second image sensor of this invention can acquire images with three gain levels: high-gain HCG, medium-gain MCG, and low-gain LCG. The specific usage process is as follows:

[0151] S210. Reset each node to its initial state.

[0152] S220 is a photodiode acquisition circuit that generates image charge signals in response to incident light using a pixel array.

[0153] S230: Initial sampling of the floating diffusion node read signal before the read phase; conversion of the floating diffusion node read signal into a color level digital signal based on the comparison result between the floating diffusion node read signal and a preset analog reference voltage signal; and reading the pixel electrical signal under the selected path during the read phase.

[0154] S240. Obtain a first gain path signal based on the comparison result between the color level digital signal and a preset digital reference voltage signal. Drive the first selector 7 to output a high level or a low level based on the first gain path signal to change the state of the corresponding first dual-conversion gain transistor T2 to update the selection path.

[0155] S250. Determine whether the state of the first dual-conversion gain transistor T2 is on. If yes, proceed to step S260. If yes, proceed to step S280.

[0156] S260: Receive the second sampling of the floating diffusion node read signal from the updated pixel array, and convert it into a second color level digital signal based on the comparison result between the second floating diffusion node read signal and an analog reference voltage signal.

[0157] S270. Based on the comparison result between the second color level digital signal and the digital reference voltage signal, the second gain path signal is obtained. The second selector 12 is driven to output a high level or a low level according to the second gain path signal, so as to change the state of the corresponding second dual conversion gain transistor T6 and update the selection path again.

[0158] S280: The pre-read color level digital signal, gain path signal, and pixel electrical signal read in the reading stage based on the updated selected path are mixed according to the pixel mapping relationship to serve as the pixel output signal of the corresponding photodiode. The pixel output signals are then arranged and combined according to the pixel position to perform high dynamic range image acquisition.

[0159] The difference between the second image sensor of this invention and the second image sensor lies in the addition of a second dual-conversion gain transistor T6, a second lateral overflow integration capacitor C3, and a second selector 12 to achieve a third selection path, thereby realizing three gain modes: HCG, MCG, and LCG. The MCG and LCG gain modes can be achieved by controlling the first dual-conversion gain transistor T2 through the first selector 7. When the first dual-conversion gain transistor T2 is off, it is in LCG gain mode; when it is on, it is in MCG gain mode. The HCG gain mode requires pre-reading again while the first dual-conversion gain transistor T2 is on. The operating state of the second dual-conversion gain transistor T6 is determined based on the output of the second selector 12. If the second dual-conversion gain transistor T6 is off, it remains in MCG gain mode; if it is on, it is in HCG gain mode. The relevant implementation principle can be found in [reference needed]. Figure 3 , 4 The relevant descriptions of 5 will not be repeated here.

[0160] Compared with the prior art, the present invention has the following significant technical advantages:

[0161] (1) Improved frame rate: Since only the pixel signal of the selected gain path is read, the reading time required for each frame of the image and the subsequent image signal processing time are greatly reduced; compared with existing products, the initial estimate is that the reading time can be reduced and the frame rate can be greatly improved.

[0162] (2) Reduce power consumption: Eliminate redundant paths for signal acquisition and analog-to-digital conversion, reducing the overall power consumption of the sensor; compared with existing products, the power consumption of ADC sampling and data transmission to the ISP can be significantly reduced.

[0163] (3) Dynamic range optimization: By introducing a medium gain path and adjustable judgment logic, the imaging capability of medium brightness areas is enhanced, making the HDR effect more natural.

[0164] (4) Reduce system complexity: Move the gain selection logic to the sensor end to reduce the burden of back-end ISP synthesis and simplify system design.

[0165] (5) Easy to integrate and expand: The architecture can be implemented on existing image sensor platforms at a low cost, and has good compatibility and scalability.

[0166] In view of this, the present invention proposes an image sensor and a high dynamic range adaptive imaging method, which is based on the LOFIC dynamic range readout method with adaptive path selection. By performing a rapid pre-reading judgment before the readout stage, it can determine whether to set the pixel to a high gain or low gain mode and retain only the optimal signal for output, thus fundamentally solving the limitations of the existing LOFIC structure in terms of power consumption, frame rate and processing complexity.

[0167] The above description, in conjunction with specific optional embodiments, provides a further detailed explanation of this application and should not be construed as limiting the specific implementation of this application to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of this application, and all such modifications or substitutions should be considered within the scope of protection of this application.

Claims

1. An image sensor, characterized in that, include: The pixel array (1) includes an array of photodiode acquisition circuits that generate image charge signals in response to incident light. The photodiode acquisition circuit includes at least one dual-conversion gain transistor for switching readout paths and a row selection transistor (T5) for generating a floating diffusion node readout signal (V3) based on a floating diffusion node (FD). The reading module (3) is used to receive the initial sampling of the floating diffusion node reading signal (V3) before the reading stage, and convert it into a color level digital signal based at least on the comparison result of the floating diffusion node reading signal (V3) and a preset analog reference voltage signal (V6). The reading module (3) reads the pixel electrical signal under the selected path during the reading phase. The reading module (3) includes: an analog signal comparator (10) with a reset function, which receives the floating diffusion node reading signal (V3) and compares it with the voltage of a preset analog reference voltage signal (V6) at different times. The voltage of the analog reference voltage signal (V6) at different times corresponds to a unique color level digital level; a counter (9), which records the comparison result of the analog signal comparator (10) each time and generates the corresponding color level digital signal when the comparison result changes. The pre-read module (2) obtains a gain path signal based on the comparison result between the color level digital signal and a preset digital reference voltage signal (V7), and drives at least one selector to output a high level or a low level based on the gain path signal. Each selector corresponds to a dual-conversion gain transistor to change the state of the corresponding dual-conversion gain transistor and obtain the selection path. The synthesis module (5) is used to mix the pre-read color level digital signal, gain path signal and pixel electrical signal read in the reading stage according to the pixel mapping relationship, as the pixel output signal corresponding to the photodiode, and to arrange and combine the pixel output signal according to the pixel position to perform high dynamic range image acquisition.

2. The image sensor according to claim 1, characterized in that, The pixel array (1) includes only the first dual-conversion gain transistor (T2), the pre-read module (2) includes only the first selector (7), the output terminal of the first selector (7) is connected to the gate of the first dual-conversion gain transistor (T2), the photodiode acquisition circuit forms two readout paths for the gain signals based on the state of the first dual-conversion gain transistor (T2), and outputs the gain signal based on only one readout path for the gain signal.

3. The image sensor according to claim 2, characterized in that, The photodiode acquisition circuit includes: A photodiode (PD) that generates an image charge in response to incident light; A floating diffusion node (FD) is coupled to receive a first overflow image charge from the photodiode (PD); A floating diffusion capacitor (C1) is coupled between the floating diffusion node (FD) and the ground terminal; A transfer transistor (T1) is coupled between the photodiode (PD) and the floating diffusion node (FD) to transfer the image charge to the floating diffusion node (FD). A first capacitor connection node (MIM1) is coupled to receive a second overflow image charge from the floating diffusion node (FD), and a first dual-conversion gain transistor (T2) is coupled between the floating diffusion node (FD) and the first capacitor connection node (MIM1). A reset transistor (T3) is coupled between a reset voltage signal (V1) and the first capacitor connection node (MIM1); The first transverse overflow integrating capacitor (C2) is coupled between the first capacitor connection node (MIM1) and the ground terminal; A source follower (T4) has a first terminal coupled to a drain voltage signal (V2) and a gate coupled to the floating diffusion node (FD). The first terminal of the row selection transistor (T5) is coupled to the second terminal of the source follower (T4). The second terminal of the row selection transistor (T5) outputs a floating diffusion node read signal (V3) during the pre-readout phase or outputs a pixel electrical signal during the readout phase.

4. The image sensor according to claim 2, characterized in that, The pre-read module (2) includes: A digital signal comparator (8) receives the color level digital signal and compares it with a preset digital reference voltage signal (V7) to obtain the gain path signal; The first selector (7) outputs a corresponding high or low level according to the gain path signal to change the state of the first dual-conversion gain transistor (T2) to form one of the two readout paths of the gain signal.

5. The image sensor according to claim 2, characterized in that, The pixel array (1) includes a first dual-conversion gain transistor (T2) and a second dual-conversion gain transistor (T6). The pre-read module (2) includes a first selector (7) and a second selector (12). The output terminal of the first selector (7) is connected to the gate of the first dual-conversion gain transistor (T2), and the output terminal of the second selector (12) is connected to the gate of the second dual-conversion gain transistor (T6). After the photodiode acquisition circuit forms a readout path corresponding to a first gain signal or a second gain signal based on the state of the first dual-conversion gain transistor (T2), when the first dual-conversion gain transistor (T2) is turned on, the photodiode acquisition circuit performs a second pre-readout to obtain the state of the second dual-conversion gain transistor (T6), and forms a readout path corresponding to a third gain signal based on the combination of the states of the first dual-conversion gain transistor (T2) and the second dual-conversion gain transistor (T6), and outputs a gain signal based on a readout path based on only one gain signal.

6. The image sensor according to claim 5, characterized in that, The photodiode acquisition circuit includes: A photodiode (PD) that generates an image charge in response to incident light; A floating diffusion node (FD) is coupled to receive a first overflow image charge from the photodiode (PD); A floating diffusion capacitor (C1) is coupled between the floating diffusion node (FD) and the ground terminal; A transfer transistor (T1) is coupled between the photodiode (PD) and the floating diffusion node (FD) to transfer the image charge to the floating diffusion node (FD). A first capacitor connection node (MIM1) is coupled to receive a second overflow image charge from the floating diffusion node (FD), and a first dual-conversion gain transistor (T2) is coupled between the floating diffusion node (FD) and the first capacitor connection node (MIM1). The second capacitive connection node (MIM2) is coupled to receive the third overflow image charge from the first capacitive connection node (MIM1). The second dual-conversion gain transistor (T6) is coupled between the first capacitor connection node (MIM1) and the second capacitor connection node (MIM2); The reset transistor (T3) is coupled between the reset voltage signal (V1) and the second capacitor connection node (MIM2); The first transverse overflow integrating capacitor (C2) is coupled between the first capacitor connection node (MIM1) and the ground terminal; The second transverse overflow integrating capacitor (C3) is coupled between the second capacitor connection node (MIM2) and the ground terminal; A source follower (T4) has a first terminal coupled to a drain voltage signal (V2) and a gate coupled to the floating diffusion node (FD). The first terminal of the row selection transistor (T5) is coupled to the second terminal of the source follower (T4). The second terminal of the row selection transistor (T5) outputs the floating diffusion node read signal (V3) at the time of the two pre-readout phases or outputs a pixel electrical signal during the readout phase.

7. The image sensor according to claim 6, characterized in that, The pre-read module (2) includes: A digital signal comparator (8) receives the color level digital signal and compares it with a preset digital reference voltage signal (V7) to obtain a first gain path signal; The first selector (7) outputs a corresponding high level or low level according to the first gain path signal to adjust the state of the first dual conversion gain transistor (T2) to form one of the two gain signal readout paths; The second selector (12) performs a second pre-readout based on the state of the first dual-conversion gain transistor (T2) after the first selector (7) adjusts the state of the first dual-conversion gain transistor (T2). When the first dual-conversion gain transistor (T2) is in the on state, it obtains a second gain path signal based on the result of the second comparison of the digital signal comparator (8). It outputs a corresponding high or low level based on the second gain path signal to adjust the state of the second dual-conversion gain transistor (T6). It forms a readout path corresponding to the third gain signal based on the combination of the states of the first dual-conversion gain transistor (T2) and the second dual-conversion gain transistor (T6), and outputs a gain signal based on a readout path that is based on only one gain signal.

8. The image sensor according to claim 1, characterized in that, Also includes: The row decoding module (4) is used to select pixels row by row from top to bottom.

9. A high dynamic range adaptive imaging method, characterized in that, The image sensor as described in claim 2 includes: S110. Reset each node to its initial state; S120, a photodiode acquisition circuit for image charge signals generated by a pixel array in response to incident light; S130: Initial sampling of the floating diffusion node reading signal before the reading phase, and conversion of the floating diffusion node reading signal into a color-level digital signal based on the comparison result between the floating diffusion node reading signal and a preset analog reference voltage signal; S140. Obtain a gain path signal based on the comparison result between the color level digital signal and a preset digital reference voltage signal, and drive a selector to output a high level or a low level based on the gain path signal to change the state of the corresponding dual-conversion gain transistor to obtain a selection path. S150. The color level digital signal, gain path signal and pixel electrical signal read in the reading stage are mixed according to the pixel mapping relationship to form the pixel output signal corresponding to the photodiode. The pixel output signals are arranged and combined according to the pixel position to perform high dynamic range image acquisition.

10. A high dynamic range adaptive imaging method, characterized in that, The image sensor as described in claim 5 includes: S210. Reset each node to its initial state; S220, a photodiode acquisition circuit for a pixel array that generates an image charge signal in response to incident light; S230: Receive initial sampling of the floating diffusion node reading signal before the reading phase; convert the floating diffusion node reading signal into a color level digital signal based on the comparison result between the floating diffusion node reading signal and a preset analog reference voltage signal; and read the pixel electrical signal under the selected path during the reading phase. S240. Obtain a first gain path signal based on the comparison result between the color level digital signal and a preset digital reference voltage signal. Drive the first selector (7) to output a high level or a low level based on the first gain path signal to change the state of the corresponding first dual conversion gain transistor (T2) to update the selection path. S250. Determine whether the state of the first dual-conversion gain transistor (T2) is on. If yes, proceed to step S260. If yes, proceed to step S280. S260. Receive the second sampling of the floating diffusion node read signal from the updated pixel array, and convert it into a second color level digital signal based on the comparison result between the second floating diffusion node read signal and the analog reference voltage signal. S270. Based on the comparison result between the second color level digital signal and the digital reference voltage signal, a second gain path signal is obtained. Based on the second gain path signal, the second selector (12) is driven to output a high level or a low level to change the state of the corresponding second dual conversion gain transistor (T6) to update the selection path again. S280. The pre-read color level digital signal, gain path signal, and pixel electrical signal read in the reading stage based on the updated selected path are mixed according to the pixel mapping relationship to form the pixel output signal corresponding to the photodiode. The pixel output signals are arranged and combined according to the pixel position to perform high dynamic range image acquisition.

Images