A back contact cell and a preparation method thereof, a back contact laminated cell and a photovoltaic module

Abstract

The application relates to the technical field of photovoltaic modules, in particular to a back contact cell, a preparation method thereof, a back contact laminated cell and a photovoltaic module. The back contact cell comprises a silicon substrate, the back surface of the silicon substrate is provided with a main grid, and a plurality of pads are arranged on the main grid at intervals. The back surface of the silicon substrate further comprises a doped region, and the main grid is located in the projection range of the doped region. Wherein, along the extension direction of the main grid, the width of at least part of the main grid structure near the pad end is greater than the width far from the pad end, and / or the width of the corresponding region of the doped region and the main grid near the pad end is greater than the width of the corresponding region of the doped region and the main grid far from the pad end. Along the extension direction of the main grid, the main grid has a width change, which can reduce the overall area of the main grid, thereby reducing the total amount of slurry required in the preparation process of the main grid, so as to reduce the overall preparation cost of the main grid.

Description

Technical Field

[0001] This application relates to the field of photovoltaic module technology, specifically to a back-contact solar cell and its preparation method, a back-contact tandem solar cell, and a photovoltaic module. Background Technology

[0002] Photovoltaic modules convert solar energy into electrical energy, offering advantages such as being pollution-free, geographically unrestricted, and inexhaustible, making them a major direction for the development of new energy sources. Photovoltaic modules mainly consist of photovoltaic cells, photovoltaic glass, a backsheet, and encapsulating film. Back-contact cells, a type of photovoltaic cell, place both the positive and negative electrodes on the back side of the cell, reducing light shading by the grid lines, increasing the light-receiving area, and improving performance. The electrode structure generally includes a main grid, fine grids, and pads on the main grid. The fine grids collect charge carriers, and the main grid collects these carriers. The main grid is typically fabricated using screen printing, which consumes a large amount of paste, resulting in higher production costs. Summary of the Invention

[0003] In view of this, the present application provides a back-contact solar cell and its preparation method, a back-contact tandem solar cell and a photovoltaic module, so as to solve the technical problem of high preparation cost of back-contact solar cell main busbar in the prior art.

[0004] In a first aspect, embodiments of this application provide a back-contact solar cell, the back-contact solar cell comprising a silicon substrate, a main gate disposed on the back side of the silicon substrate, and a plurality of pads spaced apart on the main gate; the back side of the silicon substrate further comprises a doped region, the main gate being located within the projection range of the doped region; wherein, along the extending direction of the main gate, at least a portion of the width of the main gate structure near the pad is greater than the width away from the pad, and / or, the width of the doped region corresponding to the area of ​​the main gate near the pad is greater than the width of the doped region corresponding to the area of ​​the main gate away from the pad.

[0005] In this embodiment, the technical effect of making the width of at least a portion of the main gate structure closer to the pad greater than the width farther from the pad along the extension direction of the main gate is as follows: A larger width at the pad end increases the connection area between the main gate and the pad, thereby increasing the cross-sectional area of ​​the carrier transport path, reducing contact resistance, and thus reducing carrier losses between the main gate and the pad. Conversely, a smaller width at the pad end reduces the area occupied by the main gate in that region, providing more space for the subsequent arrangement of fine gates, increasing the length of the fine gates, and thus increasing the carrier collection area to improve the photoelectric conversion efficiency of the back-contact solar cell. Furthermore, the variation in width along the extension direction of the main gate also reduces the overall area of ​​the main gate, thereby reducing the total amount of paste required during the main gate fabrication process and reducing the overall fabrication cost of the main gate. At the same time, the width of the area corresponding to the doped region and the main gate near the pad is made greater than the width of the area corresponding to the doped region and the main gate away from the pad. Even if the width of the area corresponding to the doped region changes with the width of the main gate, it can be ensured that the main gate is arranged within the projection range of the doped region.

[0006] In one specific embodiment, the main gate includes a first segment and a second segment, the second segment being located between two adjacent pads, and the first segment being the area other than the second segment; along the direction away from the pads, the width of the first segment near the pads is greater than the width away from the pads, and / or, along the extension direction of the main gate, the width of the second segment near the pads is greater than the width at the center of the second segment.

[0007] In one specific embodiment, the width of the end of the first segment away from the pad and the width W1 of the center of the second segment satisfy 10um≤W1<200um, and / or, the width W2 of the first segment and the end of the second segment near the pad satisfies 200um≤W2≤800um.

[0008] In one specific embodiment, along the direction away from the pad, the width of the doped region corresponding to the first segment near the pad is greater than the width of the doped region corresponding to the first segment away from the pad, and / or, along the extension direction of the main gate, the width of the doped region corresponding to the second segment near the pad is greater than the width of the doped region corresponding to the center position of the second segment.

[0009] In one specific embodiment, within the range corresponding to the main gate, the minimum width W3 of the doped region satisfies 100um≤W3≤300um, and the maximum width W4 of the doped region satisfies 300um<W4≤850um.

[0010] In one specific embodiment, the silicon substrate is further provided with a fine gate, one end of which is connected to the main gate; along the extension direction of the main gate, the length of the fine gate away from the pad is greater than the length of the fine gate close to the pad.

[0011] In one specific embodiment, along the extension direction of the main gate, the length of the fine gate farther from the pad is L1, and the length of the fine gate closer to the pad is L2, where L1 ≤ L2 + 400 μm.

[0012] In one specific embodiment, the end of the doped region corresponding to the main gate has an angle along the extension direction of the main gate; the end of the doped region corresponding to the pad is parallel to the extension direction of the main gate.

[0013] In one specific embodiment, the doped region includes a first doped region and a second doped region, the main gate includes a first main gate and a second main gate, and the fine gate includes a first fine gate and a second fine gate. The first main gate and the first fine gate are located within the projection range of the first doped region, and the second main gate and the second fine gate are located within the projection range of the second doped region. The first doped region and the second doped region are distributed in a finger-like pattern. Along the extension direction of the main gate, the width of the region corresponding to the first doped region and the first main gate is proportional to the width of the first main gate. The width of the region corresponding to the second doped region and the second main gate is proportional to the width of the second main gate.

[0014] Secondly, embodiments of this application provide a method for preparing a back contact solar cell, the method comprising:

[0015] Preparation of silicon substrate;

[0016] A tunneling oxide layer and a doped polycrystalline silicon layer are formed on the back side of the silicon substrate;

[0017] A passivation layer and an anti-reflection layer are deposited on the front side of the silicon substrate;

[0018] A transparent conductive oxide layer is deposited on the back side of the silicon substrate;

[0019] Gate lines are fabricated on the back side of the silicon substrate;

[0020] The doped polysilicon layer includes a doped region, and the gate line includes a main gate and a fine gate; along the extension direction of the main gate, the main gate has a width variation, the doped region has a width variation, and the fine gate has a length variation.

[0021] In one specific embodiment, the method for fabricating the back contact solar cell specifically includes the following steps in the process of forming a tunneling oxide layer and a doped polycrystalline silicon layer on the back side of the silicon substrate:

[0022] A tunneling oxide layer and an intrinsic polycrystalline silicon layer are deposited on the back side of the silicon substrate;

[0023] A mask layer is deposited on the intrinsic polysilicon layer;

[0024] Laser grooving is performed on the mask layer to form a first groove with varying width;

[0025] The intrinsic polysilicon layer in the region corresponding to the first groove is doped to form a first doped region;

[0026] Laser grooving is performed on the mask layer to form a second groove with varying width;

[0027] The intrinsic polysilicon layer in the region corresponding to the second groove is doped to form a second doped region.

[0028] In one specific embodiment, the method for fabricating the back contact cell further includes, in the step of fabricating the gate lines on the back side of the silicon substrate:

[0029] A grid line is screen-printed on the back side of the silicon substrate;

[0030] The screen printing plate includes a first mesh and a second mesh. The first mesh is used to print the main grid, and the second mesh is used to print the fine grid. Along the extension direction of the main grid, the first mesh has a varying width, and the second mesh has a varying length.

[0031] Thirdly, embodiments of this application provide a back-contact solar tandem cell, which includes a back-contact bottom cell and a perovskite top cell. The perovskite top cell is electrically connected to the front side of the back-contact bottom cell, and the back-contact bottom cell is the back-contact cell.

[0032] Fourthly, embodiments of this application provide a photovoltaic module, the photovoltaic module including the back contact solar cell. Attached Figure Description

[0033] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 This is a schematic diagram of the structure of the back contact battery cell provided in this application in a specific embodiment;

[0035] Figure 2 for Figure 1 A magnified view of part I in the middle;

[0036] Figure 3 for Figure 1 Schematic diagram of the structure of the medium-doped region;

[0037] Figure 4 This is a schematic diagram of a specific embodiment of the back-contact stacked battery provided in this application.

[0038] Figure label:

[0039] 1-Back contact solar tandem cell;

[0040] 11-Back contact cell;

[0041] 111-Silicon substrate;

[0042] 112 - Main gate; 112a - First segment; 112b - Second segment; 112c - Center position; 112d - First main gate; 112e - Second main gate;

[0043] 113 - Pad;

[0044] 114 - Fine grid; 114a - First fine grid; 114b - Second fine grid;

[0045] 115 - Doped region; 115a - First doped region; 115b - Second doped region;

[0046] 12-Perovskite Top Cell. Detailed Implementation

[0047] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0048] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0049] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0050] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0051] Photovoltaic modules convert solar energy into electrical energy, offering advantages such as being pollution-free, not geographically limited, and inexhaustible, making them a major direction for the development of new energy sources. Photovoltaic modules mainly consist of photovoltaic cells, photovoltaic glass, a backsheet, and encapsulating film. Back-contact cells, a type of photovoltaic cell, place both the positive and negative electrodes on the back side of the cell, reducing light shading by the grid lines, increasing the light-receiving area, and improving performance. The electrode structure generally includes a main grid, fine grids, and pads on the main grid. The fine grids collect charge carriers, and the main grid collects these carriers. The main grid is typically fabricated using screen printing, which consumes a large amount of paste, resulting in higher production costs.

[0052] To solve the above technical problems, such as Figures 1 to 3 As shown, this application embodiment provides a back contact solar cell 11, which may include a silicon substrate 111. A main gate 112 is disposed on the back side of the silicon substrate 111, and a plurality of pads 113 are spaced apart on the main gate 112. The back side of the silicon substrate 111 also includes a doped region 115, and the main gate 112 is located within the projection range of the doped region 115. Specifically, along the extending direction of the main gate 112, at least a portion of the main gate 112 structure has a width greater than the width of the end away from the pads 113, and / or, the width of the doped region 115 corresponding to the area of ​​the main gate 112 near the pads 113 is greater than the width of the area of ​​the doped region 115 corresponding to the area of ​​the main gate 112 away from the pads 113.

[0053] In this embodiment, along the extending direction of the main gate 112, at least a portion of the main gate 112 structure is wider at the end near the pad 113 than at the end away from the pad 113. Even with a larger width at the end of the main gate 112 near the pad 113, the connection area between the main gate 112 and the pad 113 is increased, thereby increasing the cross-sectional area of ​​the carrier transport path and reducing contact resistance. This reduces carrier losses between the main gate 112 and the pad 113. Furthermore, a smaller width at the end of the main gate 112 away from the pad 113 reduces the area occupied by the main gate 112 in that region, providing more space for the subsequent arrangement of the fine gate 114. This increases the length of the fine gate 114, thereby increasing the carrier collection area and improving the photoelectric conversion efficiency of the back contact cell 11. In addition, by making the main gate 112 have a width variation along the extension direction of the main gate 112, the overall area of ​​the main gate 112 can be reduced, thereby reducing the total amount of slurry required in the preparation process of the main gate 112 and reducing the overall preparation cost of the main gate 112.

[0054] At the same time, the width of the area corresponding to the doped region 115 and the main gate 112 near the pad 113 is greater than the width of the area corresponding to the doped region 115 and the main gate 112 away from the pad 113. Even if the width of the area corresponding to the doped region 115 changes with the width of the main gate 112, it can be ensured that the main gate 112 is arranged within the projection range of the doped region 115.

[0055] In one specific embodiment, such as Figure 1 and Figure 2 As shown, the main gate 112 may include a first segment 112a and a second segment 112b. The second segment 112b is located between two adjacent pads 113, and the first segment 112a is the area excluding the second segment 112b. Along the direction away from the pads 113, the width of the first segment 112a at the end near the pads 113 is greater than the width at the end away from the pads 113, and / or, along the extension direction of the main gate 112, the width of the second segment 112b at the end near the pads 113 is greater than the width at the center position 112c of the second segment 112b.

[0056] In this embodiment, multiple pads 113 are spaced apart on the main gate 112. Therefore, the main gate 112 is divided into a first segment 112a and a second segment 112b by the pads 113. The second segment 112b is located between two adjacent pads 113, and the first segment 112a is the area outside the second segment 112b. Along the direction away from the pads 113, the width of the end of the first segment 112a near the pads 113 is greater than the width of the end away from the pads 113. And along the extension direction of the main gate 112, the width of the end of the second segment 112b near the pads 113 is greater than the width of the center position 112c of the second segment 112b. This ensures the connection area between the first segment 112a and the second segment 112b and the pads 113, while also reducing the overall paste consumption during the fabrication of the main gate 112. In addition, it provides more space for the arrangement of the fine grid 114, thereby increasing the carrier collection area and improving the photoelectric conversion efficiency of the back contact cell 11.

[0057] In another specific embodiment, such as Figure 1 and Figure 2 As shown, along the direction away from the pad 113, the width of the first segment 112a can gradually decrease, and along the extension direction of the main gate 112, the width of the second segment 112b from one end near the pad 113 to the center position 112c of the second segment 112b can also gradually decrease, thereby further reducing the overall area of ​​the main gate 112 and significantly reducing the manufacturing cost of the main gate 112.

[0058] In one specific embodiment, such as Figure 1 and Figure 2 As shown, the width W1 of the end of the first segment 112a away from the pad 113 and the width W1 of the center position 112c of the second segment 112b satisfy 10um≤W1<200um, and / or the width W2 of the end of the first segment 112a and the second segment 112b near the pad 113 satisfies 200um≤W2≤800um.

[0059] In this embodiment, the end of the first segment 112a away from the pad 113 and the center position 112c of the second segment 112b can be the corresponding position of the minimum width in the overall structure of the main gate 112. The width W1 of the two segments can satisfy 10um≤W1<200um. For example, W1 can be 10um, 50um, 100um, 150um, 180um, etc. This can ensure the normal transport of charge carriers at the end of the first segment 112a away from the pad 113 and the center position 112c of the second segment 112b, avoiding the impact on the normal use of the back contact cell 11. It can also avoid the effect of excessive width on reducing the manufacturing cost of the main gate 112.

[0060] Meanwhile, the ends of the first segment 112a and the second segment 112b closest to the pad 113 can be located at the corresponding positions of the maximum width in the main gate 112 structure. The width W2 of the two segments can satisfy 200um≤W2≤800um. For example, W2 can be 200um, 400um, 600um, 800um, etc. This ensures the contact area between the ends of the first segment 112a and the second segment 112b closest to the pad 113 and the pad 113, avoiding increased carrier loss due to high contact resistance during transmission, which would affect the photoelectric conversion efficiency of the back contact cell 11.

[0061] In other embodiments, W1 and W2 may also be other specific values. In the embodiments of this application, the specific values ​​of W1 and W2 are not limited and can be adjusted adaptively according to the actual situation.

[0062] In one specific embodiment, such as Figure 1 and Figure 3 As shown, along the direction away from the pad 113, the width of the region corresponding to the doped region 115 and the first segment 112a near the pad 113 is greater than the width of the region corresponding to the doped region 115 and the first segment 112a away from the pad 113, and / or, along the extension direction of the main gate 112, the width of the region corresponding to the doped region 115 and the second segment 112b near the pad 113 is greater than the width of the region corresponding to the center position 112c of the doped region 115 and the second segment 112b.

[0063] In this embodiment, the doped region 115 is adapted to the width variations of the first segment 112a and the second segment 112b, respectively, so that both the first segment 112a and the second segment 112b can be located within the projection range of the doped region 115. Furthermore, the width variation of the doped region 115 provides more space for the arrangement of the fine grid 114, thereby increasing the carrier collection area and improving the photoelectric conversion efficiency of the back contact solar cell 11.

[0064] In one specific embodiment, such as Figure 1 and Figure 3 As shown, within the corresponding position range of the doped region 115 and the main gate 112, the minimum width W3 of the doped region 115 satisfies 100um≤W3≤300um, and the maximum width W4 of the doped region 115 satisfies 300um<W4≤850um.

[0065] In this embodiment, within the range corresponding to the position of the doped region 115 and the main gate 112, the minimum width of the doped region 115 is the position corresponding to the end of the first segment 112a away from the pad 113 and the center position 112c of the second segment 112b. Therefore, the minimum width W3 of the doped region 115 is made to satisfy 100um≤W3≤300um. For example, W3 can be 100um, 150um, 200um, 250um, 300um, etc., so that the end of the first segment 112a away from the pad 113 and the center position 112c of the second segment 112b can both be located within the projection range of the doped region 115.

[0066] Meanwhile, the maximum width of the doped region 115 is the position corresponding to the end of the first segment 112a and the second segment 112b near the pad 113. Therefore, the maximum width W4 of the doped region 115 is made to satisfy 300um < W4 ≤ 850um. For example, W4 can be 350um, 500um, 650um, 700um, 850um, etc., so that the corresponding positions of the first segment 112a and the second segment 112b near the pad 113 can be located within the projection range of the doped region 115.

[0067] In other embodiments, W3 and W4 may also be other specific values. In this embodiment, the specific values ​​of W3 and W4 are not limited, and can be adjusted adaptively according to specific circumstances.

[0068] In one specific embodiment, such as Figure 1 and Figure 2 As shown, the silicon substrate 111 is also provided with a fine gate 114, one end of which is connected to the main gate 112. Along the extension direction of the main gate 112, the length of the fine gate 114 away from the pad 113 is greater than the length of the fine gate 114 near the pad 113.

[0069] In this embodiment, along the direction away from the pad 113, the width of the first segment 112a at the end near the pad 113 is greater than the width at the end away from the pad 113. Therefore, the area of ​​the doped region 115 occupied by the end of the first segment 112a away from the pad 113 is smaller, allowing more space for the fine gate 114 away from the pad 113, thus enabling the length of the fine gate 114 away from the pad 113 to be greater than the length of the fine gate 114 near the pad 113. Simultaneously, along the extension direction of the main gate 112, the width of the second segment 112b at the end near the pad 113 is greater than the width of the center position 112c of the second segment 112b. Therefore, the area of ​​the doped region 115 occupied by the center position 112c of the second segment 112b is smaller, allowing more space for the fine gate 114 away from the pad 113, thus enabling the length of the fine gate 114 away from the pad 113 to be greater than the length of the fine gate 114 near the pad 113. Within the corresponding range of the first segment 112a and the second segment 112b, by setting a fine grid 114 with a larger length, the collection area for charge carriers can be increased, thereby improving the photoelectric conversion efficiency of the back contact cell 11.

[0070] In one specific embodiment, such as Figure 1 As shown, along the extension direction of the main gate 112, the length of the fine gate 114 away from the pad 113 is L1, and the length of the fine gate 114 close to the pad 113 is L2, where L1≤L2+400um.

[0071] In this embodiment, along the extension direction of the main gate 112, the length of the fine gate 114 away from the pad 113 is L1, that is, the maximum length of the fine gate 114 is L1, and the length of the fine gate 114 close to the pad 113 is L2, that is, the minimum length of the fine gate 114 is L2. Among them, L1 and L2 can satisfy L1≤L2+400um, that is, the difference between L1 and L2 can be 100um, 200um, 300um, 400um, etc., to increase the overall length of the fine gate 114, increase the carrier collection area, and thus improve the photoelectric conversion efficiency of the back contact cell 11.

[0072] In other embodiments, such as Figure 1 As shown, the length of the fine gate 114 can be gradually increased along the direction away from the pad 113, thereby further increasing the overall length of the fine gate 114 and further increasing the carrier collection area.

[0073] In one specific embodiment, such as Figure 1 and Figure 3 As shown, the ends of the doped region 115 corresponding to the main gate 112 have an angle along the extension direction of the main gate 112, and the ends of the doped region 115 corresponding to the pad 113 are parallel to the extension direction of the main gate 112.

[0074] In this embodiment, by making the ends of the doped region 115 and the corresponding region of the main gate 112 tilted, the arrangement space of the fine gate 114 can be further increased to increase the carrier collection area, thereby further improving the photoelectric conversion efficiency of the back contact cell 11.

[0075] In one specific embodiment, such as Figures 1 to 3 As shown, the doped region 115 may include a first doped region 115a and a second doped region 115b; the main gate 112 may include a first main gate 112d and a second main gate 112e; and the fine gate 114 may include a first fine gate 114a and a second fine gate 114b. The first main gate 112d and the first fine gate 114a are located within the projection range of the first doped region 115a, and the second main gate 112e and the second fine gate 114b are located within the projection range of the second doped region 115b. The first doped region 115a and the second doped region 115b are arranged in a finger-like pattern. Along the extending direction of the main gate 112, the width of the corresponding region of the first doped region 115a and the first main gate 112d is proportional to the width of the first main gate 112d, and the width of the second doped region 115b and the second main gate 112e is proportional to the width of the second main gate 112e.

[0076] In this embodiment, the back side of the back contact solar cell 11 has a first doped region 115a and a second doped region 115b with opposite polarities, and the first doped region 115a and the second doped region 115b are distributed in a finger-like pattern, that is, along the extension direction of the main gate 112, the first fine gate 114a and the second fine gate 114b are alternately distributed. Therefore, along the direction away from the pad 113, the width of the first doped region 115a is gradually reduced, thereby increasing the area of ​​a portion of the second doped region 115b corresponding to the second fine gate 114b, thus increasing the usable space of the second fine gate 114b, and consequently increasing the length of the second fine gate 114b. At the same time, the width of the second doped region 115b is gradually reduced, thereby increasing the area of ​​a portion of the first doped region 115a corresponding to the first fine gate 114a, thus increasing the usable space of the first fine gate 114a, and consequently increasing the length of the first fine gate 114a. By increasing the length of the first fine gate 114a and the second fine gate 114b, the photoelectric conversion efficiency of the back contact solar cell 11 can be significantly increased.

[0077] This application also provides a method for preparing the back contact battery cell 11, such as... Figures 1 to 3 As shown, the preparation method for the back contact battery cell 11 in the above embodiments may include, but is not limited to, the following steps:

[0078] S11: Preparation of silicon substrate 111;

[0079] S12: A tunneling oxide layer and a doped polycrystalline silicon layer are formed on the back side of the silicon substrate 111;

[0080] S13: Deposit a passivation layer and an anti-reflection layer on the front side of the silicon substrate 111;

[0081] S14: Deposit a transparent conductive oxide layer on the back side of the silicon substrate 111;

[0082] S15: Fabricate gate lines on the back side of silicon substrate 111;

[0083] The doped polysilicon layer includes a doped region 115, and the gate line includes a main gate 112 and a fine gate 114. Along the extension direction of the main gate 112, the main gate 112 has a width variation, the doped region 115 has a width variation, and the fine gate 114 has a length variation.

[0084] In this embodiment, by providing a main grid 112 with varying width on the back side of the back contact cell 11, the amount of paste required during the fabrication of the main grid 112 can be reduced, thereby lowering the overall production cost of the main grid 112 and providing more space for the arrangement of the fine grid 114. Simultaneously, providing a fine grid 114 with varying length on the back side of the back contact cell 11 increases the overall length of the fine grid 114, thereby increasing the carrier collection area and improving the photoelectric conversion efficiency of the back contact cell 11. Furthermore, by providing a doped region 115 with varying width on the back side of the back contact cell 11, the available space for arranging the fine grid 114 can be further increased, thereby further enhancing the carrier collection area.

[0085] Among them, the width of the main gate 112 away from the pad 113 is smaller than the width of the end close to the pad 113, the length of the fine gate 114 away from the pad 113 is greater than the length of the fine gate 114 close to the pad 113, and the width of the doped region 115 corresponding to the end of the main gate 112 close to the pad 113 is greater than the width of the doped region 115 corresponding to the end of the main gate 112 away from the pad.

[0086] In one specific embodiment, such as Figures 1 to 3 As shown, step S12 above may also include, but is not limited to, the following steps:

[0087] S121: Deposit a tunneling oxide layer and an intrinsic polycrystalline silicon layer on the back side of the silicon substrate 111;

[0088] S122: Deposit a mask layer on the intrinsic polysilicon layer;

[0089] S123: Laser grooving is performed on the mask layer to form a first groove with varying width;

[0090] S124: Doping the intrinsic polysilicon layer in the region corresponding to the first groove to form the first doped region 115a;

[0091] S125: Laser grooving is performed on the mask layer to form a second groove with varying width;

[0092] S126: The intrinsic polysilicon layer in the region corresponding to the second groove is doped to form the second doped region 115b.

[0093] In this embodiment, a first doped region 115a with varying width is generated by forming a first groove with varying width on the mask layer, and a second doped region 115b with varying width is generated by forming a second groove with varying width on the mask layer. The first doped region 115a and the second doped region 115b are arranged in a finger-like pattern, which allows them to have varying widths, further increasing the usable space of the first fine gate 114a and the second fine gate 114b, and improving the photoelectric conversion efficiency of the back contact solar cell 11.

[0094] In one specific embodiment, such as Figures 1 to 3 As shown, step S15 above may also include, but is not limited to, the following steps:

[0095] S151: Screen printing grid lines are applied to the back side of the silicon substrate 111;

[0096] The screen printing plate may include a first mesh and a second mesh. The first mesh is used to print the main grid 112, and the second mesh is used to print the fine grid 114. Along the extending direction of the main grid 112, the first mesh has a varying width, and the second mesh has a varying length.

[0097] In this embodiment, by setting a first mesh and a second mesh on the screen printing plate, and making the first mesh have a width variation and the second mesh have a length variation along the extension direction of the main grid 112, the fabricated main grid 112 and fine grid 114 can have width and length variations respectively, thereby reducing the fabrication cost of the main grid 112, increasing the carrier collection area, and improving the photoelectric conversion efficiency of the back contact cell 11.

[0098] This application also provides a back-contact solar tandem cell 1, such as... Figure 1 and Figure 4 As shown, the back-contact solar tandem cell 1 may include a back-contact bottom cell and a perovskite top cell 12. The perovskite top cell 12 is electrically connected to the front side of the back-contact bottom cell, and the back-contact bottom cell is the back-contact cell 11 described in the above embodiment.

[0099] In this embodiment, by setting the back contact cell 11 described in the above embodiment as the back contact bottom cell in the back contact solar tandem cell 1, the photoelectric conversion efficiency of the back contact solar tandem cell 1 can be improved and the manufacturing cost can be reduced.

[0100] This application also provides a photovoltaic module (not shown in the figure), which can be composed of the back contact solar cell, photovoltaic glass, encapsulant film, backsheet, and frame described in the above embodiments. By using the back contact solar cell prepared by the method described in the above embodiments, the overall working efficiency of the photovoltaic module can be improved by increasing the photoelectric conversion efficiency of the back contact solar cell.

[0101] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A back contact battery cell, characterized in that, The back contact cell (11) includes a silicon substrate (111), a main gate (112) is disposed on the back side of the silicon substrate (111), and a plurality of pads (113) are disposed at intervals on the main gate (112); the back side of the silicon substrate (111) also includes a doped region (115), and the main gate (112) is located within the projection range of the doped region (115); Wherein, along the extension direction of the main gate (112), at least a portion of the main gate (112) structure has a width at the end near the pad (113) that is greater than the width at the end away from the pad (113), and the width of the doped region (115) corresponding to the end of the main gate (112) near the pad (113) is greater than the width of the doped region (115) corresponding to the end of the main gate (112) away from the pad (113).

2. The back contact battery cell according to claim 1, characterized in that, The main gate (112) includes a first segment (112a) and a second segment (112b), the second segment (112b) being located between two adjacent pads (113), and the first segment (112a) being the area outside the second segment (112b); Along the direction away from the pad (113), the width of the first segment (112a) near the pad (113) is greater than the width away from the pad (113), and / or, along the extension direction of the main gate (112), the width of the second segment (112b) near the pad (113) is greater than the width at the center position (112c) of the second segment (112b).

3. The back contact battery cell according to claim 2, characterized in that, The width of the end of the first segment (112a) away from the pad (113) and the width W1 of the center position (112c) of the second segment (112b) satisfy 10um≤W1<200um, and / or the width W2 of the end of the first segment (112a) and the second segment (112b) close to the pad (113) satisfies 200um≤W2≤800um.

4. The back contact battery cell according to claim 2, characterized in that, Along the direction away from the pad (113), the width of the corresponding region of the doped region (115) and the first segment (112a) near the end of the pad (113) is greater than the width of the corresponding region of the doped region (115) and the first segment (112a) away from the pad (113), and / or, along the extension direction of the main gate (112), the width of the corresponding region of the doped region (115) and the second segment (112b) near the end of the pad (113) is greater than the width of the corresponding region of the center position (112c) of the doped region (115) and the second segment (112b).

5. The back contact battery cell according to claim 4, characterized in that, Within the range of the corresponding positions of the doped region (115) and the main gate (112), the minimum width W3 of the doped region (115) satisfies 100um≤W3≤300um, and the maximum width W4 of the doped region (115) satisfies 300um<W4≤850um.

6. The back contact battery cell according to claim 2, characterized in that, The silicon substrate (111) is also provided with a fine gate (114), one end of which is connected to the main gate (112); Along the extension direction of the main gate (112), the length of the fine gate (114) away from the pad (113) is greater than the length of the fine gate (114) close to the pad (113).

7. The back contact battery cell according to claim 6, characterized in that, Along the extension direction of the main gate (112), the length of the fine gate (114) away from the pad (113) is L1, and the length of the fine gate (114) close to the pad (113) is L2, where L1 ≤ L2 + 400 μm.

8. The back contact battery cell according to claim 1, characterized in that, The end of the doped region (115) corresponding to the main gate (112) has an angle along the extension direction of the main gate (112); the end of the doped region (115) corresponding to the pad (113) is parallel to the extension direction of the main gate (112).

9. The back contact battery cell according to claim 6, characterized in that, The doped region (115) includes a first doped region (115a) and a second doped region (115b), the main gate (112) includes a first main gate (112d) and a second main gate (112e), and the fine gate (114) includes a first fine gate (114a) and a second fine gate (114b). The first main gate (112d) and the first fine gate (114a) are located within the projection range of the first doped region (115a), and the second main gate (112e) and the second fine gate (114b) are located within the projection range of the second doped region (115b). The first doped region (115a) and the second doped region (115b) are arranged in a finger-like pattern. Along the extension direction of the main gate (112), the width of the region corresponding to the first doped region (115a) and the first main gate (112d) is proportional to the width of the first main gate (112d); the width of the region corresponding to the second doped region (115b) and the second main gate (112e) is proportional to the width of the second main gate (112e).

10. A method for preparing a back contact solar cell, characterized in that, The method for preparing the back contact battery cell (11) includes: Prepare a silicon substrate (111); A tunneling oxide layer and a doped polycrystalline silicon layer are formed on the back side of the silicon substrate (111); A passivation layer and an anti-reflection layer are deposited on the front side of the silicon substrate (111); A transparent conductive oxide layer is deposited on the back side of the silicon substrate (111); Gate lines are fabricated on the back side of the silicon substrate (111); The doped polysilicon layer includes a doped region (115), and the gate line includes a main gate (112) and a fine gate (114). Along the extension direction of the main gate (112), the main gate (112) has a width variation, the doped region (115) has a width variation, and the fine gate (114) has a length variation. The main gate (112) is provided with a plurality of pads (113) spaced apart. The width of the main gate (112) away from the pads (113) is smaller than the width of the end of the main gate (112) close to the pads (113). The length of the fine gate (114) away from the pads (113) is greater than the length of the fine gate (114) close to the pads (113). The width of the doped region (115) corresponding to the end of the main gate (112) close to the pads (113) is greater than the width of the doped region (115) corresponding to the end of the main gate (112) away from the pads (113).

11. The method for preparing a back contact solar cell according to claim 10, characterized in that, In the step of forming a tunneling oxide layer and a doped polycrystalline silicon layer on the back side of the silicon substrate (111), the method for preparing the back contact solar cell (11) specifically includes: A tunneling oxide layer and an intrinsic polycrystalline silicon layer are deposited on the back side of the silicon substrate (111); A mask layer is deposited on the intrinsic polysilicon layer; Laser grooving is performed on the mask layer to form a first groove with varying width; The intrinsic polysilicon layer in the region corresponding to the first groove is doped to form a first doped region (115a). Laser grooving is performed on the mask layer to form a second groove with varying width; The intrinsic polysilicon layer in the region corresponding to the second groove is doped to form a second doped region (115b).

12. The method for preparing a back contact battery cell according to claim 10, characterized in that, In the step of fabricating gate lines on the back side of the silicon substrate (111), the method for fabricating the back contact cell (11) further includes: A grid line is screen-printed on the back side of the silicon substrate (111); The screen printing plate includes a first mesh and a second mesh. The first mesh is used to print the main grid (112), and the second mesh is used to print the fine grid (114). Along the extension direction of the main grid (112), the first mesh has a width variation, and the second mesh has a length variation.

13. A back-contact solar tandem cell, characterized in that, The back-contact solar tandem cell includes a back-contact bottom cell and a perovskite top cell, wherein the perovskite top cell is electrically connected to the front side of the back-contact bottom cell, and the back-contact bottom cell is a back-contact cell (11) as described in any one of claims 1-9.

14. A photovoltaic module, characterized in that, The photovoltaic module includes a back-contact solar cell (11) as described in any one of claims 1-9.

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