Back contact solar cell and preparation method thereof
By introducing an N-type doped amorphous silicon ultraviolet absorption layer and an insulating protective layer into the back-contact solar cell, the problem of light-induced degradation caused by ultraviolet radiation is solved, extending the cell life, reducing costs, and improving optical performance and reliability.
Patent Information
- Application Number
- CN202511049247.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-29
- Publication Date
- 2025-10-28
AI Technical Summary
Existing back-contact solar cells suffer from light-induced degradation under ultraviolet radiation, resulting in a limited lifespan. Furthermore, the low-temperature process increases complexity and cost.
Introducing an N-type doped amorphous silicon ultraviolet absorption layer into the structure of a back-contact solar cell, combined with low-temperature processing, forms an amorphous passivation layer, a microcrystalline passivation layer, and an anti-reflection layer. An insulating protective layer is added to protect the internal structure, simplifying the process flow.
It effectively blocks ultraviolet rays, extends battery life, reduces costs, improves optical performance and reliability, and simplifies the manufacturing process.
Smart Images
Figure CN120857717A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of solar cell technology, and in particular to a back-contact solar cell and its fabrication method. Background Technology
[0002] Back-contact (BC) cells are a research focus in the photovoltaic field. Their core advantage lies in designing all metal electrodes on the back surface of the cell, eliminating the shading effect of the metal grid lines on the front of traditional cells on incident light. This unshaded structure significantly improves photon capture efficiency, thereby optimizing short-circuit current and overall conversion efficiency. Among various BC technology approaches, the HBC cell, with its design combining heterojunction (HJT) and BC structure, has become the representative with the highest photoelectric conversion efficiency. The key to its technological realization lies in extending passivation contact technology to the back of the cell, forming a more efficient carrier transport structure.
[0003] However, HBC cells typically use amorphous silicon thin films as passivation layers on the front side, which exhibit rapid light-induced degradation under ultraviolet (UV) radiation. To mitigate this issue, the industry primarily introduces UV cut-off films or UV phototransfer films during the module encapsulation process. However, prolonged exposure to UV radiation, high temperatures, or humidity can cause the UV cut-off film material to degrade, oxidize, or delaminate, leading to decreased UV cut-off efficiency and even film cracking and peeling. Under high-intensity UV irradiation, the molecular structure of the fluorescent material in UV phototransfer films may be damaged, resulting in a gradual decrease in luminous efficiency (i.e., "photobleaching"). After 1-2 years of outdoor use, the conversion efficiency can drop by more than 50%, significantly exceeding the lifespan of photovoltaic modules. Furthermore, abandoning the low-temperature fabrication process for amorphous silicon thin films in HBC cells would significantly increase the complexity of the process, further driving up manufacturing costs. Therefore, existing HBC cells using amorphous silicon thin films suffer from a limited lifespan. Summary of the Invention
[0004] One objective of the first aspect of this invention is to provide a back-contact solar cell that can effectively improve its service life.
[0005] A further objective of the present invention is to balance optical performance and reliability.
[0006] A second aspect of the present invention is to provide a method for preparing the aforementioned back-contact solar cell.
[0007] An embodiment of the present invention provides a back-contact solar cell, comprising a substrate layer, a front material layer and a back material layer respectively disposed on the front and back sides of the substrate layer, wherein the front material layer comprises an amorphous passivation layer, a microcrystalline passivation layer, an ultraviolet absorption layer and an antireflection layer sequentially stacked on the front side of the substrate layer, the substrate layer being made of monocrystalline N-type silicon, the microcrystalline passivation layer being made of N-type doped microcrystalline silicon, the ultraviolet absorption layer being made of N-type doped amorphous silicon, and the thickness of the ultraviolet absorption layer being any value between 1 nm and 10 nm and having a crystallinity of less than 20%.
[0008] Furthermore, the thickness of the amorphous passivation layer is any value between 5nm and 10nm, and the thickness of the microcrystalline passivation layer is any value between 15nm and 25nm.
[0009] Furthermore, the back material layer includes a first functional region and a second functional region disposed on the back side of the substrate layer and isolated from each other. The first functional region includes a first passivation layer, an N-type material layer and a first conductive structure, and the second functional region includes a second passivation layer, a P-type material layer and a second conductive structure.
[0010] Furthermore, a separating groove is provided between the first conductive structure and the second conductive structure to isolate the first functional area and the second functional area.
[0011] Furthermore, the first conductive structure includes a first contact layer and a first electrode, and the second conductive structure includes a second contact layer and a second electrode.
[0012] Furthermore, the first functional layer and the second functional layer have an overlap area in thickness, and an insulating protective layer is provided between the second passivation layer and the N-type material layer within the overlap area.
[0013] In particular, embodiments of the present invention also provide a method for fabricating a back-contact solar cell as described in any of the above claims, comprising:
[0014] An amorphous passivation layer, a microcrystalline passivation layer, an ultraviolet absorption layer, and an antireflection layer are sequentially deposited on the front side of the substrate.
[0015] A first passivation layer, an N-type material layer, and an insulating protective layer are sequentially deposited on the back side of the substrate to form a first layer structure.
[0016] A first opening region communicating with the substrate layer is formed on the first layer structure;
[0017] Clean the residue from the first opening area;
[0018] A second passivation layer and a P-type material layer are deposited sequentially to form a second layer structure;
[0019] A second opening region connecting the first layer structure is formed in the first target region of the second layer structure, wherein the first target region is a region that overlaps with the first layer structure.
[0020] Clean the residue in the second opening area and remove the insulating protective layer exposed in the second opening area;
[0021] Deposited contact layer;
[0022] A third opening region connecting the P-type material layer is formed at the second target region of the contact layer, wherein the second target region is located between the adjacent first opening region and the second opening region.
[0023] Electrodes are formed in the regions of the contact layer corresponding to the P-type material layer and the N-type conductive layer, respectively.
[0024] Furthermore, the insulating protective layer is made of silicon nitride, and the step of cleaning the residue in the first opening area includes:
[0025] The insulating protective layer is cleaned sequentially using potassium hydroxide solution and hydrofluoric acid solution, and the hydrofluoric acid solution thins the insulating protective layer during the cleaning process.
[0026] Further, the step of removing the insulating protective layer exposed at the second opening region includes:
[0027] The insulating protective layer exposed in the second opening area is removed by sequential cleaning with hydrofluoric acid solution.
[0028] Furthermore, prior to the steps of sequentially depositing an amorphous passivation layer, a microcrystalline passivation layer, an ultraviolet absorption layer, and an antireflection layer on the front side of the substrate, the following steps are also included:
[0029] Double-sided polishing of monocrystalline N-type silicon wafers was performed using potassium hydroxide solution.
[0030] An alkaline texturing process is used to form a textured surface on the front and back sides of the monocrystalline N-type silicon wafer;
[0031] The back side of the single-crystal N-type silicon wafer is polished to obtain the substrate layer.
[0032] According to one aspect of the present invention, an ultraviolet absorption layer made of N-type doped amorphous silicon is added to the surface of the microcrystalline passivation layer. This ultraviolet absorption layer can effectively filter ultraviolet light. Under the premise of continuing the preparation process of the amorphous passivation layer using a low-cost, low-temperature process, the light-induced degradation problem of the amorphous passivation layer caused by ultraviolet light is effectively avoided, thereby improving the service life.
[0033] Furthermore, the fabrication process of the ultraviolet absorption layer is simple; it is easy to achieve simply by adding an N-type doped amorphous silicon layer to the existing coating technology.
[0034] Furthermore, by controlling the crystallization rate and thickness of the ultraviolet absorption layer, it is possible to effectively shield ultraviolet rays while reducing the absorption of visible light, thus balancing the optical performance and reliability of the battery.
[0035] Furthermore, when the back-contact solar cell of this application is fabricated into a photovoltaic module, the UV cut-off film or UV light transfer film at the module end and the ultraviolet absorption layer made of N-type doped amorphous silicon can play a dual protection role, effectively blocking ultraviolet rays and greatly improving the reliability of the cell and module.
[0036] According to another aspect of the present invention, in the process of preparing the above-mentioned back contact solar cell, by depositing an insulating protective layer on the surface of the N-type material layer, the basic insulation function is achieved while the layer acts as a mask layer twice. That is, it protects the first passivation layer and the N-type material layer when cleaning the first opening area and opening the second opening area with laser. Furthermore, the insulating protective layer is simultaneously thinned when cleaning the residue in the first opening area, thereby simplifying the process and improving the preparation efficiency. Attached Figure Description
[0037] Figure 1 This is a schematic diagram of the structure of a back-contact solar cell according to an embodiment of the present invention;
[0038] Figure 2 A flowchart illustrating a method for fabricating a back-contact solar cell according to an embodiment of the present invention;
[0039] Figure 3 This is a schematic diagram of a method for fabricating a back-contact solar cell according to an embodiment of the present invention;
[0040] Figure label:
[0041] 100-Back contact solar cell, 1-Substrate layer, 2-Amorphous passivation layer, 3-Microcrystalline passivation layer, 4-Ultraviolet absorption layer, 5-Antireflection layer, 6-First passivation layer, 7-N-type material layer, 8-Insulating protective layer, 9-Second passivation layer, 10-P-type material layer, 11-Contact layer, 12-Electrode, 101-Separation groove, 111-First contact layer, 121-First electrode, 112-Second contact layer, 122-Second electrode. Detailed Implementation
[0042] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.
[0043] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on the other component or there may be an intermediate component. When a component is considered to be "connected to" another component, it can be directly connected to the other component or there may be an intermediate component present. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application's specification are for illustrative purposes only and do not represent the only possible implementation.
[0044] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0045] In this application, unless otherwise expressly specified or limited, a first feature being “above” or “below” a second feature may mean that the first feature is directly in contact with the second feature, or that the first feature and the second feature are indirectly in contact through an intermediate medium. Furthermore, a first feature being “above,” “above,” or “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below,” “below,” or “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.
[0046] Unless otherwise defined, all technical and scientific terms used in the specification of this application have the same meaning as commonly understood by those skilled in the art to which this application belongs. The terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used in the specification of this application includes any and all combinations of one or more of the relevant listed items.
[0047] Figure 1 This is a schematic diagram of the structure of a back-contact solar cell 100 according to an embodiment of the present invention. Figure 1As shown, in one embodiment, the back-contact solar cell 100 includes a substrate layer 1, a front material layer and a back material layer respectively disposed on the front and back sides of the substrate layer 1. Here, the front material layer of the substrate layer 1 is used to absorb sunlight, and the back material layer is used to form a heterojunction PN structure, collect charge carriers, and connect electrodes. The front material layer includes an amorphous passivation layer 2, a microcrystalline passivation layer 3, an ultraviolet absorption layer 4, and an antireflection layer 5 sequentially stacked on the front side of the substrate layer 1. The substrate layer 1 is made of single-crystal N-type silicon, the microcrystalline passivation layer 3 is made of N-type doped microcrystalline silicon, and the ultraviolet absorption layer 4 is made of N-type doped amorphous silicon. The thickness of the ultraviolet absorption layer 4 is any value between 1 nm and 10 nm and the crystallinity is less than 20%. For example, the thickness of the ultraviolet absorption layer 4 is 1 nm, 2 nm, 5 nm, 7 nm, 8 nm, or 10 nm. The thickness of the ultraviolet absorption layer 4 can also be any other value between 1 nm and 10 nm. The crystallinity of the ultraviolet absorption layer 4 is 5%, 10%, 12%, 15%, or 18%. The crystallinity of the ultraviolet absorption layer 4 can also be any other value less than 20%, which is not limited here. In this embodiment, the amorphous passivation layer 2 can be made of commonly used intrinsic amorphous silicon material, and the antireflection layer 5 can be made of one or more of indium tin oxide, silicon oxide, titanium oxide, and silicon oxide.
[0048] In this embodiment, hydrogen atoms in the amorphous passivation layer 2 can combine with defects and dangling bonds on the surface of the substrate layer 1, saturating them and thus reducing the density of recombination defect states, lowering the surface recombination rate, and improving minority carrier lifetime and on-state voltage. The microcrystalline passivation layer 3 reduces interfacial light reflection and its own light absorption loss. Furthermore, the microcrystalline passivation layer 3 has a field passivation effect, which can repel minority carriers (holes) on the silicon surface, preventing their accumulation and further reducing the surface recombination probability. The ultraviolet absorption layer 4, made of N-type doped amorphous silicon, has a stronger absorption capacity for ultraviolet light than N-type doped microcrystalline silicon, effectively filtering ultraviolet light and acting as an ultraviolet barrier to reduce the impact of ultraviolet light on the amorphous passivation layer 2. The antireflection layer 5 reduces light reflection and protects the underlying film from external erosion.
[0049] In this embodiment, an ultraviolet absorption layer 4 made of N-type doped amorphous silicon is added to the surface of the microcrystalline passivation layer 3. The ultraviolet absorption layer 4 can effectively filter ultraviolet light. Under the premise of continuing the preparation process of the amorphous passivation layer 2 using a low-cost, low-temperature process, the problem of light-induced degradation of the amorphous passivation layer 2 caused by ultraviolet light is effectively avoided.
[0050] Furthermore, the fabrication process of the ultraviolet absorption layer is simple; it is easy to achieve simply by adding an N-type doped amorphous silicon layer to the existing coating technology.
[0051] Furthermore, by controlling the crystallinity and thickness of the ultraviolet absorption layer 4, it is possible to effectively shield ultraviolet rays while reducing the absorption of visible light, thus balancing the optical performance and reliability of the battery.
[0052] In one embodiment, the thickness of the amorphous passivation layer 2 is any value between 5nm and 10nm, for example, the thickness of the amorphous passivation layer 2 is 5nm, 6nm, 8nm, or 10nm. The thickness of the amorphous passivation layer 2 can also be any other value between 5nm and 10nm, and is not limited herein. The thickness of the microcrystalline passivation layer 3 is any value between 15nm and 25nm, for example, the thickness of the microcrystalline passivation layer 3 is 15nm, 18nm, 20nm, 22nm, or 25nm. The thickness of the amorphous passivation layer 2 can also be any other value between 15nm and 25nm, and is not limited herein.
[0053] Further, the back material layer includes a first functional region and a second functional region disposed on the back side of the substrate layer 1 and isolated from each other. The first functional region includes a first passivation layer 6, an N-type material layer 7, and a first conductive structure. The second functional region includes a second passivation layer 9, a P-type material layer 10, and a second conductive structure. The N-type material layer 7 is used to construct the N-type conductive region to achieve carrier separation, and the P-type material layer 10 is used to construct the P-type conductive region, forming a PN junction with the N-type material layer 7. A separation groove 101 is provided between the first conductive structure and the second conductive structure to achieve isolation between the first functional region and the second functional region. The first conductive structure includes a first contact layer 111 and a first electrode 121, and the second conductive structure includes a second contact layer 112 and a second electrode 122. The first functional layer and the second functional layer have an overlap region in thickness, and an insulating protective layer 8 is provided between the second passivation layer 9 and the N-type material layer 7 in the overlap region.
[0054] When the back-contact solar cell 100 in the above embodiments is fabricated into a photovoltaic module, the UV cut-off film or UV light transfer film (the UV cut-off film or UV light transfer film is generally set on the side of the glass cover plate facing the back-contact solar cell 100) at the module end and the ultraviolet absorption layer 4 made of N-type doped amorphous silicon can play a double protection role, effectively blocking ultraviolet rays and greatly improving the reliability of the cell and module.
[0055] Figure 2 This is a flowchart of a method for fabricating a back-contact solar cell 100 according to an embodiment of the present invention. Figure 3 This is a schematic diagram illustrating a method for fabricating a back-contact solar cell 100 according to an embodiment of the present invention. This application also provides a method for fabricating the aforementioned back-contact solar cell 100, such as... Figure 2 As shown, the preparation method includes the following steps S1 to S100:
[0056] Step S1: Pre-process the single-crystal N-type silicon wafer to obtain a substrate with a textured surface on the front and a polished surface on the back.
[0057] Step S10: On the front side of the substrate layer 1, an amorphous passivation layer 2, a microcrystalline passivation layer 3, an ultraviolet absorption layer 4, and an antireflection layer 5 are deposited sequentially.
[0058] Step S20: A first passivation layer 6, an N-type material layer 7, and an insulating protective layer 8 are sequentially deposited on the back side of the substrate layer 1 to form a first layer structure;
[0059] Step S30: A first opening region connecting to the substrate layer 1 is formed on the first layer structure;
[0060] Step S40: Clean the residue in the first opening area;
[0061] Step S50: Sequentially deposit the second passivation layer 9 and the P-type material layer 10 to form the second layer structure;
[0062] Step S60: A second opening region connecting the first layer structure is formed in the first target region of the second layer structure. The first target region is the region that overlaps with the first layer structure.
[0063] Step S70: Clean the residue in the second opening area and remove the insulating protective layer 8 exposed in the second opening area;
[0064] Step S80, deposit contact layer 11;
[0065] Step S90: A third opening region connecting the P-type material layer 10 is formed at the second target region of the contact layer 11. The second target region is located between the adjacent first opening region and the second opening region.
[0066] In step S100, electrodes 12 are formed in the regions of the contact layer 11 corresponding to the P-type material layer 10 and the N-type conductive layer, respectively.
[0067] In step S1, a potassium hydroxide (KOH) solution can be used to perform double-sided polishing on the monocrystalline N-type silicon wafer; then, an alkaline texturing process is used to form a textured surface on both the front and back sides of the monocrystalline N-type silicon wafer, with a texture width of any value between 1μm and 3μm, for example, a texture width of 1μm, 2μm, or 3μm, or any other value between 1μm and 3μm; then, the back side of the monocrystalline N-type silicon wafer is polished, for example, using a chain polisher, to obtain substrate layer 1, as shown in the figure. Figure 3 As shown in 'a'.
[0068] In step S10, a first passivation layer 6, an N-type material layer 7, and an insulating protective layer 8 can be sequentially deposited on the front side of a single-crystal N-type silicon wafer using chemical vapor deposition (e.g., PECVD, plasma-enhanced chemical vapor deposition). The result is as follows: Figure 3 As shown in b in the diagram. This step can be completed in different chambers of the same PECVD machine in one go, so the process is relatively simple.
[0069] Each layer in step S20 can be formed by chemical vapor deposition, as shown in the figure. Figure 3 As shown in c; the first passivation layer 6 is an intrinsic amorphous silicon layer with a thickness of any value between 5nm and 10nm, for example, the thickness of the first passivation layer 6 is 5nm, 6nm, 8nm, or 10nm. The thickness of the first passivation layer 6 can also be any other value between 5nm and 10nm, without limitation here; the N-type material layer 7 is a phosphorus-doped amorphous silicon layer or a phosphorus-doped microcrystalline silicon layer, and the thickness of the N-type material layer 7 is any value between 10nm and 30nm, for example, the thickness of the N-type material layer 7 is 10nm, 16nm, 20nm, 24nm, 26nm, or 30nm. The thickness of the material layer 7 can also be any other value between 10nm and 30nm, without limitation. The insulating protective layer 8 can be made of materials such as low-temperature silicon nitride, silicon oxide, and silicon oxynitride. The thickness of the insulating protective layer 8 can be any value between 100nm and 400nm. For example, the thickness of the insulating protective layer 8 can be 100nm, 150nm, 180nm, 200nm, 250nm, 300nm, 350nm, or 400nm. The thickness of the insulating protective layer 8 can also be any other value between 100nm and 400nm, without limitation.
[0070] In step S30, the first opening region S1 can be created using a green pulsed picosecond laser, as shown in the following figure. Figure 3 In step S20, the insulating protective layer 8 formed at this time can protect the first passivation layer 6 and the N-type material layer 7.
[0071] In step S40, a chain cleaning process using potassium hydroxide solution and hydrofluoric acid solution can be used to remove residues in the first opening region S1. Since hydrofluoric acid solution can etch the above-mentioned insulating protective layer 8, this step can also reduce the thickness of the insulating protective layer 8, for example, reducing the insulating protective layer 8 to less than 100nm, such as 50nm, 60nm, 70nm, 80nm or 90nm.
[0072] In step S50, PECVD can still be used to deposit the material layer. First, a 5nm-10nm intrinsic amorphous silicon layer is deposited as the second passivation layer 9 to reduce the surface recombination rate at the first opening region S1 and improve the carrier lifetime. Then, a 20nm-35nm boron-doped microcrystalline silicon layer is deposited as the P-type material layer 10, and the result is as follows. Figure 3 As shown in e.
[0073] In step S60, a second opening region S2 can be created using a green picosecond laser, as shown in the following figure. Figure 3 As shown in f, in one embodiment, the width ratio of the first opening region S1 to the second opening region S2 is any value between 1.2 and 1.6, for example, a width ratio of 1.2, 1.4, 1.5, or 1.6. In this step, the insulating protective layer 8 can prevent the first passivation layer 6 and the N-type material layer 7 from directly contacting the laser and causing induced damage.
[0074] In one embodiment, in step S70, a chain cleaning machine is used to sequentially clean the area using hydrofluoric acid solution. This removes the residue at the second opening region S2 while simultaneously removing the insulating protective layer 8 exposed at the second opening region S2, as shown in the following example. Figure 3 As shown in g. This is because the hydrofluoric acid solution reacts very quickly with the insulating protective layer 8, while the reaction rate with the N-type material layer 7 and the P-type material layer 10 is extremely low. By controlling the concentration of the hydrofluoric acid solution and the cleaning time, the insulating protective layer 8 at the second opening region S2 can be effectively removed.
[0075] The contact layer 11 in step S80 can be formed into a transparent conductive oxide film (i.e., a TCO film) by physical vapor deposition, as shown in the figure. Figure 3 The contact layer 11 is typically made of indium tin oxide or aluminum oxide doped with zinc oxide, with a thickness of 50 nm to 120 nm. For example, the thickness of the contact layer 11 can be 50 nm, 70 nm, 80 nm, 100 nm, 110 nm, or 120 nm. The thickness of the contact layer 11 can also be any other value between 50 nm and 120 nm, without limitation. The contact layer 11 can form ohmic contacts with both the P-type material layer 10 and the N-type material layer 7, allowing the collected charge carriers (holes / electrons) in the two regions to be discharged separately.
[0076] In step S90, a third opening region can be formed using an ultraviolet pulsed picosecond laser, and the result is as follows. Figure 3 The i in the middle is used to cut off the contact layer 11, thereby achieving isolation between the P region and the N region.
[0077] In step S100, the electrode 12 can be fabricated on the contact layer 11 by screen printing, as shown in the following figure. Figure 3 j in the text.
[0078] In the preparation method of this application, by depositing an insulating protective layer 8 on the surface of the N-type material layer 7, the basic insulation function is achieved, while the layer also acts as a mask layer twice. That is, it protects the first passivation layer 6 and the N-type material layer 7 when cleaning the first opening area and opening the second opening area with laser. Furthermore, the insulating protective layer 8 is simultaneously thinned when cleaning the residue in the first opening area, thus simplifying the process and improving the preparation efficiency.
[0079] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.
Claims
1. A back-contact solar cell, characterized in that, The device includes a substrate layer, a front material layer and a back material layer respectively disposed on the front and back sides of the substrate layer. The front material layer includes an amorphous passivation layer, a microcrystalline passivation layer, an ultraviolet absorption layer and an antireflection layer sequentially stacked on the front side of the substrate layer. The substrate layer is made of single-crystal N-type silicon, the microcrystalline passivation layer is made of N-type doped microcrystalline silicon, the ultraviolet absorption layer is made of N-type doped amorphous silicon, and the thickness of the ultraviolet absorption layer is any value between 1 nm and 10 nm and the crystallinity is less than 20%.
2. The back-contact solar cell according to claim 1, characterized in that, The thickness of the amorphous passivation layer is any value between 5nm and 10nm, and the thickness of the microcrystalline passivation layer is any value between 15nm and 25nm.
3. The back-contact solar cell according to claim 1 or 2, characterized in that, The back material layer includes a first functional region and a second functional region disposed on the back side of the substrate layer and isolated from each other. The first functional region includes a first passivation layer, an N-type material layer and a first conductive structure. The second functional region includes a second passivation layer, a P-type material layer and a second conductive structure.
4. The back-contact solar cell according to claim 3, characterized in that, A separating groove is provided between the first conductive structure and the second conductive structure to isolate the first functional area and the second functional area.
5. The back-contact solar cell according to claim 4, characterized in that, The first conductive structure includes a first contact layer and a first electrode, and the second conductive structure includes a second contact layer and a second electrode.
6. The back-contact solar cell according to claim 3, characterized in that, The first functional layer and the second functional layer have an overlap area in thickness, and an insulating protective layer is provided between the second passivation layer and the N-type material layer in the overlap area.
7. A method for preparing a back-contact solar cell according to any one of claims 1-6, characterized in that, include: An amorphous passivation layer, a microcrystalline passivation layer, an ultraviolet absorption layer, and an antireflection layer are sequentially deposited on the front side of the substrate. A first passivation layer, an N-type material layer, and an insulating protective layer are sequentially deposited on the back side of the substrate to form a first layer structure. A first opening region communicating with the substrate layer is formed on the first layer structure; Clean the residue from the first opening area; A second passivation layer and a P-type material layer are deposited sequentially to form a second layer structure; A second opening region connecting the first layer structure is formed in the first target region of the second layer structure, wherein the first target region is a region that overlaps with the first layer structure. Clean the residue in the second opening area and remove the insulating protective layer exposed in the second opening area; Deposited contact layer; A third opening region connecting the P-type material layer is formed at the second target region of the contact layer, wherein the second target region is located between the adjacent first opening region and the second opening region. Electrodes are formed in the regions of the contact layer corresponding to the P-type material layer and the N-type conductive layer, respectively.
8. The preparation method according to claim 7, characterized in that, The insulating protective layer is made of silicon nitride, and the step of cleaning the residue in the first opening area includes: The insulating protective layer is cleaned sequentially using potassium hydroxide solution and hydrofluoric acid solution, and the hydrofluoric acid solution thins the insulating protective layer during the cleaning process.
9. The preparation method according to claim 8, characterized in that, The step of removing the insulating protective layer exposed in the second opening area includes: The insulating protective layer exposed in the second opening area is removed by sequential cleaning with hydrofluoric acid solution.
10. The preparation method according to claim 7, characterized in that, Before the steps of sequentially depositing an amorphous passivation layer, a microcrystalline passivation layer, an ultraviolet absorption layer, and an antireflection layer on the front side of the substrate, the following steps are also included: Double-sided polishing of monocrystalline N-type silicon wafers was performed using potassium hydroxide solution. An alkaline texturing process is used to form a textured surface on the front and back sides of the monocrystalline N-type silicon wafer; The back side of the single-crystal N-type silicon wafer is polished to obtain the substrate layer.