A control method and device of a series-parallel power unit topology, equipment and medium

Abstract

The application discloses a control method, device and equipment of a series-parallel power unit topology and a medium, and relates to the field of power electronics. After obtaining the output voltages of all power units, the current voltages of the power units obtained by voltage control of each power unit are corrected by constructing the voltage mapping relationship of the series stage and performing a shift operation on the voltage mapping relationship of part of the series stage. The shift operation when the current voltage is obtained is used to reduce the deviation between the output voltages of each power unit in the series stage caused by the phase difference in the phase-shifted carrier control strategy, thereby reducing the difference between the output total powers of each parallel stage and the deviation between the DC side voltages of each power unit, while not affecting the output total voltage of each series stage. The voltage balance degree of the entire topology is improved, abnormal conditions such as overvoltage shutdown are avoided, the normal work of the entire topology is ensured, and the safety and reliability of the entire topology are improved.

Description

Technical Field

[0001] This invention relates to the field of power electronics, and in particular to a control method, apparatus, equipment and medium for a series-parallel power unit topology. Background Technology

[0002] Due to limitations in the voltage and current ratings of individual power switching devices, high-voltage, high-power power electronic equipment applications require the use of power units composed of multiple power switching devices to construct a multi-stage series-parallel power unit topology. Several power units are connected in series on their AC sides to form a series stage, and several identical series stages are then connected in parallel to form a series-parallel power unit topology containing multiple series and parallel stages. The parallel power units use a consistent amplitude control method to control their output voltage, ensuring that the output voltage waveforms of the parallel power units remain consistent, thus achieving current sharing. The series power units employ a phase-shift carrier control strategy to control their output voltage, maintaining the amplitude and phase of the output voltage waveforms of the series power units, with phase fine-tuning to achieve voltage division. Through current sharing among parallel stages and voltage division among series stages, the entire series-parallel power unit topology meets the technical requirements of high voltage and high power.

[0003] In existing technologies, the same phase-shifting carrier control strategy is used for each series stage in a series-parallel power unit topology. Power units at the same position in each series stage have the same phase offset, while the triangular carrier phases of multiple power units within the same series stage are staggered. Each triangular carrier has a different phase offset, generating different PWM (Pulse Width Modulation) signals, which are then superimposed to obtain a multi-level output, achieving multi-level modulation. However, in this case, the total output power of each parallel stage will differ due to the phase difference caused by the phase shift, resulting in inconsistent total output power across parallel stages. Especially under low power factor conditions, some parallel stages may have a power factor greater than 0, while others may have a power factor less than 0. This leads to positive and negative deviations in the DC-side voltage of the power units. This voltage and energy imbalance affects the normal operation of the series-parallel power unit topology, and in severe cases, can cause overvoltage shutdown of the entire topology. Summary of the Invention

[0004] The purpose of this invention is to provide a control method, device, equipment, and medium for series-parallel power unit topologies, aiming to solve the problem of voltage or energy imbalance in series-parallel power unit topologies.

[0005] To address the aforementioned technical problems, this invention provides a control method for a series-parallel power unit topology. The series-parallel power unit topology includes M series stages connected in parallel, each of the M series stages comprising N series-connected power units, where M and N are both positive integers. The control method includes:

[0006] All power units are identified according to the series connection order and the parallel connection order; wherein, the identification includes a series identification that indicates the series position of the power unit in the corresponding series stage and a parallel identification that indicates the parallel position of the power unit in the corresponding parallel stage, and the series identification of M power units in the same series position in the M series stages is the same.

[0007] Obtain the output voltage of all the power units;

[0008] Based on the output voltage, a voltage mapping relationship between the series identifier of each power unit in the series stage and the output voltage is constructed, resulting in M ​​voltage mapping relationships corresponding one-to-one with the M series stages.

[0009] The series identifiers of a preset number of voltage mapping relationships are kept unchanged, and the output voltage is cyclically shifted to obtain the corrected M voltage mapping relationships.

[0010] For any power unit, the current voltage of the power unit is obtained based on the corrected M voltage mapping relationships and the identifier corresponding to the power unit, so as to adjust the output voltage of the power unit according to the current voltage.

[0011] Optionally, the preset number is M-1, and the shift amount of the cyclic shift of the M-1 voltage mapping relationships is different for each other.

[0012] Optionally, the identifier is a sequentially arranged number, and controlling the series identifiers of a preset number of voltage mapping relationships to remain unchanged while the output voltage is cyclically shifted sequentially includes:

[0013] The voltage mapping relationship corresponding to the first series stage remains unchanged;

[0014] The output voltage of the voltage mapping relationship corresponding to the i-th series stage is shifted cyclically to the left by a+i-2 positions to obtain the corrected voltage mapping relationship of the i-th series stage; a is a positive integer, and i is a positive integer not greater than M.

[0015] Optionally, the output voltage of the voltage mapping relationship corresponding to the i-th series stage is cyclically shifted to the left by a+i-2 positions to obtain the corrected voltage mapping relationship of the i-th series stage, including:

[0016] For any series stage corresponding to a voltage mapping relationship, the voltage mapping relationship is expanded into N levels; where the kth level is the level arranged in series identifier order when the output voltage of the voltage mapping relationship is cyclically shifted left by k-1 positions. k is a positive integer not greater than N.

[0017] The voltage mapping relationship of the (a+i-1)th level is determined as the corrected voltage mapping relationship of the ith series level.

[0018] Optionally, the output terminal of the power unit is provided with a voltage sensor that is connected to each power unit in a one-to-one manner, and the voltage sensor is used to detect the output voltage of the corresponding power unit;

[0019] Obtain the output voltage of all the power units, including:

[0020] The detection results of all voltage sensors are collected sequentially according to a preset scanning order to obtain the output voltage of all power units.

[0021] Optionally, the voltage mapping relationship includes a one-to-one correspondence of an identifier and a device number; the device number is the identification code of the voltage sensor corresponding to the voltage sensor when the output voltage is acquired.

[0022] The current voltage of the power unit is obtained based on the corrected M voltage mapping relationships and the identifier corresponding to the power unit, including:

[0023] Obtain the device number corresponding to the identifier of the power unit from the corrected M voltage mapping relationships;

[0024] Based on the device number, the detection result is read from the corresponding voltage sensor, and the read detection result is determined as the current voltage of the power unit.

[0025] Optionally, the voltage sensors corresponding to all the power units may take turns as the starting point for the preset scanning sequence in a preset order.

[0026] To address the aforementioned technical problems, the present invention also provides a control device for a series-parallel power unit topology. The series-parallel power unit topology includes M series stages connected in parallel, each of the M series stages comprising N series-connected power units, where M and N are both positive integers. The control device includes:

[0027] The identification setting unit is used to set identification for all power units according to the series connection order and the parallel connection order; wherein, the identification includes a series identification that represents the series position of the power unit in the corresponding series stage and a parallel identification that represents the parallel position of the power unit in the corresponding parallel stage, and the series identification of M power units in the same series position in the M series stages is the same.

[0028] A voltage acquisition unit is used to acquire the output voltage of all the power units;

[0029] The mapping relationship construction unit is used to construct a voltage mapping relationship between the series identifier of each power unit in the series stage and the output voltage based on the output voltage, so as to obtain M voltage mapping relationships that correspond one-to-one with the M series stages.

[0030] The shifting unit is used to control the series identifiers of a preset number of voltage mapping relationships to remain unchanged, while the output voltage is cyclically shifted to obtain the corrected M voltage mapping relationships.

[0031] The control unit is configured to, for any power unit, obtain the current voltage of the power unit based on the corrected M voltage mapping relationships and the identifier corresponding to the power unit, so as to adjust the output voltage of the power unit according to the current voltage.

[0032] To address the aforementioned technical problems, the present invention also provides an electronic device, comprising:

[0033] Memory, used to store computer programs;

[0034] A processor for implementing the steps of a control method for a series-parallel power unit topology as described above.

[0035] To address the aforementioned technical problems, the present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the control method for the series-parallel power unit topology as described above.

[0036] This invention provides a control method for a series-parallel power unit topology. After obtaining the output voltage of all power units, a voltage mapping relationship is constructed for the series stage, and a shift operation is performed on some of the series stage voltage mapping relationships to correct the current voltage of each power unit obtained during voltage control. By using the shift operation when obtaining the current voltage, the deviation between the output voltages of each power unit in the series stage caused by the phase difference in the phase-shift carrier control strategy is reduced. This reduces the difference in the total output power of each parallel stage and the deviation between the DC-side voltages of each power unit, while not affecting the total output voltage of each series stage. This improves the voltage balance of the entire topology, avoids abnormal situations such as overvoltage shutdown, ensures the normal operation of the entire topology, and improves the safety and reliability of the entire topology.

[0037] The present invention also provides a control device, electronic device, and computer-readable storage medium for a series-parallel power unit topology, which have the same beneficial effects as the control method for the series-parallel power unit topology described above. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the prior art and embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 A flowchart illustrating a control method for a series-parallel power unit topology provided by the present invention;

[0040] Figure 2 This is a schematic diagram of a series-parallel power unit topology provided by the present invention;

[0041] Figure 3 A schematic diagram of a simplified series-parallel power unit topology provided by the present invention;

[0042] Figure 4 A simplified structural diagram of a series-parallel power unit topology considering only the output voltage, provided by the present invention;

[0043] Figure 5 A schematic diagram of a modified voltage mapping relationship provided by the present invention;

[0044] Figure 6 A schematic diagram illustrating a voltage mapping relationship correction method provided by the present invention;

[0045] Figure 7 A schematic diagram illustrating another method for correcting the voltage mapping relationship provided by the present invention;

[0046] Figure 8 This is a schematic diagram of a voltage mapping relationship after k-expansion provided by the present invention;

[0047] Figure 9 This is a schematic diagram illustrating a shifting method at different levels provided by the present invention;

[0048] Figure 10 This is a schematic diagram showing the shifting of the expanded hierarchy of a single cascade level, as provided by the present invention.

[0049] Figure 11 A fully expanded schematic diagram of a voltage mapping relationship provided by the present invention;

[0050] Figure 12 A schematic diagram of hierarchical selection provided by the present invention;

[0051] Figure 13 This invention provides a schematic diagram of a corrected voltage mapping relationship obtained after hierarchical selection;

[0052] Figure 14 A schematic diagram of the structure of a control device for a series-parallel power unit topology provided by the present invention;

[0053] Figure 15 This is a schematic diagram of the structure of an electronic device provided by the present invention. Detailed Implementation

[0054] The core of this invention is to provide a control method, device, equipment, and medium for a series-parallel power unit topology, which improves the voltage balance of the entire topology, avoids abnormal situations such as overvoltage shutdown, ensures the normal operation of the entire topology, and improves the safety and reliability of the entire topology.

[0055] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0056] See Figure 1 As shown, Figure 1 This is a flowchart illustrating a control method for a series-parallel power unit topology provided by the present invention. To solve the above-mentioned technical problems, the present invention provides a control method for a series-parallel power unit topology, wherein the topology includes M series stages connected in parallel, each of the M series stages including N series-connected power units, where M and N are both positive integers; the control method includes:

[0057] S11: Set identifiers for all power units according to the series connection sequence and the parallel connection sequence; wherein, the identifiers include a series identifier that indicates the series position of the power unit in the corresponding series stage and a parallel identifier that indicates the parallel position of the power unit in the corresponding parallel stage, and the series identifiers of the M power units in the same series position in the M series stages are the same.

[0058] It is not difficult to understand, see Figure 2 As shown, Figure 2 This is a schematic diagram of a series-parallel power unit topology provided by the present invention; the series-parallel power unit topology is as follows: Figure 2As shown, four power switching devices arranged in an H-bridge configuration form a power unit. N power units connected in series on their AC sides form a series stage. M series stages connected in parallel form a series-parallel power unit topology. Within a series stage, M power units at the same series connection position are also connected in parallel, forming a parallel stage. The entire series-parallel power unit topology contains multiple power units. To facilitate subsequent detection and control of the power units and ensure control accuracy, this application first sets identifiers for each power unit. Each power unit has a unique identifier. This application does not specifically limit the specific type or implementation method of the identifiers; the identifiers can be implemented using numbering or other methods. Specifically, the identifier can represent the position information of the corresponding individual power unit in the series-parallel power unit topology. Therefore, the identifiers include parallel identifiers and series identifiers. For the j-th power unit in the i-th series stage, its identifier is Qji, and the energy storage system connected to the DC side is Uji. Here, the i-th series stage refers to the i-th parallel series stage when several series stages are connected in parallel in sequence, and the j-th power unit in the series stage refers to the j-th series power unit when several power units are connected in series in sequence. i is a positive integer not greater than M, and j is a positive integer not greater than N.

[0059] It should be noted that this application does not impose any special limitations on the specific type and implementation method of each power unit; it is not limited to methods such as... Figure 2 The H-bridge topology shown can also be implemented using a bidirectional Buck-Boost circuit with two switches, or an inverter circuit with six switches. This application does not impose any specific limitations on the type or implementation method of the power switching devices used; they can be implemented using power electronic switching devices such as MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) or IGBTs (Insulated Gate Bipolar Transistors). See [link to relevant documentation]. Figure 3 As shown, Figure 3This invention provides a simplified structural diagram of a series-parallel power unit topology. The entire power unit is simplified so that, during control, each power unit in the same parallel stage is connected to the same drive signal and uses the same amplitude control output. In contrast, each power unit in the same series stage uses a phase-shift carrier modulation algorithm for control output. The output voltage waveforms of the series-connected power units maintain equal amplitude with slight phase adjustments, thus achieving a voltage divider effect. The current flowing through each power unit in the same series stage is the same: I1 for the first series stage, I2 for the second, and IM for the Mth series stage. The voltages across each power unit in the same parallel stage are consistent: V1 for the first parallel stage, V2 for the second, and VN for the third.

[0060] S12: Obtain the output voltage of all power units;

[0061] Understandably, to ensure the stable operation of each power unit and the entire series-parallel power unit topology, it is necessary to maintain dynamic balance of the individual voltages of each power unit during application. Therefore, it is necessary to first obtain the current output voltage of each power unit to use as the reference for subsequent control. This application does not impose any specific limitations on the specific type of the power unit's output voltage or the method of obtaining it. The output voltage of the power unit can be its DC side voltage or its AC side voltage, depending on the actual application scenario.

[0062] S13: Based on the output voltage, construct the voltage mapping relationship between the series identifier of each power unit in the series stage and the output voltage, and obtain M voltage mapping relationships corresponding one-to-one with M series stages;

[0063] S14: Keep the series identifiers of a preset number of voltage mapping relationships unchanged, and perform cyclic sequential shifting of the output voltage to obtain the corrected M voltage mapping relationships;

[0064] It's easy to understand that, because each power unit in the same series stage employs a phase-shift carrier control strategy, and each series stage uses the same phase-shift carrier control strategy, there will be a power offset in the output power of each parallel stage due to phase shift. See also Figure 4 As shown, Figure 4 This invention provides a simplified structural diagram of a series-parallel power unit topology considering only the output voltage; the output voltage of the power unit Qji is defined as V. j，i Taking N=4 and M=4 as an example, V 1,1 V 1，2 V 1,3 V 1，4Their phases are consistent, both being φ1, V 2,1 V 2，2 V 2,3 V 2，4 Their phases are consistent, both being φ2, V 3,1 V 3，2 V 3,3 V 3，4 The phases are consistent, both being φ3, V 4,1 V 4，2 V 4,3 V 4，4 The phases are consistent, both being φ4. For each power unit in the same series stage and each parallel stage, the output power will deviate due to this slight phase difference. To solve this problem, after obtaining the current output voltage of the power unit, this application performs a shift operation on the output voltage of the power unit before controlling the power unit, correcting the current voltage used when controlling the power unit.

[0065] In the entire control process of the series-parallel power unit topology, the output voltage corresponding to each power unit is first detected. Then, all the detected output voltages are sorted by shifting operations to obtain the corrected new voltage value corresponding to each power unit, which is then transmitted to the control system. In this process, the control strategy for the power units is not changed. Instead, the original control strategy is maintained by shifting and sorting the detected voltage values ​​according to the control method of this application before uploading them to the control system.

[0066] Understandably, after obtaining the current output voltage of all power units, the first step is to map each output voltage to the identifier of each power unit. This mapping process yields the voltage mapping relationship for the entire series-parallel power unit topology. At this point, the output voltage corresponding to power unit Qji is V. j，i Then, the output voltages in the voltage mapping relationship are cyclically shifted to obtain the corrected voltage mapping relationship. This application does not impose specific limitations on the specific value of the preset quantity, etc., and it can be selected according to different design methods of the phase shift amount in the phase-shift carrier control strategy in actual applications. The optimal embodiment is to define the preset quantity as M-1 to minimize the power deviation caused by phase deviation. The cyclic shift operation can be performed after obtaining the output voltages corresponding to all power units, or it can be performed directly when obtaining the output voltages corresponding to all power units.

[0067] As one specific embodiment, see Figure 5 As shown, Figure 5This invention provides a schematic diagram of a modified voltage mapping relationship. Taking N=4 and M=4 as an example, a cyclic shift operation is performed directly when acquiring the output voltages corresponding to all power units. The voltage mapping relationship corresponding to the first series stage is used as a reference and remains unchanged. The order in which the output voltages of the power units are acquired is consistent with the numbering order of the series identifiers of the power units in the series stage. First, the individual voltages of each power unit in the first series stage are detected, and the individual voltages are sorted according to the series identifiers of each power unit in the series stage to obtain the four corresponding individual voltages V. 1,1 V 2,1 V 3,1 V 4,1 When acquiring the individual voltage of the power units in the second series stage, the order of voltage acquisition is shifted based on the first series stage. It no longer maintains the same order as the series identification sequence of the power units within the series stage. For example, if the original output voltage reading order was: first power unit output voltage -> second power unit output voltage -> third power unit output voltage -> fourth power unit output voltage, the reading order is now adjusted to: second power unit output voltage -> third power unit output voltage -> fourth power unit output voltage -> first power unit output voltage. However, the corresponding series identification sequence of the power units remains unchanged. Therefore, the final corrected voltage mapping relationship for the second series stage is: the series identification sequence of the first power unit corresponds to the output voltage of the second power unit obtained from its output terminal; the series identification sequence of the second power unit corresponds to the output voltage of the third power unit obtained from its output terminal; the series identification sequence of the third power unit corresponds to the output voltage of the fourth power unit obtained from its output terminal; and the series identification sequence of the fourth power unit corresponds to the output voltage of the first power unit obtained from its output terminal. The third and fourth series stages also undergo similar operations, and all other series stages except the first series stage undergo voltage mapping relationship modification. Figure 4 The series-parallel power unit topology shown is finally obtained after modification as follows: Figure 5 The corrected voltage mapping relationship is shown.

[0068] As another specific embodiment, see Figure 6 As shown, Figure 6 This diagram illustrates a voltage mapping correction method provided by the present invention. When N=4 and M=3, the voltage mapping relationship of the series-parallel power unit topology before correction is shown on the left, and the corrected voltage mapping relationship is shown on the right. (See also...) Figure 7 As shown, Figure 7This diagram illustrates another method for correcting the voltage mapping relationship provided by the present invention. When N=3 and M=4, the voltage mapping relationship of the series-parallel power unit topology before correction is shown on the left, and the voltage mapping relationship after correction is shown on the right. For each series stage, its total output voltage remains unchanged.

[0069] S15: For any power unit, obtain the current voltage of the power unit based on the corrected M voltage mapping relationships and the identifier corresponding to the power unit, so as to adjust the output voltage of the power unit according to the current voltage.

[0070] It is understood that after correcting the voltage mapping relationship using the shift operation provided in this application, the control system of the series-parallel power unit topology can obtain the corrected correspondence between the power units and the output voltage through dynamic voltage detection, i.e., the corrected M voltage mapping relationships. Then, each power unit will generate its own equalization control command based on the output voltage corresponding to its own identifier and the accurate voltage data after shift processing, so that each power unit achieves the effect of active voltage equalization and thermal distribution optimization. This application does not make any special restrictions on the specific type and implementation method of the equalization control command. Specifically, it can be a PWM (Pulse Width Modulation) duty cycle or energy transfer strategy, such as reducing the duty cycle of the power switching devices that make up the Buck circuit in the high-voltage power unit and increasing the energy injection of the Boost circuit in the low-voltage power unit.

[0071] It should be noted that for a series-parallel power unit topology, the ultimate control objective is to bring the output voltages of all power units to a convergence of their average values, meaning that the output voltage of each power unit should approach the average voltage of all power units. Therefore, for any power unit, after determining its current voltage based on the corrected voltage mapping relationship, the difference between the current voltage and the average voltage is calculated. The operation of the power unit is adjusted based on this difference to minimize it, thereby controlling the total output voltage of the entire series-parallel power unit topology to achieve zero drift and maintain it at the set target value. Here, the current voltage of a power unit refers to the voltage corresponding to its identifier, determined from the corrected voltage mapping relationship based on the power unit's identifier. Due to the shift operation, this current voltage is not necessarily the output voltage obtained from the power unit's output terminal. By cyclically shifting the output voltage in the voltage mapping relationship, the current voltage used as a reference for controlling each power unit is adjusted, reducing the voltage difference between the total output voltages of each parallel stage, ensuring that the total output voltage of each parallel stage remains consistent, thereby reducing the temperature difference between power units and minimizing local hot spots caused by voltage differences.

[0072] This invention provides a control method for power units in a series-parallel power unit topology. Before controlling the power units, a cyclic shift strategy is used to avoid the output inconsistency of parallel power units caused by small phase differences under phase-shifted carrier control. At the same time, the total output voltage of each series stage does not change. This method is applicable to any general topology with N series stages and M parallel stages.

[0073] Based on the above embodiments:

[0074] As an optional embodiment, the preset number is M-1, and the shift amounts of the cyclic shifts of the M-1 voltage mapping relationships are all different.

[0075] It's easy to understand that, to ensure the cyclic shift strategy effectively compensates for voltage deviations in series-parallel power unit topologies, the optimal implementation sets the preset number to M-1, and the shift amounts used for each of the M-1 voltage mapping relationships during cyclic sequential shifting are different. For example, the shift amount for the first voltage mapping relationship is 1, the shift amount for the second voltage mapping relationship is 2, and the shift amount for the first voltage mapping relationship is M-1. This ensures that all power units ultimately share the same average error, guaranteeing complete consistency in output voltage, output current, and output power for all power units, series stages, and parallel stages.

[0076] Specifically, by controlling M-1 voltage mapping relationships to perform cyclical sequential shifting with different shift amounts, it is possible to achieve complete consistency in the total output voltage, total output current, total output power, and power factor of each power unit. In particular, when the energy storage system connected to the DC side of each power unit is a battery, the output power corresponding to each battery stage is also completely consistent, effectively improving the voltage balance of the series-parallel power unit topology. With consistent battery voltages across all stages, a single power supply voltage can be used to treat each battery stage as a whole, charging each stage simultaneously, significantly shortening the charging time and eliminating the need for staged charging.

[0077] As an optional embodiment, the identifiers are sequentially arranged, and the series identifiers controlling a preset number of voltage mapping relationships remain unchanged while the output voltage is cyclically shifted sequentially, including:

[0078] The voltage mapping relationship corresponding to the first series stage remains unchanged;

[0079] The output voltage of the voltage mapping relationship corresponding to the i-th series stage is shifted cyclically to the left by a+i-2 positions to obtain the corrected voltage mapping relationship of the i-th series stage; a is a positive integer, and i is a positive integer not greater than M.

[0080] Understandably, to further ensure voltage balance among power units after cyclic shifting, the step size of the shift amounts for the M-1 voltage mapping relationships can be set as uniformly as possible. In this embodiment, taking a step size of 1 as an example, the voltage mapping relationship corresponding to the first series stage remains unchanged; the output voltage of the voltage mapping relationship corresponding to the second series stage is cyclically shifted left by 'a' positions; the output voltage of the voltage mapping relationship corresponding to the third series stage is cyclically shifted left by 'a+1' positions; the output voltage of the voltage mapping relationship corresponding to the fourth series stage is cyclically shifted left by 'a+2' positions; and the shift amount of the output voltage of the voltage mapping relationship corresponding to the next series stage is the shift amount of the previous series stage plus 1. The value of 'a' is not specifically limited here, but a preferred embodiment is to set 'a' to 1, making the step size of the shift amounts for the M-1 voltage mapping relationships a uniform value of 1.

[0081] Specifically, by cyclically shifting the output voltage in a consistent step size, the offset error between the total output power of the parallel stage caused by the phase difference is averaged or dispersed by adjusting the current voltage of the power unit.

[0082] As an optional embodiment, the output voltage of the voltage mapping relationship corresponding to the i-th series stage is cyclically shifted to the left by a+i-2 positions to obtain the corrected voltage mapping relationship of the i-th series stage, including:

[0083] For any series stage, the voltage mapping relationship is expanded into N levels; where the k-th level is the level arranged in series identifier order when the output voltage of the voltage mapping relationship is cyclically shifted left by k-1 bits. k is a positive integer not greater than N.

[0084] The voltage mapping relationship of the (a+i-1)th level is determined as the corrected voltage mapping relationship of the ith series level.

[0085] It's easy to understand that output voltage shift control can be achieved by constructing a general model for the cyclic shifting of voltage mapping relationships. For any voltage mapping relationship, it can be expanded hierarchically, with each voltage mapping relationship expanding into N levels. Let k represent the index of the expanded level, and let V be the output voltage corresponding to the j-th power unit in the i-th series stage. j，i First, the output voltage V of each power unit... j，i A periodic scan is performed to acquire the output voltage of all power units. Then, modulo-N arithmetic is used to determine the dynamic order of the output voltages in the corrected voltage mapping relationship.

[0086] It should be noted that the first step in the hierarchical expansion is to initialize the reference level. This embodiment takes the first series stage as the reference level as an example. When performing the operation of acquiring the output voltage for each series stage in sequence, the voltage of the power unit in the i-th series stage is read sequentially according to the physical connection order of the series connections in each series stage. 1，i V 2，i , ...V N，i Since the voltage of power units in the same parallel stage will remain consistent, the output voltage corresponding to the first parallel stage is V1 (that is, V). 1，i The corresponding voltage values ​​are all V1), and the output voltage corresponding to the Nth parallel stage is VN (that is, V). N，i The corresponding voltage values ​​are all VN). Therefore, in this embodiment, the voltage mapping relationship only uses the voltage node number corresponding to the output voltage to represent the voltage. The voltage mapping relationship of the first series stage is denoted as VN. Where 1 represents the corresponding output voltage V1, and N represents the corresponding output voltage VN. Then, a cyclic left shift operation is used to generate the voltage mapping relationship in the i-th series stage. For the i-th series stage, the sorting sequence of voltage node indices in the voltage mapping relationship is generated by cyclically shifting the sequence corresponding to the previous series stage modulo N to the left.

[0087] ;

[0088] For the second cascade stage

[0089] ;

[0090] in, This represents the voltage mapping relationship of the i-th series stage. This indicates the voltage mapping relationship of the previous stage, i.e., the (i-1)th series stage. CircShift() represents the cyclic shift function, which can shift the rows or columns of a matrix or vector. - indicates left shift, and 1 is the shift amount for each cyclic shift.

[0091] Therefore, for the j-th power unit in the i-th series stage, the detection position Pos(i,j) of the voltage sensor corresponding to its current voltage is:

[0092] ;

[0093] Where Pos(i,j)=1 indicates that the output voltage of the j-th power unit in the i-th series stage is V1, and Pos(i,j)=2 indicates that the output voltage of the j-th power unit in the i-th series stage is V2. mod N represents modulo N operation, and Δ=1 introduces a phase shift of Δ=1 for each series stage. The shift step size Δ can be customized and can be set according to actual needs to cope with various settings under different requirements. When Δ=2, the detection path of each series stage exhibits a skip-point characteristic.

[0094] This embodiment uses modulo N to implement the cyclic shift of the voltage mapping relationship, thereby ensuring that the shifted position index is always within the valid range (1-N) and preventing the corresponding voltage node number from going out of bounds. When the calculation result exceeds N, it automatically wraps back to the beginning of the voltage node number sequence. Ensuring the integrity and fairness of the dynamic sorting is a key design feature for eliminating system cumulative errors. This operation allows the general model to be extended to system topologies composed of power units of any size (N≥2) while maintaining a time complexity of O(1), meeting the real-time requirements of power electronic systems.

[0095] Furthermore, a sorted table of voltage mapping relationships can be generated through hierarchical expansion, and finally, the shift operation under modulo-N arithmetic can be implemented based on hierarchical selection of the sorted table. See also Figure 8 As shown, Figure 8 This is a schematic diagram of a voltage mapping relationship after k-expansion provided by the present invention; Figure 4 Taking the series-parallel power unit topology with N=4 and M=4 as an example, we expand each series stage into k levels, where the maximum value of k is N, and N is 4. Therefore, for each series stage, we expand it into four levels corresponding to k=1, k=2, k=3, and k=4, as follows: Figure 8 As shown, for the first series stage, the voltage sequences corresponding to the four expanded levels are completely identical at the very beginning of the k-expansion. See also... Figure 9 As shown, Figure 9 This invention provides a schematic diagram of a shifting method with different levels; then each level is according to... Figure 9 The shifting method shown is used to shift the voltage sequence. Each level is the result of cyclically shifting the previous level left by 1 bit. See [link / reference]. Figure 10 As shown, Figure 10 This is a schematic diagram showing the shifted layers of a single cascaded stage provided by the present invention; taking the first cascaded stage as an example, after shifting the four unfolded layers, the result is as follows. Figure 10 The k-level voltage sequence is shown. See also... Figure 11 As shown, Figure 11 This invention provides a fully expanded hierarchical diagram of voltage mapping relationships; for each series stage, the same operation is performed to obtain the following result. Figure 11 The sorting table shown. See also... Figure 12 As shown, Figure 12 This invention provides a schematic diagram of hierarchical selection; then, based on the sorting table, the table is selected according to the sequence number corresponding to the series stage. Taking a=1 as an example, the i-th series stage selects the k=i-th level as the corrected voltage mapping relationship, such as... Figure 12 The red dashed box in the diagram illustrates the selection. The first series stage uses the voltage sequence corresponding to k=1 as the corrected voltage mapping relationship; the second series stage uses the voltage sequence corresponding to k=2; the third series stage uses the voltage sequence corresponding to k=3; and the fourth series stage uses the voltage sequence corresponding to k=4. See also... Figure 13 As shown, Figure 13 This invention provides a schematic diagram of the corrected voltage mapping relationship obtained after hierarchical selection; the final result is a reordering of the voltage values ​​of each power unit in a multi-level series-parallel power unit topology, as shown below. Figure 13 As shown, this is uploaded to the control system.

[0096] It should be noted that, to ensure the final control effect, when performing shift operations across parallel branches, i.e., between series stages, each series stage independently executes the same sorting logic; for example, each stage cyclically shifts left by one bit based on the previous series stage. When controlling the power units, synchronous control is only performed after all series stages have completed the correction of the voltage mapping relationship and the detection of the corresponding output voltage. Furthermore, for N power units within the same series stage, the detection windows remain strictly synchronized when determining or detecting the corresponding voltage signal based on the corrected voltage mapping relationship.

[0097] Furthermore, the control method provided in this application can also be applied to three-dimensional series-parallel power unit topologies. Based on a two-dimensional series-parallel power unit topology, multiple levels of two-dimensional series-parallel power unit topologies are set in the spatial z-axis direction. For a certain level of the two-dimensional series-parallel power unit topology in the z-axis direction, the voltage mapping relationship of each series stage can be achieved by cyclically shifting a specific amount to the left based on the previous level of the two-dimensional series-parallel power unit topology in the z-axis direction. Multi-granularity detection is achieved through this nested shift rule.

[0098] Specifically, the entire control method effectively suppresses the error of the control system through deterministic path perturbation. Its general model can be extended to power unit networks of arbitrary dimensions, providing a generalized detection framework and optimized design for high-reliability power electronic systems. This reduces the differences caused by small phase differences among parallel stages in a multi-stage series-parallel power unit topology, while not changing the total output voltage of each series stage.

[0099] As a specific implementation, taking N=4 and M=2 as an example, the general model is verified and analyzed. The power units in the first series stage are numbered Q11, Q21, Q31, and Q41 sequentially, and the power units in the second series stage are numbered Q12, Q22, Q32, and Q42 sequentially. The dynamic sorting logic is verified. According to the general model, the detection order of each series stage is generated by cyclically shifting the detection order of the previous series stage to the left. Figure 9 The shift operation shown expands each series stage hierarchically. For the i-th series stage, the voltage order of its reference stage (k=1) is 1 (V). 1,1 ), 2 (V 2,1 ), 3 (V 3,1 ), 4 (V 4,1 In the second stage (k=2), a circular left shift operation is performed, shifting the order of k=1 one position to the left, resulting in a voltage sort of 2 (V) for the second stage. 2,1 ), 3 (V 3,1 ), 4 (V 4,1 ), 1 (V 1,1 In the third stage (k=3), a circular left shift operation is performed, shifting the order of k=2 one position to the left, resulting in a voltage order of 3 (V) for the third stage. 3,1 ), 4 (V 4,1 ), 1 (V 1,1 ), 2 (V 2,1 In the fourth stage (k=4), a circular left shift operation is performed, shifting the order of k=3 one position to the left, resulting in a voltage order of 4 (V) for the fourth stage. 4,1 ), 1 (V 1,1 ), 2 (V 2,1 ), 3 (V 3,1 The detection sequence corresponding to the four levels of each cascade stage is shown in Table 1.

[0100] Table 1. Schematic diagram of the sequence of cascade levels

[0101]

[0102] The final result is selected according to the sorting table shown in Table 1. The sorting corresponding to k=1 is selected for the first series stage, and the sorting corresponding to k=2 is selected for the second series stage, thus obtaining the corrected voltage mapping relationship. If the current voltage of the power unit is obtained in the traditional way, it is necessary to repeatedly detect the detection path of V1→V2→V3→V4. Using the control method of this application, for the first series stage, the detection path of V1→V2→V3→V4 is used, and for the second series stage, the detection path of V2→V3→V4→V1 is used, thereby reducing the cumulative error caused by the fixed detection path.

[0103] As an optional embodiment, the output terminal of the power unit is provided with a voltage sensor that is connected to each power unit in a one-to-one manner. The voltage sensor is used to detect the output voltage of the corresponding power unit.

[0104] Obtain the output voltage of all power units, including:

[0105] The detection results of all voltage sensors are collected sequentially according to the preset scanning order to obtain the output voltage of all power units.

[0106] As an optional embodiment, the voltage mapping relationship includes a one-to-one correspondence of an identifier and a device number; the device number is the identification code of the voltage sensor corresponding to the acquisition of the output voltage;

[0107] The current voltage of the power unit is obtained based on the corrected M voltage mapping relationships and the identifier corresponding to the power unit, including:

[0108] Obtain the device number corresponding to the identifier of the power unit from the corrected M voltage mapping relationships;

[0109] Based on the device number, the detection result is read from the corresponding voltage sensor, and the read detection result is determined as the current voltage of the power unit.

[0110] In practical applications, voltage sensors are set up to detect the output voltage of each power unit, and each voltage sensor is located near the output terminal of its corresponding power unit. In this case, if the control system obtains the output voltage of each power unit according to the same detection path every time, the cumulative error of the detection path will also affect the voltage balance between power units. Therefore, this embodiment directly uses the device number corresponding to the voltage sensor to represent the output voltage in the voltage mapping relationship, and performs a shift operation in advance when obtaining the output voltage corresponding to all power units. That is, the voltage mapping relationship includes the power unit Qji and the device number of the voltage sensor corresponding to the current voltage. For example, for the first power unit in the second series stage, the voltage mapping relationship is corrected to the previous voltage V. 2,1 The corrected voltage is V. 2，2 Then, when controlling this power unit, the control system will adjust the voltage V. 2，2 The current voltage of the first power unit in the second series stage is obtained from the output of the voltage sensor corresponding to the second power unit in the second series stage.

[0111] It should be noted that the actual output voltage detected at the output terminal of the power unit is... When detecting voltage Vp, the error function of the detection path is: The measured value received by the control system .by Figure 4 For example, if a traditional fixed detection path is used to detect the output voltage, the measured value of the first power unit in the first series stage is... The measured value of the second power unit in the first series stage is The measured value of the third power unit in the first series stage is The measured value of the fourth power unit in the first series stage is Taking the first and second power units in this series stage as an example, there will be a gap between them. The voltage deviation. After employing the shift operation provided in this application, the measured value of the first power unit in the first series stage is... The measured value of the second power unit in the first series stage is The measured value of the third power unit in the first series stage is The measured value of the fourth power unit in the first series stage is This ensures that there is only one power unit between the first and second power units in the series stage. The voltage deviation was eliminated, thus eliminating the relative deviation.

[0112] After long-term statistics, After employing the shift operation provided in this application, the power units will share the same average error. The shift between each cascade stage is equivalent to applying a phase perturbation to the detection system. (From an electrical perspective): This perturbation can effectively disrupt the coherence of error accumulation and convert fixed-mode errors into white noise, while conforming to the error suppression principle of random sampling theory.

[0113] Specifically, by using the device number of the corresponding voltage sensor to implement the output voltage in the voltage mapping relationship, the cumulative error due to the detection path when the control system detects the voltage can be further reduced or even eliminated, thereby further improving the control accuracy of the power supply.

[0114] As an optional embodiment, the voltage sensors corresponding to all power units take turns as the scanning start point of the preset scanning sequence in a preset order.

[0115] It is understandable that, in order to achieve continuous control of the power units, the control system periodically scans the detection results of each voltage sensor. Therefore, the scanning order can be dynamically adjusted to further avoid sensor bias errors caused by fixed paths. Specifically, each power unit can be used as the starting point of a preset scanning order in turn to avoid a fixed detection path. This application does not impose any particular limitations on the preset scanning order or its specific implementation. Generally, the preset scanning order can be defined by prioritizing series connection followed by parallel connection. This embodiment ensures that each power unit is detected preferentially in different scanning processes by using each power unit as the starting point in turn, avoiding the cumulative error caused by fixed paths, effectively dispersing sensor bias errors, and improving the system's equalization accuracy.

[0116] Specifically, this application achieves error suppression in the control system of a series-parallel power unit topology through a triple mechanism. First, spatial averaging: different scan starting points are used in different scan processes during periodic scanning, allowing the control system to traverse all detection paths and average out position-related errors. Second, phase randomization: the coherence condition for error accumulation is disrupted by shifting the voltage mapping relationship, transforming system errors into random noise. Finally, correlation error transformation: the uncorrelated errors of the detection paths between parallel branches corresponding to each series stage are transformed into system-wide correlated errors, eliminating relative deviations. This significantly reduces the voltage difference between parallel branches without changing the actual output voltage, thereby improving the overall topology system's balancing accuracy and reliability, providing an inherently safe detection scheme for large-scale power unit systems; and the settings are implemented only at the software level, avoiding direct modification of the hardware circuitry.

[0117] See Figure 14 As shown, Figure 14 This invention provides a schematic diagram of a control device for a series-parallel power unit topology. To solve the above-mentioned technical problems, this invention also provides a control device for a series-parallel power unit topology, which includes M series-connected stages, each of which includes N series-connected power units, where M and N are both positive integers. The control device includes:

[0118] The identification setting unit 11 is used to set identification for all power units according to the series connection order and the parallel connection order; wherein, the identification includes a series identification that represents the series position of the power unit in the corresponding series stage and a parallel identification that represents the parallel position of the power unit in the corresponding parallel stage, and the series identification of M power units in the same series position in M ​​series stages is the same.

[0119] Voltage acquisition unit 12 is used to acquire the output voltage of all power units;

[0120] The mapping relationship construction unit 13 is used to construct the voltage mapping relationship between the series identifier of each power unit in the series stage and the output voltage based on the output voltage, so as to obtain M voltage mapping relationships that correspond one-to-one with M series stages.

[0121] The shift unit 14 is used to control the series identifiers of a preset number of voltage mapping relationships to remain unchanged, and to cyclically shift the output voltage to obtain the corrected M voltage mapping relationships.

[0122] The control unit 15 is used to obtain the current voltage of any power unit based on the corrected M voltage mapping relationships and the identifier corresponding to the power unit, so as to adjust the output voltage of the power unit according to the current voltage.

[0123] For a description of the control device for a series-parallel power unit topology provided by the present invention, please refer to the embodiments of the control method for the series-parallel power unit topology described above. The present invention will not be repeated here.

[0124] See Figure 15 As shown, Figure 15 This is a schematic diagram of the structure of an electronic device provided by the present invention. To solve the above-mentioned technical problems, the present invention also provides an electronic device, comprising:

[0125] Memory 21 is used to store computer programs;

[0126] Processor 22 is used to implement the steps of the control method for the series-parallel power unit topology as described above.

[0127] The processor 22 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 22 may be implemented using at least one hardware form selected from DSP (Digital Signal Processor), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 22 may also include a main processor and a coprocessor. The main processor, also known as the central processing unit, is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 22 may integrate a GPU (graphics processing unit), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 22 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0128] The memory 21 may include one or more computer-readable storage media, which may be non-transitory. The memory 21 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 21 is used to store at least the following computer program, which, after being loaded and executed by the processor 22, is capable of implementing the relevant steps of the control method for the series-parallel power unit topology disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 21 may also include an operating system and data, and the storage method may be temporary or permanent storage. The operating system may include Windows, Unix, Linux, etc. The data may include, but is not limited to, data related to the control method for the series-parallel power unit topology.

[0129] In some embodiments, the electronic device may further include a display screen, an input / output interface, a communication interface, a power supply, and a communication bus.

[0130] It will be understood by those skilled in the art that Figure 15 The structures shown do not constitute a limitation on electronic devices and may include more or fewer components than those shown.

[0131] For an introduction to the electronic device provided by this invention, please refer to the embodiment of the control method for the series-parallel power unit topology described above; the invention will not be repeated here.

[0132] To address the aforementioned technical problems, the present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the control method for the series-parallel power unit topology as described above.

[0133] It is understood that if the methods in the above embodiments are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods described in the various embodiments of this application. Specifically, the computer-readable storage medium may include, but is not limited to, any type of disk, including floppy disks, optical disks, and portable hard drives, or any type of media or device suitable for storing instructions or data, etc., and this application does not make any special limitations here.

[0134] For an introduction to the computer-readable storage medium provided by the present invention, please refer to the embodiments of the control method for the series-parallel power unit topology described above; the present invention will not be repeated here.

[0135] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatuses disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple; relevant parts can be referred to the method section. It should also be noted that in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0136] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A control method for a series-parallel power unit topology, characterized in that, The series-parallel power unit topology includes M series stages connected in parallel, each of the M series stages including N power units connected in series, where M and N are both positive integers; the control method includes: All power units are identified according to the series connection order and the parallel connection order; wherein, the identification includes a series identification that indicates the series position of the power unit in the corresponding series stage and a parallel identification that indicates the parallel position of the power unit in the corresponding parallel stage, and the series identification of M power units in the same series position in the M series stages is the same. Obtain the output voltage of all the power units; Based on the output voltage, a voltage mapping relationship between the series identifier of each power unit in the series stage and the output voltage is constructed, resulting in M ​​voltage mapping relationships corresponding one-to-one with the M series stages. The series identifiers of a preset number of voltage mapping relationships are kept unchanged, and the output voltage is cyclically shifted to obtain the corrected M voltage mapping relationships. For any power unit, the current voltage of the power unit is obtained based on the corrected M voltage mapping relationships and the identifier corresponding to the power unit, so as to adjust the output voltage of the power unit according to the current voltage; The identifier is a sequentially arranged number. Controlling a preset number of series identifiers representing voltage mapping relationships to remain unchanged while the output voltage undergoes a cyclic sequential shift includes: The voltage mapping relationship corresponding to the first series stage remains unchanged; The output voltage of the voltage mapping relationship corresponding to the i-th series stage is shifted cyclically to the left by a+i-2 positions to obtain the corrected voltage mapping relationship of the i-th series stage; a is a positive integer, and i is a positive integer not greater than M.

2. The control method for the series-parallel power unit topology according to claim 1, characterized in that, The preset quantity is M-1, and the shift amount of the cyclic shift of the M-1 voltage mapping relationships is different for each other.

3. The control method for the series-parallel power unit topology according to claim 1, characterized in that, The output voltage of the voltage mapping relationship corresponding to the i-th series stage is shifted cyclically to the left by a+i-2 positions to obtain the corrected voltage mapping relationship of the i-th series stage, including: For any series stage corresponding to a voltage mapping relationship, the voltage mapping relationship is expanded into N levels; where the kth level is the level arranged in series identifier order when the output voltage of the voltage mapping relationship is cyclically shifted left by k-1 positions. k is a positive integer not greater than N. The voltage mapping relationship of the (a+i-1)th level is determined as the corrected voltage mapping relationship of the ith series level.

4. The control method for the series-parallel power unit topology according to any one of claims 1 to 3, characterized in that, The output terminal of the power unit is provided with a voltage sensor that is connected to each power unit in a one-to-one manner. The voltage sensor is used to detect the output voltage of the corresponding power unit. Obtain the output voltage of all the power units, including: The detection results of all voltage sensors are collected sequentially according to a preset scanning order to obtain the output voltage of all power units.

5. The control method for the series-parallel power unit topology according to claim 4, characterized in that, The voltage mapping relationship includes a one-to-one correspondence of identifiers and device numbers; the device number is the identification code of the voltage sensor corresponding to the voltage sensor when the output voltage is collected. The current voltage of the power unit is obtained based on the corrected M voltage mapping relationships and the identifier corresponding to the power unit, including: Obtain the device number corresponding to the identifier of the power unit from the corrected M voltage mapping relationships; Based on the device number, the detection result is read from the corresponding voltage sensor, and the read detection result is determined as the current voltage of the power unit.

6. The control method for the series-parallel power unit topology according to claim 4, characterized in that, The voltage sensors corresponding to all the power units take turns as the starting point for the preset scanning sequence in a preset order.

7. A control device for a series-parallel power unit topology, characterized in that, The series-parallel power unit topology includes M series stages connected in parallel, each of the M series stages comprising N series-connected power units, where M and N are both positive integers; the control device includes: The identification setting unit is used to set identification for all power units according to the series connection order and the parallel connection order; wherein, the identification includes a series identification that represents the series position of the power unit in the corresponding series stage and a parallel identification that represents the parallel position of the power unit in the corresponding parallel stage, and the series identification of M power units in the same series position in the M series stages is the same. A voltage acquisition unit is used to acquire the output voltage of all the power units; The mapping relationship construction unit is used to construct a voltage mapping relationship between the series identifier of each power unit in the series stage and the output voltage based on the output voltage, so as to obtain M voltage mapping relationships that correspond one-to-one with the M series stages. The shifting unit is used to control the series identifiers of a preset number of voltage mapping relationships to remain unchanged, while the output voltage is cyclically shifted to obtain the corrected M voltage mapping relationships. The control unit is configured to, for any power unit, obtain the current voltage of the power unit based on the corrected M voltage mapping relationships and the identifier corresponding to the power unit, so as to adjust the output voltage of the power unit according to the current voltage; The identifier is a sequentially arranged number, and the shifting unit is specifically used for: The voltage mapping relationship corresponding to the first series stage remains unchanged; The output voltage of the voltage mapping relationship corresponding to the i-th series stage is shifted cyclically to the left by a+i-2 positions to obtain the corrected voltage mapping relationship of the i-th series stage; a is a positive integer, and i is a positive integer not greater than M.

8. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for implementing the steps of the control method for the series-parallel power unit topology as described in any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the control method for the series-parallel power unit topology as described in any one of claims 1 to 6.

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