A fast and efficient method and system for capacitor voltage balance control in MMC submodules
By employing non-recursive merging sorting and action priority classification in the capacitor voltage balance control of the MMC submodule, the problems of large computational load and slow sorting speed in large-capacity flexible DC projects are solved, achieving fast and efficient capacitor voltage balance control.
Patent Information
- Application Number
- CN202511383527.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-26
- Publication Date
- 2025-12-02
- Estimated Expiration
- 2045-09-26
AI Technical Summary
Existing MMC submodule capacitor voltage balance control algorithms suffer from high computational complexity and slow sorting speed in large-capacity flexible DC projects, resulting in high switching frequencies and failing to meet the requirements for rapid response.
A non-recursive merge sorting and action priority classification method is adopted to sort and charge/discharge the capacitors of the MMC submodules based on critical moment points and capacitor voltage deviation, reducing the full sorting calculation at non-critical moments and performing only a small amount of sorting at critical moments.
It significantly reduces computation time and complexity, improves the computation speed of the capacitor equalization algorithm in the MMC submodule, reduces storage space requirements, and improves sorting efficiency.
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Figure CN120880210B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of flexible DC transmission, specifically to a fast and efficient method and system for controlling the capacitor voltage balance of MMC submodules. Background Technology
[0002] Flexible DC transmission technology based on Modular Multilevel Converters (MMCs) is widely used in wind power grid connection, asynchronous grid interconnection, and long-distance, high-capacity power transmission due to its advantages such as the absence of commutation failure issues and the ability to independently adjust active and reactive power. The DC side of a MMC is maintained by a series connection of many sub-module DC capacitor voltages. The DC voltage control objective of the converter includes not only stabilizing the total DC voltage but also maintaining the balance of the DC capacitor voltages of each sub-module.
[0003] Traditional MMC submodule capacitor balancing control algorithms first monitor and sort the capacitor voltage values of each submodule, then determine whether to switch on a submodule with a higher or lower capacitor voltage based on the direction of the bridge arm current. With the increasing transmission capacity of flexible DC transmission projects, the number of submodules per bridge arm of the converter valve also increases significantly. Existing flexible DC transmission projects have up to 540 submodules per bridge arm. As the number of submodules increases, sorting the capacitor voltages of all submodules in each control cycle to determine which submodules need to be switched inevitably leads to a higher switching frequency and increased computational load.
[0004] Chinese patent CN201610648993.2 discloses a method for controlling the voltage balance of MMC submodule capacitors based on fast sorting. It divides submodules into "cut-off state" and "engagement state" using a fast sorting algorithm, reducing the sorting range through a divide-and-conquer strategy, but does not consider the instability of fast sorting. Chinese patent CN202510158667.2 uses a sorting strategy that introduces a "dynamic additional factor," considering voltage fluctuation compensation and optimizing switching priorities during the sorting process, but the computational complexity is high, increasing the number of variables to consider. Chinese patent CN202411067648.0 uses a submodule capacitor voltage group detection and hierarchical sorting method, improving the system's detection speed and reducing the sorting workload, but lacks a global sorting process. Chinese patent CN201811500521.8 uses a direct voltage balancing method for submodule capacitors based on improved sorting. If all submodule capacitor voltages are within a specified range, a submodule capacitor voltage balancing control method without sorting is used, but it does not improve the complex computational and spatial requirements of sorting. CN201610311275.6 discloses a modular multilevel converter (MMC) capacitor equalization method based on optimized merge sorting. This method requires constant identification and sorting of the engagement and disengagement states of all MMC submodules, and its computational complexity still needs further improvement. Therefore, a stable and efficient sorting method is urgently needed to achieve timely response from the MMC submodules. Summary of the Invention
[0005] To address the slow and inefficient sorting speed of existing MMC submodules, this invention proposes a fast and efficient method for controlling the capacitor voltage balance of MMC submodules, comprising:
[0006] Determine whether the current moment is a critical moment. If so, perform non-recursive merging and sorting of the MMC sub-modules based on the capacitor voltage of each MMC sub-module in the modular multilevel converter. If not, classify the action priority based on the difference between the capacitor voltage of the MMC sub-module and the standard value.
[0007] Based on the results of the non-recursive merge sorting or action priority classification, the corresponding MMC submodule capacitors are discharged or charged.
[0008] The result of the action priority classification includes a charging array and a discharging array. The charging array includes at least one level, and the discharging array includes at least one level. Each level includes at least one MMC submodule capacitor.
[0009] Optionally, the specific steps for determining whether the current moment is a critical moment point are as follows:
[0010] The current power frequency waveform is compared with the preset power frequency waveform at a critical moment. If the point on the current power frequency waveform coincides with the marked point on the preset power frequency waveform, then the current moment is a critical moment; otherwise, the current moment is a non-critical moment.
[0011] Optionally, the action priority classification based on the difference between the capacitor voltage of the MMC submodule and the standard value includes the following steps:
[0012] The capacitor voltage deviation of each MMC submodule and / or the capacitor voltage imbalance within each MMC submodule are obtained based on the difference between the capacitor voltage of the MMC submodule and the standard value.
[0013] The levels are classified based on the capacitor voltage deviation and / or the capacitor voltage imbalance within each MMC submodule.
[0014] Action priority is classified based on the results of the aforementioned level classification.
[0015] Optionally, the step of performing a non-recursive merge sort of the MMC submodules based on the capacitor voltage of each MMC submodule in the modular multilevel converter includes:
[0016] Construct multiple arrays using the capacitor voltages of each MMC submodule as elements;
[0017] 2 respectively 1 2 2 ……2 n The number of elements to be merged is determined by merging them level by level until they are merged into a single array. After each level of merging, the newly formed arrays are internally sorted according to the capacitor voltage.
[0018] Optionally, the step of discharging or charging the corresponding MMC submodule capacitor based on the result of the non-recursive merge sort or action priority classification includes:
[0019] Calculate the number of voltage levels N required at the next moment;
[0020] If the current moment is a critical moment, then the first N capacitors in the non-recursive merge sort result are selected for discharge or the last N capacitors are selected for charging.
[0021] If the current time is not a critical moment, then the first N capacitors in the discharge array are selected for discharge or the first N capacitors in the charging array are selected for charging.
[0022] Optionally, the calculation of the number of levels required for the next moment is specifically as follows:
[0023] The nearest level approximation algorithm is used to calculate the number of levels required for the next time step.
[0024] Optionally, before discharging or charging the corresponding MMC submodule capacitor based on the result of the non-recursive merge sort or action priority classification, the method further includes:
[0025] Determine whether the capacitor of the MMC submodule to be discharged or charged has been continuously charged or discharged within a preset number of control cycles before the current time. If so, perform non-recursive merging and sorting to reconfirm the MMC submodule to be discharged or charged.
[0026] Optionally, before discharging or charging the corresponding MMC submodule capacitor based on the result of the non-recursive merge sorting or action priority classification, the method further includes: setting a capacitor identifier for the capacitor of each MMC submodule.
[0027] The process of discharging or charging the corresponding MMC submodule capacitor based on the results of the non-recursive merge sorting or action priority classification also includes checking the capacitor identifier. If the capacitor identifier is correct, the discharge or charging of the determined MMC submodule capacitor is initiated; if the capacitor identifier is incorrect, an error is reported.
[0028] Optionally, the charging array includes: multiple charging subarrays with priorities, which are executed sequentially according to their priorities; the discharging array includes: multiple discharging arrays with priorities, which are executed sequentially according to their priorities.
[0029] Optionally, the step of determining whether the current moment is a critical moment point further includes:
[0030] A feature array is set for the capacitors of each MMC submodule. The feature array is used to store the capacitor identifier, capacitor voltage deviation, capacitor voltage imbalance within the MMC submodule, and priority classification of the next action.
[0031] Optionally, the feature array is also used to store the charge / discharge status identifiers within a preset number of control cycles.
[0032] Optionally, the capacitor identifier includes a capacitor serial number, a prefix identifier, and a suffix identifier, wherein the prefix identifier is the first element of the feature array, and the suffix identifier is the last element of the feature array.
[0033] A second aspect of the present invention provides a fast and efficient MMC submodule capacitor voltage balancing control system, comprising:
[0034] Classification and sorting module: Used to determine whether the current moment is a critical moment point. If so, the MMC sub-modules in the modular multilevel converter are sorted non-recursively based on the capacitor voltage of each MMC sub-module. If not, the action priority is classified based on the difference between the capacitor voltage of the MMC sub-module and the standard value.
[0035] Execution module: used to discharge or charge the capacitors of the corresponding MMC submodule based on the results of the non-recursive merge sorting or action priority classification;
[0036] The result of the action priority classification includes a charging array and a discharging array. The charging array includes at least one level, and the discharging array includes at least one level. Each level includes at least one MMC submodule capacitor.
[0037] Optionally, the specific steps for the classification and sorting module to determine whether the current moment is a critical moment point are as follows:
[0038] The current power frequency waveform is compared with the preset power frequency waveform at a critical moment. If the point on the current power frequency waveform coincides with the marked point on the preset power frequency waveform, then the current moment is a critical moment; otherwise, the current moment is a non-critical moment.
[0039] Optionally, the classification and sorting module classifies actions based on the difference between the capacitor voltage of the MMC submodule and a standard value, and the steps include:
[0040] The capacitor voltage deviation of each MMC submodule and / or the capacitor voltage imbalance within each MMC submodule are obtained based on the difference between the capacitor voltage of the MMC submodule and the standard value.
[0041] The levels are classified based on the capacitor voltage deviation and / or the capacitor voltage imbalance within each MMC submodule.
[0042] Action priority is classified based on the results of the aforementioned level classification.
[0043] Optionally, the classification and sorting module performs a non-recursive merge sort of the MMC submodules based on the capacitor voltage of each MMC submodule in the modular multilevel converter, the steps of which include:
[0044] Construct multiple arrays using the capacitor voltages of each MMC submodule as elements;
[0045] 2 respectively 1 2 2 ……2 n The number of elements to be merged is determined by merging them level by level until they are merged into a single array. After each level of merging, the newly formed arrays are internally sorted according to the capacitor voltage.
[0046] Optionally, the execution module discharges or charges the corresponding MMC submodule capacitor based on the result of the non-recursive merge sort or action priority classification, the steps of which include:
[0047] Calculate the number of voltage levels N required at the next moment;
[0048] If the current moment is a critical moment, then the first N capacitors in the non-recursive merge sort result are selected for discharge or the last N capacitors are selected for charging.
[0049] If the current time is not a critical moment, then the first N capacitors in the discharge array are selected for discharge or the first N capacitors in the charging array are selected for charging.
[0050] Optionally, the execution module calculates the number of levels required for the next moment as follows:
[0051] The nearest level approximation algorithm is used to calculate the number of levels required for the next time step.
[0052] Optionally, before the execution module discharges or charges the corresponding MMC submodule capacitor based on the result of the non-recursive merge sort or action priority classification, it further includes:
[0053] Determine whether the capacitor of the MMC submodule to be discharged or charged has been continuously charged or discharged within a preset number of control cycles before the current time. If so, perform non-recursive merging and sorting to reconfirm the MMC submodule to be discharged or charged.
[0054] Optionally, before the execution module discharges or charges the corresponding MMC submodule capacitor based on the result of the non-recursive merge sort or action priority classification, it further includes: setting a capacitor identifier for each MMC submodule;
[0055] The process of discharging or charging the corresponding MMC submodule capacitor based on the results of the non-recursive merge sorting or action priority classification further includes: verifying the capacitor identifier; if the capacitor identifier is correct, then initiating the discharge or charging of the determined MMC submodule capacitor; if the capacitor identifier is incorrect, then reporting an error.
[0056] Optionally, the charging array in the classification and sorting module includes: multiple charging subarrays with priorities, which are executed sequentially according to their priorities; the discharging array includes: multiple discharging arrays with priorities, which are executed sequentially according to their priorities.
[0057] Optionally, before the classification and sorting module determines whether the current moment is a critical moment, it further includes:
[0058] A feature array is set for the capacitors of each MMC submodule. The feature array is used to store the capacitor identifier, capacitor voltage deviation, capacitor voltage imbalance within the MMC submodule, and priority classification of the next action.
[0059] Optionally, the feature array in the classification and sorting module is also used to store the charging and discharging status identifiers within a preset number of control cycles.
[0060] Optionally, the capacitor identifier in the classification and sorting module includes a capacitor serial number, a prefix identifier, and a suffix identifier, wherein the prefix identifier is the first element of the feature array, and the suffix identifier is the last element of the feature array.
[0061] Thirdly, the present invention also provides a computing device, comprising: at least one processor and a memory;
[0062] The memory is used to store one or more programs;
[0063] When the one or more programs are executed by the one or more processors, a fast and efficient MMC submodule capacitor voltage balance control method as described above is implemented.
[0064] Fourthly, this application also provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed, it implements a fast and efficient MMC submodule capacitor voltage balance control method as described above.
[0065] Compared with the prior art, the beneficial effects of the present invention are as follows:
[0066] This invention provides a fast and efficient method and system for controlling the capacitor voltage balance of MMC submodules, comprising: determining whether the current moment is a critical moment; if so, performing non-recursive merging and sorting of the MMC submodules based on the capacitor voltage of each MMC submodule in the modular multilevel converter; if not, classifying the action priority based on the difference between the capacitor voltage of the MMC submodule and the standard value; and discharging or charging the corresponding MMC submodule based on the result of the non-recursive merging and sorting or the action priority classification. This invention performs non-recursive merging and sorting at critical moment points and action priority classification at non-critical moment points, eliminating the need for complete sorting of all submodules for each level calculation, and only performing a small number of sortings at a few key waveform nodes, significantly reducing computation time and computational complexity, effectively improving the computation speed of the MMC submodule capacitor voltage equalization algorithm, and reducing the storage space requirement. Attached Figure Description
[0067] Figure 1 This is a flowchart of the fast and efficient MMC submodule capacitor voltage balance control method proposed in this invention;
[0068] Figure 2 This is a schematic diagram of the marker points on the preset power frequency waveform proposed in this invention;
[0069] Figure 3 This is a schematic diagram of the structure of the feature array proposed in this invention;
[0070] Figure 4 This is a flowchart of the non-recursive merge sorting of the MMC submodules proposed in this invention;
[0071] Figure 5 This is a schematic diagram illustrating the principle of the non-recursive merge sort proposed in this invention;
[0072] Figure 6 The flowchart of the non-recursive merge sort pseudocode proposed in this invention is shown.
[0073] Figure 7 This is a schematic diagram of the process for classifying action priorities based on the difference between the capacitor voltage of the MMC submodule and the standard value, as proposed in this invention.
[0074] Figure 8 This is a schematic diagram showing the results of the action priority classification proposed in this invention;
[0075] Figure 9 The present invention proposes Figure 1 A detailed step diagram of step S2;
[0076] Figure 10 This is a schematic diagram illustrating the application steps of the fast and efficient MMC submodule capacitor voltage balance control method proposed in this invention.
[0077] Figure 11 This is a schematic diagram illustrating the application process of the fast and efficient MMC submodule capacitor voltage balance control method proposed in this invention.
[0078] Figure 12 This is a schematic diagram of a common MMC structure proposed in this invention;
[0079] Figure 13 The MMC structure proposed in this invention features dual capacitors within its submodule.
[0080] Figure 14 This is a schematic diagram of the fast and efficient MMC submodule capacitor voltage balance control system proposed in this invention.
[0081] Figure 15 This is a schematic diagram of the electronic device proposed in this invention. Detailed Implementation
[0082] This invention proposes a fast and efficient method and system for controlling the capacitor voltage balance of MMC submodules. It performs non-recursive merging and sorting at critical time points and classifies actions by priority at non-critical time points. It does not require a complete sorting of all submodules in the bridge arm for each level calculation. It only performs a small number of sorting operations at a few key waveform nodes, reducing the computation time and complexity of traditional sorting and effectively improving the computation speed of the MMC submodule capacitor voltage equalization algorithm while reducing the storage space requirement.
[0083] Example 1:
[0084] A fast and efficient method for capacitor voltage balance control in MMC submodules, such as... Figure 1 As shown, it includes the following steps S1 and S2.
[0085] S1: Determine whether the current moment is a critical moment. If so, perform non-recursive merging and sorting of the MMC sub-modules based on the capacitor voltage of each MMC sub-module in the modular multilevel converter. If not, classify the action priority based on the difference between the capacitor voltage of the MMC sub-module and the standard value.
[0086] S2: Discharge or charge the corresponding MMC submodule capacitor based on the results of the non-recursive merge sorting or action priority classification.
[0087] In a further preferred embodiment, the specific steps for determining whether the current time is a critical moment point in step S1 are as follows:
[0088] The current power frequency waveform is compared with the preset power frequency waveform at a critical moment. If the point on the current power frequency waveform coincides with the marked point on the preset power frequency waveform, then the current moment is a critical moment; otherwise, the current moment is a non-critical moment.
[0089] For example, when entering a control cycle, the system first checks whether the current control cycle number corresponds to a preset value (i.e., a marker point). The preset value might correspond to eight data points on the power frequency cycle waveform, such as zero-crossing points, peak points, and half-peak points. Figure 2 The value shown is used. If the current power frequency waveform corresponds to the preset value, then the current moment is a critical moment.
[0090] In a further preferred embodiment, the step of determining whether the current moment is a critical moment point also includes:
[0091] A feature array is set for the capacitors of each MMC submodule. The feature array is used to store the capacitor identifier, capacitor voltage deviation, capacitor voltage imbalance within the MMC submodule, and priority classification of the next action.
[0092] In a further preferred embodiment, the feature array also includes a charging / discharging status indicator for a preset number of control cycles, which can be used to determine whether the corresponding capacitor is continuously discharging or continuously charging within the preset number of control cycles.
[0093] The capacitor identifier includes a capacitor serial number, a prefix identifier, and a suffix identifier, wherein the prefix identifier is the first element of the feature array, and the suffix identifier is the last element of the feature array.
[0094] Based on the above principles, in this embodiment, as follows: Figure 3 As shown, the elements of each feature array are as follows: prefix identifier, capacitor number, submodule capacitor voltage detection value, submodule capacitor voltage deviation, submodule internal capacitor voltage imbalance, previous three charge / discharge status indicators, next action priority, and suffix identifier. For example, an array structure of "000010101102+2400100111" means that the current detected voltage value of the first submodule capacitor in the first column of the first row is 102V, the voltage deviation is 2V, the submodule internal capacitor voltage imbalance is 4V, there has been one charge / discharge action in the previous three control cycles, and the next action priority is 0. An array structure of "000010102098 -2400001111" means that the current detected voltage value of the second submodule capacitor in the first column of the first row is 98V, the voltage deviation is -2V, the submodule internal capacitor voltage imbalance is 4V, there have been 0 charge / discharge actions in the previous three control cycles, and the next action priority is 1.
[0095] In a further preferred embodiment, step S1 involves performing a non-recursive merge sort of the MMC submodules based on the capacitor voltage of each MMC submodule in the modular multilevel converter, as follows: Figure 4 As shown, the steps include:
[0096] S1a1: Construct multiple arrays using the capacitor voltages of each MMC submodule as elements;
[0097] S1a2: 2 respectively 1 2 2 ……2 n To merge, merge the elements level by level down until they are merged into a single array, such as... Figure 5 As shown, after each level is merged, the newly formed arrays at each level are internally sorted according to the capacitor voltage.
[0098] In step S1a1, an array is constructed using the capacitor voltage of each MMC submodule as its element. Each MMC submodule corresponds to one array, resulting in multiple arrays for multiple MMC submodules. A temporary array Tmp can also be created to store intermediate results. The initial sequence merge length Len is set to 1 (meaning merging starts from one adjacent element), and an array V is created to store the current capacitor voltage values of all submodules.
[0099] In step S1a2, as Figure 6As shown, when the length of a block in the temporary array Tmp is less than the length of the sorted array, the initial index of each block is assigned, and the index of the first element (first order) and the index of the last element (last order) of two adjacent blocks are assigned and compared, and the temporary array is updated. Len is doubled each time (Len = Len × 2) to control the merging level (e.g., Len = 1 merges two adjacent elements, Len = 2 merges four adjacent elements, and so on), until Len ≥ the length of the array V composed of the capacitor voltages of the sub-modules. Inside each merged level, the array is traversed, and each time two adjacent sub-arrays are processed ([ i , i +Len-1] and [ i +Len, i The subarray elements are compared and stored in Tmp in ascending order, with out-of-bounds cases handled (e.g., if the subarray exceeds the array range, the remaining elements are copied directly). Finally, the merged result in Tmp is copied back to the corresponding position in the original array, completing the merging of the current level.
[0100] In a further preferred embodiment, the action priority classification based on the difference between the capacitor voltage of the MMC submodule and the standard value in step S1 is as follows: Figure 7 As shown, the steps include:
[0101] S1b1: Obtain the capacitor voltage deviation of each MMC submodule and / or the capacitor voltage imbalance within each MMC submodule based on the difference between the capacitor voltage of the MMC submodule and the standard value.
[0102] S1b2: Classify the levels based on the capacitor voltage deviation and / or the capacitor voltage imbalance within each MMC submodule;
[0103] S1b3: Classify action priorities based on the results of the aforementioned level classification.
[0104] The result of the action priority classification includes a charging array InChar and a discharging array DisChar. The charging array includes at least one level, and the discharging array includes at least one level. Each level includes at least one MMC submodule.
[0105] In this embodiment, as Figure 8 As shown, the charging array includes multiple charging subarrays with priorities, which are executed sequentially according to their priorities; the discharging array includes multiple discharging arrays with priorities, which are executed sequentially according to their priorities. For example, based on the capacitor voltage deviation V... xThe values of categorize the number of charging groups and the number of discharging groups. In this embodiment, the charging group includes: fifth charging priority, fourth charging priority, third charging priority, second charging priority, and first charging priority; the discharging group includes: fifth discharging priority, fourth discharging priority, third discharging priority, second discharging priority, and first discharging priority; among them, the first charging priority and the first discharging priority have the highest level and are executed first.
[0106] This step first checks the voltage of each submodule capacitor and places the corresponding capacitor number into the corresponding priority array. At the same time, it updates the action priority of each submodule capacitor.
[0107] In further optimized solutions, such as Figure 9 As shown, step S2 includes the following steps S21~S23:
[0108] S21: Calculate the number of levels N required at the next moment;
[0109] S22: If the current moment is a critical moment, then select the first N capacitors in the result of the non-recursive merge sort to discharge or the last N capacitors to charge.
[0110] S23: If the current time is not a critical time point, then select the first N capacitors in the discharge array to discharge or the first N capacitors in the charging array to charge.
[0111] In a further preferred embodiment, step S21 specifically involves using the nearest level approximation algorithm to calculate the number of levels required at the next moment, determining the corresponding power frequency cycle timing based on the direction of the bridge arm current or the control cycle timing, and determining the charging and discharging requirements and the required number of levels N.
[0112] In a further preferred embodiment, step S2 is preceded by:
[0113] Determine whether the capacitor of the MMC submodule to be discharged or charged has been continuously charged or discharged within a preset number of control cycles before the current time. If so, perform non-recursive merging and sorting to reconfirm the MMC submodule to be discharged or charged.
[0114] In a further preferred embodiment, before step S2, the method further includes: setting a capacitor identifier for the capacitor of each MMC submodule; when discharging or charging the corresponding MMC submodule capacitor based on the result of the non-recursive merge sorting or action priority classification, the method further includes checking the capacitor identifier; if the capacitor identifier is correct, the method starts discharging or charging the determined MMC submodule capacitor; if the capacitor identifier is incorrect, an error is reported.
[0115] The application process of the MMC submodule capacitor voltage balance control method based on fast classification and fast and efficient sorting in this invention is as follows: Figure 10 and 11 As shown, it includes the following steps 1 to 4.
[0116] Step 1: Set a feature array (Array) for the capacitors of each MMC submodule.
[0117] The feature array includes capacitor identifier, submodule capacitor voltage deviation, submodule internal capacitor voltage imbalance, next action priority classification, and submodule capacitor voltage detection value.
[0118] Step 2: Based on the above-mentioned MMC submodule capacitor voltage balance control method, determine the MMC submodule to be discharged or charged.
[0119] Step 3: Calculate the switching state of the MMC submodule to be discharged or charged, and output the corresponding control signal.
[0120] Step 4: Execute the control signal and update the feature array, then repeat step 2.
[0121] like Figure 12 This is an MMC converter valve comprising multiple MMC submodules, including a three-phase unit. Here, 100 is the positive DC bus, 200 is the negative DC bus, 300 is phase A of the three-phase unit, 400 is phase B of the three-phase unit, 500 is phase C of the three-phase unit, 310 is the upper arm of phase A, 320 is the lower arm of phase A, 410 is the upper arm of phase B, 420 is the lower arm of phase B, 510 is the upper arm of phase C, and 520 is the lower arm of phase C. Each arm includes multiple MMC submodules. a Taking 200 sub-modules in each bridge arm as an example, such as Figure 13 As shown, each submodule has two submodule capacitors and eight IGBT modules, namely the first capacitor C1 and the second capacitor C2. Each IGBT module includes one IGBT and one anti-parallel diode. T1~T8 are IGBTs, and D1~D8 are anti-parallel diodes. h As a controllable power electronic switch, which can be a thyristor, and K is a bypass switch, each bridge arm has 400 submodule capacitors that need to be sorted. Considering the NLM method, it would require 200 sorting operations within one power frequency cycle. Considering bubble sort, it would require a worst-case scenario of 16.0 × 10⁻⁶ operations within one power frequency cycle. 6 This involves several sorting operations; considering Shell sort, the worst-case scenario requires 32 × 10 sorting operations within one power frequency cycle. 6 This involves several sorting operations; considering quicksort, the worst-case scenario requires 16.0 × 10^6 operations per power frequency cycle. 6This involves several sorting operations; considering merge sort, the worst-case scenario requires 0.72 × 10^6 sorting operations within one power frequency cycle. 6 The sorting operation requires at least 0.028 × 10^6 operations per power frequency cycle, considering the fast positioning and fast sorting method designed in this invention. 6 This involves a single sorting operation, significantly reducing computational load and complexity, and improving sorting efficiency.
[0122] Example 2:
[0123] Based on the same inventive concept, this invention also provides a fast and efficient MMC submodule capacitor voltage balance control system, such as... Figure 14 As shown, it includes:
[0124] Classification and sorting module: Used to determine whether the current moment is a critical moment point. If so, the MMC sub-modules in the modular multilevel converter are sorted non-recursively based on the capacitor voltage of each MMC sub-module. If not, the action priority is classified based on the difference between the capacitor voltage of the MMC sub-module and the standard value.
[0125] Execution module: used to discharge or charge the capacitors of the corresponding MMC submodule based on the results of the non-recursive merge sorting or action priority classification;
[0126] The result of the action priority classification includes a charging array and a discharging array. The charging array includes at least one level, and the discharging array includes at least one level. Each level includes at least one MMC submodule.
[0127] In a further preferred embodiment, the specific steps for the classification and sorting module to determine whether the current moment is a critical moment point are as follows:
[0128] The current power frequency waveform is compared with the preset power frequency waveform at a critical moment. If the point on the current power frequency waveform coincides with the marked point on the preset power frequency waveform, then the current moment is a critical moment; otherwise, the current moment is a non-critical moment.
[0129] In a further preferred embodiment, the classification and sorting module classifies actions based on the difference between the capacitor voltage of the MMC submodule and a standard value, and the steps include:
[0130] The capacitor voltage deviation of each MMC submodule and / or the capacitor voltage imbalance within each MMC submodule are obtained based on the difference between the capacitor voltage of the MMC submodule and the standard value.
[0131] The levels are classified based on the capacitor voltage deviation and / or the capacitor voltage imbalance within each MMC submodule.
[0132] Action priority is classified based on the results of the aforementioned level classification.
[0133] In a further preferred embodiment, the classification and sorting module performs a non-recursive merge sort of the MMC submodules based on the capacitor voltage of each MMC submodule in the modular multilevel converter, the steps of which include:
[0134] Construct multiple arrays using the capacitor voltages of each MMC submodule as elements;
[0135] 2 respectively 1 2 2 ……2 n The number of elements to be merged is determined by merging them level by level until they are merged into a single array. After each level of merging, the newly formed arrays are internally sorted according to the capacitor voltage.
[0136] In a further preferred embodiment, the execution module discharges or charges the corresponding MMC submodule capacitor based on the result of the non-recursive merge sort or action priority classification, the steps of which include:
[0137] Calculate the number of voltage levels N required at the next moment;
[0138] If the current moment is a critical moment, then the first N capacitors in the non-recursive merge sort result are selected for discharge or the last N capacitors are selected for charging.
[0139] If the current time is not a critical moment, then the first N capacitors in the discharge array are selected for discharge or the first N capacitors in the charging array are selected for charging.
[0140] In a further preferred embodiment, the execution module calculates the number of levels required for the next moment as follows:
[0141] The nearest level approximation algorithm is used to calculate the number of levels required for the next time step.
[0142] In a further preferred embodiment, before the execution module discharges or charges the corresponding MMC submodule capacitor based on the result of the non-recursive merge sort or action priority classification, it further includes:
[0143] Determine whether the capacitor of the MMC submodule to be discharged or charged has been continuously charged or discharged within a preset number of control cycles before the current time. If so, perform non-recursive merging and sorting to reconfirm the MMC submodule to be discharged or charged.
[0144] In a further preferred embodiment, before the execution module discharges or charges the corresponding MMC submodule capacitor based on the result of the non-recursive merge sort or action priority classification, it further includes: setting a capacitor identifier for each MMC submodule.
[0145] The process of discharging or charging the corresponding MMC submodule capacitor based on the results of the non-recursive merge sorting or action priority classification further includes: verifying the capacitor identifier; if the capacitor identifier is correct, discharging or charging is initiated for the determined MMC submodule capacitor; if the capacitor identifier is incorrect, an error is reported. In a further preferred embodiment, the charging array in the classification and sorting module includes: multiple charging subarrays with priorities, which are executed sequentially according to priority; the discharging array includes: multiple discharge arrays with priorities, which are executed sequentially according to priority.
[0146] In a further preferred embodiment, before the classification and sorting module determines whether the current moment is a critical moment, it also includes:
[0147] A feature array is set for the capacitors of each MMC submodule. The feature array is used to store the capacitor identifier, capacitor voltage deviation, capacitor voltage imbalance within the MMC submodule, and priority classification of the next action.
[0148] In a further preferred embodiment, the feature array in the classification and sorting module is also used to store the charge and discharge status identifiers within a preset number of control cycles.
[0149] In a further preferred embodiment, the capacitor identifier in the classification and sorting module includes a capacitor serial number, a prefix identifier, and a suffix identifier, wherein the prefix identifier is the first element of the feature array, and the suffix identifier is the last element of the feature array.
[0150] Example 3
[0151] like Figure 15 As shown, the present invention also provides an electronic device, which may be a computer device, a microcontroller device, a smart mobile device, etc. The electronic device in this embodiment may include a processor, a memory, a transceiver component, etc. The memory, processor, and transceiver component are connected via a bus; the memory can be used to store executable programs, and an exemplary executable program may include instructions; the processor is used to execute the instructions stored in the memory. The memory can also be used to store data, which can be accessed and / or modified when instructions are executed.
[0152] The processor may be a Central Processing Unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It is the computing and control core of the terminal, and it is suitable for implementing one or more instructions. Specifically, it is suitable for loading and executing one or more instructions in the storage medium to implement the corresponding method flow or corresponding function, so as to realize the steps of the fast and efficient MMC submodule capacitor voltage balance control method in the above embodiments.
[0153] Example 4
[0154] Based on the same inventive concept, this invention also provides a readable storage medium, specifically an electronic device readable storage medium (Memory). This readable storage medium is a memory device within an electronic device used to store programs and data. It is understood that the storage medium here can include both built-in storage media within the electronic device and extended storage media supported by the electronic device. The storage medium provides storage space, which stores the terminal's operating system. Furthermore, this storage space also stores one or more instructions suitable for loading and execution by a processor. These instructions can be one or more executable programs (including program code). It should be noted that the storage medium here can be high-speed RAM or non-volatile memory, such as at least one disk storage device. Loading and executing one or more instructions stored in the storage medium by the processor can implement the steps of a fast and efficient MMC submodule capacitor voltage balancing control method described in the above embodiments.
[0155] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0156] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0157] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0158] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0159] The above are merely embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of the claims of the present invention pending approval.
Claims
1. A fast and efficient method for controlling capacitor voltage balance in MMC submodules, characterized in that, include: Determine whether the current moment is a critical moment. If so, perform non-recursive merging and sorting of the MMC sub-modules based on the capacitor voltage of each MMC sub-module in the modular multilevel converter. If not, classify the action priority based on the difference between the capacitor voltage of the MMC sub-module and the standard value. Based on the results of the non-recursive merge sorting or action priority classification, the corresponding MMC submodule capacitors are discharged or charged. The result of the action priority classification includes a charging array and a discharging array. The charging array includes at least one level, and the discharging array includes at least one level. Each level includes at least one MMC submodule capacitor. The specific steps for determining whether the current moment is a critical moment point are as follows: The current power frequency waveform is compared with the preset power frequency waveform at the key moment. If the point on the current power frequency waveform coincides with the marked point on the preset power frequency waveform, then the current moment is a key moment; otherwise, the current moment is a non-key moment. The action priority classification based on the difference between the capacitor voltage of the MMC submodule and the standard value includes the following steps: The capacitor voltage deviation of each MMC submodule and / or the capacitor voltage imbalance within each MMC submodule are obtained based on the difference between the capacitor voltage of the MMC submodule and the standard value. The levels are classified based on the capacitor voltage deviation and / or the capacitor voltage imbalance within each MMC submodule. Based on the results of the aforementioned grading, action priorities are classified; The non-recursive merge sorting of the MMC submodules based on the capacitor voltage of each MMC submodule in the modular multilevel converter includes the following steps: Construct multiple arrays using the capacitor voltages of each MMC submodule as elements; 2 respectively 1 2 2 ……2 n The number of elements to be merged is determined by merging them level by level until they are merged into a single array. After each level of merging, the newly formed arrays are internally sorted according to the capacitor voltage. The steps of discharging or charging the corresponding MMC submodule capacitor based on the results of the non-recursive merge sort or action priority classification include: Calculate the number of voltage levels N required at the next moment; If the current moment is a critical moment, then the first N capacitors in the non-recursive merge sort result are selected for discharge or the last N capacitors are selected for charging. If the current time is not a critical moment, then the first N capacitors in the discharge array are selected for discharge or the first N capacitors in the charging array are selected for charging.
2. The fast and efficient MMC submodule capacitor voltage balance control method according to claim 1, characterized in that, The specific steps for calculating the number of levels required for the next moment are as follows: The nearest level approximation algorithm is used to calculate the number of levels required for the next time step.
3. The fast and efficient MMC submodule capacitor voltage balance control method according to claim 1, characterized in that, Before discharging or charging the corresponding MMC submodule capacitor based on the result of the non-recursive merge sort or action priority classification, the following steps are also included: Determine whether the capacitor of the MMC submodule to be discharged or charged has been continuously charged or discharged within a preset number of control cycles before the current time. If so, perform non-recursive merging and sorting to reconfirm the MMC submodule to be discharged or charged.
4. The fast and efficient MMC submodule capacitor voltage balance control method according to claim 1, characterized in that, Before discharging or charging the capacitors of the corresponding MMC submodules based on the results of the non-recursive merge sorting or action priority classification, the method further includes: setting a capacitor identifier for the capacitors of each MMC submodule. The process of discharging or charging the corresponding MMC submodule capacitor based on the results of the non-recursive merge sorting or action priority classification also includes checking the capacitor identifier. If the capacitor identifier is correct, the discharge or charging of the determined MMC submodule capacitor is initiated; if the capacitor identifier is incorrect, an error is reported.
5. The fast and efficient MMC submodule capacitor voltage balance control method according to claim 1, characterized in that, The charging array includes multiple charging subarrays with priorities, which are executed sequentially according to their priorities; the discharging array includes multiple discharging arrays with priorities, which are executed sequentially according to their priorities.
6. The fast and efficient MMC submodule capacitor voltage balance control method according to claim 1, characterized in that, Before determining whether the current moment is a critical moment, the following steps are also included: A feature array is set for the capacitors of each MMC submodule. The feature array is used to store the capacitor identifier, capacitor voltage deviation, capacitor voltage imbalance within the MMC submodule, and priority classification of the next action.
7. The fast and efficient MMC submodule capacitor voltage balance control method according to claim 6, characterized in that, The feature array is also used to store the charging and discharging status identifiers within a preset number of control cycles.
8. The fast and efficient MMC submodule capacitor voltage balance control method according to claim 6, characterized in that, The capacitor identifier includes a capacitor serial number, a prefix identifier, and a suffix identifier, wherein the prefix identifier is the first element of the feature array, and the suffix identifier is the last element of the feature array.
9. A fast and efficient MMC submodule capacitor voltage balancing control system, characterized in that, include: Classification and sorting module: Used to determine whether the current moment is a critical moment point. If so, the MMC sub-modules in the modular multilevel converter are sorted non-recursively based on the capacitor voltage of each MMC sub-module. If not, the action priority is classified based on the difference between the capacitor voltage of the MMC sub-module and the standard value. Execution module: used to discharge or charge the capacitors of the corresponding MMC submodule based on the results of the non-recursive merge sorting or action priority classification; The result of the action priority classification includes a charging array and a discharging array. The charging array includes at least one level, and the discharging array includes at least one level. Each level includes at least one MMC submodule capacitor. The specific steps for the classification and sorting module to determine whether the current moment is a critical moment point are as follows: The current power frequency waveform is compared with the preset power frequency waveform at the key moment. If the point on the current power frequency waveform coincides with the marked point on the preset power frequency waveform, then the current moment is a key moment; otherwise, the current moment is a non-key moment. The classification and sorting module classifies actions based on the difference between the capacitor voltage of the MMC submodule and a standard value, and the steps include: The capacitor voltage deviation of each MMC submodule and / or the capacitor voltage imbalance within each MMC submodule are obtained based on the difference between the capacitor voltage of the MMC submodule and the standard value. The levels are classified based on the capacitor voltage deviation and / or the capacitor voltage imbalance within each MMC submodule. Based on the results of the aforementioned grading, action priorities are classified; The classification and sorting module performs a non-recursive merge sort of the MMC submodules based on the capacitor voltage of each MMC submodule in the modular multilevel converter. The steps include: Construct multiple arrays using the capacitor voltages of each MMC submodule as elements; 2 respectively 1 2 2 ……2 n The number of elements to be merged is determined by merging them level by level until they are merged into a single array. After each level of merging, the newly formed arrays are internally sorted according to the capacitor voltage. The execution module discharges or charges the capacitors of the corresponding MMC submodules based on the results of the non-recursive merge sort or action priority classification, including the following steps: Calculate the number of voltage levels N required at the next moment; If the current moment is a critical moment, then the first N capacitors in the non-recursive merge sort result are selected for discharge or the last N capacitors are selected for charging. If the current time is not a critical moment, then the first N capacitors in the discharge array are selected for discharge or the first N capacitors in the charging array are selected for charging.
10. The fast and efficient MMC submodule capacitor voltage balance control system according to claim 9, characterized in that, The execution module calculates the number of levels required for the next moment as follows: The nearest level approximation algorithm is used to calculate the number of levels required for the next time step.
11. The fast and efficient MMC submodule capacitor voltage balance control system according to claim 9, characterized in that, Before the execution module discharges or charges the corresponding MMC submodule capacitor based on the result of the non-recursive merge sort or action priority classification, it also includes: Determine whether the capacitor of the MMC submodule to be discharged or charged has been continuously charged or discharged within a preset number of control cycles before the current time. If so, perform non-recursive merging and sorting to reconfirm the MMC submodule to be discharged or charged.
12. The fast and efficient MMC submodule capacitor voltage balance control system according to claim 9, characterized in that, Before the execution module discharges or charges the corresponding MMC submodule capacitor based on the result of the non-recursive merge sorting or action priority classification, it also includes: setting a capacitor identifier for each MMC submodule. The process of discharging or charging the corresponding MMC submodule capacitor based on the results of the non-recursive merge sorting or action priority classification further includes: verifying the capacitor identifier; if the capacitor identifier is correct, then initiating the discharge or charging of the determined MMC submodule capacitor; if the capacitor identifier is incorrect, then reporting an error.
13. The fast and efficient MMC submodule capacitor voltage balance control system according to claim 9, characterized in that, The classification and sorting module includes a charging array comprising multiple charging subarrays with priorities, which are executed sequentially according to their priorities; the discharging array comprises multiple discharging arrays with priorities, which are executed sequentially according to their priorities.
14. The fast and efficient MMC submodule capacitor voltage balance control system according to claim 9, characterized in that, Before the classification and sorting module determines whether the current moment is a critical moment point, it also includes: A feature array is set for the capacitors of each MMC submodule. The feature array is used to store the capacitor identifier, capacitor voltage deviation, capacitor voltage imbalance within the MMC submodule, and priority classification of the next action.
15. The fast and efficient MMC submodule capacitor voltage balance control system according to claim 14, characterized in that, The feature array in the classification and sorting module is also used to store the charge and discharge status identifiers within a preset number of control cycles.
16. The fast and efficient MMC submodule capacitor voltage balance control system according to claim 14, characterized in that, The capacitor identifier in the classification and sorting module includes a capacitor serial number, a prefix identifier, and a suffix identifier, wherein the prefix identifier is the first element of the feature array, and the suffix identifier is the last element of the feature array.
17. A computer device, characterized in that, include: At least one processor and memory; The memory and processor are connected via a bus; The memory is used to store one or more programs; When the one or more programs are executed by the at least one processor, a fast and efficient MMC submodule capacitor voltage balance control method as described in any one of claims 1 to 8 is implemented.
18. A computer-readable storage medium, characterized in that, It contains an executable program, which, when executed, implements the fast and efficient MMC submodule capacitor voltage balance control method as described in any one of claims 1 to 8.
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