Low-working-voltage AlScN ferroelectric capacitance memory based on stress regulation and control and preparation method thereof

Abstract

The invention provides a low-working-voltage AlScN ferroelectric capacitor memory based on stress regulation and control and a preparation method thereof. The preparation method comprises the following steps: S1, cleaning and drying a silicon wafer substrate; s2, depositing a bottom metal film with a first thickness on the silicon wafer substrate; s3, growing an AlScN thin film with a second thickness on the bottom layer metal thin film, wherein the bottom layer metal thin film with the first thickness induces the AlScN thin film with the second thickness to be in a tensile strain state; s4, depositing a top metal film with a third thickness on the AlScN film; s5, photoetching patterning is carried out on the top layer metal thin film to obtain a hard mask protection layer; and S6, etching the top metal film with the hard mask protective layer, so that the method has the advantages of good film quality, high residual polarization value, excellent retention characteristic and the like while realizing low working voltage, and has great application potential in practical application of the ferroelectric capacitor memory.

Description

Technical Field

[0001] This invention relates to the field of ferroelectric memories, and in particular to a low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation and its fabrication method. Background Technology

[0002] Ferroelectric capacitive memory (FCM) is a non-volatile memory device that utilizes the spontaneous polarization properties of ferroelectric materials to achieve data storage and retrieval. Due to its advantages such as low power consumption, high-speed read / write, strong radiation resistance, and excellent durability, it has extremely broad application prospects in aerospace electronics, IoT devices, and artificial intelligence edge computing. As the core storage medium of FCM, the performance of the ferroelectric material directly determines key indicators such as read / write speed, operating voltage, and retention rate.

[0003] Aluminum scandium nitrogen (AlScN) is a novel ferroelectric material whose ferroelectricity originates from significant lattice ion shifts, thus exhibiting a remanent polarization value (P0.05) far exceeding that of traditional ferroelectric materials. r >100μC / cm 2 The high remanent polarization provides a larger signal window and stronger noise immunity for memory devices. In addition, AlScN materials also possess good thermal stability (Tc>1000℃), high breakdown field strength, and compatibility with CMOS processes, thus making them very promising for applications in ferroelectric capacitor memories.

[0004] However, a higher coercive electric field ( E c A coercive electric field (>4 MV / cm) has always been a key issue limiting the application of AlScN-based ferroelectric capacitor memories. The coercive electric field is the minimum electric field required to drive the ferroelectric material to flip, i.e., the minimum voltage required for the memory device to operate. A high coercive electric field means that the device needs a higher operating voltage to access data; however, using a higher operating voltage will lead to a decrease in the reliability of the dielectric layer, ultimately resulting in a significant reduction in device lifetime. At the same time, a high operating voltage increases the integration difficulty and power consumption of the device fabrication. Therefore, reducing the coercive electric field of AlScN has become a research hotspot in recent years.

[0005] Researchers have proposed methods to reduce the coercive electric field of AlScN, such as increasing the Sc doping content, selecting electrodes that match the AlScN lattice constant, and annealing. However, these methods often increase the complexity of the fabrication process and inevitably affect other key performance characteristics, such as remanent polarization, leakage current, and breakdown field strength. Specifically, increasing the Sc doping content effectively reduces the coercive electric field by lowering the ferroelectric domain flipping barrier, but this also reduces the remanent polarization and increases fabrication complexity. Annealing improves the AlScN lattice structure through post-deposition annealing, thereby reducing the coercive electric field. However, high-temperature annealing introduces interfacial reactions and element diffusion, impacting device reliability. Electrode manipulation optimizes interface quality by using electrodes that closely match the AlScN lattice, thus reducing the coercive electric field. Electrode selection requires a balance between lattice and thermal expansion coefficient matching, as well as compatibility with downstream processes, significantly limiting its application.

[0006] Therefore, there is an urgent need for a method that is simple to manufacture and can effectively reduce the coercive electric field of AlScN while maintaining its original excellent performance, so as to promote the application of AlScN-based ferroelectric capacitor memory. Summary of the Invention

[0007] The purpose of this invention is to provide a stress-controlled low-operating-voltage AlScN ferroelectric capacitor memory and its fabrication method. It can achieve low operating voltage while having advantages such as good film quality, high residual polarization, and excellent retention characteristics. It has great application potential in the practical application of ferroelectric capacitor memory and provides a feasible solution for realizing high-performance ferroelectric non-volatile memory with low operating voltage and excellent reliability.

[0008] To achieve the above objectives, firstly, this technical solution provides a method for fabricating a low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation, comprising the following steps: S1: Clean and dry the silicon wafer substrate; S2: Deposit a first-thickness bottom metal film on a silicon substrate; S3: An AlScN film of a second thickness is grown on the bottom metal film, and the bottom metal film of the first thickness induces the AlScN film of the second thickness to be in a tensile strain state. S4: Deposit a top metal film of the third thickness on the AlScN film; S5: Photolithographic patterning is performed on the top metal film to obtain a hard mask protective layer; S6: Etch the top metal film with a hard mask protection layer.

[0009] This method provides a simple process that effectively reduces the coercive electric field of AlScN while maintaining its excellent original performance, thereby fabricating a low-operating-voltage AlScN ferroelectric capacitor memory with simple processing, low operating voltage, and high remanent polarization. The method precisely controls the strain of the AlScN film by adjusting the thickness of the bottom metal film to induce it into a tensile strain state, effectively reducing the coercive electric field. A top metal film is deposited on the AlScN film to form a metal / ferroelectric / metal MFM capacitor structure, which is then patterned using photolithography and etching processes to form independent device modules.

[0010] The low-operating-voltage AlScN ferroelectric capacitor memory fabricated using this method maintains a large polarization window while operating at a low voltage. Specifically, the thicker underlying metal film causes the AlScN film deposited on it to exhibit negative strain, i.e., tensile stress, which lowers the flip barrier of the AlScN film and thus reduces the coercive electric field. Simultaneously, the AlScN film on the thicker underlying metal film has better quality, along with... c The shaft has better crystal quality and a larger residual polarization, thus resulting in a larger storage window.

[0011] In step S1, the silicon substrate is ultrasonically cleaned with acetone, isopropanol, and deionized water for 1-20 minutes, and then dried with a nitrogen gun. The cleanliness of the silicon substrate directly affects the deposition quality of subsequent thin films and device performance. Step S1 removes organic contaminants and particulate impurities from the surface of the silicon substrate through cleaning and drying.

[0012] It should be noted that the reason for cleaning the silicon substrate with acetone first and then with isopropanol is that acetone is soluble in isopropanol solution, so the excess acetone can be removed by isopropanol, thus avoiding any impact on the performance of the silicon substrate.

[0013] In step S2, the metal material of the bottom metal film is selected from one of Pt, Mo, and TiN. Pt, Mo, and TiN have good electrical conductivity, which can effectively transmit electrical signals to ensure the stability of the device's electrical performance; moreover, these metals have strong chemical stability, and are not prone to chemical reactions with the surrounding environment or other materials during subsequent thin film deposition, photolithography, and etching processes, which can reduce performance degradation caused by interface reactions; and they have good compatibility with the silicon substrate and AlScN film, forming a stable interface and avoiding problems such as film peeling or performance degradation caused by poor interface bonding, thus providing a reliable foundation for device fabrication. In this scheme, a bottom metal film is deposited on the silicon substrate as the bottom electrode.

[0014] In step S2, the first thickness is 10~100 nm. Preferably, the first thickness is 10~50 nm, because an excessively thin bottom metal film has poor quality, while an excessively thick metal film is not conducive to the miniaturization of the memory.

[0015] In step S2, the method for depositing the underlying metal film is any one of sputtering, molecular beam epitaxy, or electron beam evaporation.

[0016] In a preferred embodiment, the metal material of the underlying metal film is selected as Pt, and the underlying metal film is deposited by electron beam evaporation. In some embodiments, the deposition vacuum degree is 1~5×10⁻⁶. -5 The growth temperature of sccm is 200~400℃, the evaporation rate range is 0.1~3 Å / s, the electron beam current range is 20~200 mA, and the deposition time is 5~20 min.

[0017] In step S3, an AlScN film is deposited on the underlying metal film. The second thickness of the AlScN film is 10-150 nm. This is because an excessively thin AlScN film has poor crystal quality and high leakage current, while an excessively thick AlScN film has a high turn-on voltage. Preferably, the second thickness of the deposited AlScN film is 50 nm.

[0018] In some embodiments, an AlScN thin film is grown on an underlying metal film using any of the methods of sputtering, molecular beam epitaxy, or metal-organic chemical vapor deposition. Preferably, sputtering is used to grow the AlScN thin film on the underlying metal film.

[0019] In some embodiments, the Sc doping content in the AlScN thin film ranges from 10% to 35%. AlScN thin films with low Sc content will not exhibit ferroelectricity, while excessively high Sc content will result in low remanent polarization. Preferably, the Sc doping content in the AlScN thin film ranges from 20% to 30%.

[0020] It should be noted that the underlying metal film will generate certain internal stress during the deposition process due to the fabrication process (such as the sputtering power and working gas pressure of magnetron sputtering). This internal stress may be tensile stress or compressive stress. When AlScN film is grown on the underlying metal film, the internal stress of the underlying metal will be transferred to the AlScN film through the interface. At the same time, there is a difference in the lattice constant between the underlying metal and AlScN, and additional stress will be generated at the interface due to lattice mismatch. The superposition of these two stresses will jointly affect the strain state of the AlScN film.

[0021] It should be noted that the selection of the first thickness of the underlying metal film is as follows: Different thicknesses of bottom metal films are grown on silicon substrates, and AlScN films of the same thickness are grown on the bottom metal films. The strain state of the AlScN films is calculated using XRD material characterization technology. If the AlScN film exhibits tensile strain, the thickness is used as the first thickness.

[0022] In step S4, the third thickness of the top metal film is 10~100 nm. Preferably, the third thickness of the top metal film is 10~50 nm.

[0023] In step S4, the metal of the top metal film is Pt, Mo, or TiN. Preferably, the metal of the top metal film is Pt.

[0024] It should be noted that the metal materials of the top metal film and the bottom metal film can be different.

[0025] In step S4, the deposition process for depositing the top metal film on the AlScN film is selected from either sputtering molecular beam epitaxy or electron beam evaporation. Preferably, the deposition process for depositing the top metal film on the AlScN film is electron beam evaporation, with a deposition vacuum degree ranging from 1 to 5 × 10⁻⁶. -5 The growth temperature range is 200~400℃, the evaporation rate range is 0.1~3 Å / s, the electron beam current range is 20~200 mA, and the deposition time is 5~20 min.

[0026] This approach involves depositing an AlScN thin film on a bottom metal film, followed by a top metal film, to form a metal / ferroelectric / metal MFM capacitor structure. The MFM structure provides an efficient charge injection and extraction channel for the AlScN film. The bottom and top metal films, acting as electrodes, possess excellent conductivity, ensuring a uniform and efficient application of the external electric field across the AlScN ferroelectric layer. This allows the ferroelectric material to stably undergo polarization reversal, guaranteeing fast and reliable data writing and reading. This structure minimizes the contact resistance between the electrodes and the ferroelectric layer, reducing energy loss and contributing to the low-power characteristics of the device, aligning with the low operating voltage goal of this approach.

[0027] In step S5, photolithographic patterning is performed on the top metal film, and the photoresist formed by photolithography serves as a hard mask protective layer.

[0028] In some embodiments, the photoresist is at least one of 5350 and AZ1518.

[0029] In some embodiments, the thickness of the hard mask protective layer is 10~50nm.

[0030] In step S6, one or more etching processes, such as plasma etching, reactive ion etching, or ion beam etching, are used to etch the top metal film with a hard mask protective layer.

[0031] Preferably, plasma etching is used to etch the top metal film with a hard mask protective layer, wherein the Ar flow rate ranges from 1 to 100 sccm, the CHF3 flow rate ranges from 1 to 100 sccm, and the etching time is 5 to 10 min.

[0032] Secondly, this solution provides a stress-controlled low-operating-voltage AlScN ferroelectric capacitor memory, which is prepared according to the above-mentioned method for preparing a stress-controlled low-operating-voltage AlScN ferroelectric capacitor memory.

[0033] like Figure 1 As shown, the stress-controlled low-operating-voltage AlScN ferroelectric capacitor memory includes, from top to bottom, a top metal film, an AlScN film, a bottom metal film, and a silicon substrate, wherein a hard mask protective layer is provided on the top metal film, and the AlScN film is in a tensile strain state.

[0034] In some embodiments, the first thickness of the bottom metal film is 10-100 nm. Preferably, the first thickness is 10-50 nm; the second thickness of the AlScN film is 10-150 nm, and the thickness of the bottom metal film is adjusted so that the AlScN film is in a tensile strain state.

[0035] In some embodiments, the stress-regulated low-operating-voltage AlScN ferroelectric capacitor memory is a stand-alone MFM capacitor module.

[0036] Compared with existing technologies, this technical solution has the following characteristics and beneficial effects: This method first deposits a bottom metal film of a certain thickness, then deposits an AlScN film as a ferroelectric material. The AlScN film is under tensile strain by controlling the thickness of the bottom electrode. Finally, the top metal film is deposited to form a metal / ferroelectric material / metal (MFM) capacitor structure. Then, the structure is patterned and formed into independent device modules using photolithography, etching and other processes. Finally, an AlScN ferroelectric capacitor memory device with low coercivity electric field while maintaining a large storage window and retention characteristics is fabricated.

[0037] This invention features a simple fabrication process. By controlling the strain state as a key parameter, the AlScN thin film is subjected to tensile stress, significantly reducing the coercive electric field of the AlScN ferroelectric thin film and thus lowering the operating voltage of the AlScN ferroelectric capacitor memory. Simultaneously, this AlScN ferroelectric capacitor memory maintains high remanent polarization and excellent durability and retention characteristics. This invention achieves the fabrication of an AlScN ferroelectric capacitor memory with a simple process, low operating voltage, large storage window, and excellent retention and durability performance. Attached Figure Description

[0038] Figure 1 This is a schematic diagram of the structure of the stress-controlled low-operating-voltage AlScN ferroelectric capacitor memory provided in this solution.

[0039] Figure 2 This is a schematic diagram illustrating how the thickness of the underlying metal film, provided by this scheme, affects the residual strain of the AlScN film.

[0040] Figure 3 These are the IV curves of AlScN ferroelectric capacitor memories based on the stress state controlled by the thickness of different underlying metal films.

[0041] Figure 4 These are the PV curves of AlScN ferroelectric capacitor memories based on the stress state controlled by the thickness of different underlying metal films. Detailed Implementation

[0042] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention are within the scope of protection of the present invention.

[0043] Example 1: AlScN Ferroelectric Capacitor Memory under Tensile Stress Using a silicon wafer as the substrate, the silicon wafer was ultrasonically cleaned for 3 minutes each in acetone, isopropanol, and deionized water, and then dried with a nitrogen gun. A 50 nm bottom Pt metal film was grown on the silicon wafer substrate by electron beam evaporation. The sample was then placed on a substrate support in a magnetron sputtering reaction chamber, which was heated to 400°C. After pre-sputtering with a Sc-Al alloy target for 1 minute, the substrate was placed into the reaction chamber and deposited for 3 minutes to form a 100 nm thick AlScN film. A 50 nm thick top Pt metal film was then grown in situ on the uniformly grown AlScN film. Independent device modules were formed by overlay etching and ICP etching. The etching flow rate was 30 sccm; the BCl3 flow rate was 20 sccm; and the etching time was 1.5 min.

[0044] Comparative Example 1: AlScN Ferroelectric Capacitor Memory under Stress-Free Condition Using a silicon wafer as the substrate, the silicon wafer was ultrasonically cleaned for 3 minutes each in acetone, isopropanol, and deionized water, and then dried with a nitrogen gun. A 30 nm bottom Pt metal film was grown on the silicon wafer substrate by electron beam evaporation. The sample was then placed on a substrate support in a magnetron sputtering reaction chamber, which was heated to 400°C. After pre-sputtering with a Sc-Al alloy target for 1 minute, the substrate was placed in the reaction chamber and deposited for 3 minutes to form a 100 nm thick AlScN film. A 50 nm thick top Pt metal film was then grown in situ on the uniformly grown AlScN film. Independent device modules were formed by overlay etching and ICP etching. The etching flow rate was 30 sccm for Ar and 20 sccm for BCl3, and the etching time was 1.5 min.

[0045] Test Example 1 Prepare a stable testing room and an XRD diffractometer; place the devices from Example 1 and Comparative Example 1 on the testing stage, and connect the XRD diffractometer to the electrodes of the device under test to test its stress state. By comparing the positions of the (002) ferroelectric peaks and applying the Bragg diffraction equation to calculate its stress state, the following results are obtained: Figure 2 The diagram shows the effect of the thickness of the underlying metal film on the residual strain of the AlScN film. Figure 2 It can be seen that the embodiment is under tensile stress, while the comparative example is under stress-free conditions.

[0046] Prepare a stable testing room and a ferroelectric analysis instrument capable of providing bias voltage and measuring IV. Place the device under tensile stress (Example 1) and the device under normal stress-free condition (Comparative Example 1) on the testing table. Connect the ferroelectric analysis instrument to the electrodes of the device under test to measure its ferroelectric properties. One end of the instrument is connected to the top electrode of the device, and the other end is connected to the bottom electrode. Compare the differences in IV curves for different structures during the test. The results are as follows: Figure 3 The IV curves of AlScN ferroelectric capacitor memories under different underlying metal film thicknesses and stress states are shown. It can be seen that AlScN under tensile strain has a low coercive electric field.

[0047] Prepare a stable testing room and a ferroelectric analysis instrument capable of providing bias voltage and measuring PV. Place the device under tensile stress from Example 1 and the device under normal stress-free condition from Comparative Example 1 on the testing table. Connect the ferroelectric analysis instrument to the electrodes of the device under test to test its ferroelectric properties. One end of the instrument is connected to the top electrode of the device, and the other end is connected to the bottom electrode. Compare the differences in IV curves for different structures during the test. The results are as follows: Figure 4The PV curves of AlScN ferroelectric capacitor memories with different underlying metal film thicknesses and stress states are shown. It can be seen that the AlScN film under tensile strain maintains a large remanent polarization value while reducing the coercive electric field.

[0048] Those skilled in the art should understand that the technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments have been described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0049] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for fabricating a low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation, characterized in that, Includes the following steps: S1: Clean and dry the silicon wafer substrate; S2: Deposit a first-thickness bottom metal film on a silicon substrate; S3: An AlScN film of a second thickness is grown on the bottom metal film, and the bottom metal film of the first thickness induces the AlScN film of the second thickness to be in a tensile strain state. S4: Deposit a top metal film of the third thickness on the AlScN film; S5: Photolithographic patterning is performed on the top metal film to obtain a hard mask protective layer; S6: Etch the top metal film with a hard mask protection layer.

2. The method for fabricating a low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation according to claim 1, characterized in that, The metal material of the underlying metal thin film is selected from one of Pt, Mo, or TiN.

3. The method for fabricating a low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation according to claim 1, characterized in that, The first thickness is 10~100nm.

4. The method for fabricating a low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation according to claim 1, characterized in that, The underlying metal film was selected as Pt, and electron beam evaporation was used to deposit the underlying metal film at a deposition vacuum of 1~5×10⁻⁶. -5 The growth temperature of sccm is 200~400℃, the evaporation rate range is 0.1~3 Å / s, the electron beam current range is 20~200 mA, and the deposition time is 5~20 min.

5. The method for fabricating a low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation according to claim 1, characterized in that, The second thickness of the AlScN film is 10~150 nm.

6. The method for fabricating a low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation according to claim 1, characterized in that, The Sc doping content in AlScN thin films ranges from 10% to 35%.

7. The method for fabricating a low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation according to claim 1, characterized in that, The third thickness of the top metal film is 10~100nm, and the metal of the top metal film is Pt, Mo or TiN metal.

8. The method for fabricating a low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation according to claim 1, characterized in that, The deposition process for the top metal film on the AlScN thin film is electron beam evaporation, with a deposition vacuum level ranging from 1 to 5 × 10⁻⁶. -5 The growth temperature range is 200~400℃, the evaporation rate range is 0.1~3 Å / s, the electron beam current range is 20~200 mA, and the deposition time is 5~20 min.

9. The method for fabricating a low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation according to claim 1, characterized in that, Different thicknesses of bottom metal films are grown on silicon substrates, and AlScN films of the same thickness are grown on the bottom metal films. The strain state of the AlScN films is calculated using XRD material characterization technology. If the AlScN film exhibits tensile strain, the thickness is used as the first thickness.

10. A low-operating-voltage AlScN ferroelectric capacitor memory based on stress regulation, characterized in that, It includes, from top to bottom, a top metal film, an AlScN film, a bottom metal film, and a silicon substrate, wherein the top metal film has a hard mask protective layer, and the AlScN film is in a tensile strain state.

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