IO processing method and device of RAID controller, equipment and medium

By introducing a preset high-speed cache and IO aggregation and distribution components into the RAID controller, read and write operations are processed differently. By leveraging the fast response characteristics of the high-speed cache and the optimized address processing through aggregation, the problem of IO processing latency in traditional RAID controllers is solved, thereby improving the overall IO processing efficiency and performance.

CN120891982APending Publication Date: 2025-11-04JINAN MAIWEI INTELLIGENT TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202511234442.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-31
Publication Date
2025-11-04

AI Technical Summary

Technical Problem

In traditional RAID controllers, due to the complexity of cache operations, I/O processing latency is relatively high, and CPU performance limits I/O processing efficiency and performance, especially with increased I/O latency under full cache hit conditions.

Method used

It employs a pre-set high-speed cache, IO aggregation component, and IO splitting component to differentiate processing based on the target operation type of the IO processing request. Read operations utilize the high-speed cache's fast response characteristics through splitting, while write operations optimize address processing through aggregation, making reasonable use of cache resources and writing directly to the hard disk when performance conditions are met.

Benefits of technology

It improves the IO processing efficiency and performance of the RAID controller, reduces hard drive access latency, optimizes read and write operation efficiency, balances cache resource usage, avoids cache bottlenecks, and makes full use of RAID striping characteristics.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses an IO (Input / Output) processing method and device of an RAID (Redundant Array of Independent Disks) controller, equipment and a medium, relates to the technical field of computers, is applied to the RAID controller comprising a preset cache, an IO aggregation component and an IO shunting component, and is connected with a hard disk; the method comprises the following steps: determining an operation type corresponding to an IO processing request issued by a host, if the operation type is a read operation type, controlling an IO shunting component to shunt the request according to response capability information of a preset cache to the request to obtain a shunting read request, and moving to-be-read data corresponding to the shunting read request in the preset cache and a hard disk to the host; if the type is the write operation type, controlling the IO aggregation component to aggregate the requested to-be-written address, if the aggregated address meets a preset performance condition, moving to-be-written data carried by the request to a hard disk, and if the aggregated address does not meet the preset performance condition, moving the to-be-written data carried by the request to a preset cache. And the IO processing efficiency performance of the RAID controller is improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computers, in particular to an IO processing method and device of a RAID controller, equipment and a medium. BACKGROUND

[0002] RAID (Redundant Arrays of Independent Disks, i.e. redundant disk array) is a data storage technology designed to provide data redundancy, improve performance, or achieve both. It achieves the intended goal by distributing data across multiple disk drives and using different data distribution strategies. RAID technology was initially mainly used for traditional mechanical hard drives (Hard Disk Drive, i.e. HDD), and now RAID technology has become a basic technology in the field of data storage. With the continuous rise of hard disk capacity and storage demand, traditional RAID technology is gradually facing serious challenges in performance and reliability. Therefore, the industry has introduced cache technology to improve the overall performance of the RAID system. Specifically, a high-speed cache (usually DRAM) is integrated in the RAID controller to temporarily store frequently accessed data, thereby speeding up read and write operations.

[0003] In the traditional design of a RAID controller, due to the complexity of cache operations, the implementation of RAID Cache management is usually completed by software running on the CPU (Central Processing Unit) inside the RAID controller. However, the delay of CPU processing is large, which causes the IO (Input / Output) delay to be affected by CPU performance when the host data is written to the Cache or the Cache is fully hit when the host reads, thereby increasing the overall IO processing delay.

[0004] It can be seen that how to improve the efficiency and performance of IO processing of a RAID controller is a problem that needs to be solved by those skilled in the art. SUMMARY

[0005] The purpose of the embodiments of the present application is to provide an IO processing method, device, equipment and medium of a RAID controller to improve the efficiency and performance of IO processing of the RAID controller. The specific scheme is as follows:

[0006] In a first aspect, an IO processing method of a RAID controller is disclosed, applied to the RAID controller, the RAID controller comprising a preset cache, an IO aggregation component and an IO shunting component, and the RAID controller being connected with each hard disk; the method comprising:

[0007] receive an IO processing request issued by a host, and determine a target operation type corresponding to the IO processing request;

[0008] if the target operation type is a read operation type, control the IO shunting component to shunt the IO processing request according to response capability information of the preset cache to a read request, and move to-be-read data corresponding to the read request in the preset cache and the hard disk to the host;

[0009] if the target operation type is a write operation type, control the IO aggregation component to aggregate a to-be-written address of the IO processing request to obtain an aggregated address, if the aggregated address meets a preset performance condition, move to-be-written data carried by the IO processing request to the hard disk, and if the aggregated address does not meet the preset performance condition, move the to-be-written data to the preset cache.

[0010] Optionally, the preset cache comprises a cache management component; and the response capability information of the preset cache to the IO processing request comprises:

[0011] matching, by the cache management component, a to-be-read address corresponding to the IO processing request with a storage address in the preset cache;

[0012] if the storage address comprises an address matching the to-be-read address, generating response capability information indicating that the preset cache can respond to all the IO processing requests;

[0013] if the storage address comprises an address partially matching the to-be-read address, generating response capability information indicating that the preset cache can respond to part of the IO processing requests;

[0014] if the storage address does not comprise an address matching the to-be-read address, generating response capability information indicating that the preset cache cannot respond to the IO processing request.

[0015] Optionally, the RAID controller further comprises a firmware IO processing component, and the preset cache comprises a cache IO processing component; and the control of the IO shunting component to shunt the IO processing request according to the response capability information of the preset cache to a read request comprises:

[0016] If the response capability information of the preset cache to the IO processing request indicates that the preset cache can respond to all the IO processing requests, the IO shunting component is controlled to determine all the IO processing requests as first shunted read requests, and the firmware IO processing component is controlled to transfer the first shunted read requests to the cache IO processing component;

[0017] If the response capability information of the preset cache to the IO processing request indicates that the preset cache can respond to part of the IO processing requests, the IO shunting component is controlled to shunt the IO processing requests to obtain first sub-shunted read requests that the preset cache can respond to and second sub-shunted read requests that the preset cache cannot respond to, and the firmware IO processing component is controlled to transfer the first sub-shunted read requests to the cache IO processing component and transfer the second sub-shunted read requests to the hard disk.

[0018] If the response capability information of the preset cache to the IO processing request indicates that the preset cache cannot respond to the IO processing request, the IO shunting component is controlled to determine all the IO processing requests as second shunted read requests, and the firmware IO processing component is controlled to transfer the second shunted read requests to the hard disk.

[0019] Optionally, the RAID controller further comprises a firmware IO processing component; and the if the aggregated address meets the preset performance condition, the to-be-written data carried by the IO processing request is moved to the hard disk, comprising:

[0020] determining whether the aggregated address meets a preset continuous condition;

[0021] If the aggregated address meets the preset continuous condition, it is determined whether the aggregated address meets a preset full stripe condition; the preset full stripe condition is that a data amount corresponding to the aggregated address fills a complete RAID stripe.

[0022] If the aggregated address meets the preset full stripe condition, the IO shunting component is controlled to send the IO processing request to the firmware IO processing component, and the firmware IO processing component is controlled to move the to-be-written data carried by the IO processing request to the hard disk.

[0023] If the aggregated address does not meet the preset full stripe condition, the step of receiving the IO processing request issued by the host is re-jumped until the aggregated address meets the preset full stripe condition.

[0024] Optionally, after the determining whether the aggregated address meets the preset continuous condition, the method further comprises:

[0025] If the aggregated address does not satisfy the preset continuity condition, it is determined whether the aggregated address satisfies a preset threshold condition; the preset threshold condition is that a data volume corresponding to the aggregated address is greater than a preset threshold value;

[0026] If the aggregated address satisfies the preset threshold condition, the IO shunting component is controlled to send the IO processing request to the firmware IO processing component, and the firmware IO processing component is controlled to move to-be-written data carried by the IO processing request to the hard disk.

[0027] Optionally, the moving of the to-be-written data carried by the IO processing request to the preset cache includes:

[0028] The free space of the preset cache is determined, and it is determined whether the free space is less than a data write space required by the IO processing request;

[0029] If the free space is not less than the data write space required by the IO processing request, the to-be-written data carried by the IO processing request is moved to the preset cache.

[0030] Optionally, after the determination of whether the free space is less than the data write space required by the IO processing request, the method further includes:

[0031] If the free space is less than the data write space required by the IO processing request, a disk flushing operation or a cleaning operation is performed on the data cached in the preset cache, and then the step of determining the free space of the preset cache is re-executed.

[0032] In a second aspect, the application discloses an IO processing device of a RAID controller, which is applied to the RAID controller, the RAID controller includes a preset cache, an IO aggregation component and an IO shunting component, and the RAID controller is connected with each hard disk; the device includes:

[0033] A request receiving module is configured to receive an IO processing request issued by a host, and determine a target operation type corresponding to the IO processing request;

[0034] A first processing module is configured to, if the target operation type is a read operation type, control the IO shunting component to shunt the IO processing request according to response capability information of the preset cache on the IO processing request, so as to obtain a shunted read request, and move to-be-read data corresponding to the shunted read request in the preset cache and the hard disk to the host.

[0035] The second processing module is configured to, if the target operation type is a write operation type, control the IO aggregation component to aggregate a to-be-written address of the IO processing request to obtain an aggregated address, and if the aggregated address meets a preset performance condition, move to-be-written data carried by the IO processing request to the hard disk, and if the aggregated address does not meet the preset performance condition, move the to-be-written data carried by the IO processing request to the preset cache.

[0036] In a third aspect, the present application discloses an electronic device, comprising:

[0037] A memory is configured to store a computer program.

[0038] A processor is configured to execute the computer program to implement the steps of the IO processing method of the RAID controller disclosed above.

[0039] In a fourth aspect, the present application discloses a computer readable storage medium configured to store a computer program, wherein the computer program is executed by a processor to implement the steps of the IO processing method of the RAID controller disclosed above.

[0040] Therefore, the present application is applied to the RAID controller, the RAID controller comprises a preset cache, an IO aggregation component and an IO shunt component, and the RAID controller is connected with each hard disk; the method comprises the following steps: receiving an IO processing request issued by a host, and determining a target operation type corresponding to the IO processing request; if the target operation type is a read operation type, controlling the IO shunt component to shunt the IO processing request according to response capability information of the preset cache to the IO processing request, to obtain a shunted read request, and moving to-be-read data corresponding to the shunted read request in the preset cache and the hard disk to the host; if the target operation type is a write operation type, controlling the IO aggregation component to aggregate a to-be-written address of the IO processing request to obtain an aggregated address, and if the aggregated address meets a preset performance condition, moving to-be-written data carried by the IO processing request to the hard disk, and if the aggregated address does not meet the preset performance condition, moving the to-be-written data carried by the IO processing request to the preset cache.

[0041] The beneficial effects are: when the application is applied to the RAID controller, the target operation type of the IO processing request is distinguished as a read operation or a write operation and is processed respectively, the pertinence of the IO processing is improved; for the read operation, the IO shunting component is controlled to shunt according to the response capability information of the preset cache to the IO processing request, the fast response characteristic of the preset cache can be utilized, the direct access to the hard disk is reduced, the moving speed of the to-be-read data to the host is accelerated, and the read operation efficiency is improved; for the write operation, the to-be-written address of the IO processing request is aggregated by the IO aggregation component to obtain an aggregated address, the processing of the continuous address can be optimized, and the number of scattered IOs is reduced; meanwhile, according to whether the aggregated address meets the preset performance condition (the preset full strip condition or the preset threshold condition), the to-be-written data is moved to the hard disk or the preset cache, the resource use of the preset cache and the write operation efficiency can be reasonably balanced, unnecessary cache occupation is avoided, the RAID strip characteristic can be utilized or the cache bottleneck can be avoided when the performance condition is met, the write operation performance is improved, and then the IO processing efficiency and the performance of the RAID controller are improved as a whole. BRIEF DESCRIPTION OF DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0043] Figure 1 A specific conventional RAID controller schematic diagram provided for the embodiments of the present application;

[0044] Figure 2 An IO processing method flowchart of a RAID controller provided for the embodiments of the present application;

[0045] Figure 3 A specific read operation type processing schematic diagram provided for the embodiments of the present application;

[0046] Figure 4 A specific write operation type processing schematic diagram provided for the embodiments of the present application;

[0047] Figure 5 A specific HDD RAID controller schematic diagram provided for the embodiments of the present application;

[0048] Figure 6 A specific disk array schematic diagram provided for the embodiments of the present application;

[0049] Figure 7 A first specific write operation completion schematic diagram provided for the embodiments of the present application;

[0050] Figure 8 A second specific write operation completion diagram provided for the embodiment of the present application;

[0051] Figure 9 A RAID controller IO processing device structure diagram provided for the embodiment of the present application;

[0052] Figure 10 An electronic device structure diagram provided for the embodiment of the present application. DETAILED DESCRIPTION

[0053] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0054] RAID is a data storage technology designed to provide data redundancy, improve performance, or achieve both. It achieves the intended goal by distributing data across multiple disk drives and using different data distribution strategies. Initially, RAID technology was mainly used for traditional mechanical hard drives. Currently, RAID technology has become a basic technology in the field of data storage. With the continuous rise of hard disk capacity and storage demand, traditional RAID technology gradually faces severe challenges in performance and reliability. Therefore, the industry introduces cache technology to improve the overall performance of the RAID system. Specifically, a high-speed cache is integrated in the RAID controller to temporarily store frequently accessed data, thereby speeding up read and write operations.

[0055] In the traditional design of the RAID controller, due to the complexity of cache operations, the implementation of RAID Cache management is usually completed by software running on the CPU inside the RAID controller. However, the delay of CPU processing is large, which causes the IO delay to be affected by the CPU performance in the case of full cache hit when the host writes data to the cache or the host reads, thereby increasing the overall IO processing delay.

[0056] As Figure 1A specific traditional RAID controller diagram is shown, the IO interface unit, DMA controller, DRAM controller and RAID hardware acceleration unit are all hardware modules. The firmware program running on the CPU realizes the host IO processing module, Cache management unit, RAID IO management unit and disk IO management unit. The host IO is received by the hardware IO management unit, and then sent to the IO processing module of the CPU. The IO processing module sends the IO information to the Cache management unit, which completes the foreground Cache operations such as Cache hit query, insertion, update, invalidation, etc. Then, the IO processing module uses the DMA controller to move the host IO data to the DRAM (write Cache IO), or moves the data from the DRAM to the host (read IO Cache hit) according to the result of the Cache operation. In the IO processing process of the traditional RAID controller, the whole process is dominated by the firmware running on the CPU, and multiple firmware and hardware interaction processes are required during the process, which leads to a large delay in the processing flow of a single IO, and the Cache cannot fully play the role of improving the IO performance. Moreover, due to the limited performance of the CPU, the number of host IOs that can be processed per second is also limited by the performance of the CPU, and usually only tens to hundreds of IOPS (Input / Output Operations Per Second) can be achieved.

[0057] The terms "comprising" and "having", and any variations of "comprising" and "having" in the specification and above drawings of the present application, are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but can include steps or units not listed.

[0058] In order for those skilled in the art to better understand the present application, the present application will be further described in detail below in conjunction with the drawings and specific embodiments.

[0059] Next, the IO processing scheme of the RAID controller provided by the embodiment of the present application is described in detail. Figure 2 The IO processing method of the RAID controller provided by the embodiment of the present application is applied to the RAID controller, the RAID controller includes a preset cache, an IO aggregation component and an IO shunt component, and the RAID controller is connected with each hard disk; the method comprises:

[0060] Step S11: receiving the IO processing request issued by the host, and determining the target operation type corresponding to the IO processing request.

[0061] The RAID controller comprises an IO interface component, a preset cache, an IO aggregation component, an IO distribution component and a CPU, wherein the CPU comprises a firmware IO processing component, the preset cache comprises a cache IO processing component and a cache management component, specifically, the output end of the IO interface component is connected with the input end of the IO aggregation component, the output end of the IO aggregation component is connected with the input end of the IO distribution component, the output end of the IO distribution component is connected with the input end of the firmware IO processing component in the CPU and the input end of the cache IO processing component in the preset cache respectively, and the output end of the cache IO processing component is connected with the input end of the cache management component.

[0062] The IO interface component receives an IO processing request issued by a host and determines a target operation type corresponding to the IO processing request, wherein the operation type corresponding to the IO processing request comprises a read operation request type and a write operation request type, when the operation type is the read operation request type, the corresponding data in the preset cache and / or the hard disk is moved to the host, and when the operation type is the write operation request type, the data in the host is moved to the preset cache and / or the hard disk.

[0063] In step S12, if the target operation type is the read operation type, the IO distribution component is controlled to distribute the IO processing request according to the response capability information of the preset cache to obtain a distributed read request, and the to-be-read data corresponding to the distributed read request in the preset cache and the hard disk is moved to the host.

[0064] When the target operation type is the read operation type, the response capability information of the preset cache to the IO processing request is acquired first, and then the IO distribution component is controlled to distribute the IO processing request according to the response capability information to obtain a distributed read request, for example, the response capability information indicates that the preset cache cannot currently respond to the IO processing request, so the IO processing request should not be distributed to the preset cache again, but should be distributed to the hard disk, that is, the purpose of distributing the IO processing request by the IO distribution component is to distribute the request that can be responded by the preset cache to the preset cache and distribute the request that cannot be responded by the preset cache to the hard disk.

[0065] In the embodiment, the preset cache includes a cache management component; the response capability information of the preset cache to the IO processing request is obtained by matching the to-be-read address corresponding to the IO processing request with the storage address in the preset cache by using the cache management component; if the storage address includes addresses matching all the to-be-read addresses, the response capability information of the preset cache responding to all the IO processing requests is generated; if the storage address includes addresses partially matching the to-be-read addresses, the response capability information of the preset cache responding to part of the IO processing requests is generated; if the storage address does not include addresses matching the to-be-read addresses, the response capability information of the preset cache not responding to the IO processing request is generated.

[0066] The to-be-read address corresponding to the IO processing request is matched with the storage address in the preset cache by using the cache management component, that is, the to-be-read address is queried in the storage address in the preset cache; if the storage address includes addresses matching all the to-be-read addresses, that is, all the to-be-read addresses are queried in the storage address in the preset cache, the response capability information of the preset cache responding to all the IO processing requests is generated, that is, Cache full hit is indicated; if the storage address includes addresses partially matching the to-be-read addresses, that is, part of the to-be-read addresses are queried in the storage address in the preset cache, the response capability information of the preset cache responding to part of the IO processing requests is generated, that is, Cache partial hit is indicated; if the storage address does not include addresses matching the to-be-read addresses, that is, no to-be-read address is queried in the storage address in the preset cache, the response capability information of the preset cache not responding to the IO processing request is generated, that is, Cache miss is indicated.

[0067] In the embodiment, the RAID controller further comprises a firmware IO processing component, and the preset cache comprises a cache IO processing component; the response capability information of the preset cache to the IO processing request is used to control the IO shunting component to shunt the IO processing request to obtain a shunted read request, which comprises: if the response capability information of the preset cache to the IO processing request indicates that the preset cache can respond to all the IO processing requests, then all the IO processing requests are determined as first shunted read requests, and the firmware IO processing component is controlled to transfer the first shunted read requests to the cache IO processing component; if the response capability information of the preset cache to the IO processing request indicates that the preset cache can respond to part of the IO processing requests, then the IO processing requests are shunted by the IO shunting component to obtain first sub-shunted read requests that can be responded by the preset cache and second sub-shunted read requests that cannot be responded by the preset cache, and the firmware IO processing component is controlled to transfer the first sub-shunted read requests to the cache IO processing component and the second sub-shunted read requests to the hard disk; if the response capability information of the preset cache to the IO processing request indicates that the preset cache cannot respond to the IO processing request, then all the IO processing requests are determined as second shunted read requests, and the firmware IO processing component is controlled to transfer the second shunted read requests to the hard disk.

[0068] For example Figure 3The specific read operation type processing diagram is shown. It should be noted that if it is a read operation, the address does not need to be aggregated by the reason IO aggregation component, that is, the IO aggregation component does not process it at this time. In the first case of the read operation, if the preset cache response capability information of the IO processing request indicates that the preset cache can respond to all IO processing requests, that is, Cache hit, the control IO shunt component determines all IO processing requests as first shunt read requests, and the firmware IO processing component transfers the first shunt read requests to the cache IO processing component, that is, all IO processing requests are processed by the preset cache. In the second case of the read operation, if the preset cache response capability information of the IO processing request indicates that the preset cache can respond to part of the IO processing request, the control IO shunt component shunts the IO processing request to obtain first sub-shunt read requests that the preset cache can respond to and second sub-shunt read requests that the preset cache cannot respond to, and the firmware IO processing component transfers the first sub-shunt read requests to the cache IO processing component and the second sub-shunt read requests to the hard disk, that is, the cache IO processing component in the preset cache processes the first sub-shunt read requests, moves the read data corresponding to the first sub-shunt read requests from the cache to the host, and the hard disk processes the second sub-shunt read requests, and moves the read data corresponding to the second sub-shunt read requests from the hard disk to the host. In the third case of the read operation, if the preset cache response capability information of the IO processing request indicates that the preset cache cannot respond to the IO processing request, the control IO shunt component determines all IO processing requests as second shunt read requests, and the firmware IO processing component transfers the second shunt read requests to the hard disk, that is, all read data corresponding to the second shunt read requests is read from the hard disk, and all read data is moved to the host. After the read data is moved to the host, the host read IO is completed.

[0069] When the to-be-read data corresponding to the split read request in the preset cache and the hard disk is moved to the host, first, the target node is selected from the IO processing nodes based on the node load balancing mechanism, and the target node is controlled to move the to-be-read data corresponding to the split read request in the preset cache and the hard disk to the host according to the SLBA (Start Logical Block Address, start logical block address) carried in the split read request. Specifically, in the process of moving the to-be-read data corresponding to the split read request in the preset cache and the hard disk to the host, first, the target node is selected from the IO processing nodes based on the node load balancing mechanism, which can reasonably allocate data moving tasks to nodes with lower load, avoid processing delay caused by too high load of a single node, improve the resource utilization and parallel processing capability of the entire IO processing node cluster, and enhance the stability and fault tolerance of the system. On this basis, the target node is controlled to move data according to the SLBA (start logical block address) carried in the split read request, which can rely on the precise positioning of the SLBA to the data storage location, reduce redundant operations in the data searching process, improve the accuracy and efficiency of data positioning and reading, shorten the transmission path and time of data from the storage medium to the host; in combination, the data transmission efficiency of the read operation is improved, the IO request response delay of the host is reduced, and the read processing performance of the RAID controller is further enhanced.

[0070] Step S13: If the target operation type is a write operation type, the IO aggregation component is controlled to aggregate the to-be-written address of the IO processing request to obtain an aggregated address, and if the aggregated address meets a preset performance condition, the to-be-written data carried by the IO processing request is moved to the hard disk, and if the aggregated address does not meet the preset performance condition, the to-be-written data carried by the IO processing request is moved to the preset cache.

[0071] If the target operation type is a write operation type, the IO aggregation component is controlled to aggregate the to-be-written address of the IO processing request to obtain an aggregated address. It can be understood that the aggregated request is a request that is not currently responded, which can be a real-time received request or a request accumulated for a period of time, that is, as long as the request is not currently responded, it will be aggregated together, which can be simultaneous aggregation or individual aggregation over a period of time.

[0072] In the embodiment, the RAID controller further comprises a firmware IO processing component; and the moving, if the aggregated address meets the preset performance condition, of the to-be-written data carried by the IO processing request to the hard disk comprises: judging whether the aggregated address meets a preset continuity condition; if the aggregated address meets the preset continuity condition, judging whether the aggregated address meets a preset full stripe condition; the preset full stripe condition is that a data amount corresponding to the aggregated address fills a complete RAID stripe; if the aggregated address meets the preset full stripe condition, controlling the IO shunting component to send the IO processing request to the firmware IO processing component, and controlling the firmware IO processing component to move the to-be-written data carried by the IO processing request to the hard disk; and if the aggregated address does not meet the preset full stripe condition, returning to the step of receiving the IO processing request issued by the host until the aggregated address meets the preset full stripe condition.

[0073] In the first specific embodiment of moving the to-be-written data to the hard disk, after the to-be-written addresses of the requests that are not currently responded are aggregated, it is judged whether the aggregated address meets a preset continuity condition; if the aggregated address meets the preset continuity condition, it is judged whether the aggregated address meets a preset full stripe condition, and the preset full stripe condition is that a data amount corresponding to the aggregated address fills a complete RAID stripe; if the aggregated address meets the preset full stripe condition, that is, the data amount corresponding to the aggregated address fills the complete RAID stripe, the IO shunting component is controlled to send the IO processing request to the firmware IO processing component, and the firmware IO processing component is controlled to move the to-be-written data carried by the IO processing request to the hard disk; and if the aggregated address does not meet the preset full stripe condition, returning to the step of receiving the IO processing request issued by the host until the aggregated address meets the preset full stripe condition, that is, if the aggregated address is continuous, when the data amount of the aggregated address is not large enough, the subsequent received requests are aggregated to increase the data amount corresponding to the aggregated address until the preset full stripe condition is met. By judging whether the aggregated address meets the preset continuity condition first, and further judging whether the condition meeting the continuity condition meets the preset full stripe condition (the data amount fills the complete RAID stripe), the IO processing request that is continuous and can fill the complete RAID stripe can be directly written to the hard disk, the parallel storage characteristics of the RAID stripe are fully utilized, the additional overhead of the check information calculation is reduced, and the writing efficiency is improved. For the condition meeting the continuity condition but not meeting the full stripe condition, by waiting for more IO requests to be aggregated until the condition is met, the frequent access of the scattered IO to the hard disk is reduced, and the performance loss of the hard disk is reduced.

[0074] In the embodiment, after judging whether the aggregated address meets the preset continuous condition, the method further comprises: if the aggregated address does not meet the preset continuous condition, judging whether the aggregated address meets a preset threshold condition; the preset threshold condition is that a data amount corresponding to the aggregated address is greater than a preset threshold; if the aggregated address meets the preset threshold condition, controlling the IO shunting component to send the IO processing request to the firmware IO processing component, and controlling the firmware IO processing component to move the to-be-written data carried by the IO processing request to the hard disk.

[0075] In the second specific embodiment of moving the to-be-written data to the hard disk, if the aggregated address does not meet the preset continuous condition, it is judged whether the aggregated address meets a preset threshold condition, that is, whether a data amount corresponding to the aggregated address is greater than a preset threshold; if yes, it is indicated that the preset threshold condition is met; if no, it is indicated that the preset threshold condition is not met; if the aggregated address meets the preset threshold condition, the IO shunting component is controlled to send the IO processing request to the firmware IO processing component, and the firmware IO processing component is controlled to move the to-be-written data carried by the IO processing request to the hard disk.

[0076] For the case that the continuous condition is not met, by judging whether the preset threshold condition (the data amount is greater than the preset threshold) is met, the IO with a large data amount is directly written into the hard disk, so that the IO of this type can be prevented from occupying the cache space, the waste of cache resources and the operation overhead of subsequent cache data landing are reduced, the processing path of the IO request is optimized as a whole through the hierarchical judgment and the targeted processing strategy, the utilization of cache resources and the hard disk writing efficiency are balanced, and the overall IO processing performance of the RAID controller is improved.

[0077] In the embodiment, the moving the to-be-written data carried by the IO processing request to the preset cache comprises: determining an idle space of the preset cache, and judging whether the idle space is less than a data writing space required by the IO processing request; if the idle space is not less than the data writing space required by the IO processing request, the to-be-written data carried by the IO processing request is moved to the preset cache.

[0078] For example Figure 4The specific write operation type processing diagram is shown. When the aggregated address does not meet the preset performance condition, that is, the aggregated address does not meet the preset continuous condition and does not meet the preset threshold condition, the IO processing request carrying the to-be-written data is moved to the preset cache according to the free space state of the preset cache. Specifically, the IO shunt component transfers the IO processing request to the cache IO processing component. The cache IO processing component performs a cache hit query operation, generates a cache update and a cache insertion operation according to the query result, thereby determining the free space of the preset cache, and judging whether the free space is less than the data write space required by the IO processing request, that is, whether the cache has enough free space to perform the insertion operation, that is, the write operation. If the free space is not less than the data write space required by the IO processing request, the IO processing request carrying the to-be-written data is moved to the preset cache.

[0079] In the embodiment, after determining whether the free space is less than the data write space required by the IO processing request, the method further includes: if the free space is less than the data write space required by the IO processing request, performing a disk writing operation or a cleaning operation on the data cached in the preset cache, and then jumping back to the step of determining the free space of the preset cache.

[0080] If the free space is less than the data write space required by the IO processing request, the cache IO processing component returns error feedback information to the IO shunt component, and the IO shunt component transfers the error feedback information to the firmware IO processing component. The firmware IO processing component starts the cache disk writing or cleaning operation, and waits for sufficient cache free space, so that the firmware IO processing component completes the data moving operation from the host to the cache.

[0081] Therefore, the application is applied to the RAID controller, the RAID controller includes a preset cache, an IO aggregation component and an IO shunting component, and the RAID controller is connected with each hard disk; the method includes the following steps: receiving an IO processing request issued by a host, and determining a target operation type corresponding to the IO processing request; if the target operation type is a read operation type, then according to response capability information of the preset cache to the IO processing request, the IO shunting component is controlled to shunt the IO processing request to obtain a shunted read request, and the preset cache, the hard disk and the to-be-read data corresponding to the shunted read request in the hard disk are moved to the host; if the target operation type is a write operation type, then the IO aggregation component is controlled to aggregate a to-be-written address of the IO processing request to obtain an aggregated address, if the aggregated address meets a preset performance condition, then the to-be-written data carried by the IO processing request is moved to the hard disk, and if the aggregated address does not meet the preset performance condition, then the to-be-written data carried by the IO processing request is moved to the preset cache.

[0082] The application is applied to the RAID controller, the target operation type of the IO processing request is distinguished as a read operation or a write operation and is processed respectively, the pertinence of IO processing is improved, for the read operation, the IO shunting component is controlled to shunt according to the response capability information of the preset cache to the IO processing request, the fast response characteristic of the preset cache can be utilized, direct access to the hard disk is reduced, the moving speed of the to-be-read data to the host is accelerated, and the read operation efficiency is improved, for the write operation, the to-be-written address of the IO processing request is aggregated by the IO aggregation component to obtain an aggregated address, the processing of continuous addresses can be optimized, and the number of scattered IOs is reduced, meanwhile, according to whether the aggregated address meets a preset performance condition (a preset full strip condition or a preset threshold condition), the to-be-written data is moved to the hard disk or the preset cache, the resource use of the preset cache and the write operation efficiency can be reasonably balanced, unnecessary cache occupation is avoided, when the performance condition is met, the hard disk is directly written into, the RAID strip characteristic can be utilized or the cache bottleneck can be avoided, the write operation performance is improved, and then the IO processing efficiency and performance of the RAID controller are improved as a whole.

[0083] The following is an example of the application applied to the RAID controller Figure 5The application is described in detail with reference to a specific HDD RAID controller schematic diagram. The RAID controller comprises an IO interface component, a preset cache, an IO aggregation component, an IO shunting component, and a CPU. The CPU comprises a firmware IO processing component. The preset cache comprises a cache IO processing component and a cache management component. Specifically, the output end of the IO interface component is connected to the input end of the IO aggregation component. The output end of the IO aggregation component is connected to the input end of the IO shunting component. The output end of the IO shunting component is connected to the input end of the firmware IO processing component in the CPU and the input end of the cache IO processing component in the preset cache. The output end of the cache IO processing component is connected to the input end of the cache management component. 1) The IO interface component is responsible for interfacing with the host and receiving IO read / write operations sent by the host. 2) The IO aggregation component is effective for write IO only and is responsible for analyzing the continuity of a series of IO addresses issued by the host and aggregating continuous write IO into a single large IO to be sent to the IO shunting component for processing. Write IO is not processed and is directly sent to the IO shunting component for processing. 3) The IO shunting component is responsible for shunting read / write IO sent by the host according to conditions and sending the IO to the software IO processing component on the CPU or the Cache IO processing component implemented by hardware for further processing. 4) The cache IO processing component is responsible for processing the flow of write IO from the host to the Cache or IO operations in which the read IO data from the host is completely hit in the Cache. If an exception occurs when processing write IO, such as insufficient Cache space, the IO exception is fed back to the IO shunting component, which re-dispatches the IO to the firmware IO processing component. 5) The firmware IO processing component is responsible for processing other IO types that cannot be processed by the Cache IO processing component, including write IO that bypasses the Cache and directly lands on the disk, IO that reaches the full strip write condition of IO aggregation, IO that occurs when the Cache IO processing component writes IO and the Cache space is insufficient, and IO in which the read data is not completely hit in the Cache, including all-miss and partial-miss IO. 6) The cache management component is a hardware component responsible for Cache management operations, including Cache hit query, Cache insertion, Cache update, Cache invalidation operation, and Cache locking and unlocking.

[0084] The software and hardware IO shunting mechanism specifically refers to sending IO to the software IO processing component on the CPU or the Cache IO processing component implemented by hardware for processing according to the different types of host IO, such as read / write IO, the continuity of IO, whether the IO request addresses continuously issued by the host are continuous, and the state of the Cache. The implementation of IO shunting is realized by the hardware IO shunting component and includes two specific embodiments of IO shunting.

[0085] The first shunting embodiment is foreground write IO shunting strategy. The shunting strategy shunts the write IO issued by the host according to the setting parameters: 1. RAID stripe size. When the single write IO or the multiple continuous write IO (collected by the IO collection component) issued by the host meets the condition of full stripe of the RAID group, the IO is directly shunted to the firmware IO processing component on the CPU and bypasses the write Cache, directly performs the RAID calculation and writes into the disk. Otherwise, the IO is processed by the Cache IO processing component. 2. Cache bypass threshold. When the size of the single IO or the continuous IO issued by the host exceeds the threshold, the IO is directly shunted to the software IO processing component on the CPU and bypasses the write Cache, directly performs the RAID calculation and writes into the disk. Otherwise, the IO is processed by the Cache IO processing component. The parameter value of the Cache bypass threshold is less than or equal to the RAID stripe size.

[0086] The second shunting method is Cache state shunting strategy: 1. For read IO, the shunting is performed according to the Cache hit query result, which is divided into Cache full hit or non-full hit (including partial hit and full miss). For the Cache full hit IO, the Cache IO processing component is used for processing. For the non-full hit IO, the firmware IO processing component is used for processing. 2. For write IO, whether the Cache free space meets the Cache insertion requirement is analyzed, which is divided into meeting the insertion requirement and not meeting the insertion requirement. When the Cache free space meets the insertion requirement, the Cache IO processing component is used for processing, and the host data is written into the Cache. When the insertion requirement is not met, it means that the current Cache is full and cannot insert new data. At this time, the IO is transferred to the firmware IO processing component, the firmware IO processing component starts the Cache data landing operation, and waits until the Cache has enough free space to perform the insertion operation, and then the firmware writes the IO data into the Cache.

[0087] Next, the setting process of the foreground write IO shunting strategy parameters is described. Taking a RAID 5 disk array as an example, assuming that the array is composed of 5 hard disks, one stripe has 4 data blocks and one check block, one stripe component size is 256 kB, and one stripe has 1024 kB of data, as shown in a specific disk array diagram Figure 6 At this time, the RAID stripe size needs to be set to 1024 kB, and the Cache bypass threshold can be set to be less than or equal to the RAID stripe size, for example, 256 kB. According to the above setting parameters, for the write IO of the host, the first shunting strategy is first performed. The following describes the specific shunting method according to the IO issued by the host:

[0088] 1. When the host issues a single write IO less than or equal to 256 kB, the size of the IO is not greater than the Cache bypass threshold, the IO is shunted to the Cache IO processing component for completion, and the data is written into the Cache of the RAID system.

[0089] 2. When the host issues a single write IO greater than 256 kB, the size of the IO is greater than the Cache bypass threshold, the IO is shunted to the firmware IO processing component for completion, and the data bypasses the Cache and is directly written into the disk of the RAID system.

[0090] 3. When the host issues a continuous write IO, the IO is aggregated by the IO aggregation component and is greater than 256 kB, or reaches the full stripe condition (for example, in a stripe of 4 data blocks, data blocks 1 to 4 are all covered by the write IO), the IO is shunted to the firmware for completion, and the data bypasses the Cache and is directly written into the disk of the RAID system. Figure 6

[0091] The following is an example of the IO shunting strategy according to the Cache free space state. As shown in the following figure, the disk data state and the Cache data state: there are data blocks numbered 00 to 24 on the disk, the RAID Cache caches data blocks numbered 08, 09, 17, 03, and 24 on the disk, and there are still 4 data blocks (slashes) in the free state in the RAID Cache. First, explain the host read IO shunting example:

[0092] Scenario 1: The host reads data blocks numbered 08 and 09 on the RAID disk, the Cache management query result is full hit, and the IO is shunted to the Cache IO processing component for completion. The data is directly moved from the Cache to the host to complete the read IO.

[0093] Scenario 2: The host reads data blocks numbered 21, 22, and 23 on the RAID disk, the Cache query result is partial hit, and the IO is shunted to the firmware IO processing component for completion. The firmware IO processing component constructs two types of IO, one of which reads data block numbered 21 from the Cache hit data and returns it to the host, and the other of which reads data blocks numbered 22 and 23 from the RAID disk and returns them to the host, and finally replies to the host IO completion.

[0094] Scenario 3: The host reads data blocks numbered 11, 12, 13, and 14 on the RAID disk, the Cache query result is not hit, and the IO is shunted to the firmware IO processing component for completion. The firmware IO processing component constructs data blocks numbered 11, 12, 13, and 14 from the RAID disk and returns them to the host, and finally replies to the host IO completion.

[0095] The following is an example of host write IO shunting: ​

[0096] Scenario 1: The host writes data blocks numbered 03 and 04 in the RAID disk, the Cache query result is a partial hit, the cached 03 data block in the Cache needs to be updated, and the new Cache space needs to be allocated for the missed 04 data block and the Cache insertion operation is performed, then the write data is moved from the host to the Cache, and the host write IO completion is returned. As shown in the first specific write operation completion diagram, Figure 7 The newly written data is newer than the data in the disk (the square background in the Cache represents).

[0097] Scenario 2: The host writes data blocks numbered 15, 16, 17, 18 and 19 in the RAID disk, the Cache query result is a partial hit, the cached 17 data block in the Cache needs to be updated, and the missed 15, 16, 18 and 19 data blocks need to be allocated new Cache space and perform Cache insertion operation, but at this time, the free data blocks available for insertion in the Cache are only 3 (diagonal line background data blocks), which cannot meet the insertion operation requirement. In this case, the IO is shunted to the firmware IO processing component. Assuming that the firmware IO processing component judges that the 08 and 09 data blocks in the Cache can be cleaned up (consistent with the data on the disk), as shown in the second specific write operation completion diagram, Figure 8 The write IO data is moved to the Cache to complete the Cache insertion and update operation.

[0098] Figure 9 A structure diagram of an IO processing device of a RAID controller provided by an embodiment of the present application is provided, which is applied to the RAID controller, the RAID controller includes a preset cache, an IO aggregation component and an IO shunting component, and the RAID controller is connected with each hard disk; the device includes:

[0099] The request receiving module 11 is configured to receive an IO processing request issued by a host, and determine a target operation type corresponding to the IO processing request;

[0100] The first processing module 12 is configured to, if the target operation type is a read operation type, control the IO shunting component to shunt the IO processing request according to response capability information of the preset cache to the IO processing request, so as to obtain a shunted read request, and move to-be-read data in the preset cache and the hard disk corresponding to the shunted read request to the host;

[0101] The second processing module 13 is configured to, if the target operation type is a write operation type, control the IO aggregation component to aggregate the to-be-written address of the IO processing request to obtain an aggregated address, and if the aggregated address meets a preset performance condition, move the to-be-written data carried by the IO processing request to the hard disk, and if the aggregated address does not meet the preset performance condition, move the to-be-written data carried by the IO processing request to the preset cache.

[0102] It can be seen that, by receiving the IO processing request issued by the host through the request receiving module and determining the target operation type, the application provides a basis for subsequent differentiated processing, and ensures that the read and write operations can be processed according to their characteristics. The first processing module controls the IO shunting component to shunt according to the response capability information of the preset cache for the read operation type, so that the to-be-read data can be directly obtained from the cache and moved to the host when the cache can respond, direct access to the hard disk is reduced to improve the read operation speed, and the data is obtained from the hard disk when the cache cannot respond, thereby ensuring the accuracy and integrity of the read operation. The shunting mechanism based on the cache response capability optimizes the processing path of the read operation and improves the read operation efficiency. The second processing module controls the IO aggregation component to aggregate the to-be-written address of the IO processing request to obtain an aggregated address for the write operation type, integrates the scattered write request addresses into a continuous or more efficient address range, reduces the performance loss of the storage system caused by the scattered IO, and determines whether the to-be-written data is moved to the hard disk or the preset cache according to whether the aggregated address meets the preset performance condition (a preset full strip condition or a preset threshold condition). When the condition is met, the to-be-written data is directly written into the hard disk to utilize the parallel storage characteristics of the RAID strip or avoid occupying too many cache resources, and when the condition is not met, the to-be-written data is written into the cache to temporarily store the data to reduce the frequent writing to the hard disk, thereby balancing the resource utilization of the cache and the writing pressure of the hard disk. In summary, the device improves the IO processing efficiency, resource utilization rate and stability of the storage system of the RAID controller by using the differentiated processing strategy for the read and write operations and the synergistic effect of the IO aggregation component and the cache.

[0103] Further, the application also discloses an electronic device, Figure 10 The electronic device shown in the figure is according to an exemplary embodiment, and the content in the figure cannot be considered as any limitation on the use range of the application. The electronic device can specifically include at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25 and a communication bus 26. The memory 22 is used to store a computer program, the computer program is loaded and executed by the processor 21 to realize the related steps in the IO processing method of the RAID controller disclosed in any of the preceding embodiments. In addition, the electronic device in the embodiment can be an electronic computer.

[0104] In this embodiment, the power supply 23 is configured to provide operating voltage for each hardware device on the electronic device; the communication interface 24 is configured to create a data transmission channel between the electronic device and external devices, and the communication protocol followed by the communication interface 24 can be any communication protocol applicable to the technical solution of the present application, which will not be specifically limited herein; the input / output interface 25 is configured to obtain external input data or output data to the outside, and the specific interface type can be selected according to the specific application needs, which will not be specifically limited herein.

[0105] In addition, the memory 22 as a carrier of resource storage can be a read-only memory, a random access memory, a magnetic disk or an optical disk, etc., and the resources stored thereon can include an operating system 221, a computer program 222, etc., and the storage mode can be temporary storage or permanent storage.

[0106] The operating system 221 is configured to manage and control each hardware device on the electronic device and the computer program 222, and can be Windows Server, Netware, Unix, Linux, etc. In addition to the computer program capable of completing the IO processing method of the RAID controller executed by the electronic device disclosed in any of the foregoing embodiments, the computer program 222 can further include a computer program capable of completing other specific work.

[0107] Further, the present application further discloses a computer readable storage medium for storing a computer program; wherein the computer program is executed by a processor to implement the IO processing method of the RAID controller disclosed above. For the specific steps of the method, please refer to the corresponding content disclosed in the foregoing embodiments, which will not be described here.

[0108] The embodiments in the specification are described in a progressive manner, and each embodiment focuses on the difference from other embodiments. For the same or similar parts between the embodiments, please refer to each other. For the device disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple, and please refer to the method part for the related part.

[0109] The skilled person can further realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed herein can be realized by electronic hardware, computer software or combination of the two. In order to clearly show the interchangeability of hardware and software, the components and steps of each example have been described in general in the above description. Whether the functions are realized by hardware or software depends on the specific application and design constraints of the technical solution. The skilled person can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0110] The steps of a method or algorithm described in connection with the embodiments disclosed herein can be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module can reside in RAM, flash memory, ROM, electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. The

[0111] Finally, it should be noted that the terms "first", "second", and the like, herein do not denote any order, quantity, combination, or importance, but rather are used to distinguish one element from another, and do not imply or require any such actual relationship or order. Moreover, the terms "include", "contain", or any other variant thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements does not include only those elements recited, but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element defined by the phrase "comprising a" does not exclude the existence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0112] The above provides a detailed description of the technical solutions of the present application. The principles and implementation modes of the present application are described by applying specific examples. The above description of the embodiments is only intended to help understand the method and its core idea of the present application; at the same time, for those skilled in the art, according to the idea of the present application, the specific implementation mode and application range will be changed; in summary, the content of the specification should not be understood as a limitation of the present application.

Claims

1. A method for I / O processing of a RAID controller, characterized in that, The method is applied to the RAID controller, which includes a preset cache, an I / O aggregation component, and an I / O splitting component, and is connected to each hard drive; the method includes: Receive an I / O processing request from the host and determine the target operation type corresponding to the I / O processing request; If the target operation type is a read operation type, then the IO splitting component is controlled to split the IO processing request according to the response capability information of the preset cache to the IO processing request, so as to obtain a split read request, and the data to be read corresponding to the split read request in the preset cache and the hard disk is moved to the host. If the target operation type is a write operation type, the IO aggregation component is controlled to aggregate the address to be written in the IO processing request to obtain an aggregated address. If the aggregated address meets the preset performance conditions, the data to be written carried by the IO processing request is moved to the hard disk. If the aggregated address does not meet the preset performance conditions, the data to be written carried by the IO processing request is moved to the preset cache.

2. The IO processing method for a RAID controller according to claim 1, characterized in that, The preset cache includes a cache management component; Obtaining the response capability information of the preset high-speed cache to the IO processing request includes: The cache management component is used to match the address to be read corresponding to the IO processing request with the storage address in the preset cache. If the storage address includes an address that matches all of the addresses to be read, then information is generated that indicates the response capability of the preset cache to respond to all of the IO processing requests. If the storage address includes an address that matches the part of the address to be read, then information is generated that characterizes the response capability of the preset cache to respond to part of the IO processing requests; If the storage address does not include an address that matches the address to be read, then response capability information is generated indicating that the preset cache cannot respond to the IO processing request.

3. The IO processing method for a RAID controller according to claim 1, characterized in that, The RAID controller further includes a firmware I / O processing component, and the preset cache includes a cache I / O processing component; controlling the I / O splitting component to split the I / O processing request based on the response capability information of the preset cache to the I / O processing request to obtain a split read request includes: If the response capability information of the preset cache to the IO processing request indicates that the preset cache can respond to all the IO processing requests, then the IO splitting component is controlled to determine all the IO processing requests as the first split read request, and the firmware IO processing component is controlled to transfer the first split read request to the cache IO processing component. If the response capability information of the preset cache to the IO processing request indicates that the preset cache can respond to some of the IO processing requests, then the IO splitting component is controlled to split the IO processing request to obtain a first sub-splitting read request that the preset cache can respond to and a second sub-splitting read request that the preset cache cannot respond to. The firmware IO processing component is then controlled to transfer the first sub-splitting read request to the cache IO processing component and the second sub-splitting read request to the hard disk. If the response capability information of the preset cache to the IO processing request indicates that the preset cache cannot respond to the IO processing request, then the IO splitting component is controlled to determine all the IO processing requests as second split read requests, and the firmware IO processing component is controlled to transfer the second split read requests to the hard disk.

4. The IO processing method for a RAID controller according to claim 1, characterized in that, The RAID controller further includes a firmware I / O processing component; the step of moving the data to be written carried by the I / O processing request to the hard disk if the aggregated address meets preset performance conditions includes: Determine whether the aggregated address meets the preset contiguous condition; If the aggregated address satisfies the preset continuum condition, then it is determined whether the aggregated address satisfies the preset full stripe condition; the preset full stripe condition is that the amount of data corresponding to the aggregated address fills a complete RAID stripe. If the aggregated address meets the preset full stripe condition, then the IO splitting component is controlled to send the IO processing request to the firmware IO processing component, and the firmware IO processing component is controlled to move the data to be written carried by the IO processing request to the hard disk. If the aggregated address does not meet the preset full stripe condition, the process jumps back to the step of receiving the IO processing request from the host until the aggregated address meets the preset full stripe condition.

5. The IO processing method for a RAID controller according to claim 4, characterized in that, After determining whether the aggregated address meets the preset continuity condition, the method further includes: If the aggregated address does not meet the preset continuity condition, then it is determined whether the aggregated address meets the preset threshold condition; the preset threshold condition is that the amount of data corresponding to the aggregated address is greater than a preset threshold. If the aggregated address meets the preset threshold condition, the I / O splitting component is controlled to send the I / O processing request to the firmware I / O processing component, and the firmware I / O processing component is controlled to move the data to be written carried by the I / O processing request to the hard disk.

6. The IO processing method for a RAID controller according to any one of claims 1 to 5, characterized in that, Moving the data to be written carried by the IO processing request to the preset cache includes: Determine the current free space of the preset cache and determine whether the free space is less than the data write space required for the IO processing request; If the free space is not less than the data writing space required by the IO processing request, then the data to be written carried by the IO processing request is moved to the preset cache.

7. The IO processing method for a RAID controller according to claim 6, characterized in that, After determining whether the free space is less than the data write space required for the IO processing request, the method further includes: If the free space is less than the data write space required for the IO processing request, then the data cached in the preset cache is written to disk or cleaned up, and then the process jumps back to the step of determining the current free space of the preset cache.

8. An I / O processing device for a RAID controller, characterized in that, The device is applied to the RAID controller, which includes a preset cache, an I / O aggregation component, and an I / O splitting component, and is connected to each hard drive; the device includes: The request receiving module is used to receive IO processing requests sent by the host and determine the target operation type corresponding to the IO processing request. The first processing module is configured to, if the target operation type is a read operation type, control the IO splitting component to split the IO processing request according to the response capability information of the preset cache to the IO processing request, so as to obtain a split read request, and move the data to be read corresponding to the split read request in the preset cache and the hard disk to the host. The second processing module is configured to, if the target operation type is a write operation type, control the IO aggregation component to aggregate the address to be written of the IO processing request to obtain an aggregated address. If the aggregated address meets a preset performance condition, the data to be written carried by the IO processing request is moved to the hard disk. If the aggregated address does not meet the preset performance condition, the data to be written carried by the IO processing request is moved to the preset cache.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the IO processing method of the RAID controller as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the IO processing method of the RAID controller as described in any one of claims 1 to 7.