Server display control system and method, device, equipment, medium and product

Abstract

The invention discloses a server display control system and method, a device, equipment, a medium and a product, and relates to the technical field of servers, a first operating system with a relatively high starting speed on a substrate management controller enters a judgment process of a display control right after being started, and compared with a basic input and output system, the display control right can be quickly taken over, so that the operation efficiency is improved. Display output can be controlled as soon as possible after a server is started, and display control right switching is carried out after a basic input and output system completes initialization of a display module. In the judging process of the display control right of the first operating system, the first operating system determines the attribution of the display control right according to the starting type of the server, the method adapts to various scenes such as normal starting and restarting after abnormal power failure of the server, and the time sequence consistency of display control right switching of the server in various running scenes is ensured.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of servers, and in particular to a server display control system and method, device, equipment, medium and product. BACKGROUND

[0002] Display control of a server depends on a Basic Input / Output System (BIOS) to complete corresponding hardware initialization before taking over display output. When the hardware configuration of the server is relatively complex, the hardware initialization process of the BIOS is relatively long, which causes the server to have no display for a long time after booting, so that a user cannot perceive the system state of the server.

[0003] How to control display output as soon as possible after the server is booted is a technical problem to be solved by those skilled in the art. SUMMARY

[0004] The present application provides a server display control system and method, device, equipment, medium and product to at least solve the problem of slow display output after the server is booted in the related art.

[0005] The present application provides a server display control system, comprising: a baseboard management controller, a Basic Input / Output System (BIOS); The baseboard management controller comprises a first operating system and a second operating system; after the baseboard management controller is powered on, the first operating system is started before the second operating system, and after being started, the first operating system identifies the startup type of the server, and if the startup type is cold startup, the display module of the server is called to control the display to display first information; if the startup type is hot restart, the display control right of the display before power failure is maintained; After the BIOS is started, the startup self-checking process of the server is executed, and after the initialization of the display module is completed, the display control right switching between the baseboard management controller and the BIOS is performed, and after the switching is completed, the display module is called to control the display to display second information.

[0006] The present application also provides a server display control method applied to a baseboard management controller, comprising: After being powered on, the first operating system is started before the second operating system; After being started, the first operating system identifies the startup type of the server, and if the startup type is cold startup, the display module of the server is called to control the display to display first information; if the startup type is hot restart, the display control right of the display before power failure is maintained; The first operating system switches the display control right to the basic input and output system after the basic input and output system of the server is started and the initialization of the display module is completed, so that the basic input and output system calls the display module to control the display to display second information.

[0007] The application further provides a server display control device applied to a baseboard management controller, wherein the baseboard management controller comprises a first operating system and a second operating system; the server display control device comprises: A recognition unit is configured to recognize the starting type of the server after the first operating system is started before the second operating system is started after the baseboard management controller is powered on. A display control unit is configured to call the display module of the server to control the display to display first information if the starting type is cold starting, and maintain the display control right of the display before power-off if the starting type is hot restart. A switching unit is configured to switch the display control right to the basic input and output system after the first operating system of the server is started and the initialization of the display module is completed, so that the basic input and output system calls the display module to control the display to display second information.

[0008] The application further provides an electronic device, which comprises a memory for storing a computer program and a processor for executing the computer program to realize the steps of any one of the server display control methods.

[0009] The application further provides a non-volatile storage medium, wherein the non-volatile storage medium stores a computer program, and the computer program is executed by a processor to realize the steps of any one of the server display control methods.

[0010] The application further provides a computer program product, which comprises a computer program, and the computer program is executed by a processor to realize the steps of any one of the server display control methods.

[0011] Through the application, compared with the basic input / output system, the first operating system with a faster starting rate on the substrate management controller can quickly take over the display control right after starting, so as to control the display output as soon as possible after the server is started, and the display control right is switched after the basic input / output system performs the power-on self-test process and completes the initialization of the display module. In the display control right judgment process of the first operating system, the first operating system identifies the starting type of the server, if the starting type is cold starting, the display module of the server is called to control the display to display the first information, if the starting type is hot restart, the display control right of the display before power failure is maintained, so as to adapt to multiple scenes such as normal starting and abnormal power failure and restart of the server, and ensure the timing consistency of the display control right switching in various running scenes. BRIEF DESCRIPTION OF DRAWINGS

[0012] In order to more clearly illustrate the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0013] Figure 1 A server display control system architecture diagram provided for the embodiments of the present application; Figure 2 A server starting process diagram provided for the embodiments of the present application; Figure 3 A server shutdown process diagram provided for the embodiments of the present application; Figure 4 A basic input / output system starting and shutting down process diagram provided for the embodiments of the present application; Figure 5 A server display control method flowchart provided for the embodiments of the present application; Figure 6 Another server display control method flowchart provided for the embodiments of the present application. DETAILED DESCRIPTION

[0014] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.

[0015] It should be noted that in the description of the present application, the term "comprising", "containing" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or apparatus including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such a process, method, article or apparatus. The terms "first", "second" and the like in the present application are used to distinguish similar objects, not to describe a specific order or sequence.

[0016] In order to better understand the technical personnel in the art of the present application, the present application will be further described in detail below in conjunction with the drawings and specific embodiments.

[0017] Here, some key terms used in the embodiments of the present application are explained first.

[0018] In the traditional server architecture, during the initialization process of the basic input and output system, when the basic input and output system detects the graphics card, the video controller (Video Graphics Array, VGA) of the graphics card displays the self-checking information in the initialization process, and after entering the operating system (Operating System, OS), the display control is handed over to the operating system, and the operating system controls the video graphics array of the graphics card based on the graphics card driver. Therefore, whether the server can display a picture after booting usually depends on how long it takes for the basic input and output system to complete the initialization of the video controller of the graphics card after starting the boot self-checking.

[0019] Obviously, with different server configurations, there is a difference between the time from the server booting to the display displaying a picture, for example, in a full configuration scenario under a certain processor architecture, the time consumption is as long as 4 minutes, which causes the user to face a long black screen and cannot perceive the system state in real time. In addition, when the server is equipped with different platform processors, the initialization time consumption also has significant differences (12 seconds to 4 minutes).

[0020] The above situation will cause the user to face a black screen for different time after controlling the server to boot, sometimes needing to wait for a long time, and being unable to determine whether the server is in a normal starting state or an abnormality occurs, that is, the user cannot get a response for a long time after pressing the boot key, resulting in poor user experience.

[0021] To solve the problem of slow display output after the server is started, the server display control system and method, device, equipment, medium and product provided by the embodiment of the application are provided, the first operating system with a faster starting rate on the baseboard management controller is started to enter the display control right judgment process after starting, compared with the basic input / output system, the display control right can be quickly taken over, the display output can be controlled as soon as possible after the server is started, and the display control right switching is performed after the basic input / output system performs the power-on self-test process to complete the initialization of the display module; in the display control right judgment process of the first operating system, the first operating system identifies the starting type of the server, if the starting type is cold starting, the display module of the server is called to control the display to display the first information; if the starting type is hot restart, the display control right of the display before power failure is maintained, so that the server can adapt to various scenes such as normal starting and abnormal power failure and restart, and the timing consistency of the display control right switching under various running scenes is ensured.

[0022] Figure 1 The architecture diagram of the server display control system provided by the embodiment of the application is shown.

[0023] As shown in Figure 1 The server display control system provided by the embodiment of the application can include: a baseboard management controller, a basic input / output system;

[0024] The baseboard management controller includes a first operating system and a second operating system; after the baseboard management controller is powered on, the first operating system is started earlier than the second operating system, and after being started, the starting type of the server is identified, if the starting type is cold starting, the display module of the server is called to control the display to display the first information; if the starting type is hot restart, the display control right of the display before power failure is maintained;

[0025] After the basic input / output system is started, the power-on self-test process of the server is performed, and after the initialization of the display module is completed, the display control right switching between the baseboard management controller and the basic input / output system is performed, and after the switching is completed, the display module is called to control the display to display the second information.

[0026] It should be noted that the "baseboard management controller" in the embodiment of the application can refer to a baseboard management controller board card, which includes bus controllers, logic programmable units, memories and other elements in addition to an out-of-band monitoring master controller. The "baseboard management controller" in the embodiment of the application can also refer to the out-of-band monitoring master controller on the baseboard management controller board card, which can be a single-core processor or a multi-core processor. In the embodiment of the application, the baseboard management controller or the out-of-band monitoring master controller on the baseboard management controller board card can adopt an ARM processor, and the management system of the baseboard management controller runs on the ARM processor.

[0027] In the embodiment of the present application, the display module can be a display controller in a graphics card.

[0028] In the embodiment of the present application, the first operating system can be a real-time operating system, and the second operating system can be a non-real-time operating system. The first operating system enables the processor of the baseboard management controller to have real-time task processing capability. The second operating system undertakes the operation responsibility of the main operating system of the baseboard management controller, specifically including loading and scheduling of the operating system kernel of the baseboard management controller, initialization and deployment of the user state service, and execution of core function modules such as server monitoring and management.

[0029] As an independent system, the baseboard management controller needs to run an operating system that can provide complete operation, such as contiki, HeliOS, Linux, etc. Such operating systems generally use a fair task scheduling algorithm, and when the number of threads and processes increases, the processor's time needs to be shared, and the task debugging has uncertainty, which can be called a non-real-time operating system. For example, the Linux system is a multi-user, multi-task, multi-thread and multi-central processor operating system based on the Portable Operating System Interface (POSIX), which is powerful and can support various tasks required to be executed by the baseboard management controller. However, the disadvantage of such a non-real-time operating system is that it also needs a long startup time during the server startup phase.

[0030] The baseboard management controller equipped with a real-time operating system (RTOS) and a non-real-time operating system can start and execute tasks by the real-time operating system prior to the non-real-time operating system during the server startup phase. Based on different control principles, the response rate of the real-time operating system is generally higher than that of the non-real-time operating system when running on the processor.

[0031] In the embodiment of the present application, the first operating system and the second operating system in the embodiment of the present application do not limit the type or priority of the operating system, and the difference in response rate after the power-on of the baseboard management controller leads to different startup sequences.

[0032] In some optional embodiments of the embodiment of the present application, the first operating system can be a program with real-time function, which can include a real-time operating system or a bare machine program code capable of realizing real-time function. The type of real-time operating system can include but is not limited to FreeRTOS, RTLinux or other real-time operating systems in embedded systems.

[0033] The second operating system can include but is not limited to contiki, HeliOS, Linux.

[0034] In some optional embodiments of the present application, the first operating system and the second operating system can both run on the core processor of the baseboard management controller and communicate through inter-core communication. In other optional embodiments of the present application, the first operating system and the second operating system can run on different processors of the baseboard management controller, for example, the first operating system runs on the coprocessor and the second operating system runs on the core processor.

[0035] In some optional embodiments of the present application, an RTOS / Linux dual system can run in the baseboard management controller. In the case of a multi-core baseboard management controller, one of the core processors can run the RTOS and the remaining core processors can run the Linux system.

[0036] During the cold start of the server, the basic input / output system needs to perform underlying operations such as hardware self-test (POST), device enumeration, memory initialization, and the like in sequence, and the display signal output under the traditional architecture has a significant delay. At the same time, the main operating system startup process of the baseboard management controller involves multi-level driver loading and service initialization, and its time consumption also restricts the response speed of the display output. According to engineering verification, simply relying on the coordination and optimization of the basic input / output system and the second operating system (main operating system) of the baseboard management controller cannot achieve ultra-fast signal output of the display.

[0037] In contrast, the startup path of the first operating system of the baseboard management controller has a significant time advantage: the bootloader (U-boot) can immediately trigger the startup process of the first operating system during initialization. After the real-time system is started, it can directly control the register layer of the display module according to the pre-configured display control parameters, bypassing the software overhead of the conventional display protocol stack, and finally realizing that the display can output pictures within a few seconds after the server is powered on, effectively avoiding the timing bottleneck of the basic input / output system and the main operating system, providing a deterministic delay guarantee for user interaction during the server startup phase, and being able to quickly perform display output in different processor architectures and different server configurations.

[0038] The embodiment of the present application needs to solve the problem of the first operating system of the baseboard management controller and the basic input / output system cooperating to control the display. In actual control, the basic input / output system is given priority to display control, and the first operating system of the baseboard management controller performs display control before the basic input / output system can perform display control and optionally when the basic input / output system cannot control the display due to an abnormality. To this end, the first operating system of the baseboard management controller needs to be able to monitor the change of the power-on / off power state signal of the server and the state of the basic input / output system executing the power-on self-test process.

[0039] In the embodiment of the present application, the first controller responsible for the power-on / off timing control of the server can be connected to the first pin of the baseboard management controller, and the first controller converts the power-on / off state into the state of the first pin, so as to realize the transmission of the power-on / off power state signal to the first operating system of the baseboard management controller. The basic input / output system can be connected to the second pin of the baseboard management controller, and the basic input / output system converts the state of executing the power-on self-test process into the state of the second pin, so as to realize the transmission of the state of the basic input / output system executing the power-on self-test process to the first operating system of the baseboard management controller.

[0040] The first pin can be referred to as a power-on initial flag pin, and the second pin can be referred to as a power-on completion flag pin.

[0041] The first controller can be a complex programmable logic device (CPLD). The first pin and the second pin can be general-purpose input / output (GPIO) pins.

[0042] Figure 2 A server power-on process diagram is provided for the embodiment of the present application.

[0043] As shown in Figure 2 After the user triggers the power-on by using a power button or the like, the first controller of the server receives an interrupt signal and starts to execute the power-on timing. After the first controller completes the power-on timing, the state of the first pin of the baseboard management controller is set to indicate that the power-on timing has been completed. Then, the basic input / output system executes a series of power-on self-test processes (such as executing a hardware self-test, reading and applying configuration information, initializing peripheral devices, etc.), and after completing the power-on self-test process, the state of the second pin is set to indicate that the power-on self-test process is completed.

[0044] The default state of both the first and second pins is high. After completing the power-on sequence, the first controller pulls the first pin low, indicating that the power-on sequence is complete. After completing the power-on self-test (POST) process, the basic input / output system pulls the second pin low, indicating that the POST process is complete.

[0045] Figure 3 This is a flowchart of a server shutdown process provided in an embodiment of the present invention.

[0046] like Figure 3 As shown, when the power-on sequence and power-on self-test process have been completed, both the first and second pins are at a low level. After the user triggers the shutdown using a power switch or other device, the server's operating system completes the program shutdown process, and the Basic Input / Output System (PIS) notifies the Advanced Configuration and Power Interface (ACPI) to power off, and the power module receives the power-off command. The first controller then executes the shutdown sequence, and after the shutdown sequence is completed, it sets the state of the first pin high to indicate that the shutdown sequence is complete. After notifying the ACPI to power off, the PIS sets the second pin high. Based on the pin configuration, in some optional embodiments of this invention, the first operating system identifies the server's boot type, which may include: the first operating system identifies the timing state of the first pin of the baseboard management controller; if the first pin is in the first timing state, the boot type is determined to be a cold boot; if the first pin is in the second timing state, the boot type is determined to be a warm reboot; the first pin is connected to the server's first controller, which configures the first pin of the baseboard management controller to the first state after the server's power-on sequence is completed; the first pin defaults to the second state.

[0047] In this case, the first state and the second state can be either low or high.

[0048] The first timing state can be a transition from the second state to the first state, corresponding to the server's power-on sequence. When the first operating system detects that the state of the first pin has changed from the second state to the first state, it can determine that the server is powered on by AC power, thus identifying the server's startup type as a cold start. The second timing state can be maintaining the second state, meaning the server is powered on by AC power but with a delayed power-on. In this case, the first pin can act as a state maintenance trigger. When this pin remains in the off state (always off), the display module immediately enters a loop mode. At this time, the display source remains the baseboard management controller, and the first operating system does not process display update requests.

[0049] In some optional embodiments of the present application, the first operating system identifies the starting type of the server, which can further include: the first operating system accessing a starting type register of the baseboard management controller, and determining the starting type as a cold start if the starting type register is a first flag bit, or determining the starting type as a hot restart if the starting type register is a second flag bit. The first flag bit can be a corresponding bit with a value of 1 (BIT0=1), corresponding to a cold start, and the first operating system obtains display control at this time. The second flag bit can be a corresponding bit with a value of 0 (BIT0=0), corresponding to a hot restart, and the display control remains in the original state at this time. The first flag bit and the second flag bit can also use opposite symbols.

[0050] That is, the control logic of the starting type register of the baseboard management controller can also be pre-configured to use the starting type register to enable the first operating system to determine the starting type of the server. The starting type register can be implemented by using a system control unit (SCU) register of the baseboard management controller.

[0051] In actual applications, the first operating system can use any of the above-mentioned methods to identify the starting type of the server, or the first pin and the starting type register can be deployed at the same time, and the judgment of the first operating system on the first pin and the judgment of the starting type register are mutually checked.

[0052] In the embodiments of the present application, after the first operating system obtains the display control, the display module is called to control the display to display the first information. In some optional embodiments of the present application, the first information can be information of a normal start of the server, which can be represented by characters such as “THE SYSTEM IS POWER ON……”.

[0053] In some optional embodiments of the present application, the first operating system calls the display module of the server to control the display to display the first information, which can further include: the first operating system accessing a shared memory between the baseboard management controller and the basic input / output system to determine the power-on self-test stage in which the basic input / output system is located, and calling the display module to control the display to display information of the power-on self-test stage.

[0054] That is, the shared memory can be used as a communication channel between the baseboard management controller and the basic input / output system, and a first preset area can be divided in the shared memory, and the basic input / output system writes information of the power-on self-test stage in which it is located into the first preset area. The first operating system determines the power-on self-test stage in which the basic input / output system is located by reading the first preset area in the shared memory, and displays the information of the power-on self-test stage on the display.

[0055] The first operating system can distinguish the completion state of the power-on self-test stage of the basic input / output system after the hot restart through the second pin of the baseboard management controller to determine whether to take over the display control. Specifically, the first operating system calling the display module to control the display to display the first information can include: if the first operating system identifies that the second pin of the baseboard management controller is in the third state, the display module is called to control the display to display the first information; the second pin is connected with the basic input / output system, and the basic input / output system is further configured to set the second pin to the fourth state after completing the power-on self-test process; and the second pin is in the third state by default. The third state and the fourth state can be one of high level and the other of low level.

[0056] That is, the third state corresponds to the state of the basic input / output system not completing the power-on self-test process, and the fourth state corresponds to the state of the basic input / output system completing the power-on self-test process. After the server is powered off and then powered on, the first operating system can determine the state of the second pin, and if the state is the fourth state (the power-on self-test is not completed, which can be caused by power-off or host reboot), the first operating system takes over the display control to ensure that the system state is visualized continuously when the server is powered on again. At this time, the first operating system can control the display to display the first information in a short time after the server is powered off and then powered on or rebooted, and the basic input / output system takes over the display control when the basic input / output system executes the power-on self-test process to a certain stage, and the basic input / output system continues to control the display to output the second information, which can be the power-on self-test information of the basic input / output system, such as initialization information of the central processing unit, the memory and the like.

[0057] The server display control system provided by the embodiment of the application can quickly take over the display control compared with the basic input / output system by starting the first operating system with a faster start-up rate on the baseboard management controller to enter the judgment process of the display control after starting, so that the display output can be controlled as soon as possible after the server is powered on, and the display control is switched after the basic input / output system executes the power-on self-test process to complete the initialization of the display module. In the judgment process of the display control of the first operating system, the first operating system identifies the start-up type of the server, and if the start-up type is cold start, the display module of the server is called to control the display to display the first information; and if the start-up type is hot restart, the display control before power-off is maintained, so that the server can adapt to various scenes such as normal start-up and restart after abnormal power-off, and ensure the timing consistency of the display control switching in various running scenes.

[0058] To realize smooth switching of display control right between the baseboard management controller and the basic input / output system, the embodiment of the present application further configures control logic of a display source register to identify the ownership of the display control right by using the display source register. The display source register can be implemented by a system control unit (SCU) register of the baseboard management controller.

[0059] The first operating system can also be used to set the display source register of the baseboard management controller to a third flag bit before calling the display module of the server to control the display to display the first information. The display source register corresponds to the baseboard management controller having the control right of the display when the display source register is the third flag bit, and the display source register corresponds to the basic input / output system having the control right of the display when the display source register is a fourth flag bit. The third flag bit and the fourth flag bit can be one of the corresponding bit positions being 1 and the other corresponding bit position being 0.

[0060] In the embodiment of the present application, the display source register as a key control node can be set by the baseboard management controller or the basic input / output system to coordinate the switching of the display control right.

[0061] To realize the basic input / output system to preferentially obtain the basic input / output system, the display source register can be set to the fourth flag bit by default after the server is restarted, that is, the display control right belongs to the basic input / output system by default. The first operating system calling the display module of the server to control the display to display the first information includes: the first operating system modifying the display source register from the fourth flag bit to the third flag bit to recover the display control right, that is, if the first operating system identifies the startup type of the server as a cold start after startup, the display source register is immediately modified to the third flag bit to recover the display control right.

[0062] To avoid the first operating system polling the pin state and the register state of the baseboard management controller and repeatedly configuring the display source register, the embodiment of the present application can also configure a display flag register (showFlag) to identify the state of the display source register.

[0063] The first operating system can also be configured to set a display flag register of the baseboard management controller to a fifth flag bit when the display module is called to control the display to display the first information, and set the display flag register to a sixth flag bit when the basic input / output system is switched from a power-on self-test process completed state to a power-on self-test process incomplete state. The first operating system setting the display source register of the baseboard management controller to a third flag bit can include: the first operating system detecting a state of the display flag register before configuring the display source register, if the display flag register is the fifth flag bit, the display source register is not configured, and if the display flag register is the sixth flag bit, the display source register is accessed and configured to the third flag bit. The fifth flag bit and the sixth flag bit can be one of 1 and the other of 0.

[0064] That is, when the first operating system needs to control the display to output, the display flag register is set to the fifth flag bit after the corresponding register is operated, indicating that the data of the first operating system is currently displayed, so that the register disorder caused by the first operating system operating the register to display the first information multiple times in the polling process can be avoided, and the character display of the display can be prevented from being abnormal. When the power-on completion flag bit is switched from the completion to the incomplete (i.e., the second pin is switched from the fourth state to the third state in the above embodiment), the display flag register is set to the sixth flag bit, and the corresponding register needs to be re-operated when the first operating system needs to control the display to output in the future.

[0065] In the embodiment of the application, to ensure the stability of the display control of the first operating system, a monitoring thread can be configured to monitor the display control thread.

[0066] The first operating system calling the display module of the server to control the display to display the first information can include: the first operating system calling a first thread to call the display module to control the display to display the first information; and the first operating system also being configured to call a second thread to monitor a running state of the first thread, and control the first thread to restart to re-perform display control when the first thread is in an abnormal state. The first thread is the display control thread, and the second thread is the monitoring thread. The watchdog mechanism can be used for monitoring, i.e., the first thread is configured to perform a software dog-feeding action every first period (e.g., 1 second), and the second thread is configured to monitor the first thread, if the first thread does not feed the dog on time for a first number of first periods (e.g., 3 periods), the second thread controls the first thread to restart, and the fault log of the first thread can also be recorded.

[0067] Thus, the embodiment of the present application builds a high-reliability display right dynamic management system through the cooperative control of the hardware register and the software monitoring. Through the accurate control of multiple key registers, the seamless display switching between the first operating system and the basic input / output system of the baseboard management controller is realized, and the display flag register (showFlag) state machine mechanism is adopted to ensure the integrity of the display data.

[0068] To realize the configuration of the display source register of the baseboard management controller in the basic input / output system, the communication channel between the baseboard management controller and the basic input / output system needs to be built.

[0069] In some optional embodiments of the embodiment of the present application, the first operating system is further configured to set the debugging function register of the baseboard management controller to the seventh flag bit after the power-on sequence of the server is completed, and set the debugging function register to the eighth flag bit after the basic input / output system completes the power-on self-test process; the seventh flag bit corresponds to the opening of the bridge channel between the motherboard of the server and the memory of the baseboard management controller; the eighth flag bit corresponds to the closing of the bridge channel; and the debugging function register is set to the eighth flag bit by default.

[0070] In the embodiment of the present application, the control logic of the debugging function register of the baseboard management controller is pre-configured to control the opening and closing of the memory access channel of the baseboard management controller by the debugging function register. The debugging function register can be realized by the system control unit register of the baseboard management controller.

[0071] The bridge channel between the motherboard of the server and the memory of the baseboard management controller can be a bridge channel between the peripheral component interconnect (PCI) bus (or peripheral component interconnect express (PCIe) bus) and the advanced high-performance bus (AHB).

[0072] The first operating system can modify the debug function register from the eighth flag bit to the seventh flag bit to open the bridging channel between the server motherboard and the memory of the baseboard management controller after the power-on sequence of the server is completed (as described in the above embodiment, the first state indicating that the power-on sequence of the server is completed is detected through the first pin of the baseboard management controller), and modify the debug function register from the seventh flag bit to the eighth flag bit to close the bridging channel between the server motherboard and the memory of the baseboard management controller after detecting that the basic input and output system completes the power-on self-test process (as described in the above embodiment, the third state indicating that the power-on self-test process is completed is detected through the second pin of the baseboard management controller). During the time when the bridging channel between the server motherboard and the memory of the baseboard management controller is opened, the basic input and output system can access the baseboard management controller through the bridging channel to configure the display source register.

[0073] With reference to the display source register described in the above embodiment, the display control right switching between the basic input and output system and the baseboard management controller can include: the basic input and output system accesses the baseboard management controller through the bridging channel and sets the display source register of the baseboard management controller to the fourth flag bit; the display source register corresponds to the baseboard management controller having the control right of the display when the display source register is the third flag bit, and the basic input and output system having the control right of the display when the display source register is the fourth flag bit.

[0074] In some other optional embodiments of the present application, the communication channel between the baseboard management controller and the basic input and output system can also use a shared memory. That is, the baseboard management controller and the basic input and output system can be connected through the shared memory, and the display control right switching between the basic input and output system and the baseboard management controller can include: the basic input and output system interacts with the baseboard management controller through the shared memory to exchange display control right switching information to perform the display control right switching. A second preset area can be divided in the shared memory, and the basic input and output system writes the switching request of the display control right into the second preset area. The first operating system determines that the basic input and output system can control the display to output by reading the second preset area in the shared memory, and then stops controlling the display to output the first information. At this time, the first operating system can modify the display source register from the third flag bit to the fourth flag bit by itself, indicating that the display control right is switched to the basic input and output system.

[0075] On the basis of the above embodiment, the present application provides an operation process performed by the first operating system of the baseboard management controller after starting.

[0076] (1) Initialization phase. After the server is powered on and the first operating system of the baseboard management controller is started, the first operating system judges the starting type of the server by reading the starting type register. The value of one bit of the starting type register can be used to represent different starting types, such as BIT0=1 representing cold starting and BIT0=0 representing hot restart. When the first operating system judges the starting type to be cold starting by reading the starting type register, the first operating system obtains display control. When the first operating system judges the starting type to be hot restart by reading the starting type register, the display control remains in the original state. The determination result will affect the subsequent configuration strategy, and the system starting reliability and stability are ensured by strictly following the hardware specification.

[0077] (2) Power-on condition check. The system checks whether the server meets the power-on condition. If the server does not meet the power-on condition, the BIT0 of the debugging function register is first closed. This switch forcibly disables the bridging channel of the PCIe bus to the AHB bus. If it is enabled, the entire baseboard management controller memory space can be accessed, which is used for basic input and output system display. Therefore, in order to ensure system safety, the switch is not opened in the shutdown state. At the same time, the first thread of the first operating system for executing display control performs software dog feeding action every first period. The second thread of the first operating system monitors the first thread. If the first thread does not perform software dog feeding action in time for a first number of first periods in succession, it is determined that the first thread has an exception, and the first thread is controlled to restart, log recording and the like. The first period can be 1 second, that is, the second thread acquires the state of the first thread every 1 second. The second thread can also be used to acquire the on-off state of the server.

[0078] (3) Judgment of server starting type and switching of display control. After the server is powered on by alternating current (AC), if the server power-on button is immediately pressed, the first operating system takes over the display control by setting the display source register to the baseboard management controller, forming a set of dynamic switching display management system, which can include the following functions.

[0079] First: initial allocation of display control. The first operating system takes over quickly: the first operating system can first light up the display to output the first information within 5 seconds after the server is powered on, and the first information can be "THE SYSTEM IS POWER ON……" to inform the user that the server is in normal starting state. The first information can also include the current starting self-checking process or other basic state information of the server, so as to ensure that the user can instantly perceive the system starting process. The basic input and output system delays the takeover: according to the hardware configuration difference of the server, the basic input and output system can complete initialization within 12 seconds to 4 minutes.

[0080] Second: Dynamic switching trigger condition. Normal switching: in the process of basic input / output system performing power-on self-test process, after completing the initialization of the display module, the basic input / output system can take over the display control, at this time the basic input / output system switches the display control to the basic input / output system, which can be used to output detailed information of the power-on self-test process.

[0081] Abnormal recovery: if it is detected that the power-on completion flag is not completed (such as shutdown or host restart), the first operating system immediately takes over the display, ensuring that the system state is visualized again when booting. At this time, the shutdown and reboot or booting, the first operating system can control the display within 5s, that is, output the first information, and correspondingly, when the booting reaches a certain stage, the basic input / output system can control the display, the basic input / output system continues to take over the control right, and the basic input / output system continues to control the display to output, at this time the user can see the initialization printing information of the central processing unit, memory and other components on the display until entering the operating system.

[0082] Third: Configuration of display control right. The display source register as a key control node can be set by the first operating system or the basic input / output system to coordinate the switching of the display control right.

[0083] Fourth: User visible output logic. First stage (first operating system control): output the first information, such as "THE SYSTEM IS POWER ON…" or other basic state information, to ensure that the user knows that the current booting is in progress, and to avoid the user mistakenly thinking that the startup has failed due to a long black screen. Second stage (basic input / output system control): dynamically output the second information, such as hardware self-test information, until entering the operating system. This mechanism realizes high reliability and real-time performance of the display system through the dual protection of hardware registers and software monitoring.

[0084] (4) Check of the power-on self-test (POST) state of the basic input / output system. In the server startup process, the baseboard management controller realizes dynamic management of the power-on self-test stage of the basic input / output system through precise hardware register control and software state monitoring. It can include the following functions.

[0085] First: Power-on self-test process completion state determination and safety control. When the system detects that the basic input / output system is completed (the power-on completion flag is completed), the configuration operation (BIT0=1) of the debugging function register is immediately executed, and the PCIe-to-AHB bridge channel is forcibly closed. This operation can prevent the basic input / output system from continuing to access the baseboard management controller memory space after the power-on self-test process is completed (to avoid sensitive area data leakage).

[0086] Second: Periodic maintenance mechanism. The watchdog feeds the dog: the first thread of the first operating system for display control executes the software feeding operation with a period of 1 second, and if feeding is not performed for 3 times in succession, the second thread forces the first thread to restart and records the log.

[0087] Third: Abnormal processing of the power-on self-test state. Control right recovery: when the first operating system detects that the power-on completion flag changes from completion to incompleteness, the first operating system immediately recovers the display control right and sets the display flag register (showFlag) to 1 to enable the first operating system to display output.

[0088] (5) Cooperative processing of the display flag register (showFlag) in the baseboard management controller.

[0089] When the first operating system of the baseboard management controller needs to control the display, the first operating system sets the display flag register to the fifth flag bit, indicating that the display has displayed data at this time, so as to avoid the register disorder and the display character display abnormality caused by the multiple operations of the register display character data in the polling process. When the power-on completion flag changes from completion to incompleteness, the display flag register is set to the sixth flag bit, and the first operating system needs to control the display in the future, and the corresponding register needs to be re-operated.

[0090] Figure 4 A power-on and power-off flowchart of a basic input and output system is provided for the embodiment of the present application.

[0091] As shown in Figure 4 , the user performs power-on and power-off through a power button (PowerButton) or sends a command. When the server starts, the basic input and output system performs hardware initialization, and when the display can be taken over (usually when the initialization of the display module is completed), the basic input and output system sets the display source register to control the display source switching before setting the display memory and taking over the display control right. After the basic input and output system completes the power-on self-test process, the second pin of the baseboard management controller is pulled low to indicate that the power-on self-test process is completed. If a power-on or restart command is issued, the second pin of the baseboard management controller is pulled high to indicate that the power-on self-test process of the basic input and output system changes from the power-on completion state to the power-on incompleteness.

[0092] Therefore, in the server startup process, through the cooperative control of the first operating system and the basic input and output system of the baseboard management controller, based on the cooperative management of the pins and hardware registers of the baseboard management controller, a mechanism for seamless switching of display control is formed. Through the accurate scheduling of the baseboard management controller, the system realizes full-scene adaptation from cold start to hot restart: in cold start, the first operating system takes over the display output basic state within 5 seconds; hot restart avoids repeated initialization through a state retention mechanism. The BIT0 bit of the startup type register distinguishes the startup type, and the display source register triggers the control right transfer through mode switching and signal change of the pins of the baseboard management controller, cooperates with the authority management of the PCI-to-AHB bridge, and ensures the safety of the system. The watchdog mechanism of the redundant design and the state identification of the display flag register (showFlag) further guarantee the system reliability. The deep integration of hardware specifications and software monitoring finally realizes the seamless transition of the display from the first operating system of the baseboard management controller to the basic input and output system in the boot phase, and provides a high-availability display solution for critical business systems.

[0093] The server display control system provided by the embodiment of the application can ensure compatibility in multiple operation scenes in the whole life cycle of the server. Through the cooperative control architecture of the hardware register, the pins of the baseboard management controller, the baseboard management controller and the basic input and output system, the system realizes full-scene coverage from cold start to hot restart, from normal shutdown to abnormal interruption, and ensures that the display output can maintain timing consistency and data integrity in any operation state. Table 1 is 12 kinds of server startup and shutdown scenes. Table 1

[0094] (1) Power management scene compatibility.

[0095] In the server power management system, the display control logic of the alternating current power supply power-on scene (scene 1-3) realizes dynamic identification of cold and hot startup through the BIT0 bit of the startup type register. When the first operating system detects BIT0=1 (cold start state), if it is detected that the boot is triggered, a complete boot self-check process is automatically triggered, including standard operation sequences such as hardware initialization and memory verification, and the display control right is reset through the write protection mechanism of the display source register, ensuring that the display output is strictly synchronized with the hardware state.

[0096] For the special needs of scenario 3 (delayed startup after AC power is powered on), the embodiment of the application introduces the first pin of the baseboard management controller to maintain the shutdown state (always off), and the display module immediately enters the cycle mode at this time. At this time, the display source register of the display source remains the baseboard management controller, and the first operating system does not process the display update request (that is, since it is in the shutdown state, it does not need to display any information). The mechanism cooperates with the watchdog timer to ensure that there is no loss of display data and stability during a long standby period.

[0097] (2) Fault-tolerant mechanism for abnormal interruption scenarios.

[0098] For abnormal interruptions in the basic input / output system startup process (scenarios 7-8), for the power cycle scenario (scenario 7), the system adopts a phased control right recovery strategy: when the power cycle signal is detected, it will first shut down and then start up. When shutting down, the display source is switched to the baseboard management controller, and when starting up again, the first operating system takes over the display output, outputs the preset basic state information, and waits for the basic input / output system to initialize to a certain stage. The basic input / output system switches the control right to the basic input / output system, and at this time the basic input / output system takes over the second stage display output (such as hardware self-test details). This process is realized through mode switching of the display source register, ensuring that there is no gap in the display content.

[0099] For the AC power failure scenario (scenario 8), the embodiment of the application introduces a chip default value recovery mechanism: when the AC power is detected to be powered on again, the display source register of the display source is automatically restored to the default basic input / output system mode. At this time, the first operating system judges the interruption property through the timing characteristics of the first pin of the baseboard management controller, and if it is identified as AC power on rather than a hot restart, the display source register is immediately configured to recover the display control right. Similar to the power cycle scenario, the first operating system first outputs the first stage basic display content, and then the basic input / output system takes over the display output after completing the key hardware initialization.

[0100] The above design cooperates with the hardware signal through the register-level state machine control to build a robust display management system in the basic input / output system startup abnormal scenario. The power cycle scenario focuses on the orderly transfer of control rights, while the AC power recovery scenario strengthens the display source protection in the default value environment, and both ensure the continuity of display output and the integrity of data after the server is interrupted.

[0101] (3) Seamless connection of baseboard management controller restart scenarios.

[0102] In the baseboard management controller restart scenario (scenario 9-12) of the server management system, the embodiment of the application realizes the persistent keeping function of the display source configuration. Different from the behavior of restoring the default value of the register after the AC power is off, the system can keep the display source configuration parameters complete during the baseboard management controller restart process through the special design of the display source register. The mechanism is realized through the double-latch architecture: when the restart signal of the baseboard management controller is detected, the current display source configuration of the display source register is immediately written into the non-volatile storage block, and after the restart is completed, the first operating system automatically reads the historical value of the display source control register from the non-volatile storage and recovers the display output process according to the original display source configuration.

[0103] Through system-level verification, the server display control system provided by the embodiment of the application can be applied to various mainstream server architectures and cover multiple types of server platform models.

[0104] The embodiment of the application provides a server display control method, and the method is described in detail in combination with the execution process of the server display control method.

[0105] Figure 5 The flowchart of the server display control method provided by the embodiment of the application.

[0106] As shown in Figure 5 applied to the baseboard management controller, the server display control method provided by the embodiment of the application can include: S501: after power-on, the first operating system is started before the second operating system.

[0107] S502: after the first operating system is started, the starting type of the server is identified, if the starting type is cold starting, the display module of the server is called to control the display to display the first information, and if the starting type is hot restart, the display control right of the display before power-off is maintained.

[0108] S503: after the first operating system starts the basic input and output system and completes the initialization of the display module, the display control right is switched to the basic input and output system, so that the basic input and output system calls the display module to control the display to display the second information.

[0109] The specific implementation mode of the embodiment of the application can refer to the introduction of the above-mentioned server display control system embodiment.

[0110] Figure 6 The flowchart of another server display control method provided by the embodiment of the application.

[0111] As shown in Figure 6As shown, the judgment step after the first operating system in the baseboard management controller is started in the server display control system introduced in the above embodiment can include S601~S615.

[0112] S601: Read the startup type register to obtain the startup type of the baseboard management controller.

[0113] S602: Judge whether the server is powered on; if yes, go to S603; if no, go to S615.

[0114] S603: Judge whether the startup type is cold startup; if yes, go to S604; if no, go to S605.

[0115] S604: Set the display source register to the third flag bit.

[0116] S605: Judge whether the basic input / output system completes the power-on self-test process; if yes, go to S615; if no, go to S606.

[0117] S606: Judge whether the display source register is the fourth flag bit (indicating that the basic input / output system has the display control right); if yes, go to S607; if no, go to S608.

[0118] S607: Set the display flag register to the sixth flag bit (indicating that the baseboard management controller does not control the display output).

[0119] S608: Judge whether the display flag register is the sixth flag bit (indicating that the baseboard management controller does not control the display output); if yes, go to S609; if no, go to S610.

[0120] S609: Call the display module to control the display to display the first information, and set the display flag register to the fifth flag bit (indicating that the baseboard management controller controls the display output).

[0121] S610: Set the debugging function register to the seventh flag bit to open the bridge channel.

[0122] Execute the software dog feeding dog. Interval the first period. The first period can be 1 second.

[0123] S611: Judge whether the power-on self-test process is completed; if yes, go to S613; if no, go to S612.

[0124] S612: Judge whether the server is powered on, then go to S606; if no, go to S613.

[0125] S613: Set the debugging function register to the eighth flag bit to close the bridge channel.

[0126] The software dog is fed. The first period is set. The first period can be 1 second.

[0127] S614: judging whether the self-completion of the power-on self-test procedure is changed to uncompletion; if yes, going to S615; if no, going to S616.

[0128] S615: setting the display flag register to the sixth flag bit (indicating that the baseboard management controller does not control the display output).

[0129] S616: setting the display source register to the third flag bit (indicating that the baseboard management controller has the display control right) and returning to S602.

[0130] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be realized by means of software and the necessary general hardware platform, of course, can also be realized by hardware, but in many cases, the former is a better embodiment.

[0131] The embodiment of the present application further provides a server display control device, which is applied to a baseboard management controller, and the baseboard management controller comprises a first operating system and a second operating system; the server display control device comprises: an identification unit, which is used for identifying the starting type of a server after the baseboard management controller is powered on and the first operating system is started before the second operating system; a display control unit, which is used for calling a display module of the server to control the display to display first information if the starting type is cold starting; and maintaining the display control right of the display before power-off if the starting type is hot restart; and a switching unit, which is used for switching the display control right to a basic input / output system of the server after the first operating system starts the basic input / output system and completes the initialization of the display module, so that the basic input / output system calls the display module to control the display to display second information.

[0132] The features of the embodiment of the server display control device can be referred to the related description of the embodiment of the server display control method, which will not be repeated here.

[0133] The embodiment of the present application further provides an electronic device, which comprises a memory and a processor, the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any of the above-mentioned server display control method embodiments.

[0134] The embodiment of the present application further provides a non-volatile storage medium, which stores a computer program, and the computer program is configured to execute the steps in any of the above-mentioned server display control method embodiments when running.

[0135] In an example embodiment, the non-volatile storage medium described above can include, but is not limited to, a U disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store computer programs.

[0136] Embodiments of the present application also provide a computer program product comprising a computer program which, when executed by a processor, implements the steps of any of the server display control method embodiments described above.

[0137] Embodiments of the present application also provide another computer program product comprising a non-volatile storage medium storing a computer program which, when executed by a processor, implements the steps of any of the server display control method embodiments described above.

[0138] The skilled person can further realize that the units and algorithm steps of the examples described in connection with the embodiments disclosed herein can be realized in electronic hardware, computer software or a combination of both. In order to clearly illustrate the interchangeability of hardware and software, the general description of the examples has been described in terms of functional generalities. Whether the functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. The skilled person can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0139] The server display control system and method, device, equipment, medium and product provided by the present application are described in detail above. The principles and implementation modes of the present application are described by applying specific examples in this paper. The above description of the examples is only applicable to help understand the method of the present application and its core idea. It should be noted that for ordinary skilled persons in the technical field, without departing from the principles of the present application, the present application can be improved and modified in several ways. These improvements and modifications also fall within the scope of protection of the present application.

Claims

1. A server display control system, characterized in that, include: Baseboard management controller, basic input / output system; The baseboard management controller includes a first operating system and a second operating system; After the baseboard management controller is powered on, the first operating system starts before the second operating system. After starting, it identifies the server's startup type. If the startup type is a cold start, it calls the server's display module to control the display to show the first information. If the startup type is a warm restart, it maintains the display control of the display before the power failure. After the basic input / output system starts up, it executes the server's power-on self-test process. After completing the initialization of the display module, it switches the display control rights with the baseboard management controller. After the switch is completed, it calls the display module to control the display to show the second information.

2. The server display control system according to claim 1, characterized in that, The first operating system identifies the server's boot type, including: The first operating system accesses the boot type register of the baseboard management controller. If the boot type register is a first flag bit, the boot type is determined to be a cold boot; if the boot type register is a second flag bit, the boot type is determined to be a warm reboot.

3. The server display control system according to claim 1, characterized in that, The first operating system identifies the server's boot type, including: The first operating system identifies the timing state of the first pin of the baseboard management controller. If the first pin is in the first timing state, the startup type is determined to be a cold start; if the first pin is in the second timing state, the startup type is determined to be a warm restart. The first pin is connected to the first controller of the server. The first controller is used to configure the first pin of the baseboard management controller to a first state after the server's power-on sequence is completed; the first pin is in a second state by default.

4. The server display control system according to claim 1, characterized in that, The first operating system is also used to set the display source register of the baseboard management controller to a third flag bit before calling the display module of the server to control the display to display the first information; When the display source register is set to the third flag bit, the corresponding baseboard management controller has control over the display; when the display source register is set to the fourth flag bit, the corresponding basic input / output system has control over the display.

5. The server display control system according to claim 4, characterized in that, The display source register defaults to the fourth flag bit after the server restarts.

6. The server display control system according to claim 5, characterized in that, The first operating system invokes the server's display module to control the display to show the first information, including: The first operating system reclaims display control by changing the display source register from the fourth flag bit to the third flag bit.

7. The server display control system according to claim 4, characterized in that, The first operating system is also used to set the display flag register of the baseboard management controller to the fifth flag bit when calling the display module to control the display to display the first information, and to set the display flag register to the sixth flag bit when the basic input / output system changes from the power-on self-test process completion state to the power-on self-test process incomplete state; The first operating system sets the display source register of the baseboard management controller to the third flag bit, including: Before configuring the display source register, the first operating system checks the status of the display flag register. If the display flag register is the fifth flag bit, the display source register is not configured. If the display flag register is the sixth flag bit, the display source register is accessed and configured to the third flag bit.

8. The server display control system according to claim 1, characterized in that, The first operating system invokes the display module to control the display to show the first information, including: If the first operating system detects that the second pin of the baseboard management controller is in the third state, it calls the display module to control the display to show the first information; The second pin is connected to the basic input / output system, which is also used to set the second pin to the fourth state after completing the power-on self-test process; the second pin is in the third state by default.

9. The server display control system according to claim 1, characterized in that, The first operating system is also used to set the debug function register of the baseboard management controller to the seventh flag bit after the power-on sequence of the server is completed, and to set the debug function register to the eighth flag bit after the basic input / output system completes the power-on self-test process. The seventh flag bit corresponds to enabling the bridging channel between the motherboard of the server and the memory of the baseboard management controller; The eighth flag corresponds to closing the bridging channel; The debug function register is set to the eighth flag bit by default.

10. The server display control system according to claim 9, characterized in that, The basic input / output system switches display control between itself and the baseboard management controller, including: The basic input / output system accesses the baseboard management controller through the bridging channel and sets the display source register of the baseboard management controller to the fourth flag bit; When the display source register is set to the third flag bit, the corresponding baseboard management controller has control over the display; when the display source register is set to the fourth flag bit, the corresponding basic input / output system has control over the display.

11. The server display control system according to claim 1, characterized in that, The baseboard management controller and the basic input / output system are connected via a shared memory. The basic input / output system switches display control between itself and the baseboard management controller, including: The basic input / output system interacts with the baseboard management controller via the shared memory to display control switching information, thereby switching display control.

12. The server display control system according to claim 1, characterized in that, The first operating system invokes the server's display module to control the display to show the first information, including: The first operating system invokes a first thread to invoke the display module to control the display to show the first information; The first operating system is also used to call the second thread to monitor the running status of the first thread, and to control the first thread to restart in order to resume display control when the first thread is in an abnormal state.

13. The server display control system according to claim 1, characterized in that, The first piece of information is the information indicating that the server has started normally.

14. The server display control system according to claim 1, characterized in that, The first operating system invokes the server's display module to control the display to show the first information, including: The first operating system accesses the shared memory between the baseboard management controller and the basic input / output system to determine the power-on self-test (POST) phase of the basic input / output system, and calls the display module to control the display to show the information of the POST phase.

15. The server display control system according to any one of claims 1 to 14, characterized in that, The first operating system is a real-time operating system, and the second operating system is a non-real-time operating system.

16. A server display control method, characterized in that, Applications to baseboard management controllers include: After power-on, the first operating system starts before the second operating system; After the first operating system starts, it identifies the startup type of the server. If the startup type is a cold start, it calls the server's display module to control the display to show the first information; if the startup type is a warm restart, it maintains the display control of the display before the power failure. After the server's basic input / output system starts up and completes the initialization of the display module, the first operating system switches the display control to the basic input / output system, so that the basic input / output system calls the display module to control the display to show the second information.

17. A server display control device, characterized in that, An application is made to a baseboard management controller, wherein the baseboard management controller includes a first operating system and a second operating system; The server display control device includes: The identification unit is used to identify the startup type of the server after the baseboard management controller is powered on and the first operating system starts before the second operating system. The display control unit is used to call the server's display module to control the display to show the first information if the startup type is cold start; and to maintain the display control of the display before the power failure if the startup type is warm restart. A switching unit is used to switch display control to the basic input / output system after the first operating system starts up and completes the initialization of the display module on the server, so that the basic input / output system calls the display module to control the display to show the second information.

18. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the server display control method as described in claim 16 when executing the computer program.

19. A non-volatile storage medium, characterized in that, The non-volatile storage medium stores a computer program, wherein when the computer program is executed by a processor, it implements the steps of the server display control method as described in claim 16.

20. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the server display control method as described in claim 16.

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