Data communication method, display system, computer equipment and readable storage medium

Abstract

The invention relates to a data communication method, a display system, computer equipment and a readable storage medium. The data communication method is applied to a display module of a display system, and sequentially receives target digital signals sent by a control end in the display system; the target digital signal is generated by the control end aiming at the to-be-displayed task; for each received target digital signal, identifying a communication state of the target digital signal; under the condition that the communication state is effective communication, receiving operation on the target digital signal is executed, and the operation frequency of the receiving operation is updated; and when the operation frequency is equal to the preset operation frequency, ending data communication with the control end for the to-be-displayed task. Under the condition that data transmission coherence and clock signal continuity are ensured, target digital signals are selectively received through communication state recognition, filtering and shielding of invalid data are achieved, and reliability of data communication is improved; and the integrity of the data is ensured by introducing a communication termination judgment mechanism.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data communication, and in particular to a data communication method, a display system, a computer device and a readable storage medium. BACKGROUND

[0002] In a traditional LED display system, a control end is responsible for providing data signals and clock signals to each LED module. When the control end sends display data to a module, since the display data needs to be read and properly processed before being sent, it can result in that the preparation speed of the display data is slower than the sending speed, so as to be difficult to ensure the continuity and uninterruptedness of the data sending process. In the prior art, in the face of the interruption of data sending, the method usually adopted is to stop the data sending and close the clock signal at the same time. However, this method cannot be applied to display application scenarios with strict timing requirements.

[0003] In the related art, in the case of data preparation speed lag, it is difficult to ensure the continuity of data sending and the continuity of the clock signal. At present, there is no effective solution to this problem. SUMMARY

[0004] Therefore, it is necessary to provide a data communication method, a display system, a computer device and a readable storage medium in view of the above technical problems.

[0005] In a first aspect, the present application provides a data communication method applied to a display module of a display system, and the method comprises:

[0006] receiving target digital signals sent by a control end in the display system in sequence; the target digital signals are generated by the control end for a to-be-displayed task;

[0007] For each received target digital signal, identifying the communication state of the target digital signal;

[0008] In the case that the communication state is communication valid, performing a receiving operation on the target digital signal and updating the operation number of the receiving operation;

[0009] In the case that the operation number is equal to a preset operation number, ending the data communication between the control end and the display module for the to-be-displayed task.

[0010] In one of the embodiments, the target digital signal comprises a state flag bit; and the identifying the communication state of the target digital signal comprises:

[0011] identifying the state flag bit;

[0012] if the status flag is a valid flag, determining that the communication state of the target digital signal is valid communication;

[0013] if the status flag is an invalid flag, determining that the communication state of the target digital signal is invalid communication;

[0014] wherein the valid flag and the invalid flag are complementary codes.

[0015] In one embodiment, the target digital signal includes data bits; and in the case of valid communication, the receiving operation of the target digital signal is performed, and the number of operations of the receiving operation is updated, including:

[0016] in the case of valid communication, it is determined that the data bits of the target digital signal carry communication data;

[0017] if the communication data is a target instruction, the receiving operation of the target instruction is performed;

[0018] if the communication data is a target data packet, the receiving operation of the target data packet is performed, and the cumulative number of the target data packet is updated;

[0019] the cumulative number of the target data packet is determined as the number of operations of the receiving operation.

[0020] In one embodiment, the sending time of the target digital signal carrying the target instruction is earlier than the sending time of any target digital signal carrying the target data packet; after the receiving operation of the target instruction is performed, the method further includes:

[0021] parsing the target instruction to obtain a preset number of operations corresponding to the to-be-displayed task;

[0022] The preset number of operations is determined by the control end according to the total number of target data packets corresponding to the to-be-displayed task.

[0023] In one embodiment, the target digital signal includes data bits; the method further includes:

[0024] in the case of invalid communication, it is determined that the data bits of the target digital signal carry invalid data, and the invalid data is not processed;

[0025] all encodings in the invalid data are the same as the invalid flag; and the bit width of the invalid data is determined by the control end according to the loading duration of the communication data corresponding to the to-be-displayed task.

[0026] In a second aspect, the application further provides a data communication method applied to a control end of a display system, the method comprising:

[0027] loading, in a preset loading sequence, communication data corresponding to a to-be-displayed task for the to-be-displayed task;

[0028] generating a plurality of target digital signals in succession according to a loading state of the communication data;

[0029] sending the plurality of target digital signals to display modules in the display system in succession.

[0030] In one of the embodiments, the communication data comprises target instructions; and the generating of the plurality of target digital signals in succession according to the loading state of the communication data comprises:

[0031] if the loading state of the target instructions is incomplete loading, generating a first invalid field and taking the first invalid field as a target digital signal; the first invalid field comprises an invalid flag and first invalid data; all codes in the first invalid data are the same as the invalid flag; and a bit width of the first invalid data is determined according to a loading duration of the target instructions;

[0032] if the loading state of the target instructions switches from incomplete loading to complete loading, generating a target digital signal according to a valid flag and the target instructions;

[0033] the valid flag and the invalid flag are complementary codes.

[0034] In one of the embodiments, the communication data comprises a plurality of target data packets; and the generating of the plurality of target digital signals in succession according to the loading state of the communication data comprises:

[0035] for each of the target data packets, if the loading state of the target data packet is incomplete loading, generating a second invalid field and taking the second invalid field as a target digital signal; the second invalid field comprises an invalid flag and second invalid data; all codes in the second invalid data are the same as the invalid flag; and a bit width of the second invalid data is determined according to a loading duration of the target data packet;

[0036] if the loading state of the target data packet switches from incomplete loading to complete loading, generating a target digital signal according to a valid flag and the target data packet;

[0037] the valid flag and the invalid flag are complementary codes.

[0038] In a third aspect, the present application also provides a display system, comprising a control terminal and a display module; the control terminal and the display module are in communication connection;

[0039] The display module is configured to execute the data communication method in any one of the embodiments of the first aspect.

[0040] The control terminal is configured to execute the data communication method in any one of the embodiments of the second aspect.

[0041] In a fourth aspect, the present application also provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the method in any one of the embodiments of the first aspect and the second aspect.

[0042] In a fifth aspect, the present application also provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the steps of the method in any one of the embodiments of the first aspect and the second aspect.

[0043] In a sixth aspect, the present application also provides a computer program product, comprising a computer program, and the computer program is executed by a processor to implement the steps of the method in any one of the embodiments of the first aspect and the second aspect.

[0044] The data communication method, the display system, the computer device and the readable storage medium are configured to sequentially receive target digital signals sent by the control terminal in the display system through the display module; wherein the target digital signals are generated by the control terminal for a to-be-displayed task; for each received target digital signal, the communication state of the target digital signal is identified; in the case that the communication state is valid, the receiving operation of the target digital signal is executed, and the operation number of the receiving operation is updated; in the case that the operation number is equal to a preset operation number, the data communication between the control terminal for the to-be-displayed task is ended; in the case of ensuring the data transmission continuity and the clock signal continuity, the communication state of each sequentially received target digital signal is identified, and the target digital signal is selectively received according to the identification, so as to realize the filtering and shielding of invalid data, avoid the problem of data communication confusion, improve the reliability and applicability of data communication; meanwhile, by introducing the communication termination judgment mechanism, the problem of data omission can be effectively avoided, and the integrity of data is ensured. BRIEF DESCRIPTION OF DRAWINGS

[0045] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related art, the accompanying drawings needed to be used in the description of the embodiments of the present application or the related art will be briefly introduced. Obviously, the accompanying drawings in the following description only represent some embodiments of the present application, and for those skilled in the art, other related drawings can be obtained based on these drawings without any creative effort.

[0046] Figure 1 The overall structure diagram of the display system in one embodiment is shown in the figure.

[0047] Figure 2 The flowchart of the data communication method in one embodiment is shown in the figure.

[0048] Figure 3 The flowchart of the communication state identification step in one embodiment is shown in the figure.

[0049] Figure 4 The flowchart of the target digital signal receiving step in one embodiment is shown in the figure.

[0050] Figure 5 The flowchart of the data communication method in another embodiment is shown in the figure.

[0051] Figure 6 The flowchart of the data communication method in one specific embodiment is shown in the figure.

[0052] Figure 7 The schematic diagram of the continuous multiple target digital signals in one specific embodiment is shown in the figure.

[0053] Figure 8 The internal structure diagram of the computer device in one embodiment is shown in the figure. DETAILED DESCRIPTION

[0054] In order to make the purpose, technical solutions and advantages of the present application more clear, the present application will be further described in detail below in combination with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.

[0055] In one embodiment, Figure 1 The overall structure diagram of the display system in one embodiment is shown in the figure. The display system includes a control end and a display module. The control end and the display module are in communication connection.

[0056] The control terminal may include, but is not limited to, a controller; the controller, such as a microcontroller unit (MCU). The control terminal includes a clock signal output terminal and a data signal output terminal; the clock signal output terminal is used to provide the corresponding clock signal CLK to the display module; the data signal output terminal is used to provide the corresponding target digital signal DATA to the display module.

[0057] The display module includes multiple cascaded LED modules (not shown in the figure); each LED module includes multiple driving circuits (not shown in the figure) connected in series, and multiple LEDs (not shown in the figure) arranged in an array. The multiple driving circuits in the LED module are used to drive the multiple LEDs connected to it to display corresponding parts of the image to be displayed; it can be understood that the multiple cascaded LED modules are used to display different parts of the image to be displayed, thereby splicing together to form a complete display image.

[0058] In one embodiment, such as Figure 2 As shown, Figure 2 This is a flowchart illustrating a data communication method in one embodiment; the data communication method is applied to a display module of a display system and includes the following steps:

[0059] Step S201: Receive the target digital signals sent by the control terminal in the display system in sequence.

[0060] The target digital signal is generated by the control terminal for the task to be displayed. The task to be displayed is used to drive the display system to complete the corresponding image display operation. It is understood that the task to be displayed is related to the actual display needs, but no specific limitations are made here.

[0061] It should be noted that the display system executes a data communication method once for each task to be displayed.

[0062] The target digital signal carries communication data or invalid data. The communication data includes at least target instructions and target data packets. The target instructions initiate a complete data communication process for the task to be displayed; the target instructions may include, but are not limited to, a preset number of operations. The preset number of operations is determined in advance by the control terminal based on the total number of target data packets corresponding to the task to be displayed; the target data packets carry specific display data. Invalid data refers to data fields with no practical meaning, i.e., they do not carry any display data.

[0063] Step S202: For each received target digital signal, identify the communication status of the target digital signal.

[0064] It can be understood that the communication state of the target digital signal is a basis for judging whether the current data transmission between the display module and the control end is valid. By identifying the communication state of the target digital signal, the display module can accurately determine whether the target digital signal carries valid communication data.

[0065] The communication state includes communication valid and communication invalid. The communication valid indicates that the target digital signal carries communication data. The communication invalid indicates that the target digital signal does not carry communication data.

[0066] In step S203, if the communication state is communication valid, the receiving operation of the target digital signal is performed, and the operation number of the receiving operation is updated.

[0067] It can be understood that the display module can accurately know whether the control end is currently in the state of suspending the sending of communication data by identifying the communication state of the target digital signal, and accordingly executes a selective receiving strategy on the received target digital signal, that is, only the target digital signal with the communication state of communication valid is executed for receiving operation, and the target digital signal with the communication state of communication invalid is not processed. Thus, when the control end does not send communication data, the display module can avoid the problem that the display quality cannot be guaranteed due to invalid operation or error response triggered by no communication data input.

[0068] The operation number of the receiving operation is used to record the cumulative number of successfully received target data packets of the display system in one complete data communication.

[0069] In step S204, if the operation number is equal to the preset operation number, the data communication between the display module and the control end for the to-be-displayed task is ended.

[0070] It can be understood that the preset operation number is a basis for judging whether the data communication is completed, and is used to avoid the problem of data omission. The preset operation number is determined by the control end in advance according to the total number of target data packets corresponding to the to-be-displayed task.

[0071] For example, as shown in the display system of Figure 1 Under the premise of not interrupting the clock signal, the control end sends a plurality of target digital signals to the display module through the data signal output end. The display module identifies the communication state of each received target digital signal. If the communication state of the target digital signal is communication valid, it indicates that the target digital signal carries communication data, and the receiving operation of the target digital signal is performed, and the operation number of the receiving operation is updated. If the communication state of the target digital signal is communication invalid, it indicates that the target digital signal does not carry communication data, and no processing is required. In this way, until the operation number is equal to the preset operation number, the data communication between the display module and the control end for the to-be-displayed task is ended.

[0072] In this embodiment, while ensuring the continuity of data transmission and clock signal continuity, the communication status of each target digital signal received in sequence is identified, and the target digital signal is selectively received accordingly. This achieves the filtering and shielding of invalid data, avoids the problem of data communication chaos, and improves the reliability and applicability of data communication. At the same time, by introducing a communication termination judgment mechanism, the problem of data omission can be effectively avoided, ensuring the integrity of the data.

[0073] In one embodiment, such as Figure 3 As shown, Figure 3 This is a flowchart illustrating the communication status identification step in one embodiment; identifying the communication status of the target digital signal includes the following steps:

[0074] Step S301: Identify the status flag bit.

[0075] The target digital signal includes a status flag bit. The status flag bit is a single bit embedded at the beginning of the target digital signal, used to indicate the communication status of the target digital signal. The status flag bit includes a valid flag or an invalid flag; the valid flag and the invalid flag are inverses of each other. For example, if the valid flag is set to "0", then the invalid flag must be set to "1"; if the valid flag is set to "1", then the invalid flag must be set to "0".

[0076] Step S302: If the status flag is valid, then the communication status of the target digital signal is determined to be valid.

[0077] Step S303: If the status flag is invalid, then the communication status of the target digital signal is determined to be invalid.

[0078] For example, for each received target digital signal, the status flag bit of the target digital signal is identified, that is, the first bit of the target digital signal is identified; if the status flag bit is a valid flag, the communication status of the target digital signal is determined to be valid; if the status flag bit is an invalid flag, the communication status of the target digital signal is determined to be invalid, and the target digital signal can be ignored.

[0079] In this embodiment, the first bit of the target digital signal is used as a status flag bit. The display module can quickly and accurately determine the communication status of the target digital signal by recognizing the status flag bit. It can determine its validity without parsing the entire target digital signal, thus speeding up the determination of the communication status.

[0080] In one embodiment, such as Figure 4 As shown, Figure 4This is a flowchart illustrating the target digital signal reception step in one embodiment; when the communication status is valid, the target digital signal reception operation is performed, and the number of reception operations is updated, including the following steps:

[0081] Step S401: When the communication status is valid, determine that the data bits of the target digital signal carry communication data.

[0082] The target digital signal includes data bits; the data bits are multiple bits embedded after the status flag bits of the target digital signal.

[0083] It should be noted that when communication data is carried within the data bits of the target digital signal, the bit width of the target digital signal is (1+n) bits, where 1 bit is the bit width of the status flag bit in the target digital signal, and n bits are the bit width of the data bits in the target digital signal, i.e., the bit width of the communication data, n bits. It should be noted that the bit width of the communication data, n bits, needs to be set in advance according to the task to be displayed; no specific limitation is made here. For example, the bit width of the communication data could be 16 bits.

[0084] Step S402: If the communication data is a target instruction, then perform the target instruction receiving operation.

[0085] In an exemplary embodiment, after performing the receiving operation of the target instruction, the method further includes: parsing the target instruction to obtain the preset number of operations corresponding to the task to be displayed.

[0086] It is understandable that the target instruction may include, but is not limited to, a preset number of operations; the preset number of operations is determined by the control terminal based on the total number of target data packets corresponding to the task to be displayed.

[0087] In step S403, if the communication data is a target data packet, then perform a receiving operation on the target data packet and update the cumulative number of target data packets.

[0088] It is understandable that the transmission time of the target digital signal carrying the target instruction is earlier than the transmission time of any target digital signal carrying the target data packet. The target instruction is used to initiate a complete data communication process for the task to be displayed. The target data packet carries the specific display data.

[0089] Step S404: The cumulative number of target data packets is determined as the number of operations for the receive operation.

[0090] For example, if the communication status of the target digital signal is valid and the communication data carried in the data bits of the target digital signal is a target instruction, then the target instruction receiving operation is performed; further, the target instruction is parsed to obtain the preset number of operations corresponding to the task to be displayed; wherein, the preset number of operations is used to determine whether the data communication has ended.

[0091] If the communication status of the target digital signal is valid, and the communication data carried in the data bits of the target digital signal is the target data packet, then the receiving operation of the target data packet is performed, and the cumulative number of the target data packets is incremented by 1; then, the cumulative number of the target data packets is determined as the number of receiving operations; further, the target data packet is parsed to obtain the corresponding display data for display control.

[0092] If the communication status of the target digital signal is invalid, no action is taken; this process continues until the number of operations equals the preset number of operations, at which point the data communication between the controller and the control terminal for the task to be displayed ends.

[0093] In this embodiment, when the communication status is identified as valid, the data bits of the target digital signal are further parsed to confirm the specific communication content it carries, and then corresponding operations are performed to ensure the reliability of data communication. Simultaneously, determining the cumulative number of target data packets as the number of receiving operations allows for dynamic tracking of communication progress, helping to prevent data loss and ensuring the integrity of the final data.

[0094] In one embodiment, when the communication status is invalid, it is determined that the data bits of the target digital signal carry invalid data, and the invalid data is not processed.

[0095] Invalid data refers to data fields that have no practical meaning and are used to maintain the continuity of data transmission between the control terminal and the display module.

[0096] All codes in invalid data are identical to those in the invalid flag; the bit width of invalid data is determined by the control terminal based on the loading time of the communication data corresponding to the task to be displayed. The loading time refers to the time period required for the control terminal to process one piece of communication data (target instruction or target data packet).

[0097] It should be noted that when communication data is carried within the data bits of the target digital signal, the bit width of the target digital signal is (1+m) bits, where 1 bit is the bit width of the status flag bit in the target digital signal, and m bits are the bit width of invalid data (i.e., the bit width of the data bits) in the target digital signal. It should be noted that the bit width of the invalid data (m bits) needs to be dynamically configured by the control terminal based on the loading duration of the communication data; no specific limit is made here, and m>0.

[0098] Understandably, in practical applications, the processing speed of communication data by the control end may be slower than its transmission speed. Therefore, before sending each set of communication data, if the previous set of communication data has been sent and the next set of communication data has been loaded, the control end can directly send the next set of communication data to the display module after the previous set has been sent, without sending invalid data. If the previous set of communication data has been sent but the next set of communication data has not been loaded, the control end needs to reserve a certain time period for loading the next set of communication data. Only after the communication data has been loaded can it be sent to the display module. During this loading period, the control end will generate invalid data of corresponding bit width and send it to the display module according to the loading time of the communication data. This is to maintain the continuity of data transmission without interrupting the clock signal, ensure the stability of the communication process, and avoid communication interruptions or reception abnormalities caused by loading delays.

[0099] For example, taking the valid flag as "0" and the invalid flag as "1" as an example, for each communication data corresponding to the task to be displayed, the control terminal generates m bits of invalid data (m>0) based on the loading time T of the communication data. Based on the 1 bit invalid flag "1" and the m bits of invalid data, the corresponding target digital signal is generated and sent to the display module so that the display module can recognize the target digital signal. When the status flag bit of the target digital signal is recognized as invalid flag "1", it is determined that the data bits of the target digital signal carry invalid data.

[0100] It should be noted that since the bit width of invalid data is dynamically configured by the control terminal based on the loading time of the communication data, the display module cannot know its specific length in advance. Therefore, after identifying that the status flag bit of the target digital signal is invalid flag "1", the display module needs to identify each bit of the target digital signal's data to determine the end position of the invalid data.

[0101] It is understandable that the end of invalid data means that the corresponding communication data has been loaded and the control terminal has sent the target digital signal (with the status flag indicating validity) carrying the communication data to the display module, and the communication process has entered the communication data transmission stage.

[0102] In this embodiment, when the communication status is invalid, ignoring invalid data avoids the risk of display errors caused by incorrect parsing of invalid data, thus ensuring the quality of the displayed image. Simultaneously, when the display module cannot predict the bit width of invalid data, a bit-by-bit identification mechanism can accurately identify the end position of the invalid data, achieving accurate response to each target digital signal and further improving the reliability of data communication.

[0103] In one embodiment, such as Figure 5 As shown, Figure 5 This is a flowchart illustrating a data communication method in another embodiment; the data communication method is applied to the control terminal of a display system and includes the following steps:

[0104] Step S501: For the task to be displayed, load the communication data corresponding to the task to be displayed in sequence according to the preset loading order.

[0105] The task to be displayed is used to drive the display system to complete the corresponding image display operations. It is understood that the task to be displayed is related to the actual display needs, but no specific limitations are made here.

[0106] The preset loading order is the data arrangement rule followed by the control terminal when loading the communication data corresponding to the task to be displayed; the preset loading order needs to be set according to the display control requirements, and no specific limit is made here.

[0107] Step S502: Generate multiple consecutive target digital signals based on the loading status of the communication data.

[0108] The loading status of the communication data determines whether the status flag bits in the generated target digital signal are valid or invalid.

[0109] For example, when the communication data has not been loaded, a target digital signal is generated with the status flag bit set to invalid and the data bits set to invalid data (the bit width of the invalid data depends on the loading time of the communication data); when the communication data has been loaded, a target digital signal is generated with the status flag bit set to valid and the data bits set to the communication data (the bit width of the communication data needs to be preset according to the actual communication requirements).

[0110] Step S503: Multiple target digital signals are sequentially sent to the display module in the display system.

[0111] It is understandable that the control unit and the display module communicate using a serial data transmission method. Therefore, multiple target digital signals need to be sent to the display module sequentially according to a preset timing logic to ensure that the display module can correctly receive and identify each target digital signal. The preset timing logic needs to be set according to actual communication requirements and is not specifically limited here.

[0112] In this embodiment, without interrupting the clock signal, the communication data corresponding to the task to be displayed is loaded sequentially according to the preset loading order, and multiple consecutive target digital signals are generated according to the loading status of the communication data. This avoids the data interruption problem caused by the data not being ready, ensures the continuity of data transmission and the continuity of the clock signal, and improves the reliability and applicability of data communication.

[0113] In one embodiment, multiple consecutive target digital signals are generated based on the loading state of the communication data, including:

[0114] If the communication data has not been fully loaded, invalid data is generated based on the loading time of the communication data corresponding to the task to be displayed, and a target digital signal is generated based on the invalid flag and the invalid data.

[0115] If the communication data loading is complete, the target digital signal is generated based on the valid flag and the communication data.

[0116] In this embodiment, a corresponding target digital signal is generated based on the loading status of the communication data, which avoids the data interruption problem caused by the data not being ready and ensures the continuity of data transmission and the continuity of the clock signal.

[0117] In one embodiment, generating multiple consecutive target digital signals based on the loading status of communication data includes the following steps:

[0118] Step 1: If the loading status of the target instruction is incomplete, generate the first invalid field and use the first invalid field as the target digital signal.

[0119] The communication data includes target instructions; these target instructions may include, but are not limited to, a preset number of operations. The preset number of operations is determined in advance by the control terminal based on the total number of target data packets corresponding to the task to be displayed.

[0120] The first invalid field includes an invalid flag and first invalid data; all codes in the first invalid data are identical to those in the invalid flag; the bit width of the first invalid data is determined based on the loading time of the target instruction. It is understandable that the longer the loading time of the target instruction, the more bits the first invalid data will have.

[0121] In an exemplary embodiment, taking an invalid flag of "0" as an example, if the invalid flag has a bit width of 1 bit and the first invalid data has a bit width of m bits, then the first invalid field is a (1+m)-bit field of all "0"s. Here, m bits are related to the loading time of the target instruction.

[0122] Step 2: If the loading status of the target instruction changes from not being fully loaded to being fully loaded, then generate the target digital signal based on the valid flag and the target instruction.

[0123] In an exemplary embodiment, the valid flag has a bit width of 1 bit, and the target instruction has a bit width of n bits. The n bits need to be preset according to the actual display requirements and are not specifically limited here. The valid flag and the invalid flag are inverses of each other; for example, if the invalid flag is "0", then the valid flag is "1"; if the invalid flag is "1", then the valid flag is "0".

[0124] For example, in a complete data communication cycle, the control terminal needs to first load the target instruction and then load multiple target data packets sequentially according to a preset loading order. During the target instruction loading phase, the control terminal generates multiple consecutive target digital signals based on the loading status of the target instruction. Specifically, if the loading status of the target instruction is incomplete, a first invalid field including an invalid flag and first invalid data is generated, and the first invalid field is used as the target digital signal. The bit width of the first invalid data needs to be dynamically configured according to the loading duration of the target instruction. Until the loading status of the target instruction changes from incomplete to complete, a target digital signal including a valid flag and the target instruction is generated. The bit width of the target instruction needs to be set according to the actual display requirements and is not specifically limited here.

[0125] In this embodiment, during the loading of the target instruction, the control terminal generates a first invalid field to ensure the continuity of data transmission. At the same time, by setting an invalid flag, it ensures that the display module accurately identifies the current communication status and avoids incorrect parsing of invalid data, which would affect the display quality. When the target instruction is loaded, a target digital signal including a valid flag and the target instruction is generated to ensure that the display data can promptly identify changes in the current communication status based on the valid flag, thereby responding accurately to the corresponding target digital signal.

[0126] In one embodiment, generating multiple consecutive target digital signals based on the loading status of communication data includes the following steps:

[0127] Step 1: For each target data packet, if the loading status of the target data packet is not completed, a second invalid field is generated and the second invalid field is used as the target digital signal.

[0128] The communication data includes multiple target data packets; each target data packet carries specific display data.

[0129] The second invalid field includes an invalid flag and second invalid data; all encodings in the second invalid data are the same as those in the invalid flag; the bit width of the second invalid data is determined based on the loading time of the target data packet; it can be understood that the longer the loading time of the target data packet, the more bits the second invalid data will have.

[0130] In an exemplary embodiment, taking an invalid flag of "0" as an example, if the invalid flag has a bit width of 1 bit and the second invalid data has a bit width of k bits, then the second invalid field is a (1+k)-bit field of all "0"s. Here, k bits are related to the loading time of the target data packet.

[0131] Step 2: If the loading status of the target data packet changes from not being fully loaded to being fully loaded, then generate the target digital signal based on the valid flag and the target data packet.

[0132] In an exemplary embodiment, the valid flag has a bit width of 1 bit, and the target data packet has a bit width equal to the target instruction's bit width, both being n bits. The n bits need to be pre-set according to actual display requirements and are not specifically limited here. The valid and invalid flags are inverses of each other; for example, if the invalid flag is "0", then the valid flag is "1"; if the invalid flag is "1", then the valid flag is "0".

[0133] For example, in a complete data communication cycle, after the control terminal completes loading the target instruction, it loads multiple target data packets sequentially according to a preset loading order. For each target data packet, the control terminal generates multiple consecutive target digital signals based on the loading status of the target data packet. Specifically, if the loading status of the target data packet is incomplete loading, a second invalid field including an invalid flag and second invalid data is generated, and the second invalid field is used as the target digital signal. The bit width of the second invalid data needs to be dynamically configured according to the loading time of the target data packet. Until the loading status of the target data packet changes from incomplete loading to complete loading, a target digital signal including a valid flag and the target data packet is generated.

[0134] In this embodiment, during the loading of the target data packet, the control terminal generates a second invalid field to ensure the continuity of data transmission. At the same time, by setting an invalid flag, it ensures that the display module accurately identifies the current communication status and avoids incorrect parsing of invalid data, which would affect the display quality. When the target data packet is loaded, a target digital signal including a valid flag and the target data packet is generated to ensure that the display data can promptly identify changes in the current communication status based on the valid flag, thereby responding accurately to the corresponding target digital signal.

[0135] In one specific embodiment, such as Figure 6 As shown, Figure 6 This is a flowchart illustrating a data communication method in a specific embodiment. Taking a complete data communication cycle as an example, the data communication method applied to the display module includes the following steps:

[0136] Step S601: Receive the target digital signal sent by the control terminal in the display system.

[0137] Step S602: Identify the communication status of the target digital signal.

[0138] Step S603: If the status flag of the target digital signal is a valid flag and the digital bits of the target digital signal carry an n-bit target instruction, then perform a receiving operation on the n-bit target instruction, parse the target instruction, and obtain the preset number of operations corresponding to the task to be displayed.

[0139] Step S604: Receive the next target digital signal and identify the communication status of the next target digital signal.

[0140] Step S605: Determine whether the status flag bit of the next target digital signal is a valid flag.

[0141] If yes, proceed to step S606; otherwise, proceed to step S610.

[0142] Step S606: If the status flag of the next target digital signal is a valid flag, and the digital bits of the target digital signal carry an n-bit target data packet, then perform the receiving operation of the n-bit target data packet.

[0143] Step S607: The cumulative number of target data packets is incremented by 1 to determine the number of operation times for receiving.

[0144] Step S608: Determine whether the number of operations received is equal to the preset number of operations.

[0145] If yes, proceed to step S609; otherwise, proceed to step S604.

[0146] Step S609: End data communication with the control terminal for the task to be displayed.

[0147] In step S610, if the status flag of the next target digital signal is an invalid flag, then the invalid data in the target digital signal is identified bit by bit until the first valid flag after the invalid data is identified, and then the process jumps to step S606.

[0148] Understandably, the first valid flag after invalid data is detected indicates that a new target digital signal has been received and that the status flag of the target digital signal is valid.

[0149] The aforementioned data communication method, while ensuring data transmission continuity and clock signal continuity, identifies the communication status of each target digital signal received sequentially and selectively receives the target digital signal accordingly. This achieves the filtering and shielding of invalid data, avoids data communication chaos, and improves the reliability and applicability of data communication. At the same time, by introducing a communication termination judgment mechanism, it can effectively avoid data omission and ensure data integrity.

[0150] In one specific embodiment, see Figure 7 , Figure 7 This is a schematic diagram of multiple consecutive target digital signals in a specific embodiment; Figure 7 The first target digital signal has an invalid status flag and the data bits represent the first invalid data, indicating that the target instruction has not yet been loaded. The second target digital signal has a valid status flag and the data bits represent the target instruction. The third target digital signal has an invalid status flag and the data bits represent the second invalid data, indicating that the target data packet has not yet been loaded. The fourth target digital signal has a valid status flag and the data bits represent the target data packet, and so on. Further details are omitted here.

[0151] In one embodiment, such as Figure 1 As shown, a display system is also provided, which includes a control terminal and a display module; the control terminal and the display module are connected in communication.

[0152] The display module and control terminal are used to execute the data communication method described in any of the above embodiments, and will not be repeated here.

[0153] The control terminal may include, but is not limited to, a controller, such as a microcontroller. The control terminal includes a clock signal output terminal and a data signal output terminal; the clock signal output terminal is used to provide the corresponding clock signal CLK to the display module; the data signal output terminal is used to provide the corresponding target digital signal DATA to the display module.

[0154] The display module includes multiple cascaded LED modules (not shown in the figure); each LED module includes multiple driving circuits (not shown in the figure) connected in series, and multiple LEDs (not shown in the figure) arranged in an array. The multiple driving circuits in the LED module are used to drive the multiple LEDs connected to it to display corresponding parts of the image to be displayed; it can be understood that the multiple cascaded LED modules are used to display different parts of the image to be displayed, thereby splicing together to form a complete display image.

[0155] This embodiment shows that the system can ensure data transmission continuity and clock signal continuity, avoid data communication chaos, and improve the reliability and applicability of data communication.

[0156] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0157] In one exemplary embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 8 As shown, this computer device includes a processor, memory, input / output (I / O) interfaces, and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides the environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores data communication-related data. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communicating with external terminals via a network. When the computer program is executed by the processor, it implements a data communication method.

[0158] Those skilled in the art will understand that Figure 8 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0159] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.

[0160] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above method embodiments.

[0161] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0162] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0163] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0164] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0165] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A data communication method, characterized in that, The method, applied to a display module in a display system, includes: The system sequentially receives target digital signals sent by the control terminal in the display system; the target digital signals are generated by the control terminal for the task to be displayed. For each received target digital signal, identify the communication status of the target digital signal; If the communication status is valid, perform a receiving operation on the target digital signal and update the number of operations for the receiving operation. If the number of operations equals the preset number of operations, the data communication with the control terminal for the task to be displayed ends.

2. The method according to claim 1, characterized in that, The target digital signal includes a status flag bit; The communication status of identifying the target digital signal includes: Identify the status flag bit; If the status flag is valid, then the communication status of the target digital signal is determined to be valid. If the status flag is invalid, then the communication status of the target digital signal is determined to be invalid. The valid flag and the invalid flag are inverses of each other.

3. The method according to claim 1, characterized in that, The target digital signal includes data bits; the step of performing a receiving operation on the target digital signal and updating the number of operations for the receiving operation when the communication state is valid includes: When the communication state is valid, it is determined that the data bits of the target digital signal carry communication data. If the communication data is a target instruction, then the operation of receiving the target instruction is performed; If the communication data is a target data packet, then the receiving operation of the target data packet is performed, and the cumulative number of the target data packets is updated; The cumulative number of the target data packets is determined as the number of operations for the receiving operation.

4. The method according to claim 3, characterized in that, The transmission time of the target digital signal carrying the target instruction is earlier than the transmission time of any target digital signal carrying the target data packet; After performing the receiving operation of the target instruction, the method further includes: The target instruction is parsed to obtain the preset number of operations corresponding to the task to be displayed; The preset number of operations is determined by the control terminal based on the total number of target data packets corresponding to the task to be displayed.

5. The method according to claim 2, characterized in that, The target digital signal includes data bits; the method further includes: If the communication state is invalid, it is determined that the data bits of the target digital signal carry invalid data, and the invalid data is not processed. All codes in the invalid data are the same as the invalid flag; the bit width of the invalid data is determined by the control terminal based on the loading time of the communication data corresponding to the task to be displayed.

6. A data communication method, characterized in that, The method, applied to the control terminal of a display system, includes: For each task to be displayed, the communication data corresponding to that task is loaded sequentially according to a preset loading order. Based on the loading status of the communication data, a series of consecutive target digital signals are generated; Multiple target digital signals are sequentially sent to the display module in the display system.

7. The method according to claim 6, characterized in that, The communication data includes target instructions; the generation of multiple consecutive target digital signals based on the loading state of the communication data includes: If the loading status of the target instruction is incomplete, a first invalid field is generated and used as the target digital signal; the first invalid field includes an invalid flag and first invalid data; all codes in the first invalid data are the same as the invalid flag; the bit width of the first invalid data is determined according to the loading time of the target instruction; If the loading status of the target instruction changes from not being fully loaded to being fully loaded, then a target digital signal is generated based on the valid flag and the target instruction. The valid flag and the invalid flag are inverses of each other.

8. The method according to claim 6, characterized in that, The communication data includes multiple target data packets; the step of generating multiple consecutive target digital signals based on the loading state of the communication data includes: For each target data packet, if the loading status of the target data packet is incomplete, a second invalid field is generated and the second invalid field is used as the target digital signal; the second invalid field includes an invalid flag and second invalid data; all codes in the second invalid data are the same as the invalid flag; the bit width of the second invalid data is determined according to the loading time of the target data packet; If the loading status of the target data packet changes from never being loaded to being loaded, then a target digital signal is generated based on the valid flag and the target data packet. The valid flag and the invalid flag are inverses of each other.

9. A display system, characterized in that, The display system includes a control terminal and a display module; the control terminal and the display module are connected in communication. The display module is used to perform the data communication method according to any one of claims 1 to 5; The control terminal is used to execute the data communication method according to any one of claims 6 to 8.

10. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 8.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 8.

12. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 8.

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