HEMT device and preparation method thereof

Abstract

According to the HEMT device and the preparation method thereof provided by the invention, the boron ions are doped in the part, located in the non-gate region, of the barrier layer, so that the stress of a heterojunction interface can be further increased, the concentration of two-dimensional electron gas in the channel layer can be greatly improved, and then the on-resistance is reduced; and the part of the barrier layer located in the gate region is not doped with boron ions or only has a small amount of diffused boron ions, so that the threshold voltage of the device is not influenced, the device is ensured to have relatively high threshold voltage, further, the aluminum component in the aluminum-gallium-nitrogen barrier layer is reduced, and the performance of the device is improved. And the thickness of the barrier layer can be further reduced, so that the threshold voltage of the device can be further improved, and the problem that the threshold voltage and the on-resistance of the device are mutually restricted is effectively relieved. In addition, boron ions are doped in the barrier layer, and new operation equipment and process do not need to be developed, so that convenient operation can be carried out.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor manufacturing technology and relates to a HEMT device and its fabrication method. Background Technology

[0002] High Electron Mobility Transistor (HEMT) is a field-effect transistor based on the high mobility characteristics of two-dimensional electron gas (2DEG) in a heterojunction. It is widely used in many fields such as power management and radio communication.

[0003] HEMT devices generally include depletion-mode HEMT devices and enhancement-mode HEMT devices. Taking enhancement-mode HEMT devices as an example, P-type capping technology is currently the most commonly used and mass-produced enhancement-mode HEMT device in the industry. Introducing P-type doped GaN-based epitaxial material between the gate electrode and the AlGaN barrier layer can raise the conduction band of the entire heterojunction, thereby depleting the 2DEG in the channel below the gate to achieve enhancement-mode. In existing technologies, to prevent false turn-on in enhancement-mode HEMT devices during operation, it is necessary to increase the device's threshold voltage. Common improvements include thinning the barrier layer or reducing the aluminum content in the barrier layer to reduce the 2DEG concentration below the gate. However, existing epitaxial structures typically have a single aluminum composition, meaning that this improvement method also leads to a decrease in the 2DEG concentration in the non-gate region of the device, increasing the on-resistance. Conversely, increasing the aluminum content in the gate region of the barrier layer, while increasing the 2DEG concentration and reducing the on-resistance, is detrimental to improving gate reliability.

[0004] Therefore, it is necessary to provide a HEMT device and its fabrication method to solve the problem of mutual constraint between the threshold voltage and on-resistance of HEMT devices. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a HEMT device and its fabrication method, which solves the problem of mutual constraint between the threshold voltage and on-resistance of HEMT devices in the prior art.

[0006] To achieve the above and other related objectives, the present invention provides a HEMT device, the HEMT device comprising: a channel layer, a barrier layer and a gate electrode sequentially formed on a substrate; wherein the gate electrode is located at least in the gate region, and the portion of the barrier layer located in the non-gate region is further doped with boron ions.

[0007] Optionally, it further includes a P-type doped layer located between the barrier layer and the gate electrode, and within the gate region, such that the barrier layer has a first region undoped with the boron ions and a second region doped with the boron ions.

[0008] Optionally, the gate electrode extends out of the gate region toward the drain electrode and covers a portion of the barrier layer on one side of the P-type doped layer, such that the extent of the first region completely covers the extent of the gate region and includes an extended region extending toward the drain electrode.

[0009] Optionally, the barrier layer includes Al X Ga 1-X N layers, the Al X Ga 1-X The value of the Al component X in the N layer is less than or equal to 0.3; the thickness of the barrier layer is less than or equal to 25 nm.

[0010] Optionally, the doping concentration of the boron ions ranges from 10. 17 cm -2 ~10 18 cm -2 .

[0011] Optionally, the doping depth of the boron ions in the barrier layer is less than or equal to the thickness of the barrier layer.

[0012] This invention also provides a method for fabricating a HEMT device, comprising the following steps:

[0013] A channel layer and a barrier layer are sequentially formed on a substrate;

[0014] A gate electrode is formed above the barrier layer, and the gate electrode is located at least within the gate region;

[0015] Boron ions are incorporated into the barrier layer in the non-gate region.

[0016] Optionally, after forming the barrier layer, the method further includes the step of forming a P-type doped layer on the barrier layer, wherein the P-type doped layer is located in the gate region, such that the barrier layer has a first region undoped with the boron ions and a second region doped with the boron ions.

[0017] Optionally, when forming the gate electrode, the gate electrode covers the P-type doped layer and extends out of the gate region toward the drain electrode, and covers a portion of the barrier layer on one side of the P-type doped layer, such that the range of the first region completely covers the range of the gate region, and includes an extended region extending toward the drain electrode.

[0018] Optionally, the process of incorporating the boron ions into the barrier layer of the non-gate region includes an ion implantation process or a diffusion process, wherein the implantation energy of the ion implantation process is less than or equal to 5 keV, and the diffusion temperature of the diffusion process is less than or equal to 900°C.

[0019] As described above, the HEMT device and its fabrication method of the present invention, by doping boron ions in the portion of the barrier layer located in the non-gate region, can further increase the stress at the heterojunction interface, thereby greatly increasing the concentration of two-dimensional electron gas in the channel layer and thus reducing the on-resistance; and the portion of the barrier layer located in the gate region is not doped with boron ions or has only a small amount of diffused boron ions, so it will not affect the threshold voltage of the device, ensuring that the device has a high threshold voltage. Furthermore, it is also beneficial to reduce the aluminum content in the aluminum gallium nitride barrier layer and can further reduce the thickness of the barrier layer, thereby further improving the threshold voltage of the device and effectively alleviating the problem of mutual constraint between the threshold voltage and on-resistance of the device.

[0020] Furthermore, the present invention dops boron ions within the barrier layer, eliminating the need to develop new operating equipment and processes, thus enabling convenient operation. Attached Figure Description

[0021] Figure 1 The diagram shown is a structural schematic of a HEMT device in an embodiment of the present invention.

[0022] Figure 2 This is a schematic diagram of another structure of the HEMT device in an embodiment of the present invention.

[0023] Figure 3 This is a schematic flowchart illustrating the fabrication method of the HEMT device in an embodiment of the present invention.

[0024] Figures 4-5 This is shown in the embodiment of the present invention during the preparation Figure 1 The schematic diagram of the structure of the HEMT device during the process.

[0025] Figures 6-7 This is shown in the embodiment of the present invention during the preparation Figure 2 The schematic diagram of the structure of the HEMT device during the process.

[0026] Explanation of reference numerals in the attached figures

[0027] 100 substrate

[0028] 200 channel layer

[0029] 300 barrier layers

[0030] 400 P-type doped layer

[0031] 500 gate electrode

[0032] 500G gate region

[0033] A1 First Area

[0034] A2 Second Area

[0035] A3 Extended Area Detailed Implementation

[0036] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0037] In the detailed description of embodiments of the present invention, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged and not to scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. In actual fabrication, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0038] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include orientations of the device in use or operation other than those depicted in the drawings, and may include embodiments in which the first and second features are formed in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact. Furthermore, when a layer is referred to as “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.

[0039] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0040] See Figure 1 The diagram shown is a structural schematic of a HEMT device in an embodiment of the present invention, such as... Figure 1The HEMT device includes a channel layer 200, a barrier layer 300, and a gate electrode 500 sequentially formed on a substrate 100, wherein the gate electrode 500 is located at least within the gate region 500G, and the portion of the barrier layer 300 located in the non-gate region is further doped with boron ions (B).

[0041] The gate region 500G is defined as the region corresponding to the gate electrode 500 in the HEMT device, and the non-gate region is defined as the region in the HEMT device other than the region corresponding to the gate electrode 500.

[0042] As an example, the substrate 100 may include a gallium nitride (GaN) substrate, a silicon (Si) substrate, a silicon carbide (SiC) substrate, or a sapphire substrate, etc. The type of substrate 100 is not excessively limited here and can be selected as needed.

[0043] As an example, a transition layer (not shown in the figure) may be epitaxially grown between the substrate 100 and the channel layer 200. The transition layer may be, for example, a gallium nitride (GaN) transition layer, an aluminum nitride (AlN) transition layer, or an aluminum gallium nitride (AlGaN) transition layer. By setting the transition layer, on the one hand, the lattice mismatch between the substrate 100 and the subsequently epitaxially grown epitaxial layer can be reduced, thereby improving the crystal quality of the epitaxial layer; on the other hand, it can also serve as a high-resistivity layer to reduce device leakage current, etc.

[0044] As an example, both the channel layer 200 and the barrier layer 300 include III-V compound layers. For instance, the channel layer 200 may be a gallium nitride (GaN) layer, and the barrier layer 300 may be an aluminum gallium nitride (AlGaN) layer. X Ga 1-X The N) layer, but the choice of materials for the channel layer 200 and the barrier layer 300 is not limited to this.

[0045] Specifically, the bandgap width of the barrier layer 300 needs to be greater than the bandgap width of the channel layer 200, so that electrons in the wide-bandgap barrier layer 300 and electrons on the surface of the barrier layer 300 overflow and move towards the interface of the channel layer 200 near the barrier layer 300, where they are confined in a potential well formed at the interface, forming a two-dimensional electron gas (2DEG). Since these electrons in the potential well are spatially separated from the ionized impurities in the barrier layer, Coulomb scattering can be greatly reduced, thereby significantly improving the electron mobility in the conductive channel.

[0046] Since the barrier layer 300 located in the non-gate region is doped with boron ions, while the barrier layer 300 in the gate region 500G is not doped with boron ions or only a small amount of boron ions diffuse into the gate region 500G, the concentration of 2DEG in the channel layer 200 can be greatly increased, thereby reducing the on-resistance. Furthermore, since the gate region 500G is not doped with boron ions, it will not affect the threshold voltage of the device, ensuring that the device has a high threshold voltage.

[0047] In this embodiment, taking the channel layer 200 as a GaN layer and the barrier layer 300 as an AlGaN layer as an example, due to the lattice mismatch between AlGaN and GaN, the lattice constant of AlGaN is smaller than that of GaN. Therefore, a considerable stress will be generated at the AlGaN / GaN heterojunction interface. Both AlGaN and GaN have strong spontaneous polarization and piezoelectric polarization effects. Therefore, when there is a considerable stress at the AlGaN / GaN heterojunction interface, a high concentration of 2DEG will be formed in the triangular potential well of the AlGaN / GaN heterojunction. Since boron has an atomic number of 5 and its atomic radius is smaller than that of Al, N, and Ga atoms, when boron atoms are incorporated into the barrier layer 300 through ion implantation or diffusion, such as in the AlGaN lattice, it will further compress the lattice constant of AlGaN and increase the lattice constant of the channel layer 200, such as GaN. This will further increase the stress at the AlGaN / GaN heterojunction interface, thereby increasing the concentration of 2DEG.

[0048] Therefore, the HEMT device provided in this embodiment can maintain a lower on-resistance while increasing the threshold voltage, thus overcoming the problem that the threshold voltage and on-resistance of HEMT devices in traditional processes are mutually restrictive and difficult to further optimize.

[0049] Furthermore, this embodiment can also reduce the aluminum content in the barrier layer 300, for example, by using aluminum gallium nitride (Al₂O₃). X Ga 1-X The value of aluminum component X in the N) layer is less than or equal to 0.3 to improve the threshold voltage of the device. In a specific example, the value of aluminum component X can be further reduced, such as less than or equal to 0.1. Therefore, the value of aluminum component X in the barrier layer 300 can be 0.3, 0.2, 0.1, etc.

[0050] Furthermore, this embodiment also allows the thickness of the barrier layer 300 to be reduced, for example, the thickness of the barrier layer 300 can be less than or equal to 25nm, in order to improve the threshold voltage of the HEMT device. In a specific example, the thickness of the barrier layer 300 can be further reduced to less than or equal to 10nm. Therefore, the thickness of the barrier layer 300 can be, for example, 25nm, 20nm, 15nm, 10nm, 8nm, 5nm, etc.

[0051] As an example, the doping concentration of the boron ions may range from 10. 17 cm -2 ~10 18 cm -2 .

[0052] Specifically, shallow ion implantation or diffusion methods can be used to incorporate boron ions into the barrier layer 300. Shallow ion implantation allows for greater doping of boron ions into the barrier layer 300, and the doping concentration of boron ions in the barrier layer 300 can be controlled, for example, at 10⁻⁶. 17 cm -2 ~10 18 cm -2 Within the range, such as 10 17 cm -2 2×10 17 cm -2 5×10 17 cm -2 8×10 17 cm -2 10 18 cm -2 Alternatively, the boron ions can be diffused from top to bottom into the barrier layer 300 via diffusion, and the diffusion doping concentration of the boron ions in the barrier layer 300 can be controlled, for example, at 10. 17 cm -2 ~10 18 cm -2 Within the range, such as 10 17 cm -2 2×10 17 cm -2 5×10 17 cm -2 8×10 17 cm -2 10 18 cm -2 wait.

[0053] As an example, preferably the doping depth of the boron ions in the barrier layer 300 is less than or equal to the thickness of the barrier layer 300.

[0054] As an example, see Figure 1 The HEMT device may further include a P-type doped layer 400, wherein the P-type doped layer 400 is located between the barrier layer 300 and the gate electrode 500, and is located within the gate region 500G, such that the barrier layer 300 has a first region A1 undoped with the boron ions and a second region A2 doped with the boron ions.

[0055] Specifically, in Figure 1 In the example shown, the gate electrode 500 is entirely disposed on the p-type doped layer 400, used to control the conductivity change of the 2DEG within the HEMT device, thereby enabling the device to be turned on or off. The HEMT device also includes a source electrode (not shown) and a drain electrode (not shown), located on opposite sides of the gate electrode 500 and electrically connected to the channel layer 200, allowing for effective collection of electron current within the channel layer 200.

[0056] like Figure 1 The P-type doped layer 400 is formed on the barrier layer 300 and located within the gate region 500G. The gate electrode 500 is formed on the P-type doped layer 400. By placing the P-type doped layer 400 between the gate electrode 500 and the barrier layer 300, the conduction band of the entire heterojunction can be raised, thereby depleting the 2DEG directly below the gate region 500G and realizing an enhancement-mode HEMT device.

[0057] The P-type doped layer 400 may include a III-V compound layer. For example, the P-type doped layer 400 may specifically include a P-type gallium nitride (P-GaN) layer and / or a P-type aluminum gallium nitride (P-AlGaN) layer, etc.

[0058] See Figure 1 The barrier layer 300 has a first region A1 that is not doped with the boron ions and a second region A2 that is doped with the boron ions. The area of ​​the first region A1 completely covers the area of ​​the gate region 500G, and the second region A2 covers the non-gate region.

[0059] For further details, please refer to [link / reference]. Figure 2 As an example, the gate electrode 500 may also extend the gate region 500G toward the drain electrode and cover a portion of the barrier layer 300 on one side of the P-type doped layer 400, such that the range of the first region A1 completely covers the range of the gate region 500G and includes an extended region A3 extending toward the drain electrode.

[0060] It should be noted that, in Figure 1 In the example shown, the first region A1 of the barrier layer 300 has the same area as the gate region 500G. Only the gate region 500G in the barrier layer 300 is not doped with boron ions. The 2DEG in the gate region 500G is completely depleted, while the second region A2 outside the gate region 500G has a high concentration of 2DEG.

[0061] However, in Figure 2 In the example shown, the first region A1 completely covers the region of the gate region 500G and extends from the gate region 500G toward the drain electrode. Therefore, Figure 2 In the example shown, the first region A1 includes the gate region 500G and the extended region A3 located on one side of the gate region 500G and within the non-gate region.

[0062] In the gate region 500G, the barrier layer 300 is not doped with boron ions and has a P-type doped layer 400, allowing the 2DEG in the gate region 500G to be completely depleted. In the extended region A3, the barrier layer 300 is not doped with boron ions and the P-type doped layer 400 is not present, resulting in a lower concentration of 2DEG. In the second region A2, the barrier layer 300 is doped with boron ions, resulting in a high concentration of 2DEG. Therefore, the concentration of 2DEG varies gradient between the gate and drain, which can be used to expand the electric field distribution, effectively dispersing the peak electric field intensity at the edge of the gate region 500G and improving the breakdown voltage of the device.

[0063] exist Figure 2 In the example shown, the gate electrode 500 extends beyond the gate region 500G towards the drain electrode and covers a portion of the barrier layer 300 on one side of the p-type doped layer 400. By extending the gate electrode 500 beyond the gate region 500G, the electric field at the edge of the gate region 500G can be effectively expanded, alleviating the problem of electric field concentration at the edge of the gate region 500G, thereby further improving the breakdown voltage of the device. It can be considered that in... Figure 2 In the example shown, the gate electrode 500 extending from the gate region 500G also serves to form the field plate of the HEMT device to achieve electric field extension.

[0064] In a specific example, the boron ion doping region within the barrier layer 300 can be defined based on the coverage area of ​​the gate electrode 500. For example, Figure 1In the example shown, the gate electrode 500 is completely formed within the gate region 500G. In this case, the barrier layer 300, except for the gate region 500G, is not doped with boron ions, while the non-gate regions outside the gate electrode 500 are all doped with boron ions. Figure 2 In the example shown, the gate electrode 500 also extends from the gate region 500G toward the drain electrode. At this time, the portion of the barrier layer 300 located in the gate region 500G is not doped with the boron ions, and the non-gate region covered by the gate electrode 500 is also not doped with the boron ions. That is, the first region A1 of the barrier layer 300 coincides with the coverage of the gate electrode 500, and the second region A2 of the barrier layer 300 completely covers the range of the gate region 500G and includes the extended region A3 extending toward the drain electrode.

[0065] As an example, a passivation layer (not shown in the figure) may also be provided on the barrier layer 300 to passivate and protect the barrier layer 300, which helps to reduce surface defect states of the barrier layer 300 and improve the current collapse phenomenon of the HEMT device. The material of the passivation layer may include, for example, aluminum oxide, silicon oxide or silicon nitride, etc., without excessive limitation.

[0066] See Figure 3 This embodiment also provides a method for fabricating a HEMT device, wherein the HEMT device can be fabricated using the following method, but is not limited to this method. The fabrication of the HEMT device may include the following steps:

[0067] S100: A channel layer and a barrier layer are sequentially formed on a substrate;

[0068] S200: A gate electrode is formed above the barrier layer, the gate electrode being located at least within the gate region;

[0069] S300: Boron ions are incorporated into the barrier layer in the non-gate region.

[0070] The following is in conjunction with the instruction manual. Figure 3 and instruction manual Figure 4 and Figure 5 ,right Figure 1 The fabrication of the HEMT device shown will be described.

[0071] First, refer to Figure 3 and Figure 4 Step S100 is executed, in which a channel layer 200 and a barrier layer 300 are sequentially formed on a substrate 100.

[0072] The substrate 100 may be a gallium nitride (GaN) substrate, a silicon (Si) substrate, a silicon carbide (SiC) substrate, or a sapphire substrate, etc.

[0073] Furthermore, in this embodiment, before fabricating the channel layer 200, a transition layer (not shown in the figure) can be epitaxially grown on the substrate 100. The transition layer is, for example, a gallium nitride (GaN) transition layer, an aluminum nitride (AlN) transition layer, or an aluminum gallium nitride (AlGaN) transition layer. By setting the transition layer, on the one hand, the lattice mismatch between the substrate 100 and the subsequently epitaxially grown epitaxial layer can be reduced, thereby improving the crystal quality of the epitaxial layer; on the other hand, it can also serve as a high-resistivity layer to reduce device leakage current, etc.

[0074] The channel layer 200 and the barrier layer 300 can be sequentially formed on the transition layer using an epitaxial process, such as MOCVD. Both the channel layer 200 and the barrier layer 300 may comprise a III-V compound layer. For example, the channel layer 200 may comprise a gallium nitride (GaN) layer, and the barrier layer 300 may comprise an aluminum gallium nitride (AlGaN) layer. X Ga 1-X The N) layer, but the choice of materials for the channel layer 200 and the barrier layer 300 is not limited to this.

[0075] It should be noted that in subsequent processes, boron (B) ions will be implanted into the portion of the barrier layer 300 located in the non-gate region to give the HEMT device a higher carrier concentration and lower on-resistance. Therefore, the low on-resistance of the HEMT device can be achieved by adjusting the boron ion implantation in subsequent processes. Based on this, the thickness of the barrier layer 300 can be reduced; for example, the thickness of the barrier layer 300 can be set to be less than or equal to 25 nm to increase the threshold voltage of the HEMT device. Furthermore, the aluminum gallium nitride (Al2N2) layer in the barrier layer 300 can also be reduced. X Ga 1-X The aluminum component within the N) layer, for example, can make Al X Ga 1-X The aluminum component X in the N-layer is less than or equal to 0.3, in order to further improve the threshold voltage of the HEMT device.

[0076] Next, refer to Figure 3 and Figure 4 Step S200 is performed to form a gate electrode 500 above the barrier layer 300, wherein the gate electrode 500 is located at least within the gate region 500G.

[0077] Furthermore, before forming the gate electrode 500, a P-type doped layer 400 may be formed below the gate electrode 500. The P-type doped layer 400 is formed on the barrier layer 300 and located within the gate region 500G. The gate electrode 500 covers the P-type doped layer 400.

[0078] In a specific example, the fabrication method of the P-type doped layer 400 and the gate electrode 500 may include the following steps:

[0079] Step 1: A P-type doped material layer is formed on the barrier layer 300 using an epitaxial process. Specifically, the P-type doped material layer can be a P-type gallium nitride (P-GaN) layer. In this embodiment, the P-type doped material layer may be doped with magnesium (Mg).

[0080] Step two, the gate electrode 500 is formed on the p-type doped material layer. In this embodiment, as shown... Figure 4 The gate electrode 500 is located entirely within the gate region 500G.

[0081] Step 3: Using the gate electrode 500 as a mask, etch the P-type doped material layer to remove the portion of the P-type doped material layer located in the non-gate region, while retaining the portion located in the gate region 500G, thereby forming the P-type doped layer 400.

[0082] In the example above, the gate electrode 500 is completely formed within the gate region 500G, and the P-type doped material layer can be patterned under the mask of the gate electrode 500 to form the P-type doped layer 400.

[0083] However, in other examples, after forming the P-type doped material layer, the portion of the P-type doped material layer located in the non-gate region may be removed first, while the portion located in the gate region 500G may be retained to form the P-type doped layer 400; then, the gate electrode 500 may be formed on the P-type doped layer 400.

[0084] Next, refer to Figure 3 and Figure 5 Step S300 is executed to incorporate boron ions into the barrier layer 300 in the non-gate region.

[0085] Specifically, by incorporating the boron ions into the barrier layer 300 in the non-gate region, the concentration of 2DEG in the non-gate region can be greatly increased, thereby reducing the on-resistance; and since the gate region 500G is not doped with boron ions, it will not affect the threshold voltage of the HEMT device, thus ensuring that the HEMT device has a high threshold voltage.

[0086] As an example, the process of incorporating the boron ions into the barrier layer 300 in the non-gate region may include an ion implantation process or a diffusion process, wherein the implantation energy of the ion implantation process may be less than or equal to 5 keV, and the diffusion temperature of the diffusion process may be less than or equal to 900°C.

[0087] In this embodiment, a patterned photoresist layer (not shown) can be formed before performing the ion implantation process to cover the gate electrode 500 to protect it and expose other areas where boron ions need to be incorporated. Then, under the mask of the photoresist layer, the ion implantation process is performed, thereby implanting boron ions into the barrier layer 300 outside the gate electrode 500. Through the ion implantation process, the barrier layer 300 can have a first region A1 undoped with boron ions and a second region A2 doped with boron ions. In this embodiment, see... Figure 4 and Figure 5 The first region A1 completely covers the region of the gate region 500G, and the second region A2 covers at least a portion of the non-gate region.

[0088] In a specific example, the implantation energy of the ion implantation process can be less than or equal to 5 keV, such as 4 keV, 3 keV, 2 keV, etc., to achieve shallow implantation of the barrier layer 300 and control the boron ions to be implanted at the top position of the barrier layer 300. For example, an implantation energy of less than or equal to 3 keV can be used for ion implantation to achieve an implantation depth of boron ions in the barrier layer 300 that is less than or equal to the depth of the barrier layer 300.

[0089] The implantation dose for the ion implantation process can be E14cm. -2 ~E15cm -2 For example, E14cm -2 E15cm -2 The implantation time of the ion implantation process can be controlled between 2 min and 5 min, such as 2 min, 3 min, 5 min, etc.

[0090] Furthermore, after performing the ion implantation process, an annealing process may be performed to activate the implanted boron ions.

[0091] Furthermore, prior to performing the annealing process, a passivation layer (not shown in the figure) may be formed covering the barrier layer 300 and the gate electrode 500. The material of the passivation layer may include, for example, alumina, silicon oxide, or silicon nitride, etc., without excessive limitation.

[0092] It should be noted that the passivation layer can be used to passivate and protect the barrier layer 300, which helps to reduce the surface defect states of the barrier layer 300 and improve the current collapse phenomenon of the HEMT device. Furthermore, the passivation layer also prevents the P-type doped layer 400 from being exposed in subsequent annealing processes, thus mitigating the adverse effects of annealing on the P-type doped layer 400. For example, it can effectively improve the problem of P-type gallium nitride (P-GaN) layer decomposition during annealing.

[0093] After the passivation layer is formed, an annealing process is performed. On the one hand, it can be used to activate the boron ions implanted into the barrier layer 300, and also to activate the P-type ions (e.g., magnesium ions) in the P-type doped layer 400. On the other hand, it can also repair the lattice damage to the barrier layer 300 caused by ion implantation.

[0094] The annealing process can be either high-temperature annealing or millisecond-level annealing. When using high-temperature annealing, the annealing temperature can be, for example, 800℃~1100℃, such as 800℃, 900℃, 1100℃, etc., and the annealing time can be controlled within, for example, 10 seconds~30 seconds, such as 10 seconds, 20 seconds, 30 seconds, etc. In millisecond-level annealing, the annealing temperature can be higher than that of high-temperature annealing. For example, the annealing temperature of millisecond-level annealing can be 1200℃~1400℃, such as 1200℃, 1300℃, 1400℃, etc., and the corresponding annealing time can be, for example, 60 milliseconds~120 milliseconds, such as 60 milliseconds, 80 milliseconds, 100 milliseconds, 120 milliseconds, etc.

[0095] It should be noted that after the ion implantation and annealing processes, the implanted boron ions are mainly located in the second region A2. However, there may also be a small amount of ion diffusion, which means that a small amount of boron ions may also diffuse into the first region A1 of the barrier layer 300.

[0096] Furthermore, the fabrication method of the HEMT device further includes the steps of forming a source electrode (not shown in the figure) and forming a drain electrode (not shown in the figure), wherein the source electrode and the drain electrode are respectively disposed on both sides of the gate electrode 500. The gate electrode 500 can be used to control the conductivity change of the 2DEG in the HEMT device to realize the conduction or cutoff of the HEMT device. Both the source electrode and the drain electrode are electrically connected to the channel layer 200 so that the electron current in the channel layer 200 can be effectively collected.

[0097] See Figures 6-7 This embodiment also provides a method for... Figure 2 The fabrication process of the HEMT device shown below is in conjunction with the appendix to the instruction manual. Figure 3and Figures 6-7 The fabrication of the HEMT device will be further explained below.

[0098] First, refer to Figure 3 and Figure 6 In step S100, a channel layer 200 and a barrier layer 300 are sequentially formed on a substrate 100. For details, please refer to the steps described above, which will not be repeated here.

[0099] Next, refer to Figure 6 Prior to performing step S200, a P-type doped layer 400 may be formed above the barrier layer 300, the P-type doped layer 400 being formed on the barrier layer 300 and located within the gate region 500G. In this example, epitaxial and etching processes are preferably used to form the P-type doped layer 400 within the gate region 500G.

[0100] For information regarding the material and beneficial effects of the P-type doped layer 400, please refer to the above description of the P-type doped layer 400; it will not be repeated here.

[0101] Next, refer to Figure 3 and Figure 6 Step S200 is performed to form a gate electrode 500 above the barrier layer 300, wherein the gate electrode 500 is located at least within the gate region 500G.

[0102] For details, please refer to Figure 6 In this embodiment, the gate electrode 500 formed not only covers the P-type doped layer 400 within the gate region 500G, but also extends out of the gate region 500G and covers the barrier layer 300 on one side of the P-type doped layer 400.

[0103] Next, refer to Figure 6 and Figure 7 Step S300 is executed to incorporate boron ions into the barrier layer 300 in the non-gate region.

[0104] In this example, an ion implantation process can also be performed under the mask of the gate electrode 500, such that the range of the first region A1 in the barrier layer 300 includes the range that completely covers the gate region 500G, and includes the extended region A3 that extends toward the drain electrode.

[0105] This embodiment allows for a gradient change in the concentration of 2DEG between the gate and the drain, which can be used to extend the electric field distribution. This helps to disperse the peak electric field intensity at the edge of the gate region 500G and improve the breakdown voltage of the device. The gate electrode 500 extending out of the gate region 500G can also be used to form the field plate of the HEMT device to achieve electric field extension.

[0106] The process may further include, after ion implantation, the following steps: sequentially performing passivation layer preparation and annealing processes to activate the implanted ions. The specific operations of the ion implantation and annealing processes in this example are detailed above and will not be repeated here.

[0107] The HEMT device and its fabrication method described in this embodiment have at least the following advantages:

[0108] 1. The process is compatible with existing mature semiconductor processes, and there is basically no need to develop new operating equipment and processes;

[0109] 2. It can simultaneously accommodate high threshold voltage and low on-resistance, effectively alleviating the problem of mutual constraint between threshold voltage and on-resistance in HEMT devices, and providing a wider device fabrication window;

[0110] 3. By adjusting the structure and region of boron ion diffusion, the concentration of 2DEG can also be adjusted, thereby regulating the electric field distribution and improving the breakdown voltage of HEMT devices.

[0111] In summary, the HEMT device and its fabrication method of the present invention, by doping boron ions in the portion of the barrier layer located in the non-gate region, can further increase the stress at the heterojunction interface, thereby significantly increasing the concentration of two-dimensional electron gas in the channel layer and thus reducing the on-resistance. Furthermore, the portion of the barrier layer located in the gate region is not doped with boron ions or contains only a small amount of diffused boron ions, thus not affecting the threshold voltage of the device, ensuring that the device has a high threshold voltage. In addition, it is beneficial to reduce the aluminum content in the aluminum gallium nitride barrier layer and can also further reduce the thickness of the barrier layer, thereby further improving the threshold voltage of the device and effectively alleviating the problem of mutual constraint between the threshold voltage and on-resistance of the device.

[0112] Furthermore, the present invention dops boron ions within the barrier layer, eliminating the need to develop new operating equipment and processes, thus enabling convenient operation.

[0113] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A HEMT device, characterized in that, The HEMT device includes: a channel layer, a barrier layer, and a gate electrode sequentially formed on a substrate; wherein the gate electrode is located at least in the gate region, and the portion of the barrier layer located in the non-gate region is further doped with boron ions.

2. The HEMT device according to claim 1, characterized in that: It also includes a P-type doped layer, which is located between the barrier layer and the gate electrode and within the gate region, such that the barrier layer has a first region undoped with the boron ions and a second region doped with the boron ions.

3. The HEMT device according to claim 2, characterized in that: The gate electrode extends out of the gate region toward the drain electrode and covers a portion of the barrier layer on one side of the P-type doped layer, such that the range of the first region completely covers the range of the gate region and includes an extended region extending toward the drain electrode.

4. The HEMT device according to claim 1, characterized in that: The barrier layer includes Al X Ga 1-X N layers, the Al X Ga 1-X The value of the Al component X in the N layer is less than or equal to 0.3; the thickness of the barrier layer is less than or equal to 25 nm.

5. The HEMT device according to claim 1, characterized in that: The doping concentration of the boron ions ranges from 10. 17 cm -2 ~10 18 cm -2 .

6. The HEMT device according to any one of claims 1 to 5, characterized in that: The doping depth of the boron ions in the barrier layer is less than or equal to the thickness of the barrier layer.

7. A method for fabricating a HEMT device, characterized in that, Includes the following steps: A channel layer and a barrier layer are sequentially formed on a substrate; A gate electrode is formed above the barrier layer, and the gate electrode is located at least within the gate region; Boron ions are incorporated into the barrier layer in the non-gate region.

8. The method for fabricating a HEMT device according to claim 7, characterized in that: After forming the barrier layer, the method further includes forming a P-type doped layer on the barrier layer, wherein the P-type doped layer is located in the gate region, such that the barrier layer has a first region undoped with the boron ions and a second region doped with the boron ions.

9. The method for fabricating a HEMT device according to claim 8, characterized in that: When forming the gate electrode, the gate electrode covers the P-type doped layer and extends out of the gate region toward the drain electrode, and covers a portion of the barrier layer on one side of the P-type doped layer, such that the range of the first region completely covers the range of the gate region, and includes an extended region extending toward the drain electrode.

10. The method for fabricating a HEMT device according to claim 7, characterized in that: The process of incorporating the boron ions into the barrier layer of the non-gate region includes an ion implantation process or a diffusion process, wherein the implantation energy of the ion implantation process is less than or equal to 5 keV, and the diffusion temperature of the diffusion process is less than or equal to 900°C.

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