Processing method and device and electronic equipment
By receiving target data from the expansion components, the controller's operating parameters are automatically configured and the mapping relationship is adjusted, which solves the functional misalignment problem caused by the controller pin design and realizes the automated configuration and stable operation of the expansion components.
Patent Information
- Application Number
- CN202511073003.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-31
- Publication Date
- 2025-11-07
AI Technical Summary
In existing technologies, the predefined pin design of the controller leads to functional misalignment in different slots, affecting device compatibility and stability. Users need to manually adjust the slot splitting parameters or channel reversal options to solve display abnormalities and port number errors.
By receiving target data from extended components, the execution status of functional modules is determined, and the controller's operating parameters are reconfigured when preset conditions are not met. This includes adjusting mapping relationships, performing channel reversal operations, and loading compensation parameters to ensure that functional modules are loaded in the expected order.
It enables automated configuration of extended component functional modules, improves the processing efficiency and stability of the device, avoids the complexity and potential errors of manual adjustment, and ensures that the hardware status is corrected before the system starts.
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Figure CN120909661A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of hardware configuration, and in particular, to a processing method, device and electronic equipment. BACKGROUND
[0002] The current expansion component can use multiple controllers to realize the switching and distribution of internal modules. However, the pin design defined in advance by the controller can cause functional misplacement in different slot positions. SUMMARY
[0003] In view of the above problems, the present disclosure provides a processing method, device and electronic equipment.
[0004] According to a first aspect of the present disclosure, a processing method is provided, comprising: receiving target data of an expansion component, the expansion component comprising a function module managed based on multiple controllers, the target data being obtained via a management component before an operating system is started, and being used to represent a hardware topology and a function configuration state of the expansion component; determining a function execution state of the function module based on the target data; and in response to the function execution state satisfying a preset condition, reconfiguring a running parameter of the controller, so that the function loading of the function module is loaded in an expected order.
[0005] According to an embodiment of the present disclosure, the method further comprises: obtaining a mapping relationship between each controller and a physical port provided by the expansion component; and in a case where the mapping relationship between at least one controller and the physical port does not conform to a preset configuration, determining that the function execution state satisfies the preset condition.
[0006] According to an embodiment of the present disclosure, in a case where the mapping relationship between at least one controller and the physical port does not conform to the preset configuration, determining that the function execution state satisfies the preset condition comprises: obtaining a mapping relationship table stored in the expansion component, and determining a physical port actually associated with each controller, the mapping relationship table being used to define an association relationship between the controller and the physical port; and in a case where the physical port actually associated with at least one controller is inconsistent with the physical port corresponding to the controller in the mapping relationship table, determining that the function execution state satisfies the preset condition.
[0007] According to an embodiment of the present disclosure, reconfiguring the running parameter of the controller, so that the function loading of the function module is loaded in the expected order, comprises: in response to initializing the operating system, adjusting an enumeration order of the expansion component and / or the controller according to the running parameter.
[0008] According to an embodiment of the present disclosure, the reconfiguring the operation parameter of the controller to enable the function loading of the function module to be loaded in the expected order further includes: switching a channel splitting mode of a physical port of the expansion component based on a port configuration requirement in the target data; and / or loading a predefined compensation parameter on a physical link of the expansion component, and adjusting the operation parameter according to the compensation parameter, the compensation parameter being used to represent a signal integrity adjustment requirement.
[0009] According to an embodiment of the present disclosure, the method further includes: in response to detecting that a communication exception exists in a data channel associated with at least one controller, performing a channel inversion operation on a transmission direction of the data channel; and after performing the data channel inversion operation, determining that the function execution state satisfies a preset condition if no signal feedback from the data channel is received within a preset time window.
[0010] According to an embodiment of the present disclosure, the reconfiguring the operation parameter of the controller to enable the function loading of the function module to be loaded in the expected order further includes: adjusting a mapping relationship of the data channel to each controller based on a result of the inversion operation of the data channel.
[0011] According to an embodiment of the present disclosure, the receiving the target data of the expansion component includes: sending a data request to the management component, the data request including a physical slot identifier of the expansion component; and in response to the data request, causing the management component to read the target data according to the physical slot identifier, and transmitting the target data.
[0012] A second aspect of the present disclosure provides a processing apparatus, including: a receiving module configured to receive target data of an expansion component, the expansion component including function modules managed based on a plurality of controllers, the target data being obtained via a management component before an operating system is started, and being used to represent a hardware topology and a function configuration state of the expansion component; a determining module configured to determine a function execution state of the function modules based on the target data; and an adjusting module configured to, in response to the function execution state satisfying a preset condition, reconfigure an operation parameter of the controller to enable the function loading of the function module to be loaded in an expected order.
[0013] A third aspect of the present disclosure provides an electronic device, including: one or more processors; and a storage apparatus configured to store one or more programs, wherein the one or more programs, when executed by the one or more processors, cause the one or more processors to perform the following method: receiving target data of an expansion component, the expansion component including function modules managed based on a plurality of controllers, the target data being obtained via a management component before an operating system is started, and being used to represent a hardware topology and a function configuration state of the expansion component; determining a function execution state of the function modules based on the target data; and in response to the function execution state satisfying a preset condition, reconfiguring an operation parameter of the controller to enable the function loading of the function module to be loaded in an expected order.
[0014] It should be understood that the contents described in this part are not intended to identify key or important features of the embodiments of the present disclosure, nor to limit the scope of the present disclosure. Other features of the present disclosure will become apparent through the following description. BRIEF DESCRIPTION OF DRAWINGS
[0015] The accompanying drawings are used to better understand the present scheme, and do not limit the present disclosure. Among them:
[0016] Figure 1 The application scenario diagram of the processing method, device and electronic equipment according to the embodiments of the present disclosure is schematically shown;
[0017] Figure 2 The flowchart of the processing method according to the embodiments of the present disclosure is schematically shown;
[0018] Figure 3 The structure diagram of the target data according to the embodiments of the present disclosure is schematically shown;
[0019] Figure 4 The mapping relationship between the controller and the port according to the embodiments of the present disclosure is schematically shown;
[0020] Figure 5 The schematic diagram of channel inversion according to the embodiments of the present disclosure is schematically shown;
[0021] Figure 6 Another flowchart of the processing method according to the embodiments of the present disclosure is schematically shown;
[0022] Figure 7 The structure block diagram of the processing device according to the embodiments of the present disclosure is schematically shown; and
[0023] Figure 8 The block diagram of the electronic equipment suitable for implementing the processing method according to the embodiments of the present disclosure is schematically shown. DETAILED DESCRIPTION
[0024] Hereinafter, the embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are only exemplary, and are not intended to limit the scope of the present disclosure. In the following detailed description, many specific details are set forth in order to provide a thorough understanding of the embodiments of the present disclosure. However, it is obvious that one or more embodiments can be implemented without these specific details. In addition, in the following description, the description of well-known structures and techniques is omitted to avoid unnecessary confusion of the concept of the present disclosure.
[0025] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the terms "comprises", "comprising", "includes", "including" and the like are specifically intended to be open-ended terms meaning that other elements can be added.
[0026] All terms used herein including technical and scientific terms have the meanings commonly understood by one of ordinary skill in the art unless otherwise specified. It should be noted that the terms used herein are not intended to be limited to the commonly understood meanings, but, if desired, the terms can be expressly redefined to include the specifically
[0027] It should be noted that the collection, storage, use, processing, transmission, provision, disclosure and application of user personal information involved in the technical solutions of the present disclosure comply with relevant laws and regulations, necessary security measures are taken, and do not violate public order and good customs. In the technical solutions of the present disclosure, the authorization or consent of the user is obtained before the user's personal information is obtained or collected.
[0028] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. Moreover, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, the skilled in the art can combine and combine the different embodiments or examples described in the present specification and the features of the different embodiments or examples without contradiction.
[0029] In addition, the terms "first", "second" are only used for description purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited.
[0030] More and more expansion cards (expansion components) are built-in with multiple controllers, but without integrated smart lane distribution chips, resulting in users needing to manually adjust slot bifurcation parameters in the settings to enable the multiple controllers to work together. Moreover, there is an asymmetric mapping relationship between the controllers and physical ports of some expansion cards, and whether the motherboard design supports lane reversal function further affects the device scanning order, thereby causing display abnormalities or port number disorder problems. In addition, some manufacturers have burned hardware configuration information into the expansion card firmware before leaving the factory, but due to design defects, users still need to manually adjust the Gen speed or width parameters, otherwise the device will frequently trigger correctable error (CE) interrupts. Currently, users manually configure slot bifurcation parameters or lane reversal options, and some high-end systems can combine hardware circuit optimization and BIOS preset strategies to avoid device compatibility problems caused by poor motherboard Lane Reversal support in advance.
[0031] In view of this, the embodiments of the present disclosure provide a processing method, device and electronic equipment, which are introduced below in conjunction with the drawings.
[0032] Figure 1 The application scenario diagram 100 of the processing method, device and electronic equipment according to the embodiments of the present disclosure is schematically shown.
[0033] It should be noted that Figure 1 The shown are only examples of scenarios to which the embodiments of the present disclosure can be applied, to help those skilled in the art understand the technical content of the present disclosure, but do not mean that the embodiments of the present disclosure cannot be applied to other devices, systems, environments or scenarios.
[0034] As Figure 1 The application scenario 100 according to the embodiments can include a first terminal device 101, a second terminal device 102, a third terminal device 103, a network 104 and a server 105, as shown. The network 104 is a medium for providing a communication link between the first terminal device 101, the second terminal device 102, the third terminal device 103 and the server 105. The network 104 can include various connection types, such as wired, wireless communication links or optical fiber cables, etc.
[0035] The first terminal device 101, the second terminal device 102, and the third terminal device 103 can integrate a unified extensible firmware interface (UEFI for short). The UEFI serves as a core processing unit and can complete initialization and take over control of hardware before the operating system is started. The UEFI can interact with an extension component through a standardized interface to establish a communication link that can support multiple high-speed bus protocols and can be compatible with a service call mechanism of a UEFI runtime to ensure reliability and real-time performance of data transmission.
[0036] The extension component can include a cluster of function modules based on multiple controller architectures, which can be cooperatively managed by at least two independent controllers, each of which is responsible for hardware resource allocation of a specific function module.
[0037] The server 105 can be a server that provides various services, such as a background management server that provides support for a website browsed by a user using the first terminal device 101, the second terminal device 102, and the third terminal device 103 (only as an example). The background management server can analyze and process received user requests and other data, and feed back the processing results (such as a webpage, information, or data obtained or generated according to a user request) to the terminal device.
[0038] It should be noted that the processing method provided by the embodiments of the present disclosure can generally be applied to the first terminal device 101, the second terminal device 102, and the third terminal device 103, and specifically can be applied to the UEFI. Accordingly, the apparatus and the electronic device provided by the embodiments of the present disclosure can be embedded into the first terminal device 101, the second terminal device 102, and the third terminal device 103 that support the UEFI specification. The processing method provided by the embodiments of the present disclosure can also be executed by an external computing node independent of the terminal device. The external computing node can interact with the UEFI of the first terminal device 101, the second terminal device 102, and the third terminal device 103 through a standardized protocol to complete remote configuration.
[0039] It should be understood that Figure 1 The number of terminal devices, networks, and servers in the above description is only illustrative. According to the needs of implementation, there can be any number of terminal devices, networks, and servers.
[0040] The following will describe the processing method of the embodiments of the present disclosure in detail based on the scenarios described above. Figure 1 Figures 2-6 The processing method of the embodiments of the present disclosure will be described in detail.
[0041] The execution subject of the processing method provided by the embodiments of the present disclosure can be UEFI. The UEFI can be stored in the flash memory chip of the motherboard in the form of firmware, which has the same storage location as the BIOS, but has more powerful functions, that is, it can not only undertake the key tasks in the startup stage, but also provide the operating system with underlying hardware control capabilities through modular design and runtime services.
[0042] As shown in Figure 2 The processing method of the embodiment can include S210-S230.
[0043] In S210, target data of an expansion component is received, the expansion component includes function modules managed based on multiple controllers, and the target data is obtained via a management component before the operating system is started, and is used to represent a hardware topology and a function configuration state of the expansion component.
[0044] The expansion component can be a Peripheral Component Interconnect Express (PCIe) card. The PCIe is a high-speed serial computer expansion bus standard, which is used for data transmission between the computer motherboard and the expansion component (such as a graphics card, a network card, and a storage device, etc.). The expansion component can internally integrate multiple independent control units (controllers) to manage different function modules.
[0045] Exemplarily, when the expansion component is a smart network card, it can include a network controller, an embedded processor controller, and a Field-Programmable Gate Array (FPGA) controller. The network controller can manage a network interface to process physical layer and data link layer protocols; the embedded processor controller can manage a general-purpose computing module to run a control plane protocol stack and virtualization functions; and the FPGA controller can manage an FPGA acceleration module to implement hardware acceleration functions.
[0046] Figure 3 A structural diagram of the target data according to the embodiments of the present disclosure is schematically shown.
[0047] As shown in Figure 3As shown, the target data (Card info) can be used to represent the hardware topology and functional configuration state of the expansion component, wherein the hardware topology can be the physical connection relationship and layout mode between the internal hardware components of the expansion component, such as slot bifurcation information, controller and port mapping, interaction relationship between controllers, and current pin configuration information of the controller, etc.; and the functional configuration state is the configuration situation of the functional module at the hardware or software level, such as working mode (full duplex / half duplex, high speed / low speed, etc.), function enable / disable state, performance parameters (bandwidth, throughput, delay, etc.). In the power-on stage of the host, the management component can actively inquire the hardware information (i.e. the target data) provided by the expansion component through the corresponding bus protocol, and the management component can be a baseboard management controller (BMC) or an FPGA. Among them, the BMC has an out-of-band management function and can communicate with the PCIe card before the system starts to obtain its related information. That is, even if the system has not entered the POST (Power-On Self-Test) stage, the BMC can still monitor the state of the PCIe card. If the operating system crashes or cannot start, the administrator can still remotely access the BMC through the network to obtain the information of the PCIe card. The FPGA can integrate multiple channel controllers (such as 32 channels in parallel) inside, and can scan the slave device address of all PCIe slots at the moment of host power-on.
[0048] Exemplarily, in the case that the host is not powered on, the BMC can maintain operation through the standby power supply to obtain the target data of the PCIe card through active detection. In this process, the BMC can first scan the EEPROM beside the PCIe slot to read the pre-stored device identifier, firmware version, and slot physical address, etc. information. For slot bifurcation requirements (for example, virtualizing a single x16 slot into 4 x4 logical devices), the BMC can simulate the access operation of the PCIe configuration space with the help of the bridge chip on the board side to dynamically analyze the mapping relationship of the split logical ports. Then, the BMC can encrypt and store the analysis result, so that the UEFI can adjust the PCIe configuration according to these information.
[0049] Exemplarily, for each slot, the FPGA can calculate the split logical port in real time through a hardware state machine after reading the physical port information from the EEPROM.
[0050] In S220, based on the target data, the functional execution state of the functional module is determined.
[0051] The UEFI can obtain the target data obtained by the management component, and determine the function execution state of each function module in the extension component according to the target data by communicating with the management component. The function execution state can reflect the situation of the function module in the actual running process, for example, whether Lane Reversal is enabled, whether the channel mapping relationship after being enabled conforms to the preset configuration, and whether the related state (such as the working mode state, the load and performance state, etc.) of the function module is normal.
[0052] For example, whether the Lane Reversal function is enabled can be determined by checking the flag bit or the configuration parameter related to Lane Reversal in the target data. If the function is enabled, the UEFI further analyzes whether the channel mapping relationship after being enabled conforms to the preset configuration. In addition, the working mode can be determined according to the device-specific register, and the load and performance can be evaluated in combination with the performance counter (such as the PCIe bandwidth utilization rate).
[0053] In S230, in response to the function execution state satisfying the preset condition, the running parameter of the controller is reconfigured, so that the function loading of the function module is loaded in the expected order.
[0054] The preset condition is a non-expected standard set of the system for the normal running of the function module, for example, the mapping relationship of the controller and the port is inconsistent with the UEFI configuration, the slot-specific device (such as the GPU slot) is mis-inserted with other devices, the interrupt delay or the channel bandwidth allocation deviation exceeds the performance threshold, etc.
[0055] When the function execution state satisfies the preset condition, the UEFI can reconfigure the running parameter of the controller of the extension component. In this process, the UEFI can first establish a stable communication connection with the controller of the extension component through a specific bus (such as a PCIe bus). After establishing the communication connection, the UEFI can send a parameter reading request to the controller to obtain the current running parameter of the controller, including but not limited to the mapping relationship of the controller and the port, the interrupt configuration parameter, the channel bandwidth allocation parameter, etc. The UEFI compares the current running parameter read with the correct parameter stored in the firmware in advance, and determines the parameter that needs to be reconfigured and the new parameter value. Finally, the UEFI can send a parameter writing instruction to the controller to write the new parameter value into the corresponding register of the controller, so as to complete the correction of the hardware state before the operating system is started, thereby ensuring that the function module of the PCIe card is loaded and stably runs in the expected order.
[0056] It can be understood that the automatic adjustment provided by the method provided by the embodiments of the present disclosure can enable each function module to work in the expected order and manner, and improve the processing efficiency.
[0057] On the basis of the above-mentioned embodiments, in this embodiment, the target data of the expansion component received can include: sending a data request to the management component, the data request including the physical slot identification of the expansion component; in response to the data request, causing the management component to read the target data according to the physical slot identification, and transmitting the target data.
[0058] The UEFI can actively send a data request to the management component, and the request can include the physical slot identification of the expansion component. The physical slot identification has uniqueness and certainty, can accurately locate to a specific expansion component, and ensures the accuracy and pertinence of subsequent data reading and transmission. After receiving the data request, the management component can immediately read the target data corresponding to the expansion component in the data storage area of itself or in the interaction with the related database according to the physical slot identification carried in the data request. After successfully reading the target data, the management component can transmit the target data according to the predetermined communication protocol and data transmission rule. At the same time, a data check and error correction mechanism can be used to avoid problems such as loss, damage or tampering of the target data in the transmission process, and ensure the integrity and accuracy of the data. Finally, the UEFI can receive the target data of the expansion component, so as to perform subsequent management and control on the expansion component according to the target data.
[0059] It should be noted that the physical slot identification of the expansion component included in the data request is not fixed. In some complex system architecture, the expansion component can be dynamically plugged or reconfigured according to actual needs. Therefore, the UEFI can dynamically adjust the physical slot identification in the data request according to the real-time state of the expansion component, to ensure that the data of the target expansion component can always be accurately obtained.
[0060] In order to efficiently read the target data, a reasonable data storage structure and an optimized search algorithm can be used. That is, the target data can be stored according to the physical slot identification of the expansion component, and an index structure is established, so that the target data can be quickly located when the data request is received. At the same time, efficient search algorithms such as binary search, hash search, etc. can be used, so as to further improve the speed and accuracy of data reading.
[0061] It can be understood that the out-of-band safe acquisition and verification of the configuration data of the expansion component are realized by the management component bridge. At the same time, the physical slot identification is used to quickly locate the target component among a plurality of expansion components, to improve the efficiency of data acquisition.
[0062] In the embodiments of the present disclosure, the processing method can further include: obtaining a mapping relationship between each controller and a physical port provided by the expansion component; and determining that the function execution state meets the preset condition in a case where the mapping relationship between the at least one controller and the physical port does not meet the preset configuration.
[0063] Firstly, the mapping relationship between the controllers and the ports in the expansion component can be acquired. In the preset configuration, each controller can specify the corresponding physical port, such as Figure 4 As shown, the preset network card controller 1 corresponds to the ports 2 and 3, and the network card controller corresponds to the ports 0 and 1. However, in the actual execution process, the mapping relationship may be dislocated due to various reasons, such as pin welding errors, physical damage of the controller or the port, and the like. For example, in the actual execution, the network card controller 1 corresponds to the ports 0 and 1, and the network card controller 2 corresponds to the ports 2 and 3. Once the mapping relationship of at least one controller and the physical port does not comply with the preset configuration, it can be determined that the function execution state meets the preset condition.
[0064] In addition, the function execution state can also be determined based on various target data to determine whether the preset condition is met.
[0065] Exemplarily, the physical mapping relationship of the function module and the PCIe slot can be verified, that is, the slot function definition is acquired first, and then the device number or the function number in the PCIe configuration space is compared. If it is found that the actual connection device (such as a network card) of the slot does not comply with the definition, it can be determined that the function execution state meets the preset condition.
[0066] Exemplarily, the controller pin configuration conflict can be located by comparing the pin function defined in the schematic diagram and the measured level timing. For example, a pin should be configured as a low-level reset function in the schematic diagram, but it corresponds to a high-level trigger function under different slots. This configuration conflict will cause the function of the PCIe card to be unable to work normally in the expected order and manner. Once this situation is detected, it can be determined that the function execution state meets the preset condition.
[0067] Exemplarily, it can be checked whether the interrupt controller correctly binds the interrupt of the high-priority device to the low-delay core, and it is verified whether the channels are allocated according to the preset weight. If there is a deviation in the interrupt routing or the channel allocation, for example, the interrupt of the high-priority device is bound to the high-delay core, or the channels are not allocated according to the preset weight, it may affect the normal operation of the system. At this time, it can also be determined that the function execution state meets the preset condition.
[0068] It can be understood that by acquiring and comparing the mapping relationship, accurate triggering basis can be provided for compensation measures, and the situation of incorrect connection of the controller and the physical port can be found in time, so as to avoid the system running under the wrong configuration, prevent system crashes, data loss and other problems caused by function confusion, and improve the overall stability of the system.
[0069] On the basis of the above-mentioned embodiments, in the case that the mapping relationship between the at least one controller and the physical port does not conform to the preset configuration, the function execution state is determined to satisfy the preset condition, comprising: obtaining a mapping relationship table stored in an extension component, and determining the physical port actually associated with each controller, the mapping relationship table being used to define the association relationship between the controller and the physical port; in the case that the physical port actually associated with at least one controller is inconsistent with the physical port corresponding to the controller in the mapping relationship table, it is determined that the function execution state satisfies the preset condition.
[0070] By comprehensively considering various factors such as hardware architecture, functional requirements, and performance optimization, the mapping relationship table can be set, in which the association relationship between each controller and the corresponding physical port can be stored, so as to ensure that the system can accurately communicate and interact with the corresponding physical port when running normally, and realize various functions of the system.
[0071] After successfully obtaining the mapping relationship table, the target data can be parsed to determine the physical port actually associated with each controller. In this process, specific probe signals can be sent to each controller, and then the actual connection relationship between the physical ports can be determined according to the response of the physical ports to the probe signals. Alternatively, a hardware-level monitoring circuit can be used to monitor the data transmission activities between the controller and the physical port in real time, so as to determine the actual association therebetween. Finally, the physical port actually associated with each controller can be compared with the physical port corresponding to the controller in the mapping relationship table. If at least one controller actually associated with the physical port is inconsistent with the physical port corresponding to the controller in the mapping relationship table in this comparison process, the UEFI can immediately determine that the function execution state satisfies the preset condition (i.e., an abnormal state occurs).
[0072] It can be understood that by obtaining the mapping relationship table and comparing the actually associated ports, the mapping error of the controller and the physical port can be quickly determined, the function execution abnormality can be determined at the initial stage of the problem, and the chain reaction caused by the error configuration can be prevented in time, thereby improving the stability and reliability of the system operation.
[0073] In the embodiments of the present disclosure, further comprising: in response to detecting that the data channel associated with at least one controller has a communication abnormality, performing a channel inversion operation on the transmission direction of the data channel; after performing the data channel inversion operation, if no signal feedback from the data channel is received within a preset time window, it is determined that the function execution state satisfies the preset condition.
[0074] During data transmission, the transmission direction of the data channel can be abnormal due to various factors such as signal interference, hardware failure or configuration error. The management component can continuously monitor the data channel associated with each controller in real time. Once it is detected that the data channel associated with at least one controller has a communication abnormality, the transmission direction of the data channel with communication abnormality can be executed. Channel reversal operation, re-establish a stable data transmission link.
[0075] Channel reversal is a technical means for adjusting the order of data transmission channels in motherboard design. In high-speed data transmission scenarios such as PCIe interface, data can be transmitted in parallel through multiple channels. Channel reversal can change the physical or logical order of these channels, thereby affecting display problems and port number order problems.
[0076] During the power-on self-test phase, UEFI can scan the connected devices according to the preset channel order. For example, for PCIe devices, UEFI can detect whether there is a device connected to each channel in order from low to high channel number. If Lane Reversal is not considered in the design, the scanning order can be according to the hardware layout and the preset channel number. When Lane Reversal is implemented, the actual physical order of the channel is inconsistent with the preset logical order. Thus, when scanning, the device on the channel originally in the back of the logical order is detected first. As shown in Figure 5 As shown, Lane Reversal is performed on three PCIe devices, PCIe10, PCIe11 and PCIe12. The logical scanning order of PCIe10 is to scan the 0th data channel (Lane 0) to the 7th data channel (Lane 7) on the 3rd port (PE3) in order. After Lane Reversal is performed, the actual physical connection order becomes Lane 7, Lane 6, Lane 5, Lane 4, Lane 3, Lane 2, Lane 1. Then, the system can detect the device originally connected to Lane 7 first when scanning, thereby disrupting the original scanning order.
[0077] After successfully performing the data channel reversal operation, a preset time window can be set. Within the time window, it is determined whether signal feedback from the data channel can be received. If no signal feedback from the data channel is received within the preset time window, UEFI can determine that the function execution state meets the preset condition.
[0078] It can be understood that there is still no effective signal feedback after the channel reversal operation, that is, it is determined as an abnormal state, so that the physical layer connection problem can be excluded by channel reversal, and hardware damage (such as chip failure) and repairable abnormalities (such as signal interference) can be clearly distinguished.
[0079] On the basis of the above-mentioned embodiments, in this embodiment, the running parameters of the controller are reconfigured, and the function loading of the function module is loaded in the expected order, and further comprising: based on the result of the reverse operation of the data channel, adjusting the mapping relationship of the data channel to each controller.
[0080] After performing the data channel reverse operation, if the data channel reverse operation changes the path or characteristics of data transmission, the original mapping relationship may no longer be applicable, and therefore the mapping relationship can be dynamically adjusted according to the result of the reverse operation to adapt to the new data transmission environment.
[0081] For example, if the reverse operation successfully improves communication, such as reducing the bit error rate or reducing the transmission delay, it indicates that the new channel state is reliable. At this time, the mapping relationship can be adjusted to preferentially map controllers with high communication quality requirements and large data traffic to channels with good quality after the reverse operation. At the same time, the controller functions and loads can be considered, and controllers with related functions and frequent interactions can be mapped to adjacent or efficient channels, and the traffic can be distributed according to the processing capacity to avoid congestion.
[0082] When adjusting the mapping relationship of the data channel to the controller, the architecture and functional requirements of the system can be fully understood to ensure that the adjusted mapping relationship can meet the normal operation requirements of the system. In addition, after adjusting the mapping relationship, each function of the system can be fully tested and verified to ensure that no new problems occur. Finally, the adjustment process and related parameters can be recorded to quickly backtrack and troubleshoot when problems occur.
[0083] It can be understood that by dynamically reconfiguring the channel-controller mapping relationship, the function recovery and performance optimization of the expansion component are realized without manual intervention, while ensuring smooth transition of the system software without perception.
[0084] On the basis of the above-mentioned embodiments, in this embodiment, the running parameters of the controller are reconfigured, and the function loading of the function module is loaded in the expected order, comprising: in response to initializing the operating system, adjusting the enumeration order of the expansion component and / or the controller according to the running parameters.
[0085] In response to initializing the operating system, the enumeration order of the expansion component and / or the controller can be adjusted in the PCIe enumeration link of the POST stage, such as rearranging the PCIe bus scanning priority to clearly preferentially enumerate the expansion component or the controller in the enumeration process.
[0086] Exemplarily, if the function misplacement is detected (for example, a port is misidentified due to a controller pin mapping error), the UEFI can locate the conflict point of the pin function and the actual connection by analyzing the hardware design document and the firmware configuration table. Then, the corresponding relationship between the port and the function module can be directly written into the specific register of the controller to correct the misconfiguration, such as remapping the port misconfigured as a storage function to a network function, thereby affecting the enumeration order of the PCIe device during initialization, that is, the corrected device will be preferentially identified in the subsequent scanning.
[0087] Exemplarily, the reconfigured operating parameter is a controller scanning priority parameter. During the enumeration process, the key controller can be allowed to be enumerated first according to the parameter, so as to ensure that the PCIe card function module is loaded in the expected order.
[0088] It can be understood that the enumeration order is dynamically adjusted by reconfiguring the operating parameter of the controller during the power-on self-test stage, and the enumeration order can be flexibly optimized according to the actual running situation and the hardware state of the system, so as to ensure that the order of loading the card function after the operating system is started is normal.
[0089] On the basis of the above embodiment, in the embodiment, the operating parameter of the controller is reconfigured to enable the function module to be loaded in the expected order, and the method further includes: switching the channel splitting mode of the physical port of the expansion component based on the port configuration requirement in the target data; and / or loading a predefined compensation parameter on the physical link of the expansion component, and adjusting the operating parameter according to the compensation parameter, the compensation parameter being used to represent the signal integrity adjustment requirement.
[0090] In different application scenarios and hardware architectures, the port has different requirements for the channel splitting mode. A reasonable channel splitting mode can optimize the data transmission path, improve the overall performance of the system, and ensure that the function module obtains stable and efficient data interaction support during the loading process, so as to be loaded smoothly in the expected order.
[0091] Firstly, the target data can be parsed to extract specific requirements for port configuration, especially information related to the channel splitting mode. Then, a control signal can be sent to the expansion component through a specific hardware interface or instruction set to switch the channel splitting mode of the physical port of the expansion component to the target mode. For example, in some high-speed data transmission scenarios, if the target data requires the port to operate in full bandwidth mode, the system will switch the original split mode (such as x8 / x8) to a single high-bandwidth mode (such as x16 / x0) to meet the data transmission requirements.
[0092] Exemplarily, in a high-performance computing cluster, a certain expansion component connects multiple computing nodes, and target data requires a certain physical port of the expansion component to provide the computing nodes with maximum data transmission bandwidth. UEFI detects that the port currently adopts an x8 / x8 split mode, resulting in limited bandwidth obtained by each computing node. At this time, the channel split mode of the port can be switched to an x16 / x0 mode according to the port configuration requirement in the target data, so that one of the computing nodes can obtain all bandwidth resources.
[0093] In an actual hardware system, due to the influence of factors such as the length, material, and interference of a physical link, problems such as attenuation and distortion of a signal can occur in the transmission process, thereby affecting accurate transmission of data and normal loading of a functional module. At this time, a compensation parameter (Workaround) can be introduced for correction and adjustment, that is, the target data can further include additional information for workaround as shown in the following table, to ensure that the signal can maintain integrity on the physical link, and improve the stability and reliability of the system. Figure 3
[0094] First, a series of compensation parameters can be predefined according to hardware design and actual test conditions, which can include link equalization preset values, timing tolerance, and multiple aspects. In system initialization, when it is detected that there is a problem with signal integrity on a physical link, the system can automatically load these predefined compensation parameters onto the physical link of the expansion component. Meanwhile, according to the loaded compensation parameters, the running parameters of the controller can be adjusted accordingly. For example, the clock frequency, data transmission rate, and other parameters of the link can be adjusted to adapt to the signal characteristics after compensation.
[0095] Taking a PCIe bus as an example, when it is detected that a certain slot is insufficient in bandwidth due to improper split setting, in addition to switching the split mode, a corresponding compensation parameter can also be introduced. For example, the link equalization preset value can be adjusted to compensate for the attenuation and distortion of the signal in the transmission process by adjusting the amplitude and phase of the signal. Meanwhile, the timing tolerance can be adjusted to ensure that the data is sampled and transmitted within the correct clock cycle, to avoid data errors caused by timing problems.
[0096] It can be understood that by intelligently switching the channel split mode and dynamically loading the compensation parameter, hardware compatibility optimization and link stability improvement can be realized.
[0097] Figure 6 Another flowchart of a processing method according to an embodiment of the present disclosure is schematically shown.
[0098] As Figure 6 As shown, during the Pre-EFI Initialization (PEI) phase, the management component (BMC or FPGA) can first query the target data. Then, after the power-on self-test (POST) begins, the UEFI can retrieve this target data from the management component through a query. Based on the retrieved target data, the UEFI can adjust the slot splitting parameters. Simultaneously, compensation parameters can be introduced on each root port, i.e., the port used to connect expansion components. Upon entering the Driver Execution Environment (DXE) phase, the UEFI can check the hardware configuration to ensure channel reversal. Finally, the UEFI can use the target data and basic hardware information to adjust the PCIe enumeration order, at which point the POST ends.
[0099] The processing method provided in this disclosure supports dynamic split switching without manual user intervention, automatically adjusting the number of channels based on the physical channel requirements of the PCIe card (e.g., single-slot x16 or dual-slot x8 / x8). Simultaneously, it unifies the network card port sequence mapping, ensuring strict consistency between the logical numbering and physical location of each port under different hardware designs. Furthermore, it can automatically match pre-stored compensation parameters based on the target data provided by the PCIe card, avoiding the need for manual UEFI code updates or device identifier additions due to differences between new and old cards, thus achieving plug-and-play hardware compatibility.
[0100] Figure 7 A block diagram of a processing apparatus according to an embodiment of the present disclosure is shown schematically.
[0101] like Figure 7 As shown, the processing device 700 includes a receiving module 710, a determining module 720, and an adjusting module 730.
[0102] According to some embodiments of this disclosure, the processing apparatus 700 can be used to implement the reference. Figures 2-6 The processing method described according to embodiments of this disclosure.
[0103] The receiving module 710 can perform, for example, operation S210, to receive target data of the expansion component, which includes functional modules managed by multiple controllers. The target data is acquired by the management component before the operating system starts and is used to characterize the hardware topology and functional configuration status of the expansion component.
[0104] The determination module 720 can perform, for example, operation S220, to determine the functional execution status of the functional module based on the target data.
[0105] The adjusting module 730 can perform, for example, operation S230, for reconfiguring the running parameter of the controller to make the function loading of the function module loaded in the expected order in response to the function execution state satisfying the preset condition.
[0106] For example, any of the receiving module 710, the determining module 720 and the adjusting module 730 can be combined in one module, or any of the modules can be split into multiple modules. Alternatively, at least part of the function of one or more of the modules can be combined with at least part of the function of the other modules, and implemented in one module. According to an embodiment of the present disclosure, at least one of the receiving module 710, the determining module 720 and the adjusting module 730 can be at least partially implemented as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA), a system on chip, a system on board, a system on package, an application specific integrated circuit (ASIC), or any other reasonable manner that can be integrated or packaged by a circuit, etc. hardware or firmware, or any one of software, hardware and firmware or a proper combination of any of them. Alternatively, at least one of the receiving module 710, the determining module 720 and the adjusting module 730 can be at least partially implemented as a computer program module which can perform the corresponding function when the computer program module is run.
[0107] It should be understood that the processing device in the embodiments of the present disclosure corresponds to the processing method in the embodiments of the present disclosure, and the specific implementation details are the same, which will not be repeated here.
[0108] It should be noted that in the technical solutions of the present disclosure, the collection, storage, use, processing, transmission, provision, disclosure and application of user personal information comply with relevant laws and regulations, necessary security measures are taken, and do not violate public order and good customs. In the technical solutions of the present disclosure, the authorization or consent of the user is obtained before the user's personal information is obtained or collected.
[0109] Figure 8 The block diagram of the electronic device suitable for implementing the processing method according to an embodiment of the present disclosure is schematically shown.
[0110] As Figure 8As shown, the electronic device 800 according to embodiments of the present disclosure includes a processor 801, which can perform various appropriate actions and processes according to a program stored in a read only memory (ROM) 802 or a program loaded into a random access memory (RAM) 803 from a storage section 808. The processor 801 can include, for example, a general purpose microprocessor (e.g., a CPU), an instruction set processor, and / or a related chip set, and / or a dedicated microprocessor (e.g., an application specific integrated circuit (ASIC)), and so on. The processor 801 can also include an on-board memory for cache use. The processor 801 can include a single processing unit or multiple processing units for executing different actions of the method processes according to embodiments of the present disclosure.
[0111] In the RAM 803, various programs and data required for the operation of the electronic device 800 are stored. The processor 801, the ROM 802, and the RAM 803 are connected to each other via a bus 804. The processor 801 performs various operations of the method processes according to embodiments of the present disclosure by executing the programs in the ROM 802 and / or the RAM 803. Note that the programs can also be stored in one or more memories other than the ROM 802 and the RAM 803. The processor 801 can also perform various operations of the method processes according to embodiments of the present disclosure by executing the programs stored in the one or more memories.
[0112] According to embodiments of the present disclosure, the electronic device 800 can further include an input / output (I / O) interface 805, which is also connected to the bus 804. The electronic device 800 can further include one or more of the following components connected to the I / O interface 805: an input section 806 including input hardware such as a target hardware, and so on; an output section 807 including output hardware such as a cathode ray tube (CRT), a liquid crystal display (LCD), and so on, and a speaker, and so on; a storage section 808 including a hard disk, and so on; and a communication section 809 including a network interface card such as a LAN card, a modem, and so on. The communication section 809 performs communication processing via a network such as the Internet. A drive 810 is also connected to the I / O interface 805 as necessary. A removable recording medium 811 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, and so on is attached to the drive 810 as necessary, so that a computer program read therefrom is installed into the storage section 808 as necessary.
[0113] The present disclosure also provides a computer readable storage medium, which can be included in the device / apparatus / system described in the above embodiments; or can exist separately without being assembled into the device / apparatus / system. The above computer readable storage medium carries one or more programs, which when executed, implement the method according to embodiments of the present disclosure.
[0114] According to an embodiment of the present disclosure, the computer readable storage medium can be a nonvolatile computer readable storage medium, for example, can include but not limited to: a portable computer diskette, a hard disk, a random access memory (RAM), a read only memory (ROM), an erasable programmable read only memory (EPROM or flash memory), a portable compact disc read only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In this disclosure, the computer readable storage medium can be any tangible medium that contains or stores a program that can be used by or in connection with an instruction execution system, apparatus, or device. For example, according to an embodiment of the present disclosure, the computer readable storage medium can include the ROM 802 and / or the RAM 803 described above and / or one or more memory other than the ROM 802 and the RAM 803.
[0115] Embodiments of the present disclosure also include a computer program product, which includes a computer program containing program codes for executing the methods shown in the flowcharts. When the computer program product is run in a computer system, the program codes are used to make the computer system implement the processing methods provided by the embodiments of the present disclosure.
[0116] The above functions defined in the system / device of the embodiments of the present disclosure are performed when the computer program is executed by the processor 801. According to an embodiment of the present disclosure, the system, device, module, unit, etc. described above can be implemented by computer program modules.
[0117] In one embodiment, the computer program can rely on tangible storage media such as optical storage media, magnetic storage media, etc. In another embodiment, the computer program can also be transmitted, distributed, and downloaded in the form of signals on network media. The computer program containing program codes can be transmitted by any appropriate network media, including but not limited to wireless, wired, etc., or any suitable combination of the foregoing.
[0118] In such an embodiment, the computer program can be downloaded and installed from the network by the communication part 809, and / or installed from the detachable medium 811. When the computer program is executed by the processor 801, the above functions defined in the system of the embodiments of the present disclosure are performed. According to an embodiment of the present disclosure, the system, device, apparatus, module, unit, etc. described above can be implemented by computer program modules.
[0119] According to embodiments of the present disclosure, program code of the computer program for performing the methods provided by the embodiments of the present disclosure can be written in any combination of one or more programming languages, and can be implemented in a computer program product. Specifically, the computer program can be implemented in a high-level procedural and / or object-oriented programming language, and / or in assembly / machine language. The programming language includes, but is not limited to, Java, C++, python, “C” language, or similar programming languages. The program code can execute entirely on the user's computing device, partly on the user's device, and partly on a remote computing device, or entirely on the remote computing device or server. In the latter scenario, the remote computing device can be connected to the user's computing device through any kind of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computing device, such as through the Internet using an Internet Service Provider (ISP).
[0120] The computer program product of the present disclosure can be a computer program product, which is a machine-readable medium (or computer readable medium) having stored therein a sequence of instructions readable by a machine (e.g., a computer). The instructions in the machine-readable medium focus on the function of the computer program (e.g., in the form of a computer program product). The instructions can be executed by one or more processors to produce a computer-implemented process, such as the one(s) described above. The instructions can be stored in a computer memory, which can be a single memory or spread out over multiple memories. The machine-readable medium can be a magnetic or optical disk, a magnetic tape, a semiconductor memory, a computer disk, or any other suitable medium.
[0121] Those skilled in the art can understand that the features described in various embodiments of the present disclosure and / or claims can be combined and / or integrated in various combinations and / or integrations, even if such combinations or integrations are not explicitly described in the present disclosure. In particular, the features described in various embodiments of the present disclosure and / or claims can be combined and / or integrated in various combinations and / or integrations without departing from the spirit and teachings of the present disclosure. All such combinations and / or integrations fall within the scope of the present disclosure.
[0122] The above describes embodiments of the present disclosure. However, these embodiments are merely for illustrative purposes, and are not intended to limit the scope of the present disclosure. Although each embodiment is described above separately, this does not mean that the measures in each embodiment cannot be used advantageously in combination. The scope of the present disclosure is defined by the appended claims and their equivalents. Those skilled in the art can make various substitutions and modifications without departing from the scope of the present disclosure, and these substitutions and modifications should all fall within the scope of the present disclosure.
Claims
1.A processing method, comprising: receiving target data of an expansion component, the expansion component comprising function modules managed by a plurality of controllers, the target data being acquired via a management component before an operating system is started, and being used to represent a hardware topology and a function configuration state of the expansion component; determining a function execution state of the function modules based on the target data; in response to the function execution state satisfying a preset condition, reconfiguring a running parameter of the controllers so that function loading of the function modules is loaded in an expected order. 2.The method of claim 1, further comprising: obtaining a mapping relationship between each of the controllers and a physical port provided by the expansion component; in a case where the mapping relationship between at least one of the controllers and the physical port does not conform to a preset configuration, determining that the function execution state satisfies the preset condition. 3.The method of claim 2, wherein the determining that the function execution state satisfies the preset condition in the case where the mapping relationship between at least one of the controllers and the physical port does not conform to the preset configuration comprises: obtaining a mapping relationship table stored in the expansion component, the mapping relationship table being used to define an association relationship between the controllers and the physical port; and determining a physical port actually associated with each of the controllers; and in a case where the physical port actually associated with at least one of the controllers is inconsistent with a physical port corresponding to the controller in the mapping relationship table, determining that the function execution state satisfies the preset condition. 4.The method of claim 1, wherein the reconfiguring the running parameter of the controllers so that the function loading of the function modules is loaded in the expected order comprises: in response to initializing the operating system, adjusting an enumeration order of the expansion component and / or the controllers according to the running parameter. 5.The method of claim 1, 3 or 4, wherein the reconfiguring the running parameter of the controllers so that the function loading of the function modules is loaded in the expected order further comprises: switching a channel splitting mode of a physical port of the expansion component based on a port configuration requirement in the target data; and / or loading a predefined compensation parameter on a physical link of the expansion component, the compensation parameter being used to represent a signal integrity adjustment requirement, and adjusting the running parameter according to the compensation parameter. 6.The method of claim 1, further comprising: in response to detecting that a data channel associated with at least one of the controllers has a communication exception, performing a channel inversion operation on a transmission direction of the data channel; and after performing the channel inversion operation of the data channel, if no signal feedback from the data channel is received within a preset time window, determining that the function execution state satisfies the preset condition. 7.The method of claim 6, wherein the reconfiguring the running parameter of the controllers so that the function loading of the function modules is loaded in the expected order further comprises: adjusting a mapping relationship of the data channel to each of the controllers based on a result of the inversion operation of the data channel. 8.The method of claim 1, wherein the receiving the target data of the expansion component comprises: sending a data request to the management component, the data request including a physical slot identification of the expansion component; in response to the data request, causing the management component to read the target data according to the physical slot identification and transmit the target data. 9.A processing apparatus, comprising: a receiving module configured to receive target data of an expansion component, the expansion component including functional modules managed based on a plurality of controllers, the target data being acquired via a management component before an operating system is started, and used to represent a hardware topology and a functional configuration state of the expansion component; a determining module configured to determine a functional execution state of the functional modules based on the target data; an adjusting module configured to, in response to the functional execution state satisfying a preset condition, reconfigure a running parameter of the controllers, so that functional loading of the functional modules is loaded in an expected order. 10.An electronic device, comprising: one or more processors; a storage device configured to store one or more programs, wherein the one or more programs, when executed by the one or more processors, cause the one or more processors to perform the following method: receiving target data of an expansion component, the expansion component including functional modules managed based on a plurality of controllers, the target data being acquired via a management component before an operating system is started, and used to represent a hardware topology and a functional configuration state of the expansion component; determining a functional execution state of the functional modules based on the target data; and in response to the functional execution state satisfying a preset condition, reconfiguring a running parameter of the controllers, so that functional loading of the functional modules is loaded in an expected order.
Citation Information
Patent Citations
Loading method and device
CN113051005A
Topology management method and device, network element management node and storage medium
CN114650226A
Multifunctional module sharing execution method and device, equipment and storage medium
CN115543733A
Method and device for testing operation performance of extension module
CN118260131A
High parallelism computing system and instruction scheduling method thereof
US20200004514A1