Multi-thread based dpi task processing method, electronic device and medium

By employing a multi-threaded processing approach, utilizing multiple DPI task processing containers and parallel threads, the problem of low DPI task processing efficiency is solved, thereby improving chip development efficiency.

CN120909741BActive Publication Date: 2026-02-06METAX INTEGRATED CIRCUITS (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202511448512.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-10-11
Publication Date
2026-02-06
Estimated Expiration
2045-10-11

AI Technical Summary

Technical Problem

Existing technologies have low DPI task processing efficiency, which affects chip development efficiency.

Method used

A multi-threaded DPI task processing method is adopted, which achieves parallel execution of DPI tasks by setting up multiple DPI task processing containers and parallel threads.

Benefits of technology

This improves the processing efficiency of DPI tasks, thereby enhancing the overall efficiency of chip development.

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Abstract

This invention relates to the field of chip verification technology, and more particularly to a multi-threaded DPI task processing method, electronic device, and medium. The method includes step S1: setting M DPI task processing containers {C1, C2, ..., C...} m ,...,C M} and the upper-level management module DR; Step S2, obtain the nth DPI task A n DR will A n Assigned to the corresponding target C m P m In the context, A has a dependency relationship. n Assigned to different C m Middle; Steps S3 and C m R in m In Q m Create a thread in the middle; Step S4, R m P m DPI tasks are assigned to Q m In the threads, each thread processes one DPI task, Q m The assigned DPI tasks are executed in parallel by threads within the chip. This invention improves the processing efficiency of DPI tasks during chip development.
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Description

TECHNICAL FIELD

[0001] The present application relates to the chip verification technical field, and particularly relates to a DPI task processing method based on multi-thread, an electronic device and a medium. BACKGROUND

[0002] In the chip development process, the interaction between the high-level language and the hardware description language is involved, and the interaction between the high-level language and the hardware description language needs to be implemented based on the DPI (Direct Programming Interface) to generate a DPI task. For example, in the chip joint simulation process, the interaction process between the high-level language and the hardware description language is involved, and the chip joint simulation refers to the cooperation simulation of combining different types of simulation tools, models or design levels in the chip design and verification process, so as to comprehensively and efficiently verify the function, performance and interaction with other systems of the chip. The processing of the DPI task in the prior art is implemented based on single thread, which leads to low efficiency of the DPI task processing, thereby affecting the efficiency of the chip development. Therefore, how to improve the processing efficiency of the DPI task in the chip development process becomes a technical problem to be solved. SUMMARY

[0003] The present application aims to provide a DPI task processing method based on multi-thread, an electronic device and a medium, and improve the processing efficiency of the DPI task in the chip development process.

[0004] According to the first aspect of the present application, a DPI task processing method based on multi-thread is provided, comprising:

[0005] Step S1, setting M DPI task processing containers {C1, C2,..., Cm} and an upper management module DR, Cm is the mth DPI task processing container, Cm includes Cm corresponding DPI task queue Pm, Cm corresponding thread queue Qm and Cm corresponding management module Rm, Pm and Qm are initially empty, and the DPI task is a direct programming interface task. m ,...,C M} and an upper management module DR, C m is the mth DPI task processing container, C m includes C m corresponding DPI task queue P m , C m corresponding thread queue Q m and C m corresponding management module R m , P m and Q m are initially empty, and the DPI task is a direct programming interface task.

[0006] Step S2, obtaining the nth DPI task A, DR assigns A to the corresponding target C n P n of P m . mA with dependency relationship n DPI tasks are distributed in different C m , wherein n is in the range of 1 to N, and N is the total number of DPI tasks;

[0007] Step S3, C m R in m Q m to create threads;

[0008] Step S4, R m DPI tasks in P m are distributed to threads in Q m , each thread processes one DPI task, and threads in Q m run the assigned DPI tasks in parallel.

[0009] According to the second aspect of the present application, an electronic device is provided, comprising: at least one processor; and a memory connected in communication with the at least one processor; wherein the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method according to the first aspect of the present application.

[0010] According to the third aspect of the present application, a computer readable storage medium is provided, which stores computer executable instructions for executing the method according to the first aspect of the present application.

[0011] The present application has obvious advantages and beneficial effects compared with the prior art. By the above technical solution, the present application provides a multi-thread based DPI task processing method, an electronic device and a medium, which can achieve considerable technical progress and practicality, and have wide industrial utilization value, at least having the following beneficial effects:

[0012] The present application sets multiple DPI task processing containers, distributes DPI tasks in multiple DPI task processing containers, sets multiple parallel threads in each DPI task processing container, realizes parallel execution of DPI tasks, improves the processing efficiency of DPI tasks in the chip development process, and further improves the chip development efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0014] Figure 1 A flowchart of a multi-thread based DPI task processing method provided by the present application is provided. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] This invention provides a multi-threaded DPI task processing method, such as... Figure 1 As shown, it includes:

[0017] Step S1: Set up M DPI task processing containers {C1, C2, ..., C...} m ,...,C M} and the upper-level management module DR, C m C is the container for processing the m-th DPI task. m Includes C m The corresponding DPI task queue P m C m The corresponding thread queue Q m and C m The corresponding management module R m P m and Q m Initially empty, the DPI task is a direct programming interface task.

[0018] DR manages task processing containers, and the number of task processing containers can be set based on the number of DPI tasks and DPI task processing requirements. Each task processing container contains a thread queue Q. m Threads in R execute in parallel. m Used for managing and coordinating P m and Q m .

[0019] Step S2: Obtain the nth DPI task A n DR will A n Assigned to the corresponding target C m P m In the context, A has a dependency relationship. n Assigned to different C m In this context, n ranges from 1 to N, where N is the total number of DPI tasks.

[0020] It should be noted that for each DPI task A n DR needs to be based on the current DPI task processing container's task allocation and A nDetermine A according to the allocation of other assigned tasks with dependency relationship n Corresponding target C m , ensure A with dependency relationship n Allocation in different C m .

[0021] Step S3, R m In C m Create threads in Q m .

[0022] It should be noted that each C m Set the corresponding maximum number of threads, R m In C m The number of threads created in Q m Cannot exceed the corresponding maximum number of threads in C m .

[0023] Step S4, R m Assign DPI tasks in P m To the threads in Q m , each thread handles one DPI task, and the threads in Q m Run the assigned DPI tasks in parallel.

[0024] As an embodiment, C m Is set as a fixed type container or a dynamic adjustment container, the number of threads in Q m Of the fixed type container is fixed, used to store periodically generated DPI tasks, and the Q m Of the dynamic adjustment container is used to store non-periodically generated DPI tasks, and the number of threads in Q m Of the dynamic adjustment container is dynamically adjusted according to the amount of generated DPI tasks. Specifically, each C m Can be set according to the generation of DPI tasks, so as to improve the utilization rate of computing resources.

[0025] As an embodiment, the periodically generated DPI task is generated based on a first chip joint simulation architecture, the first chip joint simulation architecture comprising a first stimulus generator, a first design under test and a first preset model, wherein the first stimulus generator and the first design under test are generated based on a hardware description language, and the hardware description language can be Verilog, VHDL, SystemVerilog, SystemC, etc. The first preset model is generated based on a high-level language, and the high-level language can be C language, C++ language, Python language, etc. The first stimulus generator periodically inputs stimuli to the first design under test and the first preset model. Since the first stimulus generator and the preset model are generated based on different languages, the first stimulus generator and the preset model need to periodically generate DPI tasks based on a DPI interface during interaction. The first chip joint simulation architecture further comprises a first monitor and a first score board. The first monitor is used to obtain output data from the first design under test and transmit the output data to the first score board. The output in the first preset model is also transmitted to the first score board. The first score board is used to compare the output data of the first design under test and the output data in the first preset model.

[0026] As an embodiment, the non-periodically generated DPI task is generated based on a second chip joint simulation architecture, the second chip joint simulation architecture comprising a second stimulus generator, a second design under test and a second preset model, wherein the second preset model comprises a first model module and a second model module. The second stimulus generator, the first model module and the second design under test are generated based on a hardware description language, and the hardware description language can be Verilog, VHDL, SystemVerilog, SystemC, etc. The second model module is generated based on a high-level language, and the high-level language can be C language, C++ language, Python language, etc. The first stimulus generator periodically inputs stimuli to the second design under test and the first model module. The first model module sends the received stimuli to the second model after preprocessing. The second model sends the received data to the first model module after processing. The interaction between the first model module and the second model module is non-periodic frequent interaction. Since the first model module and the second model module are generated based on different languages, the first model module and the second model module need to non-periodically generate DPI tasks based on a DPI interface during interaction. The second chip joint simulation architecture further comprises a second monitor and a second score board. The second monitor is used to obtain output data from the second design under test and transmit the output data to the second score board. The output in the second preset model is also transmitted to the second score board. The second score board is used to compare the output data of the second design under test and the output data in the second preset model.

[0027] As one embodiment, step S2 includes:

[0028] Step S21: Obtain the nth DPI task A n .

[0029] Step S22, if A n For periodically generated DPI tasks, DR will use {C1,C2,...,C...} m ,...,C M The fixed-type container in} is determined to be A. n The corresponding candidate container, if A n For a non-periodic generated DPI task, DR will use {C1,C2,...,C...} m ,...,C M The dynamically adjusted container in} is determined to be A. n The corresponding candidate container.

[0030] Step S23, Determine A n Does a dependency exist, and if so, has it been assigned to one of A's? n In the corresponding candidate container, the already allocated A will be... n A container for DPI tasks with dependencies from A n If a candidate is removed from the corresponding candidate container, proceed to step S24; otherwise, proceed directly to step S24.

[0031] It should be noted that the operation in step S23 ensures that A, which has a dependency relationship, can be maintained. n Assigned to different C m In, so that each C m The DPI tasks allocated in the middle can be executed in parallel.

[0032] Step S24, from A n The corresponding candidate container selects one container as A. n Corresponding target C m DR will A n Assigned to the corresponding target C m P m middle.

[0033] It should be noted that, according to A n The DPI task type, according to the process of steps S21-S24, is A. n Alternatively, you can select the corresponding target container, or set a fixed, corresponding type of container as the target C for different co-simulation architectures. m .

[0034] As one embodiment, in step S24, from A nThe corresponding candidate container selects one container as A n The corresponding target C m , comprising:

[0035] Step S241, based on R m of each candidate container, the current load of the candidate container is obtained.

[0036] Step S242, the candidate container with the minimum current load is determined as A n The corresponding target C m .

[0037] It should be noted that through steps S241-S242, the load of the M DPI task processing containers can be balanced as much as possible, and the utilization rate of computing resources can be improved.

[0038] As an embodiment, the step S3 comprises:

[0039] Step S31, if C m is a fixed type container, then R m The corresponding maximum number of threads of C m is set to a preset fixed value, and if C m is a dynamic adjustment container, then based on the task amount of the non-periodic generated DPI task corresponding to C m , the maximum number of threads corresponding to C m is dynamically set.

[0040] It should be noted that for the dynamic adjustment container, based on the task amount of the non-periodic generated DPI task corresponding to C m , the maximum number of threads corresponding to C m is dynamically set, which can avoid waste of computing resources and improve the utilization rate of computing resources.

[0041] Step S32, when the current number of threads in Q m is less than the maximum number of threads corresponding to C m and P m has unassigned DPI tasks, R m threads are created in Q m .

[0042] As an embodiment, the step S4 comprises:

[0043] Step S41, if there is a task with the highest priority in the current P m , and the task does not exist dependent DPI task, or there is dependent DPI task, and the dependent DPI task has been processed, then R m The task with the highest priority is assigned to the idle thread in Q m .

[0044] Step S42, if the current P m If there are multiple highest priority tasks, and there is no dependent DPI task, or there is a dependent DPI task which has been processed, then R m selects one from the highest priority task and allocates it to the idle thread in Q m .

[0045] Step S43, if the current executed DPI task is a dependent DPI task, then R m sends the current execution completion information to the DR, and the DR sends the current execution completion information to the C m which depends on the DPI task.

[0046] It should be noted that when the dependent DPI task is executed, R m sends the current execution completion information to the DR, and the DR sends the current execution completion information to the C m which depends on the DPI task, so that each task which depends on other DPI task execution is executed after the dependent DPI task is executed, improving the accuracy of the DPI task execution.

[0047] It should be noted that some example embodiments are described as processes or methods depicted as flowcharts. Although the flowcharts depict the steps in a particular order, many of the steps can be performed in parallel, concurrently or at the same time. In addition, the order of the steps can be rearranged. The process can be terminated when its operations are completed, but can also have additional steps not included in the figure. The process can correspond to a method, function, routine, subroutine, or the like.

[0048] The embodiment of the present application also provides an electronic device, comprising: at least one processor; and a memory connected with the at least one processor in communication; wherein the memory stores instructions executed by the at least one processor, and the instructions are arranged to execute the method provided by the embodiment of the present application.

[0049] The embodiment of the present application also provides a computer readable storage medium, which stores computer executable instructions, and the computer executable instructions are used to execute the method provided by the embodiment of the present application.

[0050] The embodiment of the present application realizes the parallel execution of the DPI task by arranging multiple DPI task processing containers, allocating the DPI task in the multiple DPI task processing containers, and arranging multiple parallel threads in each DPI task processing container, improves the processing efficiency of the DPI task in the chip development process, and further improves the chip development efficiency.

[0051] The above merely describes preferred embodiments of the present application, and is not intended to limit the present application in any form. Although the present application has been disclosed with the preferred embodiments as above, it is not intended to limit the present application. Any person skilled in the art, without departing from the technical solution of the present application, can make some changes or modifications to the above disclosed technical content to obtain equivalent embodiments with equivalent changes. However, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application, as long as it does not deviate from the technical solution of the present application, still belongs to the scope of the technical solution of the present application.

Claims

1. A multi-threaded DPI task processing method, characterized in that, include: Step S1: Set up M DPI task processing containers {C1, C2, ..., C...} m ,...,C M } and the upper-level management module DR, C m C is the container for processing the m-th DPI task. m Includes C m The corresponding DPI task queue P m C m The corresponding thread queue Q m and C m The corresponding management module R m P m and Q m Initially empty, the DPI task is a direct programming interface task; Step S2: Obtain the nth DPI task A n DR will A n Assigned to the corresponding target C m P m In this process, DPI tasks with dependencies are assigned to different DPI task processing containers, where n ranges from 1 to N, and N is the total number of DPI tasks. Steps S3 and C m R in m In Q m Create a thread in the middle; Step S4, R m P m DPI tasks are assigned to Q m In the threads, each thread processes one DPI task, Q m The threads in the process run the assigned DPI tasks in parallel. C m Set as a fixed-type container or a dynamically resizable container; the Q of a fixed-type container... m The number of threads is fixed and used to store periodically generated DPI tasks, while the Q of the container is dynamically adjusted. m Used to store non-periodic generated DPI tasks, dynamically adjusting the container's Q. m The number of threads is dynamically adjusted based on the amount of DPI tasks generated.

2. The method according to claim 1, characterized in that, The periodically generated DPI task is generated based on a first chip co-simulation architecture, which includes a first excitation generator, a first design under test, and a first preset model. The first excitation generator and the first design under test are generated based on a hardware description language, and the first preset model is generated based on a high-level language; The first excitation generator periodically inputs excitations into the first design under test and the first preset model. During the interaction between the first excitation generator and the first preset model, DPI tasks are periodically generated.

3. The method according to claim 1, characterized in that, The non-periodic DPI task is generated based on a second-chip co-simulation architecture, which includes a second excitation generator, a second design under test, and a second preset model. The second preset model includes a first model module and a second model module. The second excitation generator, the first model module, and the second design under test are generated based on a hardware description language, and the second model module is generated based on a high-level language. The second excitation generator periodically inputs excitations into the second design under test and the first model module. The first model module preprocesses the received excitations and sends them to the second model module. The second model module processes the received data and sends it back to the first model module. During the interaction between the first model module and the second model module, DPI tasks are generated non-periodically.

4. The method according to claim 1, characterized in that, Step S2 includes: Step S21: Obtain the nth DPI task A n ; Step S22, if A n For periodically generated DPI tasks, DR will use {C1,C2,...,C...} m ,...,C M The fixed-type container in} is determined to be A. n The corresponding candidate container, if A n For a non-periodic generated DPI task, DR will use {C1,C2,...,C...} m ,...,C M The dynamically adjusted container in} is determined to be A. n The corresponding candidate container; Step S23, determine A n Does a dependency exist, and if so, has it been assigned to one of A's? n In the corresponding candidate container, the already allocated A will be... n A container for DPI tasks with dependencies from A n If a candidate is removed from the corresponding candidate container, proceed to step S24; otherwise, proceed directly to step S24. Step S24, from A n The corresponding candidate container selects one container as A. n Corresponding target C m DR will A n Assigned to the corresponding target C m P m middle.

5. The method according to claim 4, characterized in that, In step S24, from A n The corresponding candidate container selects one container as A. n Corresponding target C m ,include: Step S241: Based on R of each candidate container m Get the current load of the candidate container; Step S242: Determine the candidate container with the lowest current load as A. n Corresponding target C m .

6. The method according to claim 1, characterized in that, Step S3 includes: Step S31, if C m If R is a container of a fixed type, then m C m The corresponding maximum number of threads is set to a preset fixed value. If C m To dynamically adjust the container, it is based on C. m The corresponding non-periodic generation of DPI tasks dynamically sets the workload C. m The corresponding maximum number of threads; Step S32, when Q m The current number of threads is less than C. m Corresponding to the maximum number of threads and P m When there are unassigned DPI tasks in R m In Q m Create a thread in the middle.

7. The method according to claim 1, characterized in that, Step S4 includes: Step S41, if the current P m If there exists a highest priority task, and this task has no dependent DPI tasks, or if it has dependent DPI tasks but those tasks have already been completed, then the highest priority task will be assigned to Q. m In the idle thread; Step S42, if the current P m If there are multiple highest-priority tasks, and a task has no dependent DPI tasks, or if it has dependent DPI tasks but those tasks have been completed, then one of the highest-priority tasks will be selected and assigned to Q. m In the idle thread; Step S43: If the currently completed DPI task is a dependent DPI task, then R m The task that has completed execution is sent to the DR, which then sends the execution completion information to the C that depends on this DPI task. m .

8. An electronic device, characterized in that, include: At least one processor; And, a memory communicatively connected to the at least one processor; The memory stores instructions that are executed by the at least one processor, the instructions being configured to perform the method of any one of claims 1-7.

9. A computer-readable storage medium, characterized in that, The device stores computer-executable instructions for performing the method of any one of claims 1-7.

Citation Information

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