CPU-oriented multi-instance power real-time data cache management method and system, electronic equipment and storage medium

Abstract

The invention provides a CPU-oriented multi-instance power real-time data cache management method and system, electronic equipment and a storage medium, and the method comprises the steps: in a power real-time data access scene, distributing real-time data caches according to a CPU multi-core proximity mode, binding with corresponding CPU cores through an operating system NUMA command, and storing the real-time data caches in a power real-time data access scene. And transferring a corresponding request to a corresponding core for processing during access. A management program and data service programs are deployed on a target computer, the management program distributes each data service program to a CPU node, and each data service is bound to a corresponding CPU core. And dividing the database according to different business examples, distributing the database to a plurality of data services, and loading corresponding database data to a memory cache corresponding to the CPU core by the data services. And the newly added database instance is registered in the management program, the management program allocates a node with the lowest memory load according to the memory load condition of each node, and a corresponding data service is newly established.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of real-time data processing of power systems, and particularly relates to a multi-instance power real-time data cache management method and system based on a CPU architecture, an electronic device and a storage medium. BACKGROUND

[0002] Under the background of intelligent transformation of power systems, the throughput of real-time data is growing exponentially. Traditional power data management solutions are mostly based on general server architecture design, which has many limitations.

[0003] The CPUs (such as Kunpeng and Feiteng) manufactured and produced by Chinese enterprises generally adopt multi-core non-uniform memory access (NUMA) architecture, and the traditional cache management is not optimized for cross-node access, resulting in memory access bottlenecks. The fault tolerance mechanism in the prior art is weak, the memory access delay is significantly different, the data recovery time when a node fails often exceeds minutes, the cross-node access delay can be 2-3 times that of local access, and it is difficult to meet the millisecond-level response requirements of power business. In addition, the power business subsystems usually run in independent instances, and the traditional single cache pool mode lacks a fast fault switching mechanism, which easily causes multi-instance resource competition problems, resulting in memory bandwidth contention and causing fluctuations in the quality of service of high-priority businesses.

[0004] Therefore, there is an urgent need for a new multi-instance power real-time data cache management method. SUMMARY

[0005] The application provides a CPU-oriented multi-instance power real-time data cache management method, system and storage medium to solve the problems in the prior art.

[0006] TECHNICAL SOLUTION

[0007] The application provides a CPU-oriented multi-instance power real-time data cache management method, which comprises the following steps:

[0008] The power real-time data involved in the business instance is divided into multiple logical databases for different business instances on the target computer, each logical database is assigned a data service, and the data in the logical database is loaded into the memory cache occupied by the corresponding data service;

[0009] The target computer is pre-deployed with a cluster of management programs and data services, the management program obtains the CPU topology structure through the non-uniform memory access interface of the operating system, and divides multiple data services to different CPU cores according to the node information in the CPU topology structure; the data service exclusively accesses the local memory of the corresponding node;

[0010] The CPU of the target computer adopts a two-level cache working mechanism, including a local cache area established on the local memory of a node and a shared mirror area established on shared memory; the memory load of each node of the local cache area is dynamically monitored, and the management program dynamically migrates data services based on a load balancing algorithm; when a new service instance is added, the new service instance is registered in the management program, and a corresponding data service is newly created;

[0011] The logs of each node are recorded in the shared mirror area, and when a failure occurs, the management program obtains all logs from the shared mirror area, restores the logs within an effective time range, and after restoration, checks the memory address hash value in the logs, and the node executes operations according to the log content.

[0012] Further, each data service is bound to the corresponding CPU core through a numactl command, including:

[0013] The data service is bound to the target CPU core through a sched_setaffinity system call;

[0014] The mbind system call is used to set the memory allocation strategy to the MPOL_BIND mode;

[0015] The kernel vm.zone_reclaim_mode parameter is configured to 1 to enable the NUMA local memory recovery strategy.

[0016] Further, the power real-time data related to the service instance is divided into multiple logical databases, and the power equipment voltage level, data update frequency and service coupling degree are used as the basis for division.

[0017] Further, the two-level cache working mechanism includes:

[0018] The local cache area is set in the local dynamic memory of the node, and the LRU-K replacement algorithm is used to record the K-time access history of the data block;

[0019] The shared mirror area is set in the shared memory pool, stores complete data copies of all service instances, supports cross-node reading, uses a double-buffer exchange mechanism, and sets up a primary and a backup data mirror;

[0020] A cache consistency protocol is established, and when the local cache area is invalid, data is preferentially obtained from the adjacent cache of the same node.

[0021] Further, the load balancing algorithm includes:

[0022] Calculate the load factor L of each node, L = α * CPU usage rate + β * memory occupancy rate + γ * cross-node access rate, where α + β + γ = 1; repeat the above calculation for all nodes in the cluster;

[0023] Introduce a load balancing threshold θ, when the difference between the maximum L value and the minimum L value exceeds θ, calculate the target load mean value L avg , the load is transferred from the node of L>L avg to the node of L<L avg , and the number of services migrated at a time does not exceed 30% of the value of |Lᵢ-L avg |。

[0024] The application also provides a CPU-oriented multi-instance power real-time data cache management system, comprising:

[0025] An allocation module is configured to divide power real-time data related to different service instances into multiple logical databases, allocate data services for each logical database, and load data in the logical database into memory cache occupied by the corresponding data service. The target computer is pre-installed with a management program and a cluster of data services, the management program obtains the CPU topology structure through the non-uniform memory access interface of the operating system, and divides multiple data services into different CPU cores according to the node information in the CPU topology structure; the data service exclusively accesses the local memory of the corresponding node; the CPU of the target computer adopts a two-level cache working mechanism, including a local cache area established on the local memory of the node and a shared mirror area established on the shared memory;

[0026] A registration module is configured to dynamically monitor the memory load of each node in the local cache area, and the management program dynamically migrates data services based on a load balancing algorithm; when a new service instance is added, the new service instance is registered in the management program, and a corresponding data service is newly created;

[0027] A recovery module is configured to record the logs of each node in the shared mirror area, and when a fault occurs, the management program obtains all logs from the shared mirror area, recovers the logs within the effective time range, and verifies the memory address hash value in the logs after recovery, and the node executes operations according to the log content.

[0028] Further, each data service is bound to the corresponding CPU core through the numactl command, comprising:

[0029] The data service is bound to the target CPU core through the sched_setaffinity system call;

[0030] The mbind system call is used to set the memory allocation strategy to the MPOL_BIND mode;

[0031] The kernel vm.zone_reclaim_mode parameter is configured as 1 to enable the NUMA local memory reclaim strategy.

[0032] Further, the power real-time data related to the business instance is divided into multiple logical databases, and power equipment voltage levels, data update frequency and business coupling degree are used as the division basis.

[0033] Further, the two-level cache working mechanism comprises:

[0034] The local cache area is arranged in the node local dynamic memory, and the LRU-K replacement algorithm is used to record the K-time access history of the data block.

[0035] The shared mirror area is arranged in the shared memory pool, stores complete data copies of all business instances, supports cross-node reading, uses a double-buffer exchange mechanism, and sets up a primary and a backup data mirror.

[0036] A cache consistency protocol is established, and when the local cache area is invalid, data is preferentially obtained from the adjacent cache of the same node.

[0037] Further, the load balancing algorithm comprises:

[0038] A load factor L of each node is calculated, L = alpha * CPU usage rate + beta * memory occupancy rate + gamma * cross-node access rate, wherein alpha + beta + gamma = 1, and the above calculation is repeated for all nodes in the cluster.

[0039] A load balancing threshold theta is introduced, when the difference between the maximum L value and the minimum L value exceeds theta, the target load mean value L is calculated avg , and the load is transferred from the node of L>L avg to the node of L<L avg , and the number of services migrated at a time does not exceed 30% of the absolute value of L avg .

[0040] The present application also provides an electronic device comprising the computer program, wherein the computer program is executed by the processor to implement the steps of any of the foregoing methods.

[0041] The present application also provides a computer readable storage medium having a computer program stored thereon, wherein the computer program is executed by the processor to implement the steps of any of the foregoing methods.

[0042] Advantages: Compared with the prior art, the present application has the following significant advantages:

[0043] The application obtains CPU topology through a non-uniform memory access (NUMA) interface, and binds data services to CPU cores, and on this basis, a two-level cache cooperation technology of the CPU is designed to adapt the CPU for cross-node data storage optimization.

[0044] The application adopts a data service dynamic migration strategy based on a load balancing algorithm to solve the problem of multiple instance resource competition, make up for the deficiency of static load distribution, and improve data access performance.

[0045] The application divides real-time databases into multiple logical databases according to power service characteristics, separates data with second-level and minute-level update frequencies, greatly reduces data recovery time when a fault occurs, and significantly improves the throughput and reliability of power real-time data processing on a CPU platform. BRIEF DESCRIPTION OF DRAWINGS

[0046] Figure 1 Flowchart of the method of the application;

[0047] Figure 2 Flowchart of the fault recovery mechanism in the method of the application. DETAILED DESCRIPTION

[0048] The application will be further illustrated in combination with the accompanying drawings and specific embodiments. Figure 1 As shown in the figure, it is a flowchart of a CPU-oriented multi-instance power real-time data cache management method of the application.

[0049] Embodiment 1

[0050] Step one, for different service instances on the target computer, the power real-time data related to the service instances is divided into multiple logical databases, each logical database is allocated a data service, and the data in the logical database is loaded into the memory cache occupied by the corresponding data service.

[0051] The management program obtains the CPU topology through the non-uniform memory access interface of the operating system, and divides multiple data services to different CPU cores according to the node information in the CPU topology; the data service exclusively accesses the local memory of the corresponding node.

[0052] Optionally, a management program and a data service cluster are deployed on the target computer, and the management program includes the following interfaces:

[0053] NUMA topology visualization interface, used to show the physical connection relationship between nodes, and the management program obtains the CPU topology through the operating system NUMA interface;

[0054] Cache distribution heat map interface, used to display the data access intensity of each region in real time;

[0055] Support manual intervention of the core binding adjustment interface for the operation and maintenance personnel to cover the automatic allocation strategy.

[0056] Optionally, the data service instance is divided according to the NUMA node, each instance is bound to a specified CPU core through a numactl command, and exclusive access to the local memory of the corresponding NUMA node is performed. The binding specifically includes the following steps:

[0057] Bind the data service process to the target CPU core through the sched_setaffinity system call;

[0058] Set the memory allocation strategy to the MPOL_BIND mode using the mbind system call;

[0059] Configure the kernel vm.zone_reclaim_mode parameter to 1 to enable the NUMA local memory recovery strategy.

[0060] The division criteria of the logical database are as follows:

[0061] According to the voltage level of the power equipment, the data of equipment above 500kV is allocated to the first NUMA node;

[0062] According to the data update frequency, the SCADA data updated at a second level is separated from the PMU data updated at a minute level for storage;

[0063] According to the business coupling degree, the feeder terminal data of the same protection area is stored in a centralized manner.

[0064] Step two, the CPU of the target computer adopts a two-level cache mechanism, including a local cache area established on the node local memory and a shared mirror area established on the shared memory.

[0065] The local cache area adopts the LRU-K replacement algorithm to record the K-time access history of the data block; the shared mirror area adopts a double-buffer exchange mechanism to set a primary and a backup version of the data mirror to record the logs of each node, the logs including a timestamp, an operation type and a memory address. A cache consistency protocol is established, and when the local cache is invalid, data is preferentially obtained from the adjacent cache of the same NUMA node.

[0066] The pseudo code of the data access process is as follows:

[0067] Business instance ->> local cache area: initiate a data request

[0068] if hit local cache

[0069] Local cache area ->> business instance: return data

[0070] else miss

[0071] Local cache ->> Shared mirror: cross-node request

[0072] Shared mirror ->> Local cache: return data block

[0073] Local cache ->> Local cache: cache according to LRU-K policy

[0074] Local cache ->> Service instance: return data

[0075] Local cache ->> Neighbor node cache: broadcast cache status

[0076] The data update process is as follows:

[0077] Service instance write request;

[0078] Determine the target data location;

[0079] Mark the local cache as "dirty data";

[0080] Update the local cache;

[0081] Trigger the cache consistency protocol;

[0082] Synchronize the shared mirror area;

[0083] Background thread batch writes the shared mirror area;

[0084] Invalidates the corresponding cache of other nodes.

[0085] Step three, dynamically monitor and adjust the memory load of each NUMA node. When a new service instance is added, the management program implements dynamic migration of data service instances based on a load balancing algorithm.

[0086] Optionally, the load balancing algorithm includes: calculating the load factor L = α * CPU usage rate + β * memory occupancy rate + γ * cross-node access rate, where α + β + γ = 1; repeating the above calculation for all nodes in the cluster, and selecting the node with the smallest L value as the lightest load. Introduce a load balancing threshold θ, when the difference between the maximum L value and the minimum L value exceeds θ, trigger rebalancing.

[0087] In this embodiment, α = 0.3, β = 0.5, and γ = 0.2; set the threshold θ (generally 0.1-0.3, determined according to the actual load). Record the load factor L1, L2, …, L n of all nodes in the cluster, and periodically calculate the L value of each node in the cluster at intervals of 5 seconds. Dynamically record the current L max and L min , if L max - L minWhen θ, trigger rebalancing. The rebalancing includes: calculating target load average L avg =ΣLᵢ / n, from L>L avg the node to L<L avg the node transfer load, single migration service quantity does not exceed 30% of |Lᵢ-L avg | to prevent oscillation. Set the cooling time of rebalancing, 10 seconds no repeat trigger rebalancing calculation.

[0088] Step four, in view of the defect that the traditional method fault tolerance link is weak, introduce fault recovery mechanism, process as Figure 2 shown. When the fault occurs, all logs are obtained from the shared image area by the management program, the logs within the effective time range are recovered, the memory address hash value in the log is checked after recovery, and the node is operated according to the log content.

[0089] The system scans the NUMA topology when starting, records the physical distance of adjacent nodes, establishes a backup channel between adjacent NUMA nodes, synchronizes the key state information in real time, and the synchronization frequency is less than 50us delay; heart beat detection is carried out through software ping, and 5 times of continuous heart beat loss is judged as node failure, at this time the management program starts the mirror service in the standby node; at the same time, the last 200ms data operation before the fault is recovered by the redo log playback mechanism.

[0090] If the system fails, the above fault recovery mechanism is enabled, the redo log is recorded by using a circular buffer, the buffer uses a fixed size PMEM memory pool, and the capacity=200ms operation amount. The log entry includes timestamp, operation type, memory address and CRC checksum.

[0091] The process of playing back the log includes: obtaining all logs through the NUMA direct connection channel; calculating the effective time range; obtaining the last 200ms effective log; checking the data integrity by using the CRC engine, atomically executing each log entry content; checking the memory hash value after playback is completed.

[0092] Optionally, a real-time performance monitoring module is further arranged in the application, which is used to collect the QPS, cache hit rate, memory bandwidth utilization rate indicators of each NUMA node, and generates an alarm when any indicator exceeds the preset threshold. The specific collection method of the indicators includes:

[0093] QPS: the instruction cycle number (IPC) and branch misprediction rate of each NUMA node are recorded by PMU performance counter;

[0094] Cache hit rate: the L1 / L2 / L3 cache access situation is monitored by using PMC event counter;

[0095] Memory bandwidth utilization: Collect local / remote memory access ratio by Intel PCM tool.

[0096] Embodiment 2

[0097] The application further provides a CPU-oriented multi-instance power real-time data cache management system, comprising:

[0098] An allocation module is configured to divide power real-time data related to a service instance into a plurality of logical databases for different service instances on a target computer, assign data services to each logical database, and load data in the logical database into a memory cache occupied by the corresponding data service. The target computer is pre-installed with a cluster of management programs and data services. The data services exclusively access the local memory of the corresponding node. The CPU of the target computer adopts a two-level cache working mechanism, including a local cache area established on the local memory of the node and a shared mirror area established on the shared memory.

[0099] A registration module is configured to dynamically monitor the memory load of each node of the local cache area and dynamically migrate the data services based on a load balancing algorithm by the management program. When a new service instance is added, the new service instance is registered in the management program, and a corresponding data service is newly created.

[0100] A recovery module is configured to record the logs of each node in the shared mirror area. When a fault occurs, all logs are obtained from the shared mirror area by the management program, the logs within an effective time range are recovered, the memory address hash value in the logs is verified after recovery, and the node performs operations according to the log content.

[0101] Further, each data service is bound to the corresponding CPU core through a numactl command, comprising:

[0102] The data service is bound to the target CPU core through a sched_setaffinity system call;

[0103] The mbind system call is used to set the memory allocation strategy to the MPOL_BIND mode;

[0104] The kernel vm.zone_reclaim_mode parameter is configured to be 1 to enable the NUMA local memory recycling strategy.

[0105] Further, the power real-time data related to the business instance is divided into multiple logical databases, and power equipment voltage level, data update frequency and business coupling degree are used as the basis for division.

[0106] Further, the two-level cache working mechanism comprises:

[0107] The local cache area is arranged in the node local dynamic memory, and the LRU-K replacement algorithm is used to record the K-time access history of the data block.

[0108] The shared mirror area is arranged in the shared memory pool, and stores complete data copies of all business instances, supports cross-node reading, uses a double-buffer exchange mechanism, and sets up a primary and a backup data mirror.

[0109] A cache consistency protocol is established, and when the local cache area is invalid, data is preferentially obtained from the adjacent cache of the same node.

[0110] Further, the load balancing algorithm comprises:

[0111] The load factor L of each node is calculated, L=α*CPU usage rate+β*memory occupancy rate+γ*cross-node access rate, wherein α+β+γ=1;The above calculation is repeated for all nodes in the cluster.

[0112] A load balancing threshold θ is introduced, when the difference between the maximum L value and the minimum L value exceeds θ, the target load mean value L is calculated avg , from the node of L>L avg to the node of L<L avg , the number of services migrated at a time does not exceed 30% of the value of │Lᵢ-L avg │.

[0113] Embodiment 3

[0114] The application also provides an electronic device comprising the computer program, which realizes the steps of any of the preceding methods when executed by a processor.

[0115] Embodiment 4

[0116] The application also provides a computer readable storage medium having a computer program stored thereon, which realizes the steps of any of the preceding methods when executed by a processor.

[0117] Those skilled in the art will appreciate that embodiments of the present application can be readily used as software, hardware, or a combination of software and hardware. In a software embodiment, the methods can be tangibly embodied in a machine-readable storage medium having stored thereon instructions that can be used to program a computer to perform any of the methods. The software implementation can be initialized by loading and executing a set of instructions arranged to perform one of the methods into the computer's memory. Alternatively, hard-wired circuitry can be used in place of, or in combination with, software instructions. Thus, the

[0118] The present application is described in reference to the flowchart and / or block diagrams of the methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each block of the flowchart and / or block diagrams, and combinations of blocks in the flowchart and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart and / or block diagram block or blocks. Figure 1 one or more functions specified in one or more of the flowchart and / or block diagram block or blocks. Figure 1 means for performing the function specified by the flowchart and / or block diagram block or blocks.

[0119] These computer program instructions can also be stored in a computer- readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the flowchart and / or block diagram block or blocks. Figure 1 one or more functions specified in one or more of the flowchart and / or block diagram block or blocks. Figure 1 means for performing the function specified by the flowchart and / or block diagram block or blocks.

[0120] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the flowchart and / or block diagram block or blocks. Figure 1 one or more functions specified in one or more of the flowchart and / or block diagram block or blocks. Figure 1 means for performing the function specified by the flowchart and / or block diagram block or blocks.

[0121] While preferred embodiments of the application have been described, modifications and variations can be apparent to those skilled in the art once aware of the general underlying concepts. Accordingly, the appended claims are intended to embrace all such modifications and variations as fall within the scope of the application.

[0122] It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application cover modifications and variations of this application provided they come within the scope of the appended claims and their equivalents.

Claims

1. A CPU-oriented multi-instance power real-time data cache management method, characterized by, The method comprises the following steps: The power real-time data related to the business instance is divided into multiple logical databases for different business instances on the target computer, each logical database is assigned a data service, and the data in the logical database is loaded into the memory cache occupied by the corresponding data service; The target computer is pre-deployed with a cluster of management programs and data services, the management program obtains the CPU topology through the non-uniform memory access interface of the operating system, and divides the multiple data services into different CPU cores according to the node information in the CPU topology; the data service exclusively accesses the local memory of the corresponding node; The CPU of the target computer adopts a two-level cache working mechanism, including a local cache area established in the local memory of the node and a shared mirror area established in the shared memory; The memory load of each node in the local cache area is dynamically monitored, and the data service is dynamically migrated based on a load balancing algorithm through the management program; when a new business instance is added, the new business instance is registered in the management program, and a corresponding data service is newly created; The logs of each node are recorded in the shared mirror area; when a fault occurs, all logs are obtained from the shared mirror area through the management program, the logs within the effective time range are recovered, the memory address hash value in the logs is verified after recovery, and the node executes operations according to the log content.

2. The real-time data cache management method of claim 1, wherein, The method further comprises: Binding each data service to the corresponding CPU core through the numactl command, including: Binding the data service to the target CPU core through the sched_setaffinity system call; Setting the memory allocation strategy to the MPOL_BIND mode using the mbind system call; 3. The real-time data cache management method of claim 2, wherein, Configuring the kernel vm.zone_reclaim_mode parameter to 1 to enable the NUMA local memory recycling strategy. The power real-time data related to the business instance is divided into multiple logical databases, including:

4. The real-time data cache management method of claim 3, wherein, The power real-time data related to the business instance is divided into multiple logical databases according to the voltage level of the power equipment, the data update frequency and the business coupling degree. The two-level cache working mechanism comprises: The local cache area is set in the node local dynamic memory, and the LRU-K replacement algorithm is used to record the K-time access history of the data block; The shared mirror area is set in the shared memory pool, stores complete data copies of all business instances, supports cross-node reading, uses a double-buffer switching mechanism, and sets up a primary and a backup data mirror; 5. The real-time data cache management method of claim 4, wherein, A cache consistency protocol is established, and when the local cache area is invalid, data is preferentially obtained from the adjacent cache of the same node. The load balancing algorithm comprises: A load balancing threshold θ is introduced, when the difference between the maximum L value and the minimum L value exceeds θ, the target load average L is calculated avg , the load is transferred from the node of L>L avg to the node of L<L avg , and the number of single migration services does not exceed 30% of the value of |Lᵢ-L avg | 6. A CPU-oriented multi-instance power real-time data cache management system, characterized by, Calculating the load factor L of each node, L = α * CPU usage rate + β * memory occupancy rate + γ * cross-node access rate, wherein α + β + γ = 1; the above calculation is repeated for all nodes in the cluster; The method further comprises: The allocation module is used for dividing power real-time data related to a business instance into a plurality of logical databases for different business instances on a target computer, assigning a data service to each logical database, and loading data in the logical database into a memory cache occupied by the corresponding data service. The target computer is pre-deployed with a cluster of a management program and data services, the management program acquires a CPU topology through a non-uniform memory access interface of an operating system, divides a plurality of data services according to node information in the CPU topology, and the data services exclusively access local memories of corresponding nodes; and the CPU of the target computer adopts a two-level cache working mechanism, including a local cache area established in a local memory of a node and a shared mirror area established in a shared memory. The registration module is used for dynamically monitoring memory loads of nodes in the local cache area and dynamically migrating data services based on a load balancing algorithm through the management program; and when a new business instance is added, the new business instance is registered in the management program, and a corresponding data service is newly created. The recovery module is used for recording logs of nodes in the shared mirror area; when a fault occurs, all logs are acquired from the shared mirror area through the management program, logs within an effective time range are recovered, and after recovery, memory address hash values in the logs are verified, and nodes perform operations according to the log content.

7. The real-time data cache management system of claim 6, wherein, The method further includes: controlling each data service to be bound to a corresponding CPU core through a numactl command, including: binding the data service to a target CPU core through a sched_setaffinity system call; setting a memory allocation strategy to an MPOL_BIND mode through an mbind system call; configuring a kernel vm.zone_reclaim_mode parameter to 1 to enable a NUMA local memory recycling strategy.

8. The real-time data cache management system of claim 7, wherein, The power real-time data related to the business instance is divided into a plurality of logical databases, including: dividing the power real-time data related to the business instance into a plurality of logical databases according to power equipment voltage levels, data update frequencies, and business coupling degrees.

9. The real-time data cache management system of claim 8, wherein, The two-level cache working mechanism includes: the local cache area is set in a node local dynamic memory, and an LRU-K replacement algorithm is used to record K-time access history of data blocks; the shared mirror area is set in a shared memory pool, stores complete data copies of all business instances, supports cross-node reading, uses a double-buffer exchange mechanism, and sets a primary and a backup data mirror; a cache consistency protocol is established, and when the local cache area is invalid, data is preferentially acquired from an adjacent cache of the same node.

10. The real-time data cache management system of claim 9, wherein, The load balancing algorithm includes: calculating a load factor L of each node, L = α * CPU usage rate + β * memory occupancy rate + γ * cross-node access rate, where α + β + γ = 1; and repeating the calculation for all nodes in the cluster; A load balancing threshold θ is introduced, when the difference between the maximum L value and the minimum L value exceeds θ, the target load average L is calculated avg , the load is transferred from the node of L>L avg to the node of L<L avg , the number of single migration services does not exceed 30% of the value of |Lᵢ-L avg | 11. An electronic device comprising a computer program, characterized in that the computer program is executed by the processor to implement the steps of the method of any one of claims 1 to 5.

12. A computer readable storage medium having stored thereon a computer program, characterized in that, the computer program is executed by the processor to implement the steps of the method of any one of claims 1 to 5.

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