Task processing method and device, storage medium, electronic equipment and program product

Abstract

The present disclosure relates to the technical field of graphics rendering, and provides a task processing method and device, a storage medium, an electronic device and a program product. The task processing method comprises: converting a plurality of first computing tasks into at least one second computing task, wherein the number of threads in the first computing task is less than the number of threads in the second computing task; and obtaining a task processing result by executing the at least one second computing task in parallel through a plurality of processing units. The plurality of small-scale first computing tasks with serial execution sequences are converted into at least one large-scale second computing task, and the plurality of small-scale first computing tasks are arranged compactly, so that the large-scale second computing task can be simultaneously configured to the plurality of existing processing units for processing, thereby realizing parallel processing of the plurality of first computing tasks, fully utilizing the plurality of existing processing units, avoiding waste of GPU computing resources, and improving task processing efficiency.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of graphics rendering, and in particular, to a task processing method and device, a storage medium, an electronic device, and a program product. BACKGROUND

[0002] The prior art sequentially processes a plurality of small-scale computing tasks in series according to their processing order, and starts to process the next small-scale computing task after the previous small-scale computing task is processed, thereby having the problem of low efficiency. SUMMARY

[0003] The purpose of the present disclosure is to provide a task processing method, device, storage medium, electronic device, and program product, which converts a plurality of small-scale first computing tasks with serial execution order into one large-scale second computing task, so that the large-scale second computing task can be simultaneously configured to a plurality of existing processing units for processing, thereby improving the task processing efficiency.

[0004] To achieve the above purpose, the present disclosure provides a task processing method, which comprises:

[0005] Converting a plurality of first computing tasks into at least one second computing task, wherein the number of threads in the first computing task is less than the number of threads in the second computing task;

[0006] Parallelly executing the at least one second computing task by a plurality of processing units to obtain a task processing result.

[0007] Optionally, the number of threads in the first computing task is determined according to a first thread group structure and a first thread structure corresponding to the first computing task;

[0008] The number of threads in the second computing task is determined according to a second thread group structure and a second thread structure corresponding to the second computing task.

[0009] Optionally, the converting a plurality of first computing tasks into at least one second computing task comprises:

[0010] For each first computing task, obtaining an offset allowance in the current second computing task, the offset allowance representing the number of remaining available threads in the current second computing task;

[0011] In the case where the offset corresponding to the first computing task is less than or equal to the offset allowance, converting the first computing task into the current second computing task, and updating the offset allowance according to the offset corresponding to the first computing task;

[0012] In a case where the offset corresponding to the first computing task is greater than the offset margin, the first computing task is converted into a next second computing task, and the offset margin is updated according to the offset corresponding to the first computing task and the thread quantity of the second computing task.

[0013] Optionally, the offset corresponding to the first computing task is obtained by aligning the thread quantity of the first computing task to a minimum integer multiple of a thread bundle size.

[0014] Optionally, the updating of the offset margin according to the offset corresponding to the first computing task comprises:

[0015] calculating a difference between the offset margin and the offset corresponding to the first computing task to obtain an updated offset margin.

[0016] Optionally, the updating of the offset margin according to the offset corresponding to the first computing task and the thread quantity of the second computing task comprises:

[0017] calculating a difference between the thread quantity of the second computing task and the offset corresponding to the first computing task to obtain an updated offset margin.

[0018] Optionally, the task processing method further comprises: for any first thread in the second computing task, in a case where it is determined that there is a first computing task corresponding to the first thread, performing the step of converting the first computing task into the second computing task.

[0019] Optionally, the determination of the existence of the first computing task corresponding to the first thread comprises:

[0020] determining a first global linear index corresponding to the first thread in the second computing task;

[0021] determining a second global linear index corresponding to the first thread according to the first global linear index and an offset corresponding to the first thread, the offset corresponding to the first thread representing a sum of offsets corresponding to the first computing task converted into the current second computing task;

[0022] in a case where the second global linear index is greater than or equal to zero and the second global linear index is less than the thread quantity in the first computing task, it is determined that there is the first computing task corresponding to the first thread.

[0023] Optionally, the task processing method further comprises:

[0024] determining thread ID information of the first computing task according to thread ID information of the second computing task and a thread ID mapping relationship;

[0025] the at least one second computing task is executed in parallel by the plurality of processing units to obtain a task processing result, comprising:

[0026] the at least one second computing task is distributed to the plurality of processing units for parallel processing according to the thread ID information of the at least one second computing task, and a task processing result is obtained by the plurality of processing units and the thread ID information of the first computing task.

[0027] Optionally, the thread ID mapping relationship is determined by:

[0028] for each second thread, determining thread ID information of the second thread in the second computing task and thread ID information of the second thread in the first computing task;

[0029] according to the thread ID information of each second thread in the first computing task and the thread ID information of each second thread in the second computing task, determining the thread ID mapping relationship.

[0030] Optionally, determining the thread ID information of the second thread in the first computing task comprises:

[0031] determining a second global linear index corresponding to the second thread in the first computing task according to a first global linear index corresponding to the second thread in the second computing task and an offset amount corresponding to the second thread; and

[0032] determining the thread ID information of the second thread in the first computing task according to the second global linear index corresponding to the second thread in the first computing task, and a first thread group structure and a first thread structure corresponding to the first computing task.

[0033] Optionally, the determining the thread ID information of the second thread in the first computing task according to the second global linear index corresponding to the second thread in the first computing task, and the first thread group structure and the first thread structure corresponding to the first computing task comprises:

[0034] determining a number of threads in a single group according to the first thread structure corresponding to the first computing task;

[0035] determining thread group ID information and intra-group ID information according to the second global linear index corresponding to the second thread in the first computing task, the number of threads in a single group, and the first thread group structure and the first thread structure corresponding to the first computing task;

[0036] According to the thread group ID information, the first thread structure corresponding to the first computing task, and the group ID information, thread ID information of the second thread in the first computing task is obtained.

[0037] Optionally, the determining the thread group ID information and the group ID information according to the second global linear index corresponding to the second thread in the first computing task, the number of threads in a group, and the first thread group structure and the first thread structure corresponding to the first computing task comprises:

[0038] According to the second global linear index corresponding to the second thread in the first computing task, and the number of threads in a group, a thread group index and a group index are determined.

[0039] According to the thread group index, and the first thread group structure corresponding to the first computing task, thread group ID information is determined.

[0040] According to the group index, and the first thread structure corresponding to the first computing task, group ID information is determined.

[0041] Optionally, the determining the thread ID information of the second thread in the second computing task comprises:

[0042] According to the first global linear index corresponding to the second thread in the second computing task, and the second thread group structure and the second thread structure corresponding to the second computing task, thread ID information of the second thread in the second computing task is determined.

[0043] The present disclosure also provides a task processing apparatus, which comprises:

[0044] A first processing module is configured to convert a plurality of first computing tasks into at least one second computing task, wherein the number of threads in the first computing task is less than the number of threads in the second computing task;

[0045] A second processing module is configured to execute the at least one second computing task in parallel through a plurality of processing units to obtain a task processing result.

[0046] The present disclosure also provides a computer readable storage medium, which stores a computer program, and the program is executed by a processor to implement the steps of the above task processing method.

[0047] The present disclosure also provides an electronic device, which comprises:

[0048] A memory, which stores a computer program;

[0049] A processor is configured to execute the computer program in the memory to implement the steps of the task processing method.

[0050] The present disclosure also provides a computer program product comprising a computer program configured to implement the steps of the task processing method when executed by a processor.

[0051] By the above technical solution, a plurality of small-scale first computing tasks with serial execution order are converted into at least one large-scale second computing task, and the plurality of small-scale first computing tasks are arranged compactly, so that the large-scale second computing task can be simultaneously configured to a plurality of existing processing units for processing, thereby realizing parallel processing of the plurality of first computing tasks, fully utilizing the plurality of existing processing units, avoiding waste of GPU computing resources, and improving task processing efficiency.

[0052] Other features and advantages of the present disclosure will be described in detail in the following detailed description. BRIEF DESCRIPTION OF DRAWINGS

[0053] The accompanying drawings are included to provide a further understanding of the present disclosure and constitute a part of the specification, and are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation of the present disclosure. In the drawings:

[0054] Figure 1 is a schematic diagram of a task processing method according to an exemplary embodiment.

[0055] Figure 2 is a schematic diagram of another task processing method according to an exemplary embodiment.

[0056] Figure 3 is a flowchart of a task processing method according to an exemplary embodiment.

[0057] Figure 4 is a schematic diagram of another task processing method according to an exemplary embodiment.

[0058] Figure 5 is a flowchart of a sub-step of step S1 according to an exemplary embodiment.

[0059] Figure 6 is a flowchart of another task processing method according to an exemplary embodiment.

[0060] Figure 7 is a flowchart of determining a thread ID mapping relationship according to an exemplary embodiment.

[0061] Figure 8 is a flowchart of a sub-step of step S41 according to an exemplary embodiment.

[0062] Figure 9 is a sub-step flow chart of step S412 according to an exemplary embodiment.

[0063] Figure 10 is a sub-step flow chart of step S4122 according to an exemplary embodiment.

[0064] Figure 11 is a block diagram of a task processing apparatus according to an exemplary embodiment.

[0065] Figure 12 is a block diagram of an electronic device according to an exemplary embodiment. DETAILED DESCRIPTION

[0066] The specific embodiments of the present disclosure will be described below in detail with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely intended to illustrate and explain the present disclosure, and are not intended to limit the present disclosure.

[0067] In the following description, the words "first", "second", etc. are used only to distinguish the described purposes, and cannot be understood as indicating or implying relative importance, nor indicating or implying order.

[0068] In the field of graphics rendering, with the rise of graphics processing unit (GPU) driving technology, more and more computing tasks are transferred from central processing unit (CPU) to GPU for calculation using compute shader. GPU hardware has high acceleration effect on large-scale parallel tasks.

[0069] Take a thread group structure Dispatch (8, 8, 1) as an example, the thread group size in the thread group structure, i.e. the calculation task of the thread structure numthreads (16, 16, 1), is assigned on a GPU with 8 processing units Core, each processing unit Core corresponding to a thread bundle warp (the smallest unit of thread scheduling), and the thread bundle size warpSize being 256, as shown in Figure 1 .

[0070] The specific process is as follows: first, the calculation task is grouped according to the thread bundle size warpSize. The number of threads in one workgroup WorkGroup is exactly 256 (16x16x1), and each workgroup WorkGroup corresponds to a thread bundle warp. Then, the thread bundle warp is scheduled to each processing unit Core of the GPU for execution in a round-robin manner.

[0071] If another thread group structure Dispatch(x0, y0, z0) corresponds to the thread structure numthreads(t0x, t0y, t0z) in the compute shader, assuming the GPU's warp size is w, there are n processing units (Cores), each Core can execute m warps simultaneously, and the GPU's scheduling method is round-robin, then when x0·y0·z0·t0x·t0y·t0z is less than n·m·w, some Cores will be in an idle state.

[0072] When processing such Figure 2 The large-scale, small-scale sequential computation tasks illustrated are as follows: For example, n thread group structures (Dispatch(1,1,1)). Since each computation task is small, it may even require only one thread warp. All thread warps in these Dispatch structures may be scheduled to execute on processing unit Core0, resulting in Core0 being fully loaded while Cores 1-7 are idle, leading to overall GPU inefficiency. This situation is becoming increasingly common with the development of GPU driver technology. For instance, one game contains more than 120 consecutive thread group structures (Dispatch(1,1,1)) computation tasks.

[0073] In other words, for multiple serial small-scale computational tasks, they are processed sequentially according to their processing order. The next small-scale computational task is only started after the previous one has been completed. Since the number of processing units used when processing small-scale tasks is relatively small, there is a problem of low efficiency.

[0074] To address the aforementioned issues, multiple small-scale first computational tasks executed sequentially are transformed into a single large-scale second computational task. By compactly arranging these small-scale first computational tasks, the large-scale second computational task can be simultaneously configured to be processed by multiple existing processing units. This achieves parallel processing of multiple first computational tasks, fully utilizes existing processing units, avoids wasting GPU computing resources, and improves task processing efficiency.

[0075] Figure 3 This is a flowchart illustrating a task processing method according to an exemplary embodiment. This task processing method can be applied to electronic devices. Please refer to [link / reference]. Figure 3 The task processing method may include steps S1 and S2.

[0076] Step S1: Convert multiple first computing tasks into at least one second computing task.

[0077] The number of threads in the first computing task is less than the number of threads in the second computing task.

[0078] The first computing task consists of multiple thread groups, each containing multiple threads. The number of threads in the first computing task is determined based on the structure of the first thread group corresponding to the first computing task and the first thread structure.

[0079] The first thread group structure can be the size and dimension of the thread group in the first computing task. The first thread group structure can be represented as (x1, y1, z1), for example, Dispatch(1, 1, 1); the first thread structure can be the arrangement of threads within the thread group in the first computing task. The first thread structure can be represented as (t1x, t1y, t1z), for example, numthreads(16, 16, 1).

[0080] The number of threads in a single thread group within a thread group in the first computation task can be obtained through the first thread structure.

[0081] The formula for calculating the number of threads per original group (threadsPerOriginalGroup1) within a single thread group in the first computation task is:

[0082] threadsPerOriginalGroup1 =t1x·t1y·t1z.

[0083] The number of thread groups in the first computation task, i.e., the thread group size, can be obtained through the first thread group structure.

[0084] The formula for calculating the thread group size threadsPerGroup1 in the first computation task is:

[0085] threadsPerGroup1= x1·y1·z1.

[0086] The number of threads in the first computing task can be obtained based on the number of threads in a single thread group within the first computing task and the size of the thread group in the first computing task.

[0087] The formula for calculating the number of threads in the first computational task, totalThreadsOriginal1, is as follows:

[0088] totalThreadsOriginal1=threadsPerGroup1·threadsPerOriginalGroup1.

[0089] The second computation task consists of multiple thread groups, each containing multiple threads. The number of threads in the second computation task is determined based on the structure of the second thread group corresponding to the second computation task and the second thread structure.

[0090] The second thread group structure can be the size and dimension of the thread group in the second computing task. The second thread group structure can be represented as (x2, y2, z2), for example, Dispatch(1, 8, 1); the second thread structure can be the arrangement of threads within the thread group in the second computing task. The second thread structure can be represented as (t2x, t2y, t2z), for example, numthreads(16, 16, 1).

[0091] The number of threads in a single thread group within a thread group in the second computation task can be obtained through the second thread structure.

[0092] In the second computation task, the formula for calculating the number of threads per original group (threadsPerOriginalGroup2) within a single thread group is:

[0093] threadsPerOriginalGroup2 =t2x·t2y·t2z.

[0094] The number of thread groups in the second computation task, i.e., the thread group size, can be obtained through the second thread group structure.

[0095] The formula for calculating the thread group size threadsPerGroup2 in the second computation task is:

[0096] threadsPerGroup2= x2·y2·z2.

[0097] The number of threads in the second computing task can be obtained from the number of threads in a single thread group within the second computing task, and the size of the thread group in the second computing task.

[0098] The formula for calculating the number of threads in the second computational task, totalThreadsOriginal2, is as follows:

[0099] totalThreadsOriginal2=threadsPerGroup2·threadsPerOriginalGroup2.

[0100] It should be understood that the number of threads in the second computation task shall not exceed the limits specified in the specification and the total number of threads that the GPU driver can support. The specification limit may be a value such as a "maximum number of threads" or "maximum per block / per SM" given in the official documentation / programming manual. If this value is exceeded, the program will fail to compile or will report an error upon startup. The specification limit is the maximum number of threads supported under the hardware specifications. The GPU driver limit may be the number of threads that the remaining available resources of the current GPU can support, and may even include additional limits at the kernel level or in the driver policy. The total number of threads that the GPU driver can support is the maximum number of threads supported under the driver's limitations.

[0101] Converting multiple first computing tasks into at least one second computing task can be understood as converting multiple first computing tasks into second computing tasks sequentially. If the total number of threads in one second computing task can accommodate the total number of threads in multiple first computing tasks, then the multiple first computing tasks can be converted into one second computing task. If the total number of threads in one second computing task cannot accommodate the total number of threads in multiple first computing tasks, then the remaining first computing tasks are converted into the next second computing task, and the process of converting multiple first computing tasks into second computing tasks sequentially is repeated until all first computing tasks are converted into second computing tasks, resulting in at least one second computing task.

[0102] Step S2: At least one second computation task is executed in parallel by multiple processing units to obtain the task processing result.

[0103] Since the second computation task is large, the threads in the second computation task can be evenly distributed to various processing units in the GPU. Each processing unit is responsible for executing a part of the task, and the results processed by each processing unit are integrated together to obtain the task processing result.

[0104] In one embodiment, computational tasks originally concentrated on Core 0 (or the first few Cores) can be evenly distributed across multiple Cores. Parallel processing of large-scale, small-scale tasks across multiple Cores can significantly improve operational efficiency (up to several times the number of warps). Figure 4 As shown, the first thread group structure in the first computing task is Dispatch (1, 1, 1), and the first thread structure is numthreads (16, 16, 1). The second thread group structure in the second computing task is Dispatch (1, 8, 1), and the second thread structure is numthreads (16, 16, 1). The second computing task is evenly distributed among 8 processing units Core0 to Core7, which increases the parallelism by 8 times and greatly improves the computing efficiency.

[0105] In an image processing task scenario, multiple small images need to be processed. The processing of each small image can be regarded as a first computational task, and each first computational task contains a small number of threads (for example, each first computational task processes one image patch, and each first computational task has 16 threads). Merging multiple small images into at least one large image, that is, merging multiple small first computational tasks into at least one large second computational task, can make more efficient use of the parallel computing capabilities of the GPU.

[0106] By transforming multiple small-scale first computation tasks that are executed sequentially into at least one large-scale second computation task, and compactly arranging the multiple small-scale first computation tasks, the large-scale second computation task can be simultaneously configured to be processed by multiple existing processing units, thereby realizing the parallel processing of multiple first computation tasks, making full use of the existing multiple processing units, avoiding the waste of GPU computing resources, and improving task processing efficiency.

[0107] In one possible implementation, before converting a new first computing task into a second computing task each time, it can be determined whether the current second computing task has enough remaining thread space to accommodate the new first computing task for conversion. If it can accommodate it, the new first computing task can be converted into the current second computing task; if it cannot accommodate it, a new second computing task can be created to accommodate the new first computing task for conversion.

[0108] Please see Figure 5 Step S1 may include steps S11 to S13.

[0109] Step S11: For each first calculation task, obtain the offset margin in the current second calculation task.

[0110] The offset margin represents the number of remaining available threads in the current second computation task, i.e., the size of the remaining thread space.

[0111] Step S12: If the offset corresponding to the first calculation task is less than or equal to the offset balance, the first calculation task is transferred to the current second calculation task, and the offset balance is updated according to the offset corresponding to the first calculation task.

[0112] If the offset corresponding to the first computing task is less than or equal to the offset remainder, it indicates that the current second computing task still has enough remaining thread space to accommodate the new first computing task for conversion. That is, the new first computing task can be converted into the current second computing task. As the new first computing task is converted, the offset remainder in the current second computing task will also decrease accordingly. The offset corresponding to the currently processed first computing task is the amount of reduction in the offset remainder.

[0113] Step S13: If the offset corresponding to the first computing task is greater than the offset remainder, the first computing task is transferred to the next second computing task, and the offset remainder is updated according to the offset corresponding to the first computing task and the number of threads of the second computing task.

[0114] If the offset corresponding to the first computation task is greater than the offset remainder, it indicates that the current second computation task does not have enough remaining thread space to accommodate the new first computation task for conversion. In this case, the new first computation task can be converted into the next second computation task. As the new first computation task is converted, the offset remainder in the next second computation task will also decrease accordingly. In this case, the initial offset remainder of the next second computation task is the number of threads of the second computation task, and the offset is 0. The offset corresponding to the currently processed first computation task is the amount of reduction in the offset remainder.

[0115] It should be understood that the next second computing task is the next second computing task after the current second computing task. The next second computing task can be created when the current second computing task does not have enough remaining thread space to accommodate the new first computing task for conversion, or it can be set in advance. This embodiment does not impose any restrictions here. The next second computing task can be the same in size and structure as the current second computing task.

[0116] By setting the condition that the first computing task can only be converted to the current second computing task if the offset corresponding to the first computing task is less than or equal to the offset remainder, it can be ensured that the thread capacity of the current second computing task will not be exceeded when converting the first computing task to the current second computing task, thus ensuring the stable operation of the conversion. Furthermore, if the offset corresponding to the first computing task is greater than the offset remainder, the first computing task can be converted to the next second computing task, which further ensures the stable operation of the conversion.

[0117] In one possible implementation, the offset corresponding to the first computation task is obtained by aligning the number of threads of the first computation task upward to a minimum integer multiple of the thread bundle size.

[0118] If the number of threads in a first computation task is not an integer multiple of the thread bundle size, it needs to be rounded up to the nearest integer multiple as the offset corresponding to the first computation task.

[0119] For example, if the first computation task contains 100 threads and the thread bundle size is 32, the offset corresponding to the first computation task is 128.

[0120] By aligning the number of threads in the first computation task upwards to an integer multiple of the thread bundle to calculate its memory offset, global memory access address alignment can be ensured. This can activate the hardware's merge access mechanism, merging multiple scattered accesses into a small number of efficient transactions, greatly improving memory bandwidth utilization and overall program performance.

[0121] In one possible implementation, updating the offset balance according to the offset corresponding to the first calculation task in step S12 may include:

[0122] The difference between the offset margin and the offset corresponding to the first calculation task is calculated to obtain the updated offset margin.

[0123] After the new first computing task is converted to the current second computing task, the offset balance in the current second computing task will also decrease accordingly. The offset corresponding to the first computing task is the amount of the reduction in the offset balance. Therefore, the updated offset balance is equal to the difference between the current offset balance and the offset corresponding to the first computing task (the amount of the reduction in the offset balance).

[0124] In one possible implementation, updating the offset balance in step S13 based on the offset corresponding to the first computing task and the number of threads in the second computing task may include:

[0125] Calculate the difference between the number of threads in the second computing task and the offset corresponding to the first computing task to obtain the updated offset margin.

[0126] After the new first computing task is converted to the next second computing task, the offset balance in the next second computing task will decrease accordingly. In this case, since the new first computing task is the first to be converted into the next second computing task, the initial offset balance of the next second computing task is the number of threads in the next second computing task, which is also equal to the number of threads in the current second computing task. This is collectively referred to as the number of threads in the second computing task. The offset corresponding to the first computing task is the reduction in the offset balance. Therefore, the updated offset balance is equal to the difference between the number of threads in the second computing task and the offset corresponding to the first computing task (the reduction in the offset balance).

[0127] Through the above process, the thread resources of the second computing task can be dynamically managed, ensuring that resource limits are not exceeded when a new first computing task is converted into a second computing task.

[0128] In one possible implementation, to improve the stability and accuracy of task processing, the conversion process of the converted computational task can be verified before converting the first computational task to the second computational task. The task processing method may further include:

[0129] For any first thread in the second computing task, if it is determined that there is a first computing task corresponding to the first thread, the step of converting the first computing task into the second computing task is executed.

[0130] In one possible implementation, determining the existence of a first computation task corresponding to a first thread can be achieved through steps (1) to (3).

[0131] (1) Determine the first global linear index corresponding to the first thread in the second computation task.

[0132] The first thread is any thread in the second computing task.

[0133] The first global linear index corresponding to the first thread in the second computation task represents the sequential position of the first thread among all threads in the second computation task.

[0134] Both the first and second global linear indices follow the calculation principles of global linear indices:

[0135] The global linear index is the product of the thread group index and the thread group size, plus the thread's local index within the group. Correspondingly, the global linear index = thread group index × thread group size + index within the group. The thread group index represents the thread's sequential position within all thread groups in the computation task. The index within the group represents the thread's sequential position within the thread group within the computation task.

[0136] The formula for calculating the first global linear index, globalIndex, corresponding to the first thread in the second computation task is as follows:

[0137] globalIndex=(((gz·y2+gy)·x2+gx)·threadsPerGroup2+(lz·t2y·t2x+ly·t2x+lx)

[0138] Where (gx, gy, gz) is the thread group ID information of the first thread in the second computing task, (lx, ly, lz) is the group ID information of the first thread in the second computing task, and threadsPerGroup2 is the thread group size in the second computing task.

[0139] (2) Determine the second global linear index corresponding to the first thread based on the first global linear index and the offset corresponding to the first thread.

[0140] The offset corresponding to the first thread represents the sum of the offsets corresponding to the first computing task in the current second computing task.

[0141] The second global linear index corresponding to the first thread represents the sequential position of the first thread among all threads in the first computation task.

[0142] The second global linear index corresponding to the first thread is the difference between the first global linear index and the offset corresponding to the first thread.

[0143] The formula for calculating the second global linear index orgGlobalIndex corresponding to the first thread is:

[0144] orgGlobalIndex =globalIndex– threadShift;

[0145] Here, globalIndex represents the first global linear index, and threadShift represents the offset corresponding to the first thread.

[0146] (3) If the second global linear index is greater than or equal to zero and the second global linear index is less than the number of threads in the first computation task, it is determined that there is a first computation task corresponding to the first thread.

[0147] If the second global linear index corresponding to the first thread is greater than or equal to zero, and the second global linear index corresponding to the first thread is less than the number of threads in the first computing task, it indicates that the first thread exists as a thread in the corresponding first computing task. The transformation process of the transformed computing task has been verified and can continue to be transformed, that is, the step of transforming the first computing task into the second computing task can be executed.

[0148] If the second global linear index corresponding to the first thread is greater than the number of threads in the first computation task, it indicates that the first thread does not have a corresponding thread in the first computation task, the transformation process of the transformed computation task fails the verification, and the transformation can be terminated directly.

[0149] In one possible implementation, please refer to Figure 6 , Figure 6 This is a flowchart illustrating another task processing method according to an exemplary embodiment. The task processing method can be applied to an electronic device and may include steps S201 to S203.

[0150] Step S201: Convert multiple first computing tasks into at least one second computing task.

[0151] The number of threads in the first computing task is less than the number of threads in the second computing task.

[0152] Step S202: Determine the thread ID information of the first computing task based on the thread ID information of the second computing task and the thread ID mapping relationship.

[0153] The thread ID information of the first computing task represents the position identifier of each thread in the first computing task.

[0154] The thread ID information of the second computation task represents the position identifier of each thread in the second computation task.

[0155] The thread ID mapping relationship represents the correspondence between the thread ID information of the first computing task and the thread ID information of the second computing task.

[0156] Step S203: Based on the thread ID information of at least one second computing task, allocate at least one second computing task to multiple processing units for parallel processing, and obtain the task processing result through the multiple processing units and the thread ID information of the first computing task.

[0157] This can be understood as follows: based on the thread ID information of at least one second computing task, the thread groups in at least one second computing task are allocated to multiple processing units, and each processing unit executes the allocated thread group independently, thereby realizing parallel processing by multiple processing units.

[0158] By pre-allocating a strategy, the mapping relationship between the thread group and the processing unit represented by the thread ID information of the second computing task can be statically bound in advance. Then, the processing unit should be determined directly by the thread ID information of the second computing task.

[0159] For example, please continue reading Figure 4 Thread groups WorkGroup(0,0,0) are all processed by processing unit Core0, Thread groups WorkGroup(0,1,0) are all processed by processing unit Core1, Thread groups WorkGroup(0,2,0) are all processed by processing unit Core2, Thread groups WorkGroup(0,3,0) are all processed by processing unit Core3, Thread groups WorkGroup(0,4,0) are all processed by processing unit Core4, Thread groups WorkGroup(0,5,0) are all processed by processing unit Core5, Thread groups WorkGroup(0,6,0) are all processed by processing unit Core6, and Thread groups WorkGroup(0,7,0) are all processed by processing unit Core7.

[0160] Alternatively, it can be understood as dividing the second computation task according to the thread bundle size warpsize to obtain multiple sub-computation tasks. Each sub-computation task is then dynamically and in turn assigned to multiple processing units. Each processing unit processes the sub-computation task it receives and receives the next sub-computation task after completing the sub-computation task, thus enabling multiple processing units to process in parallel.

[0161] The task processing result is obtained by using multiple processing units and the thread ID information of the first computing task. This can be understood as follows: when the processing unit processes the assigned sub-computing task, it needs to use the ID information of its original position during the calculation process, that is, the thread ID information in the first computing task. Therefore, the task processing result needs to be calculated by multiple processing units based on the thread ID information of the first computing task.

[0162] It should be noted that step S201 can be described with reference to step S1, and will not be repeated here in this embodiment.

[0163] By using the thread ID information in the second computing task, at least one second computing task can be dynamically or statically distributed evenly to multiple processing units to optimize execution efficiency. The allocation of processing units must comply with the GPU's thread bundle scheduling mechanism to avoid branch divergence.

[0164] In one possible implementation, please refer to Figure 7 The thread ID mapping relationship is determined through steps S41 and S42.

[0165] Step S41: For each second thread, determine the thread ID information of the second thread in the second computing task and the thread ID information of the second thread in the first computing task.

[0166] Step S42: Determine the thread ID mapping relationship based on the thread ID information of each second thread in the first computing task and the thread ID information of each second thread in the second computing task.

[0167] The second thread is any thread in the second computation task when the mapping relationship is defined.

[0168] For each second thread in the second computing task, step S41 is executed to obtain the thread ID information of each second thread in the first computing task and the thread ID information of each second thread in the second computing task in the second computing task. A thread ID mapping relationship is established between the thread ID information of the second thread in the first computing task and the thread ID information of the second thread in the second computing task. This thread ID mapping relationship can be represented as a function or a table to map the thread ID information in the first computing task to the thread ID information in the second computing task.

[0169] The thread ID mapping ensures that threads in the second computation task are accurately located in the first computation task. Furthermore, this mapping establishes a one-to-one correspondence between threads in the first and second computation tasks, guaranteeing the correctness of the computation results. This thread ID mapping can be stored in a fixed buffer for querying by the computation shader during execution.

[0170] In one possible implementation, please refer to Figure 8 Step S41, which determines the thread ID information of the second thread in the first computing task, may include steps S411 and S412.

[0171] Step S411: Determine the second global linear index corresponding to the second thread in the first computing task based on the first global linear index corresponding to the second thread in the second computing task and the offset corresponding to the second thread.

[0172] The second global linear index corresponding to the second thread in the first computation task represents the sequential position of the second thread among all threads in the first computation task.

[0173] The offset corresponding to the second thread represents the sum of the offsets corresponding to the first computing task that has been converted to the current second computing task before the second thread is converted.

[0174] The second global linear index corresponding to the second thread in the first computation task is the difference between the first global linear index corresponding to the second thread in the second computation task and the offset corresponding to the second thread.

[0175] Step S412: Determine the thread ID information of the second thread in the first computing task based on the second global linear index corresponding to the second thread in the first computing task, as well as the first thread group structure and the first thread structure corresponding to the first computing task.

[0176] First, based on the second global linear index and the first thread structure, determine the thread group index and the index within the group; then, based on the thread group index, the index within the group, the first thread group structure, and the first thread structure, determine the thread group ID information and the ID information within the group; finally, based on the thread group ID information, the ID information within the group, and the first thread group structure, obtain the thread ID information of the second thread in the first computing task.

[0177] In one possible implementation, please refer to Figure 9 Step S412 may include steps S4121 to S4123.

[0178] Step S4121: Determine the number of threads in a single group based on the first thread structure corresponding to the first computing task.

[0179] The formula for calculating the number of threads per original group (threadsPerOriginalGroup1) within a single thread group in the first computation task is:

[0180] threadsPerOriginalGroup1 =t1x·t1y·t1z.

[0181] Step S4122: Determine the thread group ID information and the group ID information based on the second global linear index corresponding to the second thread in the first computing task, the number of threads in a single group, and the first thread group structure and the first thread structure corresponding to the first computing task.

[0182] In one possible implementation, please refer to Figure 10 Step S4122 may include steps S41221 to S41223.

[0183] Step S41221: Determine the thread group index and the intra-group index based on the second global linear index corresponding to the second thread in the first computing task and the number of threads in a single group.

[0184] The thread group index is the second global linear index divided by the number of threads in a single group and then rounded down.

[0185] The formula for calculating the thread group index orgGroupIndex is:

[0186] orgGroupIndex = orgGlobalIndex / threadsPerOriginalGroup1;

[0187] Here, orgGlobalIndex represents the second global linear index.

[0188] The index within a group is the second global linear index divided by the number of threads in a single group and the remainder.

[0189] The formula for calculating the group index orgLocalIndex is:

[0190] orgLocalIndex = orgGlobalIndex % threadsPerOriginalGroup1.

[0191] Step S41222: Determine the thread group ID information based on the thread group index and the first thread group structure corresponding to the first computing task.

[0192] The formula for calculating the thread group ID information (orgGroupID.x, orgGroupID.y, orgGroupID.z) is:

[0193] orgGroupID.x=orgGroupIndex%x1;

[0194] orgGroupID.y=(orgGroupIndex / x1)%y1;

[0195] orgGroupID.z=orgGroupIndex / (x1·y1);

[0196] Where (x1, y1, z1) represents the structure of the first thread group.

[0197] Step S41223: Determine the group ID information based on the group index and the first thread structure corresponding to the first computing task.

[0198] The formula for calculating the group ID information (orgGroupThreadID.x, orgGroupThreadID.y, orgGroupThreadID.z) is:

[0199] orgGroupThreadID.x=orgLocalIndex%t1x;

[0200] orgGroupThreadID.y=(orgLocalIndex / t1x)%t1y;

[0201] orgGroupThreadID.z=orgLocalIndex / (t1x·t1y);

[0202] Here, (t1x, t1y, t1z) represents the structure of the first thread.

[0203] Step S4123: Based on the thread group ID information, the first thread structure corresponding to the first computing task, and the group ID information, obtain the thread ID information of the second thread in the first computing task.

[0204] The thread ID information of the second thread in the first computing task is the product of the thread group ID information and the first thread structure, plus the group ID information.

[0205] The formula for calculating the thread ID information orgDispatchThreadID of the second thread in the first computation task is:

[0206] orgDispatchThreadID = orgGroupID · (t1x, t1y, t1z) + orgGroupThreadID.

[0207] It should be understood that by replacing the relevant information (first thread group structure, first thread structure) corresponding to the first computing task with the relevant information (second thread group structure, second thread structure) corresponding to the second computing task, the thread ID information of the second thread in the second computing task can be obtained.

[0208] In one possible implementation, determining the thread ID information of the second thread in the second computing task in step S41 may include:

[0209] Based on the first global linear index corresponding to the second thread in the second computing task, and the second thread group structure and second thread structure corresponding to the second computing task, determine the thread ID information of the second thread in the second computing task.

[0210] The first global linear index corresponding to the second thread in the second computation task represents the sequential position of the second thread among all threads in the second computation task.

[0211] First, based on the first global linear index and the second thread structure, determine the thread group index and the index within the group; then, based on the thread group index, the index within the group, the second thread group structure, and the second thread structure, determine the thread group ID information and the ID information within the group; finally, based on the thread group ID information, the ID information within the group, and the second thread group structure, obtain the thread ID information of the second thread in the second computing task.

[0212] It should be understood that the specific process of determining the thread ID information of the second thread in the second computing task in step S41 can refer to the specific process of determining the thread ID information of the second thread in the first computing task in step S41, and will not be repeated here in this embodiment.

[0213] By using thread offset technology, serial large-scale small-scale primary computational tasks are compactly and evenly distributed across the multiple cores of the GPU for parallel execution, thereby improving multi-core utilization and thus improving computational efficiency.

[0214] Based on the same inventive concept, this embodiment also provides a task processing device, such as... Figure 11 As shown, Figure 11 This is a block diagram illustrating a task processing device according to an exemplary embodiment. The task processing device 500 can be applied to an electronic device and may include:

[0215] The first processing module 501 is configured to convert multiple first computing tasks into at least one second computing task, wherein the number of threads in the first computing task is less than the number of threads in the second computing task.

[0216] The second processing module 502 is configured to execute at least one second computation task in parallel through multiple processing units to obtain task processing results.

[0217] Optionally, the number of threads in the first computing task is determined based on the first thread group structure corresponding to the first computing task and the first thread structure;

[0218] The number of threads in the second computing task is determined based on the second thread group structure corresponding to the second computing task, and the second thread structure.

[0219] Optionally, the first processing module 501 may include:

[0220] The first sub-processing module is configured to obtain the offset margin in the current second computing task for each first computing task. The offset margin represents the number of remaining available threads in the current second computing task.

[0221] The second sub-processing module is configured to, when the offset corresponding to the first computing task is less than or equal to the offset remainder, convert the first computing task to the current second computing task and update the offset remainder according to the offset corresponding to the first computing task.

[0222] The third sub-processing module is configured to, when the offset corresponding to the first computing task is greater than the offset margin, transfer the first computing task to the next second computing task, and update the offset margin according to the offset corresponding to the first computing task and the number of threads of the second computing task.

[0223] Optionally, the offset corresponding to the first computation task is obtained by aligning the number of threads of the first computation task upward to a minimum integer multiple of the thread bundle size.

[0224] Optionally, the second sub-processing module can be specifically configured as follows:

[0225] Calculate the difference between the offset balance and the offset corresponding to the first calculation task to obtain the updated offset balance.

[0226] Optionally, the third sub-processing module can be specifically configured as follows:

[0227] Calculate the difference between the number of threads in the second computing task and the offset corresponding to the first computing task to obtain the updated offset margin.

[0228] Optionally, the task processing device 500 may further include:

[0229] The third processing module is configured to, for any first thread in the second computing task, perform the step of converting the first computing task into the second computing task if it is determined that there is a first computing task corresponding to the first thread.

[0230] Optionally, the third processing module may include:

[0231] The fourth sub-processing module is configured to determine the first global linear index corresponding to the first thread in the second computing task;

[0232] The fifth sub-processing module is configured to determine the second global linear index corresponding to the first thread based on the first global linear index and the offset corresponding to the first thread. The offset corresponding to the first thread represents the sum of the offsets corresponding to the first computing task in the current second computing task.

[0233] The sixth sub-processing module is configured to determine the existence of a first computing task corresponding to a first thread if the second global linear index is greater than or equal to zero and the second global linear index is less than the number of threads in the first computing task.

[0234] Optionally, the task processing device 500 may further include:

[0235] The fourth processing module is configured to determine the thread ID information of the first computing task based on the thread ID information of the second computing task and the thread ID mapping relationship.

[0236] The second processing module 502 may include:

[0237] The seventh sub-processing module is configured to allocate at least one second computing task to multiple processing units for parallel processing based on the thread ID information of at least one second computing task, and obtain the task processing result through the multiple processing units and the thread ID information of the first computing task.

[0238] Optionally, the task processing device 500 may further include:

[0239] The fifth processing module is configured to determine the thread ID information of the second thread in the second computing task and the thread ID information of the second thread in the first computing task for each second thread.

[0240] The sixth processing module is configured to determine the thread ID mapping relationship based on the thread ID information of each second thread in the first computing task and the thread ID information of each second thread in the second computing task.

[0241] Optionally, the fifth processing module includes:

[0242] The eighth sub-processing module is configured to determine the second global linear index corresponding to the second thread in the first computing task based on the first global linear index corresponding to the second thread in the second computing task and the offset corresponding to the second thread.

[0243] The ninth sub-processing module is configured to determine the thread ID information of the second thread in the first computing task based on the second global linear index corresponding to the second thread in the first computing task, as well as the first thread group structure and the first thread structure corresponding to the first computing task.

[0244] Optionally, the ninth sub-processing module may include:

[0245] The first processing unit is configured to determine the number of threads in a single group based on the first thread structure corresponding to the first computing task.

[0246] The second processing unit is configured to determine thread group ID information and group ID information based on the second global linear index corresponding to the second thread in the first computing task, the number of threads in a single group, and the first thread group structure and first thread structure corresponding to the first computing task.

[0247] The third processing unit is configured to obtain the thread ID information of the second thread in the first computing task based on the thread group ID information, the first thread structure corresponding to the first computing task, and the group ID information.

[0248] Optionally, the second processing unit may include:

[0249] The first sub-processing unit is configured to determine the thread group index and the intra-group index based on the second global linear index corresponding to the second thread in the first computing task and the number of threads in a single group.

[0250] The second sub-processing unit is configured to determine the thread group ID information based on the thread group index and the first thread group structure corresponding to the first computing task.

[0251] The third sub-processing unit is configured to determine the group ID information based on the group index and the first thread structure corresponding to the first computing task.

[0252] Optionally, the fifth processing module may include:

[0253] The tenth sub-processing module is configured to determine the thread ID information of the second thread in the second computing task based on the first global linear index corresponding to the second thread in the second computing task, as well as the second thread group structure and the second thread structure corresponding to the second computing task.

[0254] Regarding the task processing apparatus in the above embodiments, the specific methods by which each module performs operations have been described in detail in the embodiments related to the task processing method, and will not be elaborated here.

[0255] Figure 12 This is a block diagram illustrating an electronic device 700 according to an exemplary embodiment. For example... Figure 12As shown, the electronic device 700 may include a processor 701 and a memory 702. The electronic device 700 may also include one or more of a multimedia component 703, an input / output (I / O) interface 704, and a communication component 705.

[0256] The processor 701 controls the overall operation of the electronic device 700 to complete all or part of the steps in the task processing method described above. The memory 702 stores various types of data to support the operation of the electronic device 700. This data may include, for example, instructions for any application or method operating on the electronic device 700, and application-related data such as contact data, sent and received messages, pictures, audio, video, etc. The memory 702 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The multimedia component 703 may include a screen and audio components. The screen may be, for example, a touchscreen, and the audio component is used to output and / or input audio signals. For example, the audio component may include a microphone for receiving external audio signals. The received audio signals may be further stored in memory 702 or transmitted via communication component 705. The audio component also includes at least one speaker for outputting audio signals. I / O interface 704 provides an interface between processor 701 and other interface modules, such as a keyboard, mouse, buttons, etc. These buttons may be virtual or physical buttons. Communication component 705 is used for wired or wireless communication between the electronic device 700 and other devices. Wireless communication may include Wi-Fi, Bluetooth, Near Field Communication (NFC), 2G, 3G, or 4G, or a combination thereof; therefore, the corresponding communication component 705 may include a Wi-Fi module, a Bluetooth module, or an NFC module.

[0257] In an exemplary embodiment, the electronic device 700 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the task processing method described above.

[0258] In another exemplary embodiment, a computer-readable storage medium including program instructions is also provided, which, when executed by a processor, implement the steps of the task processing method described above. For example, the computer-readable storage medium may be the memory 702 including program instructions described above, which may be executed by the processor 701 of the electronic device 700 to complete the task processing method described above.

[0259] In another exemplary embodiment, a computer program product is also provided, which includes a computer program executable by a processor, which, when executed by the processor, implements the steps of the task processing method described above.

[0260] The preferred embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. However, this disclosure is not limited to the specific details of the above embodiments. Within the scope of the technical concept of this disclosure, various simple modifications can be made to the technical solutions of this disclosure, and these simple modifications all fall within the protection scope of this disclosure.

[0261] It should also be noted that the various specific technical features described in the above embodiments can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, this disclosure will not describe the various possible combinations separately.

[0262] Furthermore, various different embodiments of this disclosure can be combined in any way, as long as they do not violate the spirit of this disclosure, they should also be regarded as the content disclosed in this disclosure.

Claims

1. A task processing method, characterized in that, The task processing method includes: Multiple first computing tasks are transformed into at least one second computing task, wherein the number of threads in the first computing task is less than the number of threads in the second computing task; The at least one second computation task is executed in parallel by multiple processing units to obtain the task processing result; The step of converting multiple first computing tasks into at least one second computing task includes: For each of the first computing tasks, obtain the offset margin in the current second computing task, where the offset margin represents the number of remaining available threads in the current second computing task; If the offset corresponding to the first computing task is less than or equal to the offset margin, the first computing task is transferred to the current second computing task. If the offset corresponding to the first computing task is greater than the offset margin, the first computing task will be transferred to the next second computing task. The offset corresponding to the first computing task is obtained by aligning the number of threads of the first computing task upward to the smallest integer multiple of the thread bundle size.

2. The task processing method according to claim 1, characterized in that, The number of threads in the first computing task is determined based on the first thread group structure corresponding to the first computing task and the first thread structure; The number of threads in the second computing task is determined based on the second thread group structure corresponding to the second computing task and the second thread structure.

3. The task processing method according to claim 1, characterized in that, If the offset corresponding to the first computing task is less than or equal to the offset margin, after the step of converting the first computing task to the current second computing task, the task processing method further includes: Update the offset balance based on the offset corresponding to the first calculation task; After the step of transferring the first computation task to the next second computation task when the offset corresponding to the first computation task is greater than the offset margin, the task processing method further includes: The offset balance is updated based on the offset corresponding to the first computing task and the number of threads in the second computing task.

4. The task processing method according to claim 1, characterized in that, The step of updating the offset balance based on the offset corresponding to the first calculation task includes: The difference between the offset margin and the offset corresponding to the first calculation task is calculated to obtain the updated offset margin.

5. The task processing method according to claim 1, characterized in that, The step of updating the offset balance based on the offset corresponding to the first computing task and the number of threads in the second computing task includes: Calculate the difference between the number of threads in the second computing task and the offset corresponding to the first computing task to obtain the updated offset margin.

6. The task processing method according to any one of claims 3-5, characterized in that, The task processing method further includes: for any first thread in the second computing task, if it is determined that there is a first computing task corresponding to the first thread, performing a step of converting the first computing task into a second computing task.

7. The task processing method according to claim 6, characterized in that, The determination that there exists a first computing task corresponding to the first thread includes: Determine the first global linear index corresponding to the first thread in the second computing task; Based on the first global linear index and the offset corresponding to the first thread, the second global linear index corresponding to the first thread is determined. The offset corresponding to the first thread represents the sum of the offsets corresponding to the first computing task in the current second computing task. If the second global linear index is greater than or equal to zero and the second global linear index is less than the number of threads in the first computation task, it is determined that there is a first computation task corresponding to the first thread.

8. The task processing method according to claim 1, characterized in that, The task processing method further includes: Based on the thread ID information of the second computing task and the thread ID mapping relationship, determine the thread ID information of the first computing task; The process of executing the at least one second computational task in parallel through multiple processing units to obtain task processing results includes: Based on the thread ID information of the at least one second computing task, the at least one second computing task is allocated to the plurality of processing units for parallel processing, and the task processing result is obtained through the plurality of processing units and the thread ID information of the first computing task.

9. The task processing method according to claim 8, characterized in that, The thread ID mapping relationship is determined in the following way: For each second thread, determine the thread ID information of the second thread in the second computing task, and the thread ID information of the second thread in the first computing task; The thread ID mapping relationship is determined based on the thread ID information of each second thread in the first computing task and the thread ID information of each second thread in the second computing task.

10. The task processing method according to claim 9, characterized in that, Determining the thread ID information of the second thread in the first computing task includes: Based on the first global linear index corresponding to the second thread in the second computing task and the offset corresponding to the second thread, determine the second global linear index corresponding to the second thread in the first computing task; Based on the second global linear index corresponding to the second thread in the first computing task, and the first thread group structure and first thread structure corresponding to the first computing task, the thread ID information of the second thread in the first computing task is determined.

11. The task processing method according to claim 10, characterized in that, The step of determining the thread ID information of the second thread in the first computing task based on the second global linear index corresponding to the second thread in the first computing task, and the first thread group structure and first thread structure corresponding to the first computing task, includes: The number of threads in a single group is determined based on the first thread structure corresponding to the first computing task; Based on the second global linear index corresponding to the second thread in the first computing task, the number of threads in a single group, and the first thread group structure and first thread structure corresponding to the first computing task, determine the thread group ID information and the group ID information. Based on the thread group ID information, the first thread structure corresponding to the first computing task, and the group ID information, the thread ID information of the second thread in the first computing task is obtained.

12. The task processing method according to claim 11, characterized in that, The step of determining thread group ID information and intra-group ID information based on the second global linear index corresponding to the second thread in the first computing task, the number of threads in a single group, and the first thread group structure and first thread structure corresponding to the first computing task includes: Based on the second global linear index corresponding to the second thread in the first computing task, and the number of threads in a single group, determine the thread group index and the index within the group; Based on the thread group index and the first thread group structure corresponding to the first computing task, determine the thread group ID information; Based on the group index and the first thread structure corresponding to the first computing task, the group ID information is determined.

13. The task processing method according to any one of claims 9-12, characterized in that, Determining the thread ID information of the second thread in the second computing task includes: Based on the first global linear index corresponding to the second thread in the second computing task, and the second thread group structure and second thread structure corresponding to the second computing task, the thread ID information of the second thread in the second computing task is determined.

14. A task processing device, characterized in that, The task processing device includes: A first processing module is configured to convert multiple first computing tasks into at least one second computing task, wherein the number of threads in the first computing task is less than the number of threads in the second computing task. The second processing module is configured to execute the at least one second computation task in parallel through multiple processing units to obtain task processing results. The first processing module is specifically configured as follows: For each of the first computing tasks, obtain the offset margin in the current second computing task, where the offset margin represents the number of remaining available threads in the current second computing task; If the offset corresponding to the first computing task is less than or equal to the offset margin, the first computing task is transferred to the current second computing task. If the offset corresponding to the first computing task is greater than the offset margin, the first computing task will be transferred to the next second computing task. The offset corresponding to the first computing task is obtained by aligning the number of threads of the first computing task upward to the smallest integer multiple of the thread bundle size.

15. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the program implements the steps of the task processing method according to any one of claims 1-13.

16. An electronic device, characterized in that, include: A memory on which computer programs are stored; A processor for executing the computer program in the memory to implement the steps of the task processing method according to any one of claims 1-13.

17. A computer program product, comprising a computer program, characterized in that, When executed by a processor, the computer program implements the steps of the task processing method according to any one of claims 1-13.

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