Improved circuit board defect detection method based on YOLOv8 detection head
By constructing a single-branch YOLOv8 inspection head and combining it with data augmentation and feature reconstruction modules, the inspection of printed circuit boards was optimized, solving the problems of high computational power and difficulty in identifying small targets, and achieving efficient and accurate defect detection.
Patent Information
- Application Number
- CN202510966028.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-14
- Publication Date
- 2025-11-07
AI Technical Summary
Existing deep learning-based printed circuit board inspection methods require high computational power, are difficult to deploy, and ignore the impact of the inspection head on small targets, resulting in low inspection efficiency.
A single-branch, low-redundancy YOLOv8 detection head is constructed. Feature extraction is optimized through spatial reconstruction and channel reconstruction modules, and data augmentation methods are combined to improve detection accuracy and speed.
It achieves efficient and accurate identification of defects in printed circuit boards, improving detection speed and accuracy, especially the ability to identify small targets.
Smart Images

Figure CN120912518A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of image processing, and particularly relates to a circuit board defect detection method based on an improved YOLOv8 detection head. BACKGROUND
[0002] Printed circuit boards are an indispensable part of modern power electronic systems, used for the connection and support of various electrical components; however, due to its special production process, printed circuit boards are often exposed to high temperature and humidity; over time, defects will inevitably appear; once a defect occurs, it may cause irreparable damage to the entire device.
[0003] Therefore, it is of great significance to detect with the core purpose of locating and classifying printed circuit board surface defects; the traditional method of identifying defects involves manual inspection by experienced workers, which is not only costly but also inefficient.
[0004] In recent years, deep learning-based target detection models have been widely used in printed circuit board detection due to their fast detection speed and high accuracy; however, there are still problems such as high computational requirements and difficult deployment.
[0005] Patent No. CN 119107532 A improves the neck layer network architecture, improves the detection accuracy of printed circuit board targets, and introduces a TA layer to improve model recognition accuracy; and designs a new CSC module to replace part of the C2f module to reduce model parameter redundancy; the rationality of the design of the YOLOv8 network detection head directly affects the performance, speed and accuracy of the model, but this patent ignores the impact of the detection head on small target detection. SUMMARY
[0006] In view of the shortcomings of the existing method, the present application proposes a single-branch low-redundancy efficient channel detection head based on the YOLOv8 detection algorithm, aiming to improve the detection speed and accuracy of printed circuit board defects.
[0007] The technical solution adopted by the present application is: a circuit board defect detection method based on an improved YOLOv8 detection head, comprising the following steps: Step 1: Obtain a printed circuit board image dataset containing defects: As a preferred embodiment of the present application, the defects include: missing holes, mouse bites, open circuits, short circuits, stray, and pseudo-copper.
[0008] As a preferred embodiment of the present application, the printed circuit board image is randomly cropped for data enhancement.
[0009] Step 2: Construct an improved YOLOv8 model, replacing the original YOLOv8 model's detection head with a single-branch detection head. The single-branch detection head comprises: a spatial reconstruction module, a channel reconstruction module, a first convolutional module, and a loss function module connected sequentially. Specifically, the spatial reconstruction module is used to obtain spatial refinement features, the channel reconstruction module is used to obtain channel refinement features, and then... 1. Convolution is used to perform nonlinear mapping on the channel refinement features, and finally the total loss value is calculated using EIOU.
[0010] In a preferred embodiment of the present invention, the spatial reconstruction module includes: a separation operation and a reconstruction operation.
[0011] In a preferred embodiment of the present invention, the separation operation includes: First, input feature map X Standardized input features GN( X ); Secondly, obtain the normalized weights. ; Secondly, Mapped to (0,1) via the sigmoid function; Secondly, thresholding is used for gating to obtain information weights. Non-information weights ; Next, the input feature map X respectively with , We perform weighting to obtain weighted features. , .
[0012] In a preferred embodiment of the present invention, the reconstruction operation includes: use , Perform cross-reconstruction operations to obtain spatial fine feature maps. , .
[0013] In a preferred embodiment of the present invention, the channel reconstruction module includes: First, Divided into channel number and ; Secondly, for the use of two channels Convolution kernel compression yields features and ; Secondly, regarding The output feature Y1 is obtained by summing the point convolution and group convolution. Secondly, regarding grouped convolution is performed and is concatenated with to obtain output features Y2 after a series operation is performed; Thirdly, after global average pooling is performed on Y1 and Y2 respectively to obtain features S1 and S2, a Softmax operation is performed to obtain a feature weight vector and ; Finally, a Sigmoid operation is performed on , and Y1 and Y2 to obtain features Y .
[0014] As a preferred embodiment of the present application, the improved YOLOv8 model is evaluated by using the accuracy and recall rate.
[0015] As a preferred embodiment of the present application, the circuit board defect detection system improved based on the YOLOv8 detection head comprises a memory for storing instructions executable by a processor, and a processor for executing the instructions to implement the circuit board defect detection method improved based on the YOLOv8 detection head.
[0016] As a preferred embodiment of the present application, the computer readable medium storing computer program codes implements the circuit board defect detection method improved based on the YOLOv8 detection head when the computer program codes are executed by the processor.
[0017] The present application has the following advantages: 1. In the data set construction part, the data augmentation method realizes the expansion of the printed circuit board data sample by randomly cropping four printed circuit board images and splicing them into one image; 2. The single-branch detection head constructed in the spatial dimension separates the redundant features by weight and reconstructs them to suppress the redundancy in the spatial dimension and enhance the representation of the features; 3. The single-branch detection head constructed in the channel dimension realizes the reduction of the redundancy in the channel dimension and the calculation cost and storage by using the segmentation conversion and fusion strategy. BRIEF DESCRIPTION OF DRAWINGS
[0018] Figure 1 is the improved YOLOv8 network structure diagram of the present application; Figure 2 is the detection head network structure diagram constructed by the present application; Figure 3 is the detection head data processing flow step diagram of the present application; Figure 4 is the spatial reconstruction module structure diagram constructed by the present application; Figure 5 is the channel reconstruction module structure diagram constructed by the present application; Figure 6The training effect and PR curve diagram of the application; Figure 7 The printed circuit board detection effect diagram of the application. DETAILED DESCRIPTION
[0019] The application will be further described below in conjunction with the accompanying drawings and examples, which are simplified schematic diagrams and only schematically show the basic structure of the application, and thus only show the components related to the application.
[0020] As Figure 1 shown, the circuit board defect detection method improved based on the YOLOv8 detection head includes the following steps: Step one, obtain printed circuit board image dataset: The printed circuit board image dataset is published by Peking University and contains 1500 images; Among them, the image defects include: missing hole, mouse bite, open circuit, short circuit, stray, pseudo-copper, etc. 6 kinds, and the defect image is used for detection classification and registration task; The data set is randomly cropped and spliced into one image for data enhancement, and the training set, verification set and test set are divided according to 7:2:1; Step two, build an improved YOLOv8 model, and the detection head of the improved YOLOv8 model includes: spatial reconstruction module, channel reconstruction module, first convolution module, loss function module; As Figure 1 , a single-branch detection head is constructed to replace the three detection heads of the YOLOv8 model; the three detection heads are the same structure, as shown in Figure 2 , including a spatial reconstruction module, a channel reconstruction module, a first convolution module (1x1 convolution), and a loss function module (EIOU); As Figure 3 shown, the feature map input into the detection head X First, the spatial refinement feature X w is obtained through the spatial reconstruction module Y , then the channel refinement feature is obtained through the channel reconstruction module Y , and finally the channel refinement feature is nonlinearly mapped through 1
[0021] convolution to calculate the total loss value, and the loss function is EIOU. Figure 4 As shown, the network structure of the spatial reconstruction module, the spatial reconstruction module separates and reconstructs the input feature map X, and fully utilizes the spatial redundancy between the features; Specifically, given an intermediate feature map Divide by the standard deviation To standardize the input features GN( X The formula is as follows: (1) in, and yes The mean and standard deviation, It is a small positive number added for the stability of division. and It is a trainable affine transformation. Used to measure the spatial pixel variance for each batch and channel; Obtain normalized weights It can be represented as: (2) in, For the first i Each weight, No. i Affine transformation.
[0022] Then, normalize the weights. The information weights are obtained by mapping to the (0,1) range using the sigmoid function and gating with a threshold T, setting weights above the threshold to 1. The weights below the threshold are set to 0, resulting in non-information weights. (In this embodiment, the threshold T=0.5); Obtain W The entire process can be represented as: (3) Input feature map Multiply by respectively and We obtain weighted features with a large amount of information. Weighted features with less information , can be expressed as: (4) By employing cross-reconstruction operations, two different information features after weighting are fully combined, and the cross-reconstructed features are... and By concatenating and stitching the data, a fine spatial feature map is obtained. To enhance representative features and suppress redundant features in the spatial dimension, the formula is: (5) in, , for Sub-features, ; , for sub-feature, ; randomly extract two same size features , ; similarly, , .
[0023] As Figure 5 shown in the channel reconstruction module network structure, the input spatial refinement feature is divided into two parts, one part has channels, and the other part has channels, then use convolution kernel to compress the channel number of the two groups of features, respectively, to obtain features and ; C is the number of channels; input as the input of "rich feature extraction", respectively, point convolution (1x1) and group convolution (3x3) are performed, then added to obtain the output Y1, input as a supplement to "rich feature extraction", group convolution (3x3) is performed, and the union with the original input is obtained to obtain Y2; use global average pooling to fuse global spatial information and channel statistical information, to obtain the pooled feature maps S1 and S2, then perform Softmax on S1 and S2 to obtain feature weight vectors and , finally remove the channel redundant feature Y The calculation formula is as follows: (6) Experimental process: The printed circuit board defect detection network model is trained using the training set and the validation set. The experimental environment is: Ubuntu 20.04 system, 6 vCPU Intel(R) Xeon(R) Platinum 8350C CPU @ 2.60GHz with 42GB of memory and NVIDIA GeForce RTX3090 graphics card with 24GB of video memory, deep learning framework is Pytorch1.10.0, CUDA version 11.3, Python version 3.8.11, the specific parameters during training are: epoch is 200, batch_size is 16, optimizer is Adam gradient descent, learning rate is set to 0.0001; the training set is input into the improved model for training, and the weight file of the training iteration is saved.
[0024] The test set image is input into the trained network model to predict the printed circuit board defect detection result: the accuracy P and the recall rate R are used as the evaluation indexes of the printed circuit board defect detection effect, and the specific expressions are as follows: (7) (8) Wherein, TP (true positive) is the number of accurately identified positive samples; FP (false positive) is the number of accurately identified negative samples; FN (false negative) is the number of un-identified positive samples; The image of the test set is input into the detection model loaded with the training weight file, the total accuracy P of the test model is 96.1%, and the recall rate R is 88.9%. The training effect and the PR curve diagram are as shown in Figure 6 , and the actual detection effect is as shown in Figure 7 .
[0025] Based on the above ideal embodiments according to the present application, through the above description, relevant personnel can make various changes and modifications without deviating from the technical idea of the present application. The technical scope of the present application is not limited to the contents in the specification, and the technical scope must be determined according to the scope of claims.
Claims
1. A circuit board defect detection method based on YOLOv8 detection head improvement, characterized by, The method comprises the following steps: Step one, obtaining a printed circuit board image dataset containing defects: Step two, constructing an improved YOLOv8 model, constructing a single-branch detection head to replace the YOLOv8 model detection head; the single-branch detection head comprises, in sequence, a spatial reconstruction module, a channel reconstruction module, a first convolution module and a loss function module; wherein the spatial refinement feature is obtained by using the spatial reconstruction module, and then the channel refinement feature is obtained by using the channel reconstruction module, and then the total loss value is calculated by using EIOU through 1 1Convolution performs nonlinear mapping on the channel refinement feature, and finally calculates the total loss value by using EIOU.
2. The circuit board defect detection method based on YOLOv8 detection head improvement of claim 1, characterized in that, The spatial reconstruction module comprises a separation operation and a reconstruction operation.
3. The circuit board defect detection method based on YOLOv8 detection head improvement of claim 2, characterized in that, The separation operation comprises: First, the input feature map is standardized X standardized input feature GN( X ); Second, the normalized weight is obtained ; Thirdly, we will mapped to (0,1) by sigmoid function; Thirdly, the threshold is used to gate the information weight and non-information weight ; Secondly, the input feature map X is weighted with , respectively to obtain weighted feature , .
4. The circuit board defect detection method based on the YOLOv8 detection head improvement of claim 3, characterized in that, The reconstruction operation comprises: Utilizing , cross-reconstruction operation to obtain spatial fine feature mapping , .
5. The circuit board defect detection method based on YOLOv8 detection head improvement of claim 4, characterized in that, The channel reconstruction module comprises: First, the split into the number of channels and ; Second, for two-channel usage Convolution kernel compression, get features And ; Thirdly, the output feature Y1 is obtained by adding the point convolution and the grouped convolution. performing point convolution and grouped convolution and then adding to obtain output feature Y1; Secondly, regarding Perform grouped convolution and After performing the concatenation operation, the output feature Y2 is obtained; Thirdly, the features S1 and S2 are obtained by performing global average pooling on Y1 and Y2 respectively, and then performing Softmax to obtain a feature weight vector and ; Finally, the sigmoid operation is performed on Y1, Y2, and Y3 to obtain the feature Y. , and Y1, Y2 to obtain the feature Y. Y .
6. The circuit board defect detection method based on YOLOv8 detection head improvement of claim 1, wherein, The improved YOLOv8 model is evaluated by using the accuracy and recall rate.
7. The circuit board defect detection method based on YOLOv8 detection head improvement of claim 1, characterized in that, The defects include: Missing holes, mouse bites, open circuits, short circuits, stray, pseudo-copper.
8. The circuit board defect detection method based on YOLOv8 detection head improvement of claim 1, wherein, Random cropping data enhancement is performed on the printed circuit board image.
9. The circuit board defect detection system based on the improved YOLOv8 detection head, characterized in that, It comprises: A memory for storing instructions executable by a processor; A processor for executing instructions to implement the printed circuit board defect detection method based on the improved YOLOv8 detection head as claimed in any one of claims 1-8.
10. A computer readable medium having stored thereon a computer program code, characterized in that, The computer program code, when executed by the processor, implements the printed circuit board defect detection method based on the improved YOLOv8 detection head as claimed in any one of claims 1-8.
Citation Information
Patent Citations
PCB defect identification method based on YOLOv8 model
CN119107532A