Advanced syntax control for loop filters

Abstract

A method and apparatus for video encoding, comprising: receiving a video sequence; encoding the video sequence at a sequence level, an image level, or a slice level by using a control flag for luma mapping with chroma scaling (LMCS), where the sequence level, the image level, and the slice level are ranked from high to low; signaling a first control flag indicating whether the LMCS is enabled at a first level; and in response to the first control flag indicating that the LMCS is enabled at the first level, signaling a second control flag indicating whether the LMCS is enabled at a second level wherein: when the value of the second control flag is equal to 1, the LMCS is enabled at the second level; when the value of the second control flag is equal to 0, disabling the LMCS at the second level; and the second level is lower than the first level.

Description

Cross Reference to Related Applications

[0001] This disclosure claims priority to U.S. Provisional Patent Application No. 63 / 001,448, filed March 29, 2020. This provisional application is incorporated herein in its entirety by reference. TECHNICAL FIELD

[0002] The present disclosure relates generally to video data processing, and more particularly, to high-level syntax control of loop filters. BACKGROUND

[0003] A video is a set of still images (or “frames”) that capture visual information. To reduce storage memory and transmission bandwidth, a video can be compressed before storage or transmission, and then decompressed before display. The compression process is commonly referred to as encoding, and the decompression process is commonly referred to as decoding. There are multiple video coding formats that use standardized video coding techniques, most commonly based on prediction, transform, quantization, entropy coding, and in-loop filtering. Standardization organizations develop video coding standards, such as the High Efficiency Video Coding (HEVC / H.265) standard, the Versatile Video Coding (VVC / H.266) standard, and the AVS standard, that specify particular video coding formats. As more and more advanced video coding techniques are adopted in video standards, the coding efficiency of new video coding standards is getting higher and higher. SUMMARY

[0004] Embodiments of the present disclosure provide a video coding method, comprising: receiving a video sequence; encoding the video sequence at a sequence level, a picture level, or a slice level by using a control flag for luma mapping with chroma scaling (LMCS), wherein the sequence level, the picture level, and the slice level are levels ordered from high to low; signaling a first control flag indicating whether the LMCS is enabled at a first level; and in response to the first control flag indicating that the LMCS is enabled at the first level, signaling a second control flag indicating whether the LMCS is enabled at a second level, wherein: when a value of the second control flag is equal to 1, the LMCS is enabled at the second level; when the value of the second control flag is equal to 0, the LMCS is disabled at the second level; and the second level is lower than the first level.

[0005] A method of video coding is provided, including: receiving a video sequence; coding the video sequence at a sequence level, a picture level, or a slice level by using a control flag for an adaptive loop filter (ALF), wherein the sequence level, the picture level, and the slice level are levels ordered from high to low; signaling a first control flag indicating whether the ALF is enabled at a first level; and in response to the first control flag indicating that the ALF is enabled at the first level, signaling a second control flag indicating whether the ALF is enabled at a second level, wherein: when a value of the second control flag is equal to 1, the ALF is enabled at the second level; when the value of the second control flag is equal to 0, the ALF is disabled at the second level; and the second level is a level lower than the first level.

[0006] A method of video coding is provided, including: receiving a video sequence; coding the video sequence at a sequence level, a picture level, or a slice level by using a control flag for a sample adaptive offset (SAO), wherein the sequence level, the picture level, and the slice level are levels ordered from high to low; signaling a first control flag indicating whether the SAO is enabled at a first level; and in response to the first control flag indicating that the SAO is enabled at the first level, signaling a second control flag indicating whether the SAO is enabled at a second level, wherein: when a value of the second control flag is equal to 1, the SAO for a luma component is enabled at the second level; when the value of the second control flag is equal to 0, the SAO for the luma component is disabled at the second level; and the second level is a level lower than the first level. BRIEF DESCRIPTION OF DRAWINGS

[0007] Embodiments and aspects of the present disclosure are illustrated by way of example in the following detailed description and in conjunction with the figures. Various features shown in the figures were not necessarily drawn to scale.

[0008] Figure 1 A structure diagram of an exemplary video sequence is shown in accordance with some embodiments of the present disclosure.

[0009] Figure 2A A diagram of an exemplary coding process of a hybrid video coding system is shown in accordance with some embodiments of the present disclosure.

[0010] Figure 2B A diagram of another exemplary coding process of a hybrid video coding system is shown in accordance with some embodiments of the present disclosure.

[0011] Figure 3AA diagram illustrating an exemplary decoding process of a hybrid video coding system is shown.

[0012] Figure 3B A diagram illustrating another exemplary decoding process of a hybrid video coding system is shown.

[0013] Figure 4 A block diagram of an exemplary apparatus for encoding or decoding a video is shown.

[0014] Figure 5 An example pseudo code including a control variable to enable luma mapping with chroma scaling in a slice header is shown.

[0015] Figure 6 An example pseudo code including a control variable to enable luma mapping with chroma scaling in a slice header is shown.

[0016] Figure 7 An example pseudo code including a control variable to enable luma mapping with chroma scaling in a slice header is shown.

[0017] Figure 8A An example pseudo code including adaptive loop filter syntax in a sequence parameter set is shown.

[0018] Figure 8B An example pseudo code including adaptive loop filter syntax in a picture parameter set is shown.

[0019] Figure 9 An example pseudo code including adaptive loop filter syntax in a picture header is shown.

[0020] Figure 10 An example pseudo code including adaptive loop filter syntax in a slice header is shown.

[0021] Figure 11 An example pseudo code including sample adaptive offset syntax in a sequence parameter set is shown.

[0022] Figure 12 An example pseudo code including sample adaptive offset syntax in a picture parameter set is shown.

[0023] Figure 13 An example pseudo code including sample adaptive offset syntax in a picture header is shown.

[0024] Figure 14 An example pseudo code including sample adaptive offset syntax in a slice header is shown.

[0025] Figure 15Example pseudo code showing inclusion of deblocking filter syntax in picture parameter set is shown.

[0026] Figure 16 Example pseudo code showing inclusion of deblocking filter syntax in picture header is shown.

[0027] Figure 17 Example pseudo code showing inclusion of deblocking filter syntax in slice header is shown.

[0028] Figure 18 Example semantics with chroma scaling, adaptive loop filter, and luma mapping with sample adaptive offset according to some embodiments of the disclosure are shown.

[0029] Figure 19 Example pseudo code showing new picture parameter set for adaptive loop filter according to some embodiments of the disclosure is shown.

[0030] Figure 20 Example pseudo code showing new picture header syntax for adaptive loop filter according to some embodiments of the disclosure is shown.

[0031] Figure 21 Example pseudo code showing new slice header syntax for adaptive loop filter according to some embodiments of the disclosure is shown.

[0032] Figure 22A Example semantics according to some embodiments of the disclosure including new flags for picture header syntax, slice header syntax, and picture parameter set for adaptive loop filter are shown.

[0033] Figure 23 Example pseudo code showing new picture parameter set for sample adaptive offset according to some embodiments of the disclosure is shown.

[0034] Figure 24 Example pseudo code showing new picture header syntax for sample adaptive offset according to some embodiments of the disclosure is shown.

[0035] Figure 25 Example pseudo code showing new slice header syntax for sample adaptive offset according to some embodiments of the disclosure is shown.

[0036] Figure 26 Example semantics according to some embodiments of the disclosure including new flags for picture header syntax, slice header syntax, and picture parameter set for sample adaptive offset are shown.

[0037] Figure 27Example pseudocode showing a new sequence parameter set including a sequence parameter set disable flag for deblocking filter according to some embodiments of the disclosure is shown.

[0038] Figure 28 Example pseudocode showing a new picture parameter set including a sequence parameter set disable flag for deblocking filter according to some embodiments of the disclosure is shown.

[0039] Figure 29 Example pseudocode showing a new picture header syntax including a sequence parameter set disable flag for deblocking filter according to some embodiments of the disclosure is shown.

[0040] Figure 30 Example pseudocode showing a new slice header syntax including a sequence parameter set disable flag for deblocking filter according to some embodiments of the disclosure is shown.

[0041] Figure 31A and 31B Example semantics showing new flags for deblocking filter for picture header syntax, slice header syntax, sequence parameter set, and picture parameter set according to some embodiments of the disclosure is shown.

[0042] Figure 32 is a flowchart showing an exemplary process for determining luma mapping with chroma scaling (LMCS) for a video frame according to some embodiments of the disclosure.

[0043] Figure 33 is a flowchart describing an exemplary process for adaptive loop filter (ALF) for a video frame according to some embodiments of the disclosure.

[0044] Figure 34 is a flowchart depicting an exemplary process for determining sample adaptive offset (SAO) for a video frame according to some embodiments of the disclosure.

[0045] Figure 35 is a flowchart depicting an exemplary process for determining that adaptive loop filter (ALF) for deblocking filter is disabled for a video frame according to some embodiments of the disclosure. DETAILED DESCRIPTION

[0046] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which different numbers of the same elements in different drawings refer to the same or similar elements. The implementations set forth in the descriptions of the example embodiments below do not represent all of the implementations consistent with the present disclosure. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the present disclosure as described in the appended claims. Certain aspects of the present disclosure are described in more detail below. To the extent not explicitly recited in the claims, the terms and definitions provided herein control.

[0047] The Joint Video Expert Team (JVET) of the ITU-T Video Coding Experts Group (ITU-T VCEG) and the ISO / IEC Moving Picture Experts Group (ISO / IEC MPEG) is currently developing the Versatile Video Coding (VVC / H.266) standard. The VVC standard aims to double the compression efficiency of its predecessor, High Efficiency Video Coding (HEVC / H.265) standard. In other words, the goal of VVC is to achieve the same subjective quality using half the bandwidth of HEVC / H.265.

[0048] To achieve the same subjective quality using half the bandwidth of HEVC / H.265, the JVET has been developing techniques beyond HEVC using the Joint Exploration Model (JEM) reference software. As coding techniques are incorporated into JEM, JEM achieves higher coding performance than HEVC.

[0049] The VVC standard is recently developed and continues to include more coding techniques that provide better compression performance. VVC is based on the hybrid video coding system that has been used in modern video compression standards such as HEVC, H.264 / AVC, MPEG2, H.263, etc.

[0050] A video is a set of still images (or “frames”) arranged in a temporal order to store visual information. Video capture devices (e.g., cameras) can be used to capture and store these images in a temporal order, and video playback devices (e.g., televisions, computers, smartphones, tablet computers, video players, or any end-user terminal with display functionality) can be used to display such images in a temporal sequence. Furthermore, in some applications, video capture devices can transmit captured videos to video playback devices (e.g., computers with monitors) in real time, for example, for surveillance, conferencing, or live broadcasting.

[0051] To reduce the storage space and transmission bandwidth required for such applications, the video can be compressed before storage and transmission, and decompressed before display. The compression and decompression can be implemented by software executed by a processor (e.g., a processor of a general purpose computer) or by specialized hardware. The module for compression is generally referred to as an “encoder”, and the module for decompression is generally referred to as a “decoder”. The encoder and the decoder can be collectively referred to as a “codec”. The encoder and the decoder can be implemented in any of a variety of suitable hardware, software, or combination thereof. For example, the hardware implementation of the encoder and the decoder can include circuitry such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic or any combination thereof. The software implementation of the encoder and the decoder can include program code, computer executable instructions, firmware or any suitable computer-implemented algorithm or process fixed in a computer readable medium. The video compression and decompression can be implemented by various algorithms or standards, such as MPEG-1, MPEG-2, MPEG-4, H.26x series, etc. In some applications, the codec can decompress the video from a first encoding standard and re-compress the decompressed video using a second encoding standard, in which case the codec can be referred to as a “transcoder”.

[0052] The video encoding process can identify and retain useful information that can be used to reconstruct the image, and ignore unimportant reconstruction information. If the unimportant information cannot be completely reconstructed, such an encoding process can be referred to as “lossy”. Otherwise, it can be referred to as “lossless”. Most encoding processes are lossy, which is a trade-off to reduce the required storage space and transmission bandwidth.

[0053] The useful information of an encoded image (referred to as “current image”) includes changes relative to a reference image (e.g., a previously encoded and reconstructed image). Such changes can include position changes, brightness changes, or color changes of pixels, among which the position changes are the most concerned. The position changes of a group of pixels representing an object can reflect the motion of the object between the reference image and the current image.

[0054] An image that is encoded without reference to another image (i.e., it is its own reference image) is referred to as an “I-image”. An image that is encoded using a previous image as a reference image is referred to as a “P-image”, and an image that is encoded using a previous image and a future image as reference images is referred to as a “B-image” (the reference is “bidirectional”).

[0055] The present disclosure relates to methods and apparatuses for processing video content consistent with the above-mentioned video encoding standards.

[0056] Figure 1The structure of an example video sequence 100 is shown in accordance with some embodiments of the present disclosure. The video sequence 100 can be a live video or a video that has been captured and archived. The video 100 can be a real-life video, a computer-generated video (e.g., a computer game video), or a combination of both (e.g., a real video with augmented reality effects). The video sequence 100 can be input from a video capturing device (e.g., a camera), an archive containing previously captured videos (e.g., video files stored in a storage device), or a video feed interface (e.g., a video broadcast transceiver) that receives videos from a video content provider.

[0057] As shown in Figure 1 , the video sequence 100 can include a series of images arranged in time along a time line, including images 102, 104, 106, and 108. The images 102-106 are consecutive, with more images in between image 106 and 108. In Figure 1 , image 102 is an I-image, whose reference image is image 102 itself. Image 104 is a P-image, whose reference image is image 102, as shown by the arrow. Image 106 is a B-image, whose reference images are images 104 and 108, as shown by the arrows. In some embodiments, a reference image of an image (e.g., image 104) can not be immediately before or after the image. For example, the reference image of image 104 can be an image before image 102. It is noted that the reference images of images 102-106 are merely examples, and the present disclosure is not limited to the embodiments of reference images as shown in Figure 1 .

[0058] Generally, due to the computational complexity of the coding task, a video codec does not encode or decode an entire image at once. Instead, they can partition an image into basic segments and encode or decode the image segments one by one. In the present disclosure, such a basic segment is referred to as a basic processing unit (“BPU”). For example, Figure 1Structure 110 in FIG. 1 illustrates an example structure of a picture (e.g., any of pictures 102-108) of video sequence 100. In structure 110, the picture is divided into 4x4 basic processing units, the boundaries of which are shown as dashed lines. In some embodiments, a basic processing unit can be referred to as a “macroblock” in some video coding standards (e.g., the MPEG family, H.261, H.263, or H.264 / AVC), or as a “coding tree unit” (“CTU”) in some other video coding standards (e.g., H.265 / HEVC or H.266 / VVC). A basic processing unit can have a variable size in pixels, such as 128x128, 64x64, 32x32, 16x16, 4x8, 16x32, or any arbitrary shape and size. The size and shape of a basic processing unit can be selected for a picture based on a balance of coding efficiency and level of detail to be maintained in the basic processing unit. A CTU is the largest unit of a block and can include up to 128x128 luma samples (plus corresponding chroma samples depending on the chroma format). A CTU can be further divided into coding units (CUs) using quad-tree, binary-tree, ternary-tree, or a combination thereof.

[0059] A basic processing unit can be a logical unit that can include a set of different types of video data stored in a computer memory (e.g., in a video frame buffer). For example, a basic processing unit of a color picture can include a luma component (Y) representing achromatic luminance information, one or more chroma components (e.g., Cb and Cr) representing color information, and associated syntax elements, where the luma and chroma components can have the same size as the basic processing unit. In some video coding standards (e.g., H.265 / HEVC or H.266 / VVC), the luma and chroma components can be referred to as “coding tree blocks” (“CTBs”). Any operation performed on a basic processing unit can be repeated on each of its luma and chroma components.

[0060] Video coding has multiple stages of operations, examples of which are shown in Figures 2A-2B and Figures 3A-3BAs shown. For each stage, the size of the basic processing unit can still be too large for processing, and thus can be further divided into segments, referred to in this disclosure as“basic processing subunits.” In some embodiments, the basic processing subunits can be referred to as“blocks” in some video coding standards (e.g., the MPEG family, H.261, H.263, or H.264 / AVC), or as“coding units” (“CUs”) in some other video coding standards (e.g., H.265 / HEVC or H.266 / VVC). The basic processing subunits can have the same size as the basic processing unit or have a smaller size than the basic processing unit. Similar to the basic processing unit, the basic processing subunit is also a logical unit, which can include a set of different types of video data (e.g., Y, Cb, Cr, and associated syntax elements) stored in a computer memory (e.g., in a video frame buffer). Any operations performed on the basic processing subunit can be repeated on each of its luma and chroma components. It should be noted that such division can be performed to further levels as needed for processing. It should also be noted that different stages can use different schemes to divide the basic processing unit.

[0061] For example, at the mode decision stage (examples of which are shown in Figure 2B The encoder can decide what prediction mode (e.g., intra prediction or inter prediction) to use for a basic processing unit that can be too large to make such a decision. The encoder can divide the basic processing unit into multiple basic processing subunits (e.g., as CUs in H.265 / HEVC or H.266 / VVC), and decide the prediction type for each individual basic processing subunit.

[0062] For another example, at the prediction stage (examples of which are shown in Figures 2A-2B The encoder can perform the prediction operation at the level of basic processing subunits (e.g., CUs). However, in some cases, the basic processing subunits can still be too large for processing. The encoder can further divide the basic processing subunits into smaller segments (e.g., referred to as“prediction blocks” or“PBs” in H.265 / HEVC or H.266 / VVC), at which level the prediction operation can be performed.

[0063] For another example, at the transform stage (examples of which are shown in Figures 2A-2BAs shown in FIG. 1, the encoder can perform a transform operation on a residual basic processing subunit (e.g., a CU). However, in some cases, the basic processing subunit can still be too large to process. The encoder can further divide the basic processing subunit into smaller segments (e.g., referred to as “transform blocks” or “TBs” in H.265 / HEVC or H.266 / VVC), on which the transform operation can be performed. It is noted that the division scheme of the same basic processing subunit can be different in the prediction stage and the transform stage. For example, in H.265 / HEVC or H.266 / VVC, the prediction blocks and the transform blocks of the same CU can have different sizes and numbers.

[0064] In Figure 1 In the structure 110, the basic processing unit 112 is further divided into 3x3 basic processing subunits, the boundaries of which are shown in dashed lines. Different basic processing units of the same picture can be divided into basic processing subunits in different schemes.

[0065] In some embodiments, to provide the capability of parallel processing and the fault tolerance capability for video encoding and decoding, a picture can be divided into regions for processing such that, for a region of the picture, the encoding or decoding process can not depend on information from any other region of the picture. In other words, each region of the picture can be processed individually. By doing so, the codec can process different regions of the picture in parallel, thereby improving the encoding efficiency. Furthermore, when the data of a region is corrupted in processing or lost in network transmission, the codec can correctly encode or decode other regions of the same picture without depending on the corrupted or lost data, thereby providing the fault tolerance capability. In some video coding standards, a picture can be divided into different types of regions. For example, H.265 / HEVC and H.266 / VVC provide two types of regions: “slices” and “tiles”. It is also noted that different pictures of the video sequence 100 can have different division schemes for dividing the pictures into regions.

[0066] For example, in Figure 1 In the structure 110, the basic processing unit 112 is further divided into 3x3 basic processing subunits, the boundaries of which are shown in dashed lines. Different basic processing units of the same picture can be divided into basic processing subunits in different schemes. Figure 1 The basic processing units, basic processing subunits, and structure regions of the structure 110 are merely examples, and the disclosure does not limit embodiments thereof.

[0067] Figure 2A A schematic diagram of an exemplary encoding process 200A according to an embodiment of the disclosure is shown. For example, the encoding process 200A can be performed by an encoder. As shown in FIG. 2A, the encoding process 200A can include the following steps. Figure 2AAs shown, the encoder can encode the video sequence 202 into a video bitstream 228 according to the process 200A. Similar to the structure 110 in Figure 1 , the video sequence 202 can include a set of pictures (referred to as “original pictures”) arranged in a temporal order. Similar to the structure 110 in Figure 1 , each original picture of the video sequence 202 can be divided by the encoder into basic processing units, basic processing sub-units, or regions for processing. In some embodiments, the encoder can perform the process 200A at the level of basic processing units for each original picture of the video sequence 202. For example, the encoder can perform the process 200A in an iterative manner, where the encoder can encode a basic processing unit in one iteration of the process 200A. In some embodiments, the encoder can perform the process 200A in parallel for regions (e.g., regions 114-118) of each original picture of the video sequence 202.

[0068] Referring to Figure 2A , the encoder can feed a basic processing unit of an original picture of the video sequence 202 (referred to as an “original BPU”) to the prediction stage 204 to generate prediction data 206 and a predicted BPU 208. The encoder can subtract the predicted BPU 208 from the original BPU to generate a residual BPU 210. The encoder can feed the residual BPU 210 to the transform stage 212 and the quantization stage 214 to generate quantized transform coefficients 216. The encoder can feed the prediction data 206 and the quantized transform coefficients 216 to the binary encoding stage 226 to generate the video bitstream 228. The components 202, 204, 206, 208, 210, 212, 214, 216, 226, and 228 can be referred to as the “forward path.” During the process 200A, after the quantization stage 214, the encoder can feed the quantized transform coefficients 216 to the inverse quantization stage 218 and the inverse transform stage 220 to generate a reconstructed residual BPU 222. The encoder can add the reconstructed residual BPU 222 to the predicted BPU 208 to generate a prediction reference 224, which is used in the prediction stage 204 for the next iteration of the process 200A. The components 218, 220, 222, and 224 of the process 200A can be referred to as the “reconstruction path.” The reconstruction path can be used to ensure that both the encoder and the decoder use the same reference data for prediction.

[0069] The encoder can iteratively perform the process 200A to encode each original BPU of an original picture (in the forward path) and generate a prediction reference 224 for encoding the next original BPU of the original picture (in the reconstruction path). After encoding all original BPUs of an original picture, the encoder can proceed to encode the next picture in the video sequence 202.

[0070] Referring to process 200A, an encoder can receive a video sequence 202 generated by a video capture device (e.g., a camera). As used herein, the term “receive” can refer to any action that gets, obtains, retrieves, acquires, reads, accesses, or any action that is used to input data in any manner.

[0071] At a prediction stage 204, at a current iteration, the encoder can receive an original BPU and a prediction reference 224 and perform a prediction operation to generate prediction data 206 and a predicted BPU 208. The prediction reference 224 can be generated from the reconstruction path of a previous iteration of process 200A. The purpose of prediction stage 204 is to reduce information redundancy by extracting, from the prediction data 206 and the prediction reference 224, prediction data 206 that can be used to reconstruct the original BPU into the predicted BPU 208.

[0072] Ideally, the predicted BPU 208 can be identical to the original BPU. However, due to non-ideal prediction and reconstruction operations, the predicted BPU 208 is typically slightly different from the original BPU. To account for these differences, upon generating the predicted BPU 208, the encoder can subtract it from the original BPU to generate a residual BPU 210. For example, the encoder can subtract the values (e.g., grayscale values or RGB values) of the corresponding pixels of the predicted BPU 208 from the values of the pixels of the original BPU. Each pixel of the residual BPU 210 can have a residual value as a result of such subtraction between the corresponding pixels of the original BPU and the predicted BPU 208. The prediction data 206 and the residual BPU 210 can have a smaller number of bits compared to the original BPU, but they can be used to reconstruct the original BPU without a noticeable quality degradation. Thus, the original BPU is compressed.

[0073] To further compress the residual BPU 210, at a transform stage 212, the encoder can reduce its spatial redundancy by decomposing the residual BPU 210 into a set of two-dimensional “base patterns.” Each base pattern is associated with a “transform coefficient.” The base patterns can have the same size (e.g., the size of the residual BPU 210), and each base pattern can represent a component of the residual BPU 210 of a varying frequency (e.g., of luminance). None of the base patterns can be reproduced from any combination (e.g., linear combination) of any of the other base patterns. In other words, the decomposition can decompose the variations of the residual BPU 210 into the frequency domain. This decomposition is similar to a discrete Fourier transform of a function, where the base images are similar to the base functions (e.g., trigonometric functions) of the discrete Fourier transform, and the transform coefficients are similar to the coefficients associated with the base functions.

[0074] Different transform algorithms can use different basis patterns. Various transform algorithms can be used at transform stage 212, such as discrete cosine transform, discrete sine transform, etc. The transform at transform stage 212 is invertible. That is, the encoder can recover the residual BPU 210 through an inverse operation of the transform, called “inverse transform.” For example, to recover a pixel of the residual BPU 210, the inverse transform can be multiplying the values of the corresponding pixels of the basis pattern by the respective correlation coefficients and adding the products to produce a weighted sum. For video coding standards, both the encoder and the decoder can use the same transform algorithm (and thus have the same basis pattern). Thus, the encoder can record only the transform coefficients from which the decoder can reconstruct the residual BPU 210 without receiving the basis pattern from the encoder. The transform coefficients can have fewer bits compared to the residual BPU 210, but they can be used to reconstruct the residual BPU 210 without significant quality degradation. Thus, the residual BPU 210 is further compressed.

[0075] The encoder can further compress the transform coefficients at quantization stage 214. During the transform process, different basis patterns can represent different frequencies of variation (e.g., frequencies of luminance variation). Because the human eye is generally better at recognizing low-frequency variations, the encoder can ignore information of high-frequency variations without causing noticeable quality degradation in decoding. For example, at quantization stage 214, the encoder can generate quantized transform coefficients 216 by dividing each transform coefficient by an integer value, called “quantization parameter,” and rounding the quotient to its nearest integer. After such an operation, some transform coefficients of high-frequency basis patterns can be converted to zero, and transform coefficients of low-frequency basis patterns can be converted to smaller integers. The encoder can ignore the quantized transform coefficients 216 of zero value, whereby the transform coefficients are further compressed. This quantization process is also invertible, where the quantized transform coefficients 216 can be reconstructed to transform coefficients in an inverse operation of quantization, called “inverse quantization.”

[0076] Because the encoder ignores the remainder of the division in the rounding operation, quantization stage 214 can be lossy. Generally, quantization stage 214 can contribute the most information loss in process 200A. The greater the information loss, the fewer the number of bits required for the quantized transform coefficients 216. To obtain different levels of information loss, the encoder can use different quantization parameter values or any other parameters of the quantization process.

[0077] At the binarization stage 226, the encoder can binarize the prediction data 206 and the quantized transform coefficients 216 using a binarization technique, such as entropy coding, variable length coding, arithmetic coding, Huffman coding, context adaptive binary arithmetic coding, or any other lossless or lossy compression algorithm. In some embodiments, in addition to the prediction data 206 and the quantized transform coefficients 216, the encoder can binarize other information at the binarization stage 226, such as the prediction modes used at the prediction stage 204, parameters of the prediction operations, the type of transform at the transform stage 212, parameters of the quantization process (e.g., quantization parameters), encoder control parameters (e.g., bitrate control parameters), and the like. The encoder can use the output data of the binarization stage 226 to generate a video bitstream 228. In some embodiments, the video bitstream 228 can be further packetized for network transmission.

[0078] Referring to the reconstruction path of the process 200A, at the inverse quantization stage 218, the encoder can perform inverse quantization on the quantized transform coefficients 216 to generate reconstructed transform coefficients. At the inverse transform stage 220, the encoder can generate a reconstructed residual BPU 222 based on the reconstructed transform coefficients. The encoder can add the reconstructed residual BPU 222 to the predicted BPU 208 to generate a prediction reference 224 to be used in the next iteration of the process 200A.

[0079] It should be noted that other variants of the process 200A can be used to encode the video sequence 202. In some embodiments, the stages of the process 200A can be performed by the encoder in a different order. In some embodiments, one or more stages of the process 200A can be combined into a single stage. In some embodiments, a single stage of the process 200A can be split into multiple stages. For example, the transform stage 212 and the quantization stage 214 can be combined into a single stage. In some embodiments, the process 200A can include additional stages. In some embodiments, the process 200A can omit one or more stages of the process 200A. Figure 2A

[0080] Figure 2B A schematic diagram illustrating another example encoding process 200B is shown, in accordance with an embodiment of the disclosure. The process 200B can be a modification of the process 200A. For example, the process 200B can be used by an encoder conforming to a hybrid video coding standard (e.g., the H.26x family of standards). In comparison to the process 200A, the forward path of the process 200B further includes a mode decision stage 230 and splits the prediction stage 204 into a spatial prediction stage 2042 and a temporal prediction stage 2044, and the reconstruction path of the process 200B further additionally includes a loop filtering stage 232 and a buffer 234.

[0081] ​In general, prediction techniques can be divided into two types: spatial prediction and temporal prediction. Spatial prediction (e.g., intra-image prediction or “intra-prediction”) can use pixels from one or more already encoded neighboring BPU in the same image to predict a current BPU. That is, the prediction reference 224 in spatial prediction can include neighboring BPU. Spatial prediction can reduce spatial redundancy inherent in images. Temporal prediction (e.g., inter-image prediction or “inter-prediction”) can use regions from one or more already encoded images to predict a current BPU. That is, the prediction reference 224 in temporal prediction can include encoded images. Temporal prediction can reduce temporal redundancy inherent in images.

[0082] Referring to the process 200B, in the forward path, the encoder performs prediction operations at a spatial prediction stage 2042 and a temporal prediction stage 2044. For example, at the spatial prediction stage 2042, the encoder can perform intra-prediction. For an original BPU of an image being encoded, the prediction reference 224 can include one or more neighboring BPU in the same image that have been encoded (in the forward path) and reconstructed (in the reconstruction path). The encoder can generate a predicted BPU 208 by interpolating the neighboring BPU. Interpolation techniques can include, for example, linear interpolation or interpolation, polynomial interpolation or interpolation, etc. In some embodiments, the encoder can perform interpolation at a pixel level, e.g., by interpolating the value of a corresponding pixel for each pixel of the predicted BPU 208. The neighboring BPU used for interpolation can be located in various directions relative to the original BPU, e.g., in a vertical direction (e.g., at the top of the original BPU), a horizontal direction (e.g., at the left of the original BPU), a diagonal direction (e.g., at the lower left, lower right, upper left, or upper right of the original BPU), or any direction defined in the video coding standard used. For intra-prediction, the prediction data 206 can include, for example, the location (e.g., coordinates) of the neighboring BPU used, the size of the neighboring BPU used, parameters for interpolation, the direction of the neighboring BPU used relative to the original BPU, etc.

[0083] For another example, at the temporal prediction stage 2044, the encoder can perform inter prediction. For the original BPU of the current image, the prediction reference 224 can include one or more images (referred to as “reference images”) that have been encoded (in the forward path) and reconstructed (in the reconstruction path). In some embodiments, the reference images can be encoded and reconstructed on a BPU-by-BPU basis. For example, the encoder can add the reconstructed residual BPU 222 to the predicted BPU 208 to generate a reconstructed BPU. When all reconstructed BPUs of the same image are generated, the encoder can generate a reconstructed image as a reference image. The encoder can perform an operation of “motion estimation” to search for a matching region in a range (referred to as a “search window”) of the reference image. The location of the search window in the reference image can be determined based on the location of the original BPU in the current image. For example, the search window can be centered at a location in the reference image that has the same coordinates as the original BPU in the current image, and can extend outward by a predetermined distance. When the encoder identifies (e.g., by using a pel recursive algorithm, a block matching algorithm, etc.) a region in the search window that is similar to the original BPU, the encoder can determine such a region as a matching region. The matching region can have a different size (e.g., smaller, equal, larger, or have a different shape) than the original BPU. Because the reference image and the current image are separated in time on a timeline (e.g., as shown in FIG. 1), the matching region can be considered to “move” to the location of the original BPU over time. The encoder can record the direction and distance of such motion as a “motion vector.” When multiple reference images are used (e.g., as in FIG. 1), the encoder can search for matching regions and determine their associated motion vectors for each reference image. In some embodiments, the encoder can assign weights to the pixel values of the matching regions of the respective reference images. Figure 1 Figure 1

[0084] Motion estimation can be used to identify various types of motion, such as translation, rotation, scaling, etc. For inter prediction, the prediction data 206 can include, for example, the location (e.g., coordinates) of the matching region, the motion vector associated with the matching region, the number of reference images, the weights associated with the reference images, etc.

[0085] To generate the predicted BPU 208, the encoder can perform an operation of “motion compensation.” Motion compensation can be used to reconstruct the predicted BPU 208 based on the prediction data 206 (e.g., the motion vector) and the prediction reference 224. For example, the encoder can move the matching region of the reference image according to the motion vector, where the encoder can predict the original BPU of the current image. When multiple reference images are used (e.g., as in FIG. 1), the encoder can move the matching region of each reference image according to its associated motion vector, where the encoder can predict the original BPU of the current image. Figure 1 ​​In some embodiments, the encoder can move the matching region of the reference image according to the individual motion vectors and average pixel values of the matching region. In some embodiments, if the encoder has assigned weights to the pixel values of the matching region of the individual matching reference images, the encoder can add the weighted sum of the pixel values of the moved matching region.

[0086] In some embodiments, inter prediction can be uni-directional or bi-directional. Uni-directional inter prediction can use one or more reference images in the same temporal direction relative to the current image. For example, Figure 1 Image 104 in FIG. 1 is a uni-directional inter prediction image, where the reference image (i.e., image 102) precedes image 104. Bi-directional inter prediction can use one or more reference images in both temporal directions relative to the current image. For example, Figure 1 Image 106 in FIG. 1 is a bi-directional inter prediction image, where the reference images (i.e., images 104 and 108) precede image 106 in both temporal directions.

[0087] Still referring to the forward path of process 200B, after the spatial prediction 2042 and temporal prediction stage 2044, at a mode decision stage 230, the encoder can select a prediction mode (e.g., one of intra prediction or inter prediction) for the current iteration of process 200B. For example, the encoder can perform a rate-distortion optimization technique, where the encoder can select the prediction mode to minimize the value of a cost function according to the bit rate of the candidate prediction mode and the distortion of the reconstructed reference image under the candidate prediction mode. Depending on the selected prediction mode, the encoder can generate the corresponding predicted BPU 208 and prediction data 206.

[0088] In the reconstruction path of process 200B, if an intra prediction mode has been selected in the forward path, after generating the prediction reference 224 (e.g., the current BPU that has been encoded and reconstructed in the current picture), the encoder can feed the prediction reference 224 directly to the spatial prediction stage 2042 for later use (e.g., for interpolating the next BPU of the current picture). If an inter prediction mode has been selected in the forward path, after generating the prediction reference 224 (e.g., the current picture in which all the BPUs have been encoded and reconstructed), the encoder can feed the prediction reference 224 to the in-loop filter stage 232. At this stage, the encoder can apply in-loop filters to the prediction reference 224 to reduce or eliminate the distortion (e.g., blockiness artifacts) introduced by inter prediction. The encoder can apply various in-loop filter techniques at the in-loop filter stage 232, such as deblocking, sample adaptive offset, adaptive loop filter, etc. The in-loop filtered reference picture can be stored in the buffer 234 (or “decoded picture buffer”) for later use (e.g., as an inter prediction reference picture for future pictures of the video sequence 202). The encoder can store one or more reference pictures in the buffer 234 for use at the temporal prediction stage 2044. In some embodiments, the encoder can encode parameters of the in-loop filters (e.g., in-loop filter strength) at the binary encoding stage 226 along with the quantized transform coefficients 216, prediction data 206, and other information.

[0089] Figure 3A A schematic diagram illustrating an example decoding process 300A in accordance with embodiments of the present disclosure is shown. The process 300A can be a decompression process corresponding to the compression process 200A in Figure 2A some embodiments, the process 300A can be similar to the reconstruction path of the process 200A. A decoder can decode the video bitstream 228 into a video stream 304 according to the process 300A. The video stream 304 can be very similar to the video sequence 202. However, due to information loss in the compression and decompression processes (e.g., the quantization stage 214 in the process 200A in Figures 2A-2B some embodiments, the process 300A can be similar to the reconstruction path of the process 200A. A decoder can decode the video bitstream 228 into a video stream 304 according to the process 300A. The video stream 304 can be very similar to the video sequence 202. However, due to information loss in the compression and decompression processes (e.g., the quantization stage 214 in the process 200A in Figures 2A-2B

[0090] As described above with respect to the process 200A and 200B in Figure 3A ​As shown, the decoder can feed a portion of the video bitstream 228 associated with a basic processing unit of the encoded image (referred to as an "encoded BPU") to a binarization decoding stage 302, where the decoder can decode the portion into prediction data 206 and quantized transform coefficients 216. The decoder can feed the quantized transform coefficients 216 to an inverse quantization stage 218 and an inverse transform stage 220 to generate a reconstructed residual BPU 222. The decoder can feed the prediction data 206 to a prediction stage 204 to generate a predicted BPU 208. The decoder can add the reconstructed residual BPU 222 to the predicted BPU 208 to generate a prediction reference 224. In some embodiments, the prediction reference 224 can be stored in a buffer (e.g., a decoded image buffer in computer memory). The decoder can feed the prediction reference 224 to the prediction stage 204 for performing a prediction operation in the next iteration of the process 300A.

[0091] The decoder can iteratively perform the process 300A to decode each encoded BPU of an encoded image and generate a prediction reference 224 for a next encoded BPU of the encoded image. After decoding all encoded BPUs of an encoded image, the decoder can output the image to a video stream 304 for display and continue decoding a next encoded image in the video bitstream 228.

[0092] At the binarization decoding stage 302, the decoder can perform an inverse operation of the binarization encoding technique used by the encoder (e.g., entropy encoding, variable length encoding, arithmetic encoding, Huffman encoding, context adaptive binary arithmetic encoding, or any other lossless compression algorithm). In some embodiments, in addition to the prediction data 206 and the quantized transform coefficients 216, the decoder can decode other information at the binarization decoding stage 302, such as prediction modes, parameters of prediction operations, transform types, parameters of quantization processes (e.g., quantization parameters), encoder control parameters (e.g., bitrate control parameters), and the like. In some embodiments, if the video bitstream 228 is transmitted over a network in packets, the decoder can depacketize the video bitstream 228 before feeding it to the binarization decoding stage 302.

[0093] Figure 3B A schematic diagram illustrating another example decoding process 300B according to embodiments of the disclosure is shown. The process 300B can be a modification of the process 300A. For example, the process 300B can be used by a decoder conforming to a hybrid video coding standard (e.g., the H.26x family of standards). Compared to the process 300A, the process 300B additionally divides the prediction stage 204 into a spatial prediction stage 2042 and a temporal prediction stage 2044, and additionally includes a loop filtering stage 232 and a buffer 234.

[0094] In process 300B, for a coded base processing unit (referred to as "current BPU") of a decoded coded picture (referred to as "current picture"), the prediction data 206 decoded by the decoder from the binary decoding stage 302 can include various types of data depending on what prediction mode is used by the encoder to code the current BPU. For example, if the current BPU is coded using intra prediction by the encoder, the prediction data 206 can include a prediction mode indicator (e.g., a flag value) indicating the intra prediction, parameters of the intra prediction operation, and the like. The parameters of the intra prediction operation can include, for example, locations (e.g., coordinates) of one or more neighboring BPUs used as references, sizes of the neighboring BPUs, parameters of interpolation, directions of the neighboring BPUs relative to the original BPU, and the like. For another example, if the current BPU is coded using inter prediction by the encoder, the prediction data 206 can include a prediction mode indicator (e.g., a flag value) indicating the inter prediction, parameters of the inter prediction operation, and the like. The parameters of the inter prediction operation can include, for example, a number of reference pictures associated with the current BPU, weights respectively associated with the reference pictures, locations (e.g., coordinates) of one or more matching regions in the respective reference pictures, one or more motion vectors respectively associated with the matching regions, and the like.

[0095] Based on the prediction mode indicator, the decoder can decide whether to perform spatial prediction (e.g., intra prediction) at the spatial prediction stage 2042 or temporal prediction (e.g., inter prediction) at the temporal prediction stage 2044, details of performing such spatial or temporal prediction are described in Figure 2B , which will not be repeated here. After performing such spatial or temporal prediction, the decoder can generate a predicted BPU 208, to which the decoder can add the reconstructed residual BPU 222 to generate a prediction reference 224, as described in Figure 3A .

[0096] In process 300B, the decoder can feed the prediction reference 224 to the spatial prediction stage 2042 or the temporal prediction stage 2044 for performing prediction operation in the next iteration of process 300B. For example, if the current BPU is decoded using intra prediction at the spatial prediction stage 2042, after generating the prediction reference 224 (e.g., the decoded current BPU), the decoder can feed the prediction reference 224 directly to the spatial prediction stage 2042 for later use (e.g., for interpolating the next BPU of the current picture). If the current BPU is decoded using inter prediction at the temporal prediction stage 2044, after generating the prediction reference 224 (e.g., the reference picture in which all BPUs are decoded), the encoder can feed the prediction reference 224 to the loop filter stage 232 to reduce or eliminate distortion (e.g., blocking artifacts). The decoder can feed the prediction reference 224 to the loop filter stage 232 as described in Figure 2BThe illustrated manner applies the loop filter to the prediction reference 224. The loop filtered reference picture can be stored in a buffer 234 (e.g., a decoded picture buffer in computer memory) for later use (e.g., as an inter-prediction reference picture for future encoded pictures of the video bitstream 228). The decoder can store one or more reference pictures in the buffer 234 for use at the temporal prediction stage 2044. In some embodiments, the prediction data can further include a parameter of the loop filter (e.g., a loop filter strength). In some embodiments, the prediction data includes the parameter of the loop filter when the prediction mode indicator of the prediction data 206 indicates that inter-prediction is used to encode the current BPU.

[0097] Figure 4 is a block diagram of an example apparatus 400 for encoding or decoding a video according to embodiments of the present disclosure. As Figure 4 illustrated, the apparatus 400 can include a processor 402. When the processor 402 executes instructions as described herein, the apparatus 400 can become a special purpose machine for video encoding or decoding. The processor 402 can be any type of circuitry capable of manipulating or processing information. For example, the processor 402 can include any combination of central processing units (or “CPUs”), graphics processing units (or “GPUs”), neural processing units (“NPUs”), microcontroller units (“MCUs”), optical processors, programmable logic controllers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), generic array logic (GALs), complex programmable logic devices (CPLDs), a field-programmable gate array (FPGA), a system on a chip (SoC), an application-specific integrated circuit (ASIC), etc. In some embodiments, the processor 402 can also be a group of processors grouped as a single logical component. For example, as Figure 4 illustrated, the processor 402 can include multiple processors, including a processor 402a, a processor 402b, and a processor 402n.

[0098] The apparatus 400 can also include a memory 404 configured to store data (e.g., instruction sets, computer code, intermediate data, etc.). For example, as Figure 4As shown, the stored data can include program instructions (e.g., for implementing stages in processes 200A, 200B, 300A, or 300B) and data for processing (e.g., video sequence 202, video bitstream 228, or video stream 304). Processor 402 can access the program instructions and data for processing (e.g., via bus 410) and execute the program instructions to perform operations or manipulations on the data for processing. Memory 404 can include a high-speed random access memory or a nonvolatile memory. In some embodiments, memory 404 can include any combination of any quantity of random access memory (RAM), read only memory (ROM), optical disk, magnetic disk, hard drive, solid-state drive, flash drive, secure digital (SD) card, memory stick, compact flash (CF) card, and the like. Memory 404 can also be a group of memories grouped as a single logical component (not shown in FIG. 4). Figure 4

[0099] Bus 410 can be a communication device that transfers data between components within device 400, such as an internal bus (e.g., a CPU-memory bus), an external bus (e.g., a universal serial bus port, a peripheral component interconnect express port), or the like.

[0100] For ease of explanation and without causing ambiguity, in this disclosure, processor 402 and other data processing circuitry are collectively referred to as “data processing circuitry.” The data processing circuitry can be implemented entirely as hardware, or as a combination of software, hardware, or firmware. Moreover, the data processing circuitry can be a single separate module, or can be combined in whole or in part into any other component of device 400.

[0101] Device 400 can also include network interface 406 to provide wired or wireless communication with a network (e.g., the Internet, an intranet, a local area network, a mobile communication network, and the like). In some embodiments, network interface 406 can include any combination of any quantity of network interface controllers (NICs), radio frequency (RF) modules, transponders, transceivers, modems, routers, gateways, wired network adapters, wireless network adapters, Bluetooth adapters, infrared adapters, near field communication (“NFC”) adapters, cellular network chips, and the like.

[0102] In some embodiments, optionally, device 400 can further include peripheral interface 408 to provide connection to one or more peripheral devices. As Figure 4 shown, the peripheral devices can include, but are not limited to, a cursor control device (e.g., a mouse, a touchpad, or a touch screen), a keyboard, a display (e.g., a cathode ray tube display, a liquid crystal display, or a light emitting diode display), a video input device (e.g., a camera or an input interface coupled to a video archive), and the like. ​

[0103] It should be noted that a video codec (e.g., a codec that performs process 200A, 200B, 300A, or 300B) can be implemented as any combination of any of the software or hardware modules in the apparatus 400. For example, some or all of the stages of process 200A, 200B, 300A, or 300B can be implemented as one or more software modules of the apparatus 400, such as a program instance that can be loaded into memory 404. For another example, some or all of the stages of process 200A, 200B, 300A, or 300B can be implemented as one or more hardware modules of the apparatus 400, such as a special-purpose data processing circuit (e.g., FPGA, ASIC, NPU, etc.).

[0104] In VVC, a coding tool called luma mapping with chroma scaling (“LMCS”) can be added as a new processing block before the loop filter. LMCS has two main components: 1) in-loop mapping of the luma component based on an adaptive piecewise linear model; 2) for the chroma components, a luma-dependent chroma residual scaling is applied. The in-loop mapping of the luma component adjusts the dynamic range of the input signal by redistributing the code words across the dynamic range to improve compression efficiency. The chroma residual scaling aims to compensate for the interaction between the luma signal and its corresponding chroma signals.

[0105] In VVC (e.g., VVC Draft 8), LMCS can be controlled at the sequence level, picture level, or slice level. Figure 5 Example pseudocode is shown that includes a control variable that enables luma mapping with chroma scaling at the sequence level. As shown, Figure 5 When sps_lmcs_enabled_flag is equal to 1, luma mapping with chroma scaling is used in the coded layer video sequence (“CLVS”). When sps_lmcs_enabled_flag is equal to 0, luma mapping with chroma scaling is not used in the CLVS.

[0106] Figure 6 Example pseudocode is shown that includes a control variable for enabling luma mapping with chroma scaling in a picture header. As shown, Figure 6 When ph_lmcs_enabled_flag is equal to 1, luma mapping with chroma scaling is enabled for all slices associated with the PH. When ph_lmcs_enabled_flag is equal to 0, luma mapping with chroma scaling can be turned off for one or more or all slices associated with the PH. When not present, the value of ph_lmcs_enabled_flag is inferred to be equal to 0.

[0107] As shown, Figure 6As shown, the chroma residual scaling process can be controlled separately with a picture level flag (e.g., the ph_chroma_residual_scale flag). When the ph_chroma_residual_scale_flag is equal to 1, chroma residual scaling is enabled for all slices associated with the PH. When the ph_chroma_residual_scale_flag is equal to 0, chroma residual scaling for one or more or all slices associated with the PH can be turned off. When the ph_chroma_residual_scale_flag is not present, it is inferred to be equal to 0.

[0108] Figure 7 An example pseudo code showing the inclusion of a control variable for enabling luma mapping with chroma scaling in a slice header is shown. As Figure 7 shown, when the slice_lmcs_enabled_flag is equal to 1, luma mapping with chroma scaling is enabled for the current slice. When the slice_lmcs_enabled_flag is equal to 0, luma mapping with chroma scaling is not enabled for the current slice. When the slice_lmcs_enabled_flag is not present, it is inferred to be equal to 0.

[0109] An adaptive loop filter (“ALF”) is an in-loop filter that can be applied to reconstructed samples to reduce distortion of the samples to improve coding efficiency. The filter coefficients are decided by the encoder and signaled in the bitstream.

[0110] In VVC (e.g., VVC Draft 8), the ALF can be controlled on a sequence level, and one of an image level or a slice level. The ALF can not be applied to both the image level and the slice level at the same time. Figure 8A An example pseudo code showing the inclusion of adaptive loop filter syntax in a sequence parameter set is shown. Figure 8B An example pseudo code showing the inclusion of adaptive loop filter syntax in a picture parameter set is shown. Figure 9 An example pseudo code showing the inclusion of adaptive loop filter syntax in a picture header is shown. Figure 10 An example pseudo code showing the inclusion of adaptive loop filter syntax in a slice header is shown. As Figure 8A shown, a variable sps_alf_enabled_flag in a sequence parameter set (“SPS”) controls the ALF for a CLVS. When the sps_alf_enabled_flag is equal to 1, the ALF is enabled for the CLVS. When the sps_alf_enabled_flag is equal to 0, the ALF is disabled for the CLVS. As Figure 8B , Figure 9 and Figure 10When ALF is enabled for a CLVS, it can be further controlled at picture level by ph_alf_enabled_flag or at slice level by slice_alf_enabled_flag. It is decided by the flag alf_info_in_ph_flag whether it is controlled at picture level or slice level, which is signaled in the picture parameter set ("PPS"). When ph_alf_enabled_flag is equal to 1, ALF coefficient information is signaled in the picture header. When slice_alf_enabled_flag is equal to 1, ALF coefficient information will be signaled in the slice header.

[0111] When sps_alf_enabled_flag is equal to 0, the adaptive loop filter is turned off (e.g., disabled). When sps_alf_enabled_flag is equal to 1, the adaptive loop filter is enabled.

[0112] When sps_ccalf_enabled_flag is equal to 0, the cross-component adaptive loop filter is turned off. When sps_ccalf_enabled_flag is equal to 1, the cross-component adaptive loop filter can be enabled.

[0113] When alf_info_in_ph_flag is equal to 1, ALF information is present in the PH syntax structure and not in the slice header referring to a PPS that does not contain the PH syntax structure. When alf_info_in_ph_flag is equal to 0, ALF information is not present in the PH syntax structure and can be present in the slice header referring to a PPS that does not contain the PH syntax structure.

[0114] When ph_alf_enabled_flag is equal to 1, the adaptive loop filter is enabled for all slices associated with the PH and the adaptive loop filter can be applied to Y, Cb or Cr color components in the slices. When ph_alf_enabled_flag is equal to 0, the adaptive loop filter can be disabled for one or more or all slices associated with the PH. When not present, ph_alf_enabled_flag is inferred to be equal to 0.

[0115] The variable ph_num_alf_aps_ids_luma specifies the number of ALF APSs referred to by slices associated with the PH.

[0116] The variable ph alf aps id luma[ i ] specifies the adaptation_parameter_set_id of the i-th ALF APS referred by the luma component of the slice associated with the PH.

[0117] The variable alf_lum_filter_signal_flag of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to ph_alf_aps_id_luma[ i ] shall be equal to 1.

[0118] The Temporalld of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to ph_alf_aps_id_luma[ i ] shall be less than or equal to the Temporalld of the picture associated with the PH.

[0119] When ph_alf_chroma_idc is equal to 0, the adaptive loop filter is not applied to the Cb and Cr color components. When ph_alf_chroma_idc is equal to 1, the adaptive loop filter is applied to the Cb color component. When ph_alf_chroma_idc is equal to 2, the adaptive loop filter is applied to the Cr color component. When ph_alf_chroma_idc is equal to 3, the adaptive loop filter is applied to the Cb and Cr color components. When ph_alf_chroma_idc is not present, it is inferred to be equal to 0.

[0120] The variable ph_alf_aps_id_chroma specifies the adaptation_parameter_set_id of the ALF APS referred by the chroma component of the slice associated with the PH.

[0121] The value of alf_chroma_filter_signal_flag of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to ph_alf_aps_id_chroma shall be equal to 1.

[0122] The Temporalld of an APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to ph_alf_aps_id_chroma shall be less than or equal to the Temporalld of the picture associated with the PH.

[0123] When ph_cc_alf_cb_enabled_flag is equal to 1, the cross component filter for Cb color component is enabled for all slices associated with the PH and the cross component filter can be applied to Cb color component in the slices. When ph_cc_alf_cb_enabled_flag is equal to 0, the cross component filter for Cb color component can be turned off for one or more or all slices associated with the PH. When not present, ph_cc_alf_cb_enabled_flag is inferred to be equal to 0.

[0124] The variable ph_cc_alf_cb_aps_id specifies the adaptation_parameter_set_id of the ALF APS referred by the Cb color component of the slices associated with the PH.

[0125] The value of alf_cc_cb_filter_signal_flag of an APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to ph_cc_alf_cb_aps_id shall be equal to 1.

[0126] When ph_cc_alf_cr_enabled_flag is equal to 1, the cross component filter for Cr color component is enabled for all slices associated with the PH and the cross component filter can be applied to Cr color component in the slices. When ph_cc_alf_cr_enabled_flag is equal to 0, the cross component filter for Cr color component can be turned off for one or more or all slices associated with the PH. When not present, ph_cc_alf_cr_enabled_flag is inferred to be equal to 0.

[0127] The variable ph_cc_alf_cr_aps_id specifies the adaptation_parameter_set_id of the ALF APS referred by the Cr color component of the slices associated with the PH.

[0128] The value of alf_cc_cr_filter_signal_flag of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to ph_cc_alf_cr_aps_id shall be equal to 1.

[0129] When slice_alf_enabled_flag is equal to 1, the adaptive loop filter is enabled and can be applied to the Y, Cb or Cr colour components in the slice. When slice_alf_enabled_flag is equal to 0, the adaptive loop filter for all colour components in the slice is turned off. When not present, the value of slice_alf_enabled_flag is inferred to be equal to ph_alf_enabled_flag.

[0130] The variable slice_num_alf_aps_ids_luma specifies the number of ALF APSs referred to by the slice. When slice_alf_enabled_flag is equal to 1 and slice_num_alf_aps_ids_luma is not present, the value of slice_num_alf_aps_ids_luma is inferred to be equal to the value of ph_num_alf_aps_ids_luma.

[0131] The variable slice_alf_aps_id_luma[ i ] specifies the adaptation_parameter_set_id of the i-th ALF APS referred to by the luma component of the slice. The Temporalld of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to slice_alf_aps_id_luma[ i ] shall be less than or equal to the Temporalld of the coded slice NAL unit. When slice_alf_enabled_flag is equal to 1 and slice_alf_aps_id_luma[ i ] is not present, the value of slice_alf_aps_id_luma[ i ] is inferred to be equal to the value of ph_alf_aps_id_luma[ i ].

[0132] The value of alf_luma_filter_signal_flag of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to slice_alf_aps_id_luma[ i ] shall be equal to 1.

[0133] When slice_alf_chroma_idc is equal to 0, the adaptive loop filter is not applied to the Cb and Cr color components. When slice_alf_chroma_idc is equal to 1, the adaptive loop filter is applied to the Cb color component. When slice_alf_chroma_idc is equal to 2, the adaptive loop filter is applied to the Cr color component. When slice_alf_chroma_idc is equal to 3, the adaptive loop filter is applied to the Cb and Cr color components. When slice_alf_chroma_idc is not present, it is inferred to be equal to ph_alf_chroma_idc.

[0134] The variable slice_alf_aps_id_chroma specifies the adaptation_parameter_set_id of the ALF APS referred by the chroma components of the slice. The Temporalld of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to slice_alf_aps_id_chroma shall be less than or equal to the Temporalld of the coded slice NAL unit. When slice_alf_enabled_flag is equal to 1 and slice_alf_aps_id_chroma is not present, the value of slice_alf_aps_id_chroma is inferred to be equal to the value of ph_alf_aps_id_chroma.

[0135] The value of alf_chroma_filter_signal_flag of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to slice_alf_aps_id_chroma shall be equal to 1.

[0136] When slice_cc_alf_cb_enabled_flag is equal to 0, the cross component filter is not applied to the Cb color component. When slice_cc_alf_cb_enabled_flag is equal to 1, the cross component filter is enabled and can be applied to the Cb color component. When slice_cc_alf_cb_enabled_flag is not present, it is inferred to be equal to ph_cc_alf_cb_enabled_flag.

[0137] The variable slice_cc_alf_cb_aps_id specifies the adaptation_parameter_set_id that is referred to by the Cb colour component of the slice.

[0138] The Temporalld of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to slice_cc_alf_cb_aps_id shall be less than or equal to the Temporalld of the coded slice NAL unit. When slice_cc_alf_cb_enabled_flag is equal to 1 and slice_cc_alf_cb_aps_id is not present, the value of slice_cc_alf_cb_aps_id is inferred to be equal to the value of ph_cc_alf_cb_aps_id.

[0139] The value of alf_cc_cb_filter_signal_flag of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to slice_cc_alf_cb_aps_id shall be equal to 1.

[0140] When slice_cc_alf_cr_enabled_flag is equal to 0, the cross-component filter is not applied to the Cr colour component. When slice_cc_alf_cb_enabled_flag is equal to 1, the cross-component adaptive loop filter is enabled and can be applied to the Cr colour component. When slice_cc_alf_cr_enabled_flag is not present, it is inferred to be equal to ph_cc_alf_cr_enabled_flag.

[0141] The variable slice_cc_alf_cr_aps_id specifies the adaptation_parameter_set_id that the Cr color component of the slice refers to. The Temporalld of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to slice_cc_alf_cr_aps_id shall be less than or equal to the Temporalld of the coded slice NAL unit. When slice_cc_alf_cr_enabled_flag is equal to 1 and slice_cc_alf_cr_aps_id is not present, the value of slice_cc_alf_cr_aps_id is inferred to be equal to the value of ph_cc_alf_cr_aps_id.

[0142] The value of alf_cc_cr_filter_signal_flag of the APS NAL unit with aps_params_type equal to ALF_APS and adaptation_parameter_set_id equal to slice_cc_alf_cr_aps_id shall be equal to 1.

[0143] Sample adaptive offset (“SAO”) adds an offset to the reconstructed samples to reduce the distortion of the samples. Two offset modes are supported in SAO, i.e., edge offset (“EO”) mode and band offset (“BO”) mode. For edge offset mode, the samples in a coding tree unit (“CTU”) are first classified into 5 categories, where the samples in 4 categories have a respective offset. Thus, the encoder determines the values of 4 offsets, one offset for one category. The classification method and the values of the offsets are signaled in the bitstream at the CTU level. For band offset mode, the samples in a CTU are classified into 32 bands according to the sample values, where the samples in 4 bands have a respective offset. The 4 bands to be offset and the respective offsets are signaled in the bitstream.

[0144] In VVC (e.g., VVC Draft 8), like ALF, SAO can be controlled at one of the sequence level, and the picture level or the slice level. SAO can not be controllable at both the picture level and the slice level. Figure 11 An example pseudo code showing the inclusion of sample adaptive offset syntax in the sequence parameter set is shown. Figure 12 An example pseudo code showing the inclusion of sample adaptive offset syntax in the picture parameter set is shown. Figure 13 An example pseudo code showing the inclusion of sample adaptive offset syntax in the picture header is shown. Figure 14 An example pseudo code showing the inclusion of sample adaptive offset syntax in the slice header is shown. Figure 11In the SPS, a variable sps_sao_enabled_flag controls the SAO for a CLVS. When sps_sao_enabled_flag is equal to 1, SAO is enabled for the CLVS. When sps_sao_enabled_flag is equal to 0, SAO for the CLVS is turned off.

[0145] As shown in Figure 12 , Figure 13 and Figure 14 When SAO is enabled for a CLVS, SAO can be further controlled at picture level by ph_sao_luma_enabled_flag / ph_sao_chroma_enabled_flag, or at slice level by slice_sao_luma_flag / slice_sap_chroma_flag. Whether SAO is controlled at picture level or at slice level is determined by a flag sao_info_in_ph_flag signaled in the PPS.

[0146] When sps_sao_enabled_flag is equal to 1, the sample adaptive offset process is applied to the reconstructed picture after the deblocking filter process. When sps_sao_enabled_flag is equal to 0, the sample adaptive offset process is not applied to the reconstructed picture after the deblocking filter process.

[0147] When sao_info_in_ph_flag is equal to 1, SAO filter information is present in the PH syntax structure and not in the slice header referring to the PPS that does not contain the PH syntax structure. When sao_info_in_ph_flag is equal to 0, SAO filter information is not present in the PH syntax structure and can be present in the slice header referring to the PPS that does not contain the PH syntax structure.

[0148] When ph_sao_luma_enabled_flag is equal to 1, SAO is enabled for the luma component in all slices associated with the PH. When ph_sao_luma_enabled_flag is equal to 0, SAO for the luma component can be turned off for one or more or all slices associated with the PH. When ph_sao_luma_enabled_flag is not present, it is inferred to be equal to 0.

[0149] When ph_sao_chroma_enabled_flag is equal to 1, SAO is enabled for the chroma component in all slices related to PH. When ph_sao_chroma_enabled_flag is equal to 0, SAO for the chroma component can be turned off for one or more or all slices related to PH. When ph_sao_chroma_enabled_flag is not present, it is inferred to be equal to 0.

[0150] When slice_sao_luma_flag is equal to 1, SAO is enabled for the luma component in the current slice. When slice_sao_luma_flag is equal to 0, SAO is turned off for the luma component in the current slice. When slice_sao_luma_flag is not present, it is inferred to be equal to ph_sao_luma_enabled_flag.

[0151] When slice_sao_chroma_flag is equal to 1, SAO is enabled for the chroma component in the current slice. When slice_sao_chroma_flag is equal to 0, SAO is turned off for the chroma component in the current slice. When slice_sao_chroma_flag is not present, it is inferred to be equal to ph_sao_chroma_enabled_flag.

[0152] A deblocking filter (“DBF”) is a filter applied to the boundaries of a block to reduce block artifacts. In VVC (e.g., VVC Draft 8), DBF disable flags and parameters are signaled in a PPS. In addition, an override enable flag deblocking_filter_override_enabled_flag is also signaled to indicate whether the DBF disable flags and parameters can be overridden at a lower level. If so, a flag dbf_info_in_ph_flag is signaled to indicate whether the DBF disable flags and parameters are overridden in a picture header or slice header.

[0153] Figure 15 An example pseudo code showing the inclusion of deblocking filter syntax in a picture parameter set is shown. Figure 16 An example pseudo code showing the inclusion of deblocking filter syntax in a picture header is shown. Figure 17 An example pseudo code showing the inclusion of deblocking filter syntax in a slice header is shown. As Figure 15 , Figure 16 and Figure 17If the DBF disable flag and parameters are overridden in the picture header, the picture-level DBF disable flag and parameters can be signaled in the picture header. If the DBF disable flag and parameters are overridden in the slice header, the slice-level DBF disable flag and parameters can be sent in the slice header.

[0154] When debocking_filter_control_present_flag is equal to 1, the deblocking filter control syntax elements are present in the PPS. When debocking_filter_control_present_flag is equal to 0, the deblocking filter control syntax elements are not present in the PPS.

[0155] When deblocking_filter_override_enabled_flag is equal to 1, ph_debocking_filter_override_flag is present in the PH referring to the PPS or slice_deblocking_filter_override_flag is present in the slice header referring to the PPS. When deblocking_filter_override_enabled_flag is equal to 0, ph_debocking_filter_override_flag is not present in the PH referring to the PPS or slice_deblocking_filter_override_flag is not present in the slice header referring to the PPS. When not present, the value of deblocking_filter_override_enabled_flag is inferred to be equal to 0.

[0156] When pps_debocking_filter_disabled_flag is equal to 1, the operation of the deblocking filter is not applied to the slices referring to the PPS in which slice_deblocking_filter_disabled_flag is not present. When pps_debocking_filter_disabled_flag is equal to 0, the operation of the deblocking filter is applied to the slices referring to the PPS in which slice_deblocking_filter_disabled_flag is not present. When not present, the value of pps_deblocking_filter_disabled_flag is inferred to be equal to 0.

[0157] When ph_deblocking_filter_override_flag is equal to 1, deblocking parameters are present in the PH. When ph_deblocking_filter_override_flag is equal to 0, deblocking parameters are not present in the PH. When not present, the value of ph_deblocking_filter_override_flag is inferred to be equal to 0.

[0158] When ph_deblocking_filter_disabled_flag is equal to 1, the operation of the deblocking filter is not applied to the slice associated with the PH. When ph_deblocking_filter_disabled_flag is equal to 0, the operation of the deblocking filter is applied to the slice associated with the PH. When ph_deblocking_filter_disabled_flag is not present, it is inferred to be equal to pps_deblocking_filter_disabled_flag.

[0159] When slice_deblocking_filter_override_flag is equal to 1, deblocking parameters are present in the slice header. When slice_deblocking_filter_override_flag is equal to 0, deblocking parameters are not present in the slice header. When not present, the value of slice_deblocking_filter_override_flag is inferred to be equal to ph_deblocking_filter_override_flag.

[0160] When slice_deblocking_filter_disabled_flag is equal to 1, the operation of the deblocking filter is not applied to the current slice. When slice_deblocking_filter_disabled_flag is equal to 0, the operation of the deblocking filter is applied to the current slice. When slice_deblocking_filter_disabled_flag is not present, it is inferred to be equal to ph_deblocking_filter_disabled_flag.

[0161] There are many problems in the current VVC design. First, LMCS can be controlled in CLVS level, picture level, and slice level. When a higher level enable flag enables LMCS, the lower level can turn it off. In other words, the enable flag equal to 1 on a given level does not mean that LMCS must be enabled, because the lower level enable flag can turn it off. Similarly, when SPS enable flag enables ALF and SAO, picture level or slice level enable flag can turn them off. As a result, the current semantics are not accurate.

[0162] Furthermore, when ph_lmcs_enabled_flag is equal to 1, ph_chroma_residual_scale_flag can still turn off (e.g., disable) chroma scaling for the current picture. As a result, ph_lmcs_enabled_flag equal to 1 does not mean that chroma scaling must be enabled. Therefore, the current semantics are not accurate.

[0163] Another problem is the syntax consistency. There are some inconsistencies between ALF / SAO and LMCS syntax. LMCS can be controlled in three levels, i.e., SPS, PH, and SH. When it is enabled in a higher level, the lower level can turn it off. When it is turned off in a higher level, the lower level can not enable it. However, for ALF and SAO, they can only be controlled in two levels, i.e., SPS and PH or SH. The PH level control or SH level control of ALF and SAO is determined by a flag in PPS. As a result, the control mechanism between LMCS and ALF / SAO is different.

[0164] Furthermore, when ALF is controlled and enabled in PH, the parameter information of ALF is signaled in PH. When ALF is controlled and enabled in SH, the parameter information of ALF is signaled in SH. Therefore, for ALF, when controlled at slice level, different slices can have different ALF parameters. In contrast, for LMCS, SH can only enable or turn off (e.g., disable), but cannot signal the parameter information when enabled. In other words, for all slices in the same picture (LMCS is enabled), the LMCS parameters must be the same. This is another inconsistency between ALF and LMCS.

[0165] The third issue is the deblocking filter syntax. There is no SBS disabling flag to disable DBF for the whole CLVS. Moreover, the semantics of pps_debocking_filter_disabled_flag and ph_debocking_filter_disabled_flag are not correct. In VVC (e.g., VVC Draft 8), pps_debocking_filter_disabled_flag equal to 1 (or 0) specifies that the operation of deblocking filter is not applied (or applied) for slices referring to the PPS in which slice_deblocking_filter_disabled_flag is not present. However, ph_debocking_filter_disabled_flag can override pps_debocking_filter_disabled_flag, so the semantics of pps_debocking_filter_disabled_flag is not accurate. In addition, according to VVC (e.g., VVC Draft 8), ph_debocking_filter_disabled_flag equal to 1 (or 0) specifies that the operation of deblocking filter is not applied (or applied) for slices associated with the PH. When ph_debocking_filter_disabled_flag is not present, it is inferred to be equal to pps_debocking_filter_disabled_flag. However, in the case that slice_deblocking_filter_disabled_flag overrides pps_debocking_filter_disabled_flag, ph_debocking_filter_disabled_flag is not present, so it is inferred to be equal to pps_debocking_filter_disabled_flag. But since pps_debocking_filter_disabled_flag is overridden by slice_deblocking_filter_disabled_flag, the value of pps_debocking_filter_disabled_flag can not be applicable to the slice. Therefore, the semantics of ph_debocking_filter_disabled_flag is not correct.

[0166] Embodiments of the present disclosure provide a method to solve the above problems. In some embodiments, semantics can be modified based on the following considerations: The low-level enabling flags of LMCS, ALF, and SAO can turn off (e.g., disable) LMCS, ALF, and SAO when the high-level enabling flag is enabled, and chroma scaling can be turned off when the LMCS flag is enabled. Figure 18 An example semantics of luma mapping with chroma scaling, adaptive loop filter, and sample adaptive offset according to some embodiments of the present disclosure is shown. In Figure 18 In the middle, changes to the previous VVC are shown in bold, and the suggested deleted syntax is further shown in strikeout.

[0167] In some embodiments, semantics can be modified in the following way: When ALF or SAO is enabled in a higher level, the lower level can turn them off. When ALF or SAO is turned off in a higher level, the lower level can not be able to enable them. Also, for ALF, when controlled in SH, it can only be enabled or disabled, and slice-specific ALF parameters can not be signaled in SH. As a result, all slices in a picture can share the same ALF parameters.

[0168] Figure 19 An example pseudo code including a new picture parameter set for adaptive loop filter according to some embodiments of the present disclosure is shown. Figure 20 An example pseudo code including a new picture header syntax for adaptive loop filter according to some embodiments of the present disclosure is shown. Figure 21 An example pseudo code including a new slice header syntax for adaptive loop filter according to some embodiments of the present disclosure is shown. As Figure 19 、 Figure 20 and Figure 21 In the middle, changes to the previous VVC are shown in bold, and the suggested deleted syntax is further shown in strikeout. As Figure 19 、 Figure 20 and Figure 21 In the middle, changes to the previous VVC are shown in bold, and the suggested deleted syntax is further shown in strikeout. As

[0169] An example semantics according to some embodiments of the present disclosure is shown in FIG. 22, which includes new flags for picture header syntax, slice header syntax, and picture parameter set for adaptive loop filter. In FIG. 22, changes to the previous VVC are shown in bold, and the suggested deleted syntax is further shown in strikeout. It should be understood that the semantics shown in FIG. 22 can be applied to the pseudo codes in Figure 23 、 Figure 24 and Figure 25 .

[0170] Figure 23 An example pseudo-code is shown that includes a new picture parameter set for sample adaptive offset according to some embodiments of the disclosure. Figure 24 An example pseudo-code is shown that includes a new picture header syntax for sample adaptive offset according to some embodiments of the disclosure. Figure 25 An example pseudo-code is shown that includes a new slice header syntax for sample adaptive offset according to some embodiments of the disclosure. As Figure 23 , Figure 24 and Figure 25 shown, changes from previous VVC are shown in bold, and suggested deleted syntax is further shown with strikethrough. As Figure 26 , Figure 26 and Figure 26 shown, PPS level signaling is simplified by removing sao_info_in_ph_flag.

[0171] Figure 23 An example semantics is shown that includes new flags for picture header syntax, slice header syntax, and picture parameter set for sample adaptive offset according to some embodiments of the disclosure. As Figure 24 shown, changes from previous VVC are shown in bold, and suggested deleted syntax is further shown with strikethrough. It should be understood that Figure 25 semantics shown in Figure 27 , Figure 28 or Figure 29 can be applied to the pseudo-code.

[0172] In some embodiments, an SPS disable flag can be added for DBF.

[0173] In some embodiments, since pps_debocking_filter_disabled_flag can be overridden by ph_debocking_filter_disabled_flag or slice_deblocking_filter_disabled_flag, pps_debocking_filter_disabled_flag is only applicable when the overriding mechanism is disabled (e.g., neither ph_debocking_filter_disabled_flag nor slice_deblocking_filter_disabled_flag is present), and ph_debocking_filter_disabled_flag is only applicable when ph_debocking_filter_disabled_flag overrides ph_deblocking_filter_disabled_flag (e.g., ph_deblocking_filter_disabled_flag is present, but slice_deblocking_filter_disabled_flag is not present).

[0174] Figure 30 An example pseudo-code showing a new sequence parameter set including a sequence parameter set disable flag for the deblocking filter according to some embodiments of the disclosure is shown. Figure 27 An example pseudo-code showing a new picture parameter set including a sequence parameter set disable flag for the deblocking filter according to some embodiments of the disclosure is shown. Figure 28 An example pseudo-code showing a new picture header syntax including a sequence parameter set disable flag for the deblocking filter according to some embodiments of the disclosure is shown. Figure 29 An example pseudo-code showing a new slice header syntax including a sequence parameter set disable flag for the deblocking filter according to some embodiments of the disclosure is shown as Figure 31A , Figure 26 and Figure 31A Changes to the previous VVC are shown in bold, and the proposed deleted syntax is further shown in strikeout.

[0175] Figure 27 / B shows example semantics including the new flags for the deblocking filter in the picture header syntax, slice header syntax, sequence parameter set, and picture parameter set according to some embodiments of the disclosure. As shown in Figure 28 Changes to the previous VVC are shown in bold, and the proposed deleted syntax is further shown in strikeout. It should be understood that Figure 29 The semantics shown in / B can be applied to Figure 30 , Figure 32, Figures 2A-2B or Figures 3A-3B pseudo code.

[0176] Figure 4 is a flow describing an exemplary process for determining luminance mapping with chroma scaling (LMCS) according to the present disclosure. Process 3200 can be performed by an encoder in Figure 18 or a decoder in Figure 18 . For example, the codec can be implemented as one or more software or hardware components of an apparatus (e.g., apparatus 400 in Figure 18 for determining LMCS. The method can include the following steps.

[0177] In step 3202, apparatus 400 receives one or more video frames. As used herein, a video can refer to a time sequence of “frames” (e.g., still images or pictures) for capturing visual information. Video capture devices (e.g., cameras) can be used to capture and store these images in time order, and video playback devices (e.g., televisions, computers, smartphones, tablet computers, video players, or any end-user terminal with display functionality) can be used to display such images in the time sequence. Furthermore, in some applications, the video capture devices can transmit the captured video to the video playback devices (e.g., computers with monitors) in real time, for example, for surveillance, conferencing, or live broadcasting.

[0178] In step 3204, apparatus 400 determines a control flag for the video frames at a sequence level. In some embodiments, the video frames can include a sequence of pictures, and each picture can include one or more slices. The control flag for the sequence can be an indication of the status of all pictures in the sequence. In some embodiments, the control flag can be an indication of whether the video frames are encoded with luminance mapping with chroma scaling (LMCS). An example of the control flag for the sequence can be a first control flag. As shown in the example, Figure 18 sps_lmcs_enabled_flag can be a control flag for LMCS at a sequence level. In some embodiments, sps_lmcs_enabled_flag can have a value of “1” or “0”.

[0179] In step 3206, device 400 checks the value of the control flag for LMCS at the sequence level to determine whether LMCS is enabled at the sequence level. If LMCS is not enabled at the sequence level, step 3206 is "No," and process 3200 proceeds to step 3222. When LMCS is not enabled at the sequence level, LMCS is also not enabled for all pictures and all slices of video frames of the sequence. In some embodiments, step 3206 is "No" when sps_lmcs_enabled_flag has a value of "0." If LMCS is enabled at the sequence level, step 3206 is "Yes," and process 3200 proceeds to step 3208. When LMCS is enabled at the sequence level, all pictures in the sequence can be enabled. In some embodiments, step 3206 is "Yes" when sps_lmcs_enabled_flag has a value of "1."

[0180] In step 3208, device 400 determines a control flag for pictures in a sequence of video frames at the picture level. In some embodiments, a picture of a video frame within a sequence can include one or more slices. The control flag for a picture can be an indication of the status of all slices in the picture. In some embodiments, the control flag can be an indication of whether the picture of the video frame utilizes luminance mapping with chroma scaling (LMCS) encoding. An example of a control flag for a picture can be a second control flag. As shown in the example, ph_lmcs_enabled_flag can be a control flag for LMCS at the picture level. In some embodiments, the control flag at the picture level is present in a picture header. In some embodiments, ph_lmcs_enabled_flag can have a value of "1" or "0." Figure 33

[0181] In step 3210, device 400 checks the value of the control flag for LMCS at the picture level to determine whether LMCS is enabled at the picture level. If LMCS is not enabled at the picture level, step 3210 is "No," and process 3200 proceeds to step 3212. When LMCS is not enabled at the picture level, LMCS is also not enabled for all slices of the picture of the video frame. In some embodiments, step 3210 is "No" when ph_lmcs_enabled_flag has a value of "0." If LMCS is enabled at the picture level, step 3210 is "Yes," and process 3200 proceeds to step 3214. When LMCS is enabled at the picture level, all slices in the picture can be enabled. In some embodiments, step 3210 is "Yes" when ph_lmcs_enabled_flag has a value of "1."

[0182] ​In some additional or alternative embodiments, in response to determining that LMCS is enabled at the picture level (step 3210 - Yes), the apparatus 400 can check a value of a third control flag that indicates whether chroma scaling (CS) is enabled at the picture level of the video frame. As shown in Figure 18 ph_chroma_residual_scale_flag can be an example of the third control flag. In some embodiments, CS is enabled when ph_chroma_residual_scale_flag is equal to 1, and CS is not enabled when ph_chroma_residual_scale_flag is equal to 0.

[0183] In step 3212, the apparatus 400 checks whether the picture is the last picture in the sequence. If step 3212 is No, the apparatus 400 proceeds to step 3208 to determine the control flag at the picture level for the next picture of the sequence of video frames. Regardless of whether step 3212 is Yes or No, the process 3200 proceeds to step 3222.

[0184] In step 3214, the apparatus 400 determines the control flag for the slice in the picture of the video frame at the slice level, as determined in step 3208. The control flag for the slice can be an indication of the status of the particular slice in the picture. In some embodiments, the control flag can be an indication of whether the slice in the picture of the video frame is encoded using luma mapping with chroma scaling (LMCS). The control flag for the slice can be an example of a fourth control flag. As shown in Figure 22A slice_lmcs_enabled_flag can be the control flag for LMCS at the slice level. In some embodiments, slice_lmcs_enabled_flag can have a value of “1” or “0”.

[0185] In step 3216, the apparatus 400 checks the value of the control flag for LMCS at the slice level to determine whether LMCS is enabled at the slice level. If LMCS is not enabled at the slice level, step 3216 is No, and the process 3200 proceeds to step 3218. In some embodiments, step 3216 is No when slice_lmcs_enabled_flag has a value of “0”. If LMCS is enabled at the slice level, step 3216 is Yes, and the process 3200 proceeds to step 3220. In some embodiments, step 3216 is Yes when slice_lmcs_enabled_flag has a value of “1”.

[0186] In step 3218, device 400 checks whether the slice is the last slice in the picture. If step 3218 is "No," device 400 proceeds to step 3214 to determine the control flag at slice for the next slice in the picture of the video frame. Regardless of whether step 3218 is "Yes" or "No," process 3200 proceeds to step 3222.

[0187] In step 3220, device 400 encodes the slice, picture, and / or sequence of the video frame with luminance mapping (LM) enabled and allowing chroma scaling to be enabled. In some embodiments, in response to the second flag indicating that LMCS is enabled at the picture level, luminance mapping (LM) is enabled and CS can be enabled at the slice level when slice lmcs enabled flag is equal to 1.

[0188] In step 3222, device 400 encodes the slice, picture, and / or sequence of the video frame without luminance mapping and chroma scaling being enabled.

[0189] Figure 22B A flowchart of an exemplary process for determining encoding of a video frame using an adaptive loop filter (ALF) consistent with the present disclosure is described. Process 3300 can be performed by device 400 and its sub-components, such as processor 3102.

[0190] In step 3302, device 400 receives one or more video frames.

[0191] In step 3304, device 400 determines a control flag for the video frame at a sequence level. In some embodiments, the control flag can be an indication of whether the video frame is encoded using an adaptive loop filter (ALF). An example of the control flag for the sequence can be a first control flag. As shown in the example, sps alf enabled flag can be the control flag for ALF at the sequence level. In some embodiments, sps alf enabled flag can have a value of "1" or "0." In some embodiments, if the value of sps alf enabled flag is not specified or is missing, the default value thereof can be "0." Figure 22A

[0192] ​In step 3306, device 400 checks the value of the control flag for ALF at the sequence level to determine whether ALF is enabled at the sequence level. If ALF is not enabled at the sequence level, step 3306 is "No," and process 3300 proceeds to step 3322. When ALF is not enabled at the sequence level, ALF is also not enabled for all pictures and all slices of the video frame. In some embodiments, step 3306 is "No" when sps alf enabled flag has a value of "0." If ALF is enabled at the sequence level, step 3306 is "Yes," and process 3300 proceeds to step 3308. When ALF is enabled at the sequence level, all pictures in the sequence can be enabled. In some embodiments, step 3306 is "Yes" when sps alf enabled flag has a value of "1."

[0193] In step 3308, device 400 determines a control flag for pictures in the sequence of the video frame at the picture level. In some embodiments, the control flag can be an indication of whether or not to use an adaptive loop filter (ALF) to encode a picture of the video frame. An example of a control flag for a picture can be a second control flag. As described above, the first control flag can be sps alf enabled flag, and the second control flag can be ph alf enabled flag. Figure 22A and Figure 22A In some embodiments, the second control flag is present in a picture header. In some embodiments, ph alf enabled flag can have a value of "1" or "0." In some embodiments, if a value for ph alf enabled flag is not specified or missing, the default value can be "0."

[0194] In step 3310, device 400 checks the value of the control flag for ALF at the picture level to determine whether ALF is enabled at the picture level. If ALF is not enabled at the picture level, step 3310 is "No," and process 3300 proceeds to step 3312. When ALF is not enabled at the picture level, ALF is also not enabled for all slices of the picture of the video frame. In some embodiments, step 3310 is "No" when ph alf enabled flag has a value of "0." If ALF is enabled at the picture level, step 3310 is "Yes," and process 3300 proceeds to step 3314. When ALF is enabled at the picture level, all pictures in the sequence can be enabled. In some embodiments, step 3310 is "Yes" when ph alf enabled flag has a value of "1."

[0195] In some additional or alternative embodiments, the second control flag can be a control flag for picture level or slice level, depending on a third control flag signaled at a picture parameter set (PPS).

[0196] In some additional or alternative embodiments, in response to determining that ALF is enabled for picture level (step 3310 - Yes), the apparatus 400 can check a value of a fourth control flag that indicates whether cross-component adaptive loop filter (CCALF) is enabled for picture level of the video frame of the Cb color component. In Figure 34 In some embodiments, ph_cc_alf_cb_enabled_flag can be an example of the fourth control flag.

[0197] In some additional or alternative embodiments, in response to determining that ALF is enabled for picture level (step 3310 - Yes), the apparatus 400 can check a value of a fifth control flag that indicates whether cross-component adaptive loop filter (CCALF) is enabled for picture level of the video frame of the Cr color component. In Figure 26 In some embodiments, ph_cc_alf_cr_enabled_flag can be an example of the fifth control flag.

[0198] In step 3312, the apparatus 400 checks whether the picture is the last picture in the sequence. If step 3312 is No, the apparatus 400 proceeds to step 3308 to determine the control flag at picture level for the next picture in the sequence of video frames. Regardless of whether step 3312 is Yes or No, the process 3300 proceeds to step 3322.

[0199] In step 3314, the apparatus 400 determines the control flag at slice level for the slice in the picture of the video frame as determined in step 3308. The control flag for the slice can be an indication of the status of the particular slice in the picture. In some embodiments, the control flag can be an indication of whether the adaptive loop filter (ALF) is to be used to encode the slice of the picture in the video frame. An example of the control flag for the slice can be the third control flag. As shown in FIGS. 22A and Figure 26 slice_alf_enabled_flag can be the control flag for AFL at slice level. In some embodiments, slice_alf_enabled_flag can have a value of “1” or “0”. In some embodiments, if the value of slice_alf_enabled_flag is not specified or missing, the default value thereof can be “0”.

[0200] In step 3316, device 400 checks the value of the control flag for ALF at the slice level to determine whether ALF is enabled at the slice level. If ALF is not enabled at the slice level, step 3310 is "No," and process 3300 proceeds to step 3318. In some embodiments, step 3316 is "No" when slice_alf_enabled_flag has a value of "0." If ALF is enabled at the picture level, step 3316 is "Yes," and process 3300 proceeds to step 3320. In some embodiments, step 3316 is "Yes" when slice_alf_enabled_flag has a value of "1."

[0201] In step 3318, device 400 checks whether the slice is the last slice in the picture. If step 3318 is "No," device 400 proceeds to step 3314 to determine the control flag at the slice for the next slice in the picture for the video frame. Regardless of whether step 3318 is "Yes" or "No," process 3300 proceeds to step 3322.

[0202] In step 3320, device 400 encodes the slice, picture, and / or sequence of the video frame using an adaptive loop filter (ALF). In some embodiments, when AFL is enabled, color components Y, Cb, or Cr are enabled.

[0203] In step 3322, device 400 encodes the slice, picture, and / or sequence of the video frame without enabling an adaptive loop filter (ALF).

[0204] Figure 34 FIG. 34 is a flowchart describing an exemplary process for determining to encode a video frame using sample adaptive offset (SAO) according to embodiments of the present disclosure. Process 3400 can be performed by device 400 and its sub-components, such as processor 3102.

[0205] In step 3402, device 400 receives one or more video frames.

[0206] In step 3404, device 400 determines a control flag for the video frame at a sequence level. In some embodiments, the control flag can be an indication of whether to encode the video frame using sample adaptive offset (SAO). An example of the control flag for the sequence can be a first control flag. As described in the Figure 26 sps_sao_enabled_flag can be a control flag for ALF at the sequence level. In some embodiments, sps_sao_enabled_flag can have a value of "1" or "0."

[0207] In step 3406, apparatus 400 checks the value of the control flag for SAO at the sequence level to determine whether SAO is enabled at the sequence level. If SAO is not enabled at the sequence level, step 3406 is "No," and process 3400 proceeds to step 3422. When SAO is not enabled at the sequence level, SAO is also not enabled for all pictures and all slices of the video frame. In some embodiments, step 3406 is "No" when sps_sao_enabled_flag has a value of "0." If SAO is enabled at the sequence level, step 3406 is "Yes," and process 3400 proceeds to step 3408. When SAO is enabled at the sequence level, all pictures in the sequence can be enabled. In some embodiments, step 3406 is "Yes" when sps_sao_enabled_flag has a value of "1."

[0208] In step 3408, apparatus 400 determines a control flag for a picture in the sequence of video frames at the picture level. The control flag for a picture can be an indication of the status of all slices in the picture. In some embodiments, the control flag can be an indication of whether or not the picture of the video frame is to be encoded using sample adaptive offset (SAO). An example of the control flag for a picture can be a second control flag. As described in the example of Figure 35 ph_sao_luma_enabled_flag or ph_sao_chroma_enabled_flag, or both, can be the control flag for SAO at the picture level, as shown in the example process 3400. In some embodiments, the control flag at the picture level is present in the picture header. In some embodiments, ph_sao_luma_enabled_flag or ph_sao_chroma_enabled_flag can have a value of "1" or "0." In some embodiments, if the value of ph_sao_luma_enabled_flag or ph_sao_chroma_enabled_flag is not specified or missing, the default value can be "0." Those skilled in the art or having ordinary skill in the art will now appreciate, or can beapparent upon reflection, that Figure 3A The process 3400 shown can be applicable to both the luma component of SAO and the chroma component of SAO.

[0209] In step 3410, apparatus 400 checks the value of the control flag for the image-level SAO to determine whether the image-level SAO is enabled. If the SAO is not enabled at the image level, step 3410 is "No," and process 3400 proceeds to step 3412. When the SAO is not enabled at the image level, the SAO is also not enabled for all slices of the picture of the video frame. In some embodiments, step 3410 is "No" when ph_sao_luma_enabled_flag or ph_sao_chroma_enabled_flag has a value of "0." If the SAO is enabled at the image level, step 3410 is "Yes," and process 3400 proceeds to step 3414. When the SAO is enabled at the image level, then all slices in the picture can be enabled. In some embodiments, step 3410 is "Yes" when ph_sao_luma_enabled_flag or ph_sao_chroma_enabled_flag has a value of "1."

[0210] In some additional or alternative embodiments, the second control flag can be a control flag for the picture level or the slice level, depending on a third control flag signaled at a picture parameter set (PPS).

[0211] In step 3412, apparatus 400 checks whether the picture is the last picture in the sequence. If step 3412 is "No," apparatus 400 proceeds to step 3408 to determine the control flag at the picture level for the next picture in the sequence of the video frame. Regardless of whether step 3412 is "Yes" or "No," process 3400 proceeds to step 3422.

[0212] In step 3414, apparatus 400 determines the control flag for the slice in the picture of the video frame at the slice level, as determined in step 3408. The control flag for the slice can be an indication of the status of the particular slice in the picture. In some embodiments, the control flag can be an indication of whether the sample adaptive offset (SAO) is to be used to encode the slice of the picture in the video frame. An example of the control flag for the slice can be the third control flag. As Figure 31AIn the illustrated example, slice_sao_luma_enabled_flag or slice_sao_chroma_enabled_flag can be a control flag for slice-level SAO. In some embodiments, slice_sao_luma_enabled_flag or slice_sao_chroma_enabled_flag can have a value of "1" or "0". In some embodiments, if the value of slice_sao_luma_enabled_flag or slice_sao_chroma_enabled_flag is not specified or missing, the default value can be "0".

[0213] In step 3416, apparatus 400 checks the value of the control flag for slice-level SAO to determine whether SAO is enabled at the slice level. If SAO is not enabled at the slice level, step 3416 is "No", and process 3400 proceeds to step 3418. In some embodiments, step 3416 is "No" when slice_sao_luma_enabled_flag or slice_sao_chroma_enabled_flag has a value of "0". If SAO is enabled at the slice level, step 3416 is "Yes", and process 3400 proceeds to step 3420. In some embodiments, step 3416 is "Yes" when slice_sao_luma_enabled_flag or slice_sao_chroma_enabled_flag has a value of "1".

[0214] In step 3418, apparatus 400 checks whether the slice is the last slice in the picture. If step 3418 is "No", apparatus 400 proceeds to step 3414 to determine the control flag at the slice for the next slice in the picture of the video frame. Regardless of whether step 3418 is "Yes" or "No", process 3400 proceeds to step 3422.

[0215] In step 3420, apparatus 400 encodes the slice, picture, and / or sequence of the video frame using sample adaptive offset (SAO) (luma or chroma SAO, or both based on the control flag).

[0216] In step 3422, apparatus 400 encodes the slice, picture, and / or sequence of the video frame without sample adaptive offset (SAO) (luma or chroma SAO, or both based on the control flag).

[0217] Figure 3Bis a flowchart of an exemplary process for determining encoding of video frames with deblocking filter disabled consistent with embodiments of the present disclosure. Process 3500 can be performed by apparatus 400 and its sub-components, such as processor 3102.

[0218] At step 3502, apparatus 400 receives one or more video frames.

[0219] At step 3504, apparatus 400 determines a control flag for the video frames at a sequence level. The control flag for a sequence can be an indication of the status of all pictures in the sequence. In some embodiments, the control flag can be an indication of whether the video frames are to be encoded with deblocking filter disabled. The control flag for a sequence can be an example of a disable flag for disabling deblocking filter at a sequence level. In some embodiments, the sequence level can be a first level. As Figure 31B shown in the example, sps_deblocking_filter_disabled_flag can be an example of a control flag for deblocking filter at a sequence level. In some embodiments, sps_deblocking_filter_disabled_flag can have a value of "1" or "0". At step 3504, apparatus 400 further determines an override flag for deblocking filter at a sequence level for the video frames. As Figure 31B described in the example, deblocking_filter_override_enabled_flag can be an example of an override flag at a sequence level. In some embodiments, deblocking_filter_override_enabled_flag can have a value of "1" or "0".

[0220] At step 3506, apparatus 400 checks the value of the control flag for disabling deblocking filter at a sequence level to determine whether deblocking is disabled at a sequence level. If deblocking is not disabled at a sequence level, step 3506 is "No" and process 3500 proceeds to step 3512. When deblocking is disabled at a sequence level, process 3500 proceeds to step 3508. In some embodiments, step 3506 is "No" when sps_deblocking_filter_disabled_flag has a value of "0". In some embodiments, step 3406 is "Yes" when sps_deblocking_filter_disabled_flag has a value of "1".

[0221] In step 3508, apparatus 400 checks the value of an override flag for disabling the deblocking filter at the sequence level. If there is an override flag for the sequence level, step 3508 is "yes" and process 3500 proceeds to step 3512. In some embodiments, step 3508 is "yes" when deblocking_filter_override_enabled_flag can have a value of "1". If there is no override flag for the sequence level, step 3508 is "no" and process 3500 proceeds to step 3510. In some embodiments, step 3508 is "no" when deblocking_filter_override_enabled_flag has a value of "0".

[0222] In step 3510, when the deblocking is disabled for the entire sequence of video frames and there is no override flag, the deblocking filter is not used when encoding the video frames of the sequence.

[0223] In step 3512, apparatus 400 determines a control flag for the pictures in the sequence at the picture level of the video frames. The control flag for a picture can be an indication of the status of all slices in the picture. In some embodiments, the control flag can be an indication of whether the pictures in the sequence are to be encoded with the deblocking filter disabled. In some embodiments, the picture level can be a second level. The control flag for a picture can be an example of a disable flag for disabling the deblocking filter at the picture level. As shown in the example, ph_deblocking_filter_disabled_flag can be a control flag for the deblocking filter at the picture level. In some embodiments, ph_deblocking_filter_disabled_flag can have a value of "1" or "0". Figure 31B In step 3512, apparatus 400 further determines an override flag for the deblocking filter at the picture level of the video frames. As shown in the example, ph_deblocking_filter_override_enabled_flag can be an example of an override flag at the picture level. In some embodiments, ph_deblocking_filter_override_enabled_flag can have a value of "1" or "0". ​ In step 3512, apparatus 400 further determines an override flag for the deblocking filter at the picture level of the video frames. As shown in the example, ph_deblocking_filter_override_enabled_flag can be an example of an override flag at the picture level. In some embodiments, ph_deblocking_filter_override_enabled_flag can have a value of "1" or "0". ph_deblocking_filter_override_enabled_flag can have a value of "1" or "0".

[0224] In some additional or alternative embodiments, the first level can be a set of picture levels, and a first control flag of the first level is signaled at a picture parameter set (PPS). In some additional or alternative embodiments, the second level is one of the picture level or slice level, and a second control flag of the second level is signaled at a picture header (PH) or slice header (SH).

[0225] In step 3516, the apparatus 400 checks the value of the control flag for disabling the deblocking filter at the picture level to determine whether deblocking is disabled at the picture level. If deblocking is not disabled at the picture level, step 3516 is "No", and the process 3500 proceeds to step 3522. When deblocking is disabled at the picture level, the process 3500 proceeds to step 3518. In some embodiments, step 3516 is "No" when the ph_deblocking_filter_disabled_flag has a value of "0". In some embodiments, step 3516 is "Yes" when the ph_deblocking_filter_disabled_flag has a value of "1".

[0226] In step 3518, the apparatus 310 checks the value of the override flag for disabling the deblocking filter at the picture level. If the override flag exists for the picture level, step 3518 is "Yes", and the process 3500 proceeds to step 3522. In some embodiments, step 3588 is "Yes" when the ph_deblocking_filter_override_enabled_flag can have a value of "1". If the override flag does not exist for the sequence level, step 3588 is "No", and the process 3500 proceeds to step 3520. In some embodiments, step 3518 is "No" when the ph_deblocking_filter_override_enabled_flag has a value of "0".

[0227] In step 3520, when deblocking is disabled for a picture of a video frame in a sequence, and the override flag does not exist, the deblocking filter is not used for that particular picture when the video frame is encoded.

[0228] In step 3514, the apparatus 400 checks whether all pictures of the sequence have been processed. If step 3514 is "No", the apparatus 400 proceeds to step 3512 for the next picture in the sequence.

[0229] In step 3522, as determined in step 3516, the device 400 determines control flags at the stripe level for stripes in the image of the video frame. The stripe control flags may be an indication of the state of a particular stripe in the image. In some embodiments, the control flags may be an indication of whether stripes in the image of the video frame are to be encoded with the deblocking filter disabled. An example of an image control flag is a disable flag used to disable the deblocking filter at the stripe level. ​ In the example shown, `slice_deblocking_filter_disabled_flag` can be a control flag used for deblocking filters at the slice level. In some embodiments, `slice_deblocking_filter_disabled_flag` can have a value of "1" or "0". In step 3522, the apparatus 400 further determines a slice-level overlay flag for the deblocking filter used for the video frame. ​ In the example shown, slice_deblocking_filter_override_enabled_flag can be an example of an override flag at the slice level. In some embodiments, slice_deblocking_filter_override_enabled_flag can have a value of "1" or "0".

[0230] In step 3526, device 400 checks the value of a control flag used to disable the deblocking filter at the slice level to determine whether deblocking is disabled at the slice level. If deblocking is not disabled at the slice level, step 3526 is "No", and process 3500 proceeds to step 3532. When deblocking is disabled at the slice level, process 3500 proceeds to step 3528. In some embodiments, step 3526 is "No" when slice_deblocking_filter_disabled_flag has a value of "0". In some embodiments, step 3526 is "Yes" when slice_deblocking_filter_disabled_flag has a value of "1".

[0231] In step 3528, the apparatus checks the value of the override flag for disabling the deblocking filter at slice level. If the override flag is present for slice level, step 3528 is "yes" and process 3500 proceeds to step 3532. In some embodiments, step 3528 is "yes" when slice de blocking filter override enabled flag has a value of "1". If the override flag is not present for slice level, step 3528 is "no" and process 3500 proceeds to step 3530. In some embodiments, step 3528 is "no" when slice de blocking filter override enabled flag has a value of "0".

[0232] In step 3530, when the deblocking is disabled for a slice of a picture in a video frame in a sequence, and the override flag is not present, the deblocking filter is not used for the slice when the video frame is encoded.

[0233] In step 3524, apparatus 400 checks whether all slices of the picture have been processed. If step 3524 is "no", apparatus 400 proceeds again to step 3522 for the next slice in the picture.

[0234] In step 3532, apparatus 400 encodes the sequence, picture and / or slice of the video frame with the deblocking filter.

[0235] In some embodiments, a non-transitory computer readable storage medium comprising instructions executable by an apparatus, such as the disclosed encoders and decoders, for performing the above described methods is also provided. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, a hard disk, a solid-state drive, a magnetic tape, or any other magnetic data storage medium, a CD-ROM, any other optical data storage medium, any physical medium with patterns of holes, a RAM, a PROM, and EPROM, a FLASH-EPROM or any other flash memory, NVRAM, a cache, a register, any other memory chip or cartridge, and a networked version of any of the above. The apparatus can include one or more processors (CPUs), input / output interfaces, network interfaces, and / or memory.

[0236] Embodiments can be further described using the following clauses: 1. A method of video encoding, comprising: receiving a sequence of video frames; The video sequence is encoded at a sequence level, a picture level, or a slice level by using a control flag for luminance mapping with chroma scaling (LMCS), wherein the sequence level, the picture level, and the slice level are levels ordered from high to low; a first control flag is signaled, the first control flag indicating whether the LMCS is enabled at a first level; and in response to the first control flag indicating that the LMCS is enabled at the first level, a second control flag is signaled, the second control flag indicating whether the LMCS is enabled at a second level, wherein: when a value of the second control flag is equal to 1, the LMCS is enabled at the second level; when the value of the second control flag is equal to 0, the LMCS is disabled at the second level; and the second level is a level lower than the first level. 2. The video encoding method of clause 1, wherein the first control flag is a control flag for the LMCS at the sequence level, and the second control flag is a control flag for the LMCS at the picture level. 3. The video encoding method of clause 2, further comprising: in response to the second control flag indicating that the LMCS is enabled at the second level, a third control flag is signaled, the third control flag indicating whether chroma scaling (CS) is enabled at the second level: when a value of the third control flag is equal to 1, the CS is enabled at the second level; and when the value of the third control flag is equal to 0, the CS is disabled at the second level. 4. The video encoding method of clause 1 or 2, further comprising: in response to the second flag indicating that the LMCS is enabled at the second level, a fourth control flag is signaled, the fourth control flag indicating whether the LMCS is applied at a third level, wherein: when a value of the fourth control flag is equal to 1, luminance mapping (LM) is applied at the third level, and CS can be applied; when the value of the fourth control flag is equal to 0, the LMCS is not applied at the third level; and the third level is a level lower than the second level. 5. The video encoding method of clause 4, wherein the third level is the slice level. 6. The video coding method of clause 4, wherein when the second control flag is not signaled, the LMCS is not enabled for the picture associated with the second control flag. 7. The video coding method of clause 4 or 5, wherein when the fourth control flag is not signaled, the LMCS is not applied for the slice associated with the fourth control flag. 8. The video coding method of clause 1, wherein when the first control flag is signaled, the LMCS at a lower level is not enabled when the second control flag is not signaled. 9. The video coding method of clause 1 or 8, wherein when the first control flag is not signaled, the LMCS at a lower level is not enabled regardless of whether the second control flag is signaled or not. 10. A video coding method, comprising: receiving a video sequence; coding the video sequence at a sequence level, a picture level, or a slice level by using a control flag for an adaptive loop filter (ALF), wherein the sequence level, the picture level, and the slice level are levels ordered from high to low. signaling a first control flag indicating whether the ALF is enabled at a first level; and in response to the first control flag indicating that the ALF is enabled at the first level, signaling a second control flag indicating whether the ALF is enabled at a second level, wherein: when a value of the second control flag is equal to 1, the ALF is enabled at the second level; when the value of the second control flag is equal to 0, the ALF is disabled at the second level; and the second level is a level lower than the first level. 11. The video coding method of clause 10, further wherein the first control flag is a control flag for the ALF at the sequence level, and the second control flag is a control flag for the ALF at one of the picture level or the slice level depending on a third control flag signaled in a picture parameter set (PPS). 12. The video coding method of clause 10 or 11, further comprising: in response to the second control flag indicating that the ALF is enabled at the second level, signaling a fourth control flag indicating whether a cross-component adaptive loop filter (CCALF) for a Cb color component is enabled at the second level, wherein: when the value of the fourth control flag is equal to 1, the CCALF for Cb color component is enabled at the second level; and when the value of the fourth control flag is equal to 0, the CCALF for Cb color component is disabled at the second level; and in response to the second control flag indicating that the ALF is enabled at the second level, a fifth control flag is signaled, the fifth control flag indicating whether a cross component adaptive loop filter (CCALF) for Cr color component is enabled at the second level, wherein: when the value of the fifth control flag is equal to 1, the CCALF for Cr color component is enabled at the second level; and when the value of the fifth control flag is equal to 0, the CCALF for Cr color component is disabled at the second level. 13. The video coding method according to clause 10, wherein when the first control flag is signaled, the second control flag is not signaled, and the ALF at a lower level is not enabled. 14. The video coding method according to clause 10 or 11, wherein when the first control flag is not signaled, the ALF at a lower level is not enabled regardless of whether the second control flag is signaled or not. 15. The video coding method according to clauses 10 to 12, wherein when parameters of the ALF are determined in a slice header of a picture, all slices of the picture will have the same parameters of the ALF. 16. The video coding method according to clauses 10 to 12, wherein when the second control flag is not signaled, the ALF is not enabled for a picture associated with the second control flag. 17. The video coding method according to clauses 10 to 12, wherein when the fourth control flag or the fifth control flag is not signaled, the CCALF is not enabled for Cb or Cr component of the picture associated with the second control flag. 18. The video coding method according to clauses 10 to 12, wherein when the second control flag is not signaled, the ALF is not applied for a slice associated with the second control flag. 19. The video coding method according to clauses 10 to 12, wherein when the AFL is enabled, a color component Y, Cb or Cr is enabled. 20. A video coding method, comprising: receiving a video sequence; The video sequence is encoded at a sequence level, a picture level, or a slice level by using a control flag for sample adaptive offset (SAO), wherein the sequence level, the picture level, and the slice level are levels ordered from high to low; a first control flag is signaled, the first control flag indicating whether the SAO is enabled at a first level; and in response to the first control flag indicating that the SAO is enabled at the first level, a second control flag is signaled, the second control flag indicating whether the SAO is enabled at a second level, wherein: when a value of the second control flag is equal to 1, the SAO for luma components is enabled at the second level; when the value of the second control flag is equal to 0, the SAO for luma components is disabled at the second level; and the second level is a level lower than the first level. 21. The video encoding method according to clause 20, further comprising a third control flag signaled at the second control flag, wherein: when a value of the third control flag is equal to 1, the SAO for chroma components is enabled at the second level; and when the value of the third control flag is equal to 0, the SAO for chroma components is disabled at the second level. 22. The video encoding method according to clause 20 or 21, wherein the first control flag is a control flag for SAO at the sequence level, and the second control flag is a control flag for SAO at one of a picture level or a slice level depending on a third control flag signaled in a picture parameter set (PPS). 23. The video encoding method according to clause 20 or 21, wherein when the second control flag is not signaled, the SAO is disabled for luma components of the picture associated with the second control flag. 24. The video encoding method according to clause 20 or 21, wherein when the third control flag is not signaled, the SAO is disabled for chroma components of the picture associated with the third control flag. 25. The video encoding method according to clause 20, wherein when the first control flag is signaled and the second control flag is not signaled, the SAO at the lower level is disabled. 26. The video encoding method according to clause 20 or 21, wherein when the first control flag is not signaled, the SAO at the lower level is disabled regardless of whether the second control flag is signaled or not. 27. The video coding method of any of clauses 19-26, wherein when the SAO is enabled, an SAO process is applied to a reconstructed picture after a deblocking filter process. 28. A video coding method comprising: receiving a video sequence; and coding the video sequence at a sequence level, a picture set level, a picture level, or a slice level by using control flags for a deblocking filter, wherein: when a value of a first control flag of a first level is equal to 1 and a value of a second control flag of a second level is not signaled, the deblocking filter is disabled at the first level, and when the value of the first control flag of the first level is equal to 0 and the value of the second control flag of the second level is not signaled, the deblocking filter is enabled at the first level; and the first level is a level higher than the second level. 29. The video coding method of clause 28, wherein the first level is the picture set level and the first control flag is signaled in a picture parameter set (PPS), and the second level is one of the picture level or the slice level and the second control flag is signaled in one of a picture header (PH) or a slice header (SH). 30. The video coding method of clause 28, further comprising signaling a third flag in the PPS to indicate whether the second control flag is signaled at the picture level or the slice level. 31. The video coding method of clause 28, further comprising coding the video sequence at the sequence level, the picture set level, the picture level, or the slice level by using an override flag for the deblocking filter, wherein the override flag is used to indicate whether a control flag of a lower level can be signaled to override a control flag of a higher level. 32. The video coding method of clause 28, further comprising coding the video sequence at the sequence level, the picture set level, the picture level, or the slice level by using an override flag for the deblocking filter, wherein the override flag is used to indicate whether a control flag of a lower level can be signaled to override a control flag of a higher level, and when a higher level control flag signaled at the sequence level, the picture set level, the picture level, or the slice level is equal to 1, the deblocking filter is not applied to a corresponding sequence, picture set, picture, or slice when the control flag of the lower level does not override the control flag of the higher level. 33. A video decoding method comprising: receiving a bitstream containing a video sequence; decoding the video sequence at a sequence level, a picture level, or a slice level by using a control flag for luma mapping with chroma scaling (LMCS), wherein the sequence level, the picture level, and the slice level are levels ordered from high to low; determining whether a first control flag indicates that the LMCS is enabled at a first level; and in response to determining that the first control flag indicates that the LMCS is enabled at the first level, determining whether a second control flag indicates that the LMCS is enabled at a second level, wherein: when a value of the second control flag is equal to 1, the LMCS is enabled at the second level; when the value of the second control flag is equal to 0, the LMCS is disabled at the second level; and the second level is a level lower than the first level. 34. The video decoding method of clause 33, wherein the first control flag is a control flag for the LMCS at the sequence level, and the second control flag is a control flag for the LMCS at the picture level. 35. The video decoding method of clause 34, further comprising: in response to determining that the second control flag indicates that the LMCS is enabled at the second level, determining whether a third control flag indicates that chroma scaling (CS) is enabled at the second level, wherein: when a value of the third control flag is equal to 1, the CS is enabled at the second level; and when the value of the third control flag is equal to 0, the CS is disabled at the second level. 36. The video decoding method of clause 33 or 34, further comprising: in response to determining that the second flag indicates that the LMCS is enabled at the second level, determining whether a fourth control flag indicates that the LMCS is applied at a third level, wherein: when a value of the fourth control flag is equal to 1, luma mapping (LM) is applied at the third level, and CS can be applied; when the value of the fourth control flag is equal to 0, the LMCS is not applied at the third level; and the third level is a level lower than the second level. 37. The video decoding method of clause 36, wherein the third level is the slice level. 38. The video decoding method of clause 36, wherein when the second control flag is not signaled, LMCS is not enabled for the pictures associated with the second control flag. 39. The video decoding method of clause 36 or 38, wherein when the fourth control flag is not signaled, LMCS is not applied for the slice associated with the fourth control flag. 40. The method of clause 33, wherein when the first control flag is signaled, the second control flag is not signaled, the LMCS at a lower level is not enabled. 41. The video decoding method of clause 33 or 40, wherein when the first control flag is not signaled, the LMCS at a lower level is not enabled regardless of whether the second control flag is signaled. 42. A video decoding method, comprising: receiving a bitstream containing a video sequence; decoding the video sequence at a sequence level, a picture level, or a slice level by using control flags for an adaptive loop filter (ALF), wherein the sequence level, the picture level, and the slice level are levels ordered from high to low; determining whether a first control flag indicates that the ALF is enabled at a first level; and in response to determining that the first control flag indicates that the ALF is enabled at the first level, determining whether a second control flag indicates that the ALF is enabled at a second level, wherein: when a value of the second control flag is equal to 1, the ALF is enabled at the second level; when the value of the second control flag is equal to 0, the ALF is disabled at the second level; and the second level is a level lower than the first level. 43. The video decoding method of clause 42, further wherein the first control flag is a control flag for the ALF at the sequence level, and the second control flag is a control flag for the ALF at one of the picture level or the slice level depending on a third control flag signaled in a picture parameter set (PPS). 44. The video decoding method of clause 42 or 43, further comprising: in response to determining that the second flag indicates that the ALF is enabled at the second level, determining whether a fourth control flag indicates that a cross-component adaptive loop filter (CCALF) for a Cb color component is enabled at the second level, wherein: when the value of the fourth control flag is equal to 1, the CCALF for the Cb color component is enabled at the second level; and when the value of the fourth control flag is equal to 0, the CCALF for the Cb color component is disabled at the second level; and in response to determining that the second flag indicates that the ALF is enabled at the second level, signaling a fifth control flag indicating that a cross-component adaptive loop filter (CCALF) for the Cr color component is enabled at the second level, wherein: when the value of the fifth control flag is equal to 1, the CCALF for the Cr color component is enabled at the second level; and when the value of the fifth control flag is equal to 0, the CCALF for the Cr color component is disabled at the second level. 45. The video decoding method of clause 42, wherein when the first control flag is present, when the second control flag is not present, the ALF at the lower level is not enabled. 46. The video decoding method of clause 42 or 43, wherein when the first control flag is not present, the ALF at the lower level is not enabled regardless of whether the second control flag is present. 47. The video decoding method of clauses 42 to 44, wherein when parameters of the ALF are determined in a slice header of a picture, all slices of the picture will have the same parameters of the ALF. 48. The video decoding method of clauses 42 to 44, wherein when the second control flag is not present, the ALF is not enabled for a picture associated with the second control flag. 49. The video decoding method of clauses 42 to 44, wherein when the fourth control flag or the fifth control flag is not signaled, the CCALF is not enabled for the Cb or Cr component of the picture associated with the second control flag. 50. The video decoding method of clauses 42 to 44, wherein when the second control flag is not present, the ALF is not enabled for a slice associated with the second control flag. 51. The video decoding method of clauses 42 to 44, wherein when the AFL is enabled, a color component Y, Cb, or Cr is enabled. 52. A video decoding method comprising: receiving a bitstream containing a video sequence; decoding the video sequence at a sequence level, a picture level, or a slice level by using a control flag for sample adaptive offset (SAO), wherein the sequence level, the picture level, and the slice level are levels ordered from high to low; determining whether a first control flag indicates that the SAO is enabled at a first level; and in response to determining that the first control flag indicates that the SAO is enabled at the first level, determining whether a second control flag indicates that the SAO is enabled at a second level, wherein: when a value of the second control flag is equal to 1, the SAO for luma components is enabled at the second level; when the value of the second control flag is equal to 0, the SAO for luma components is disabled at the second level; and the second level is a level lower than the first level. 53. The video decoding method of clause 52, further comprising determining whether a third flag indicates that the SAO is enabled at the second level, wherein: when a value of the third control flag is equal to 1, the SAO for chroma components is enabled at the second level; and when the value of the third control flag is equal to 0, the SAO for chroma components is disabled at the second level. 54. The video decoding method of clause 52 or 53, wherein the first control flag is a control flag for SAO at a sequence level, and the second control flag is a control flag for SAO at one of a picture level or a slice level depending on a third flag signaled in a picture parameter set (PPS). 55. The video encoding method of clause 52 or 53, wherein when the second control flag is not present, the SAO is disabled for luma components of the picture associated with the second control flag. 56. The video encoding method of clause 52 or 53, wherein when the third control flag is not present, the SAO is disabled for chroma components of the picture associated with the third control flag. 57. The video decoding method of clause 52, wherein when the first control flag is present, when the second control flag is not present, the SAO at the lower level is disabled. 58. The video decoding method of clause 52 or 54, wherein when the first control flag is not present, the SAO at the lower level is disabled regardless of whether the second control flag is present or not. 59. The video decoding method of any of clauses 52-58, wherein when the SAO is enabled, an SAO process is applied to a reconstructed picture after a deblocking filter process. 60. A video decoding method comprising: receiving a bitstream containing a video sequence; and decoding the video sequence at a sequence level, a picture set level, a picture level, or a slice level by using a control flag for a deblocking filter, wherein: when a value of a first control flag of a first level is equal to 1 and a second control flag of a second level is not present, the deblocking filter is disabled at the first level, and when the value of the first control flag of the first level is equal to 0 and the second control flag of the second level is not present, the deblocking filter is enabled at the first level; and the first level is a level lower than the second level. 61. The video decoding method of clause 60, wherein the first level is the picture set level and the first control flag is signaled in a picture parameter set (PPS); and the second level is one of the picture level or the slice level and the second control flag is signaled in one of a picture header (PH) or a slice header (SH). 62. The video decoding method of clause 60, further comprising determining whether the second flag is signaled at the picture level or the slice level based on a third flag signaled in the PPS. 63. The video decoding method of clause 60, further comprising decoding the video sequence at the sequence level, the picture set level, the picture level, or the slice level by using an override flag for a deblocking filter, wherein the override flag is used to indicate whether a lower level control flag is used to override a higher level control flag. 64. The video decoding method of clause 60, further comprising decoding the video sequence at the sequence level, the picture set level, the picture level, or the slice level by using an override flag for a deblocking filter, wherein the override flag is used to indicate whether a lower level control flag is used to override a higher level control flag, and when a higher control flag present at the sequence level, the picture set level, the picture level, or the slice level is equal to 1, the deblocking filter is not applied to a corresponding sequence, picture set, picture, or slice when a control flag of a lower level does not override the higher control flag.

[0237] It should be noted that relational terms herein such as first and second and the like can be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual relationship or order between such entities or actions. Moreover, the words "comprise," "have," "contain," and "include," and other similar forms are intended to be open-ended in meaning and encompass the possibility of additional items being included. Additionally, the words "a" and "an" are defined as one or more unless explicitly indicated to the contrary in the specific context by the mere usage of "a" or "an."

[0238] As used herein, the term "or" includes all possible combinations of the items linked by the term, unless otherwise indicated in the specific context by the mere usage of "or". For example, if a database is stated to include A or B, then unless otherwise indicated or infeasible, the database can include A, or B, or A and B. As a second example, if a database is stated to include A, B, or C, then unless otherwise indicated or infeasible, the database can include A, or B, or C, or A and B, or A and C, or B and C, or A, B, and C.

[0239] It should be understood that the above-described embodiments can be implemented by hardware, or software (program code), or a combination of hardware and software. If implemented by software, it can be stored in the above-mentioned computer-readable medium. The software, when executed by a processor, can perform the disclosed method. The computing units and other functional units described in the present disclosure can be implemented by hardware or software or a combination of hardware and software. Those of ordinary skill in the art will also understand that the above-mentioned multiple modules / units can be combined into one module / unit, and each of the above-mentioned modules / units can be further divided into multiple sub-modules / sub-units.

[0240] In the foregoing specification, embodiments have been described with reference to numerous specific details that can vary from implementation to implementation. Certain modifications and changes can be made thereto, by those of ordinary skill in the art, without departing from the spirit of the application as set forth in the following claims. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense. The sequence of steps shown in the drawings is intended to be illustrative only and not to be limiting in any way. Thus, those skilled in the art will appreciate that these steps can be performed in different orders while still implementing the same method.

[0241] In the drawings and specification, there have been disclosed exemplary embodiments. However, many variations and modifications can be made to these embodiments. Therefore, it is to be understood that no limitation of the scope of the application is intended by the disclosure of these embodiments.

Claims

1. A video encoder comprising: a memory storing a set of instructions; and at least one processor configured to execute the set of instructions to cause the video encoder to perform operations comprising: receiving a video sequence; encoding the video sequence using a control flag for sample adaptive offset (SAO) at a sequence level, a picture level, or a slice level, wherein the sequence level, the picture level, and the slice level are levels arranged from high to low; sending a first control flag indicating whether the SAO is enabled at a first level; and in response to the first control flag indicating that the SAO is enabled at the first level, sending a second control flag indicating whether the SAO is enabled at a second level, wherein: the SAO is enabled for luma components at the second level when a value of the second control flag is equal to a first value, the SAO is disabled for luma components at the second level when a value of the second control flag is equal to a second value, and the second level is lower than the first level.

2. The video encoder of claim 1, wherein the first control flag is a control flag for SAO at a sequence level, and the second control flag is a control flag for SAO at a picture level or a slice level.

3. The video encoder of claim 2, wherein whether the SAO is at a picture level or a slice level is determined according to a third control flag sent in a picture parameter set (PPS).

4. The video encoder of claim 1, wherein the operations further comprise: determining whether to transmit a third control flag in the PPS, wherein when the third control flag is sent in the PPS: the SAO is enabled for chroma components at the second level when a value of the third control flag is equal to a first value, and the SAO is disabled for chroma components at the second level when a value of the third control flag is equal to a second value.

5. The video encoder of claim 4, wherein the SAO is disabled for chroma components of a picture associated with the third control flag when the third control flag is not sent in the PPS.

6. The video encoder of claim 1, wherein the SAO is disabled for luma components of a picture associated with the second control flag when the second control flag is not sent.

7. A video decoder comprising: a memory storing a set of instructions; and at least one processor configured to execute the set of instructions to cause the decoder to perform operations comprising: receiving a bitstream; decoding the bitstream using a sample adaptive offset (SAO) control flag at a sequence level, a picture level, or a slice level, wherein the sequence level, the picture level, and the slice level are levels arranged from high to low; determining a first control flag indicating whether the SAO is enabled at a first level; and in response to determining that the first control flag indicates that the SAO is enabled at the first level, determining a second control flag indicating whether the SAO is enabled at a second level, wherein: the SAO is enabled for luma components at the second level when a value of the second control flag is equal to a first value. when the value of the second control flag is equal to a second value, the SAO is disabled for luma components at the second level, and the second level is a lower level than the first level.

8. The video decoder of claim 7, wherein the first control flag is a sequence level control flag for the SAO, and the second control flag is an image level or slice level control flag for the SAO.

9. The video decoder of claim 8, wherein whether the SAO is at the image level or the slice level is determined according to a third control flag received in a picture parameter set (PPS).

10. The video decoder of claim 7, wherein the operation further comprises: determining a third control flag indicating whether the SAO is enabled at the second level, wherein: when the value of the third control flag is equal to a first value, the SAO is enabled for chroma components at the second level, and when the value of the third control flag is equal to a second value, the SAO is disabled for chroma components at the second level.

11. The video decoder of claim 7, wherein when the second control flag is not present, the SAO is disabled for luma components of an image associated with the second control flag.

12. The video decoder of claim 10, wherein when the third control flag is not present, the SAO is disabled for chroma components of an image associated with the third control flag.

13. A non-transitory computer-readable medium storing a set of instructions and a video bitstream, the set of instructions executable by one or more processors to perform a method to generate the video bitstream, the method comprising: receiving a video sequence; encoding the video sequence at a sequence level, an image level, or a slice level using a control flag for sample adaptive offset (SAO), wherein the sequence level, the image level, and the slice level are levels arranged from high to low; sending a first control flag indicating whether the SAO is enabled at a first level; and in response to the first control flag indicating that the SAO is enabled at the first level, sending a second control flag indicating whether the SAO is enabled at a second level, wherein: when the value of the second control flag is equal to a first value, the SAO is enabled for luma components at the second level, when the value of the second control flag is equal to a second value, the SAO is disabled for luma components at the second level, and the second level is a lower level than the first level.

14. The non-transitory computer-readable medium of claim 13, wherein the first control flag is a sequence level control flag for the SAO, and the second control flag is an image level or slice level control flag for the SAO.

15. The non-transitory computer-readable medium of claim 14, wherein whether the SAO is at the image level or the slice level is determined according to a third control flag sent in a picture parameter set (PPS).

16. The non-transitory computer-readable medium of claim 13, wherein the method further comprises: determining whether to transmit a third control flag in the PPS, wherein when the third control flag is transmitted in the PPS: when the value of the third control flag is equal to a first value, the SAO is enabled for chroma components at the second level, and when the value of the third control flag is equal to a second value, the SAO is disabled for chroma components at the second level.

Images