Method and apparatus to mitigate non-linearity in low power loudspeaker devices

Abstract

The invention relates to a method and an apparatus for mitigating non-linearity in a low-power loudspeaker device. An example apparatus (116B) includes equalizer circuitry (202) having a first input and a second input and an output, the equalizer circuitry configured to adjust an audio signal at the first input in response to a coefficient value at the second input; an amplifier circuitry (204) having an input coupled to the output of the equalizer circuitry, and having an output; control circuitry (212) having a first input coupled to the first input of the equalizer circuitry, having a second input coupled to the output of the amplifier circuitry, and having an output coupled to the second input of the equalizer circuitry, the control circuitry is configured to determine (216) a resonant frequency of a loudspeaker arrangement (110B) in response to the audio signal and a signal at the output of the amplifier circuitry, and provide (220) the coefficient value at the output of the control circuitry in response to the resonant frequency of a loudspeaker.

Description

[0001] Related Applications

[0002] This patent claims the benefit of Indian Provisional Patent Application No. 202441035706, filed May 06, 2024. Indian Provisional Patent Application No. 202441035706 is hereby incorporated by reference in its entirety. Priority of Indian Provisional Patent Application No. 202441035706 is hereby claimed. TECHNICAL FIELD

[0003] This specification generally relates to audio, and more particularly, to methods and apparatuses to mitigate nonlinearity in a low-power loudspeaker device. BACKGROUND

[0004] Amplifiers are used to amplify signals, such as audio signals. Because amplifiers can transmit analog or digital audio signals, it is desirable for the amplifiers to have low harmonic distortion and stable offset profiles to provide optimal audio sound quality. Harmonic distortion and offset profiles of a loudspeaker are responsive to nonlinearity of the loudspeaker. In turn, the amount of nonlinearity of the loudspeaker is responsive to mechanical structures within and around the loudspeaker. SUMMARY

[0005] For a method and apparatus to mitigate nonlinearity in a low-power loudspeaker device, a first example apparatus includes equalizer circuitry having a first input and a second input and an output, the equalizer circuitry configured to adjust an audio signal at the first input responsive to a coefficient value at the second input; amplifier circuitry having an input coupled to the output of the equalizer circuitry and having an output; control circuitry having a first input coupled to the first input of the equalizer circuitry, having a second input coupled to the output of the amplifier circuitry, and having an output coupled to the second input of the equalizer circuitry, the control circuitry configured to determine a resonant frequency of the loudspeaker device responsive to the audio signal and a signal at the output of the amplifier circuitry, and to provide the coefficient value at the output of the control circuitry responsive to the resonant frequency of the loudspeaker device.

[0006] A second example apparatus includes control circuitry configured to determine a resonant frequency of a loudspeaker device, and to determine a coefficient value responsive to the resonant frequency of the loudspeaker device and a nonlinearity model of the loudspeaker device; equalizer circuitry coupled to the control circuitry and configured to provide an adjusted audio signal using the coefficient value; and amplifier circuitry coupled to the equalizer circuitry and configured to amplify the equalized audio signal to provide an output audio signal.

[0007] A third example device includes control circuitry configured to: measure a diaphragm excursion value of a loudspeaker device at different frequencies to determine a maximum excursion value; determine a maximum voltage at the different frequencies that corresponds to the maximum excursion value; and determine a non-linear model corresponding to the loudspeaker device in response to the maximum voltage. BRIEF DESCRIPTION OF DRAWINGS

[0008] Figure 1 is a block diagram of an example environment including modeling circuitry and a mobile device.

[0009] Figure 2 is an example of audio amplifier circuitry of Figure 1 .

[0010] Figure 3 is an example of resonant frequency tracker circuitry of Figure 2 .

[0011] Figure 4 is an example of filter bank circuitry of Figure 2 .

[0012] Figure 5 is an example of coefficient calculator circuitry of Figure 2 .

[0013] Figure 6 is an example of equalizer circuitry of Figure 2 .

[0014] Figure 7 is a flowchart of example machine-readable instructions or example operations representing at least one of execution, instantiation, or performance of an example programmable circuitry implementation of audio amplifier circuitry of Figure 1 .

[0015] Figure 8A and 8B are first example graphs comparing performance of audio amplifier circuitry of Figure 1 to other audio amplifiers.

[0016] Figure 9A , 9B and 9C are second example graphs comparing performance of audio amplifier circuitry of Figure 1 to other audio amplifiers.

[0017] Figure 10 is a block diagram of an example of modeling circuitry of Figure 1 .

[0018] Figure 11A is an example graph illustrating speaker profile data of a mobile device of Figure 1 .

[0019] Figure 11B is an example plot showing expected speaker excursion of a thin speaker. Figure 1

[0020] Figure 11C is an example plot showing actual speaker excursion of a thin speaker. Figure 1

[0021] Figure 12 is an example plot showing a non-linear model. Figure 1

[0022] Figure 13 is a flowchart of example machine-readable instructions or example operations representing at least one of execution, instantiation, or performance of example programmable circuitry implementations of modeling circuitry that can use Figure 1

[0023] Figure 14 is a block diagram of an example processing platform including programmable circuitry configured to execute, instantiate, or perform example machine-readable instructions of Figure 7 and 13 to implement modeling circuitry 106 or audio amplifier circuitry 116B of Figure 2 or 10.

[0024] Figure 15 is a block diagram of an example of programmable circuitry of Figure 14

[0025] Figure 16 is a block diagram of another example of programmable circuitry of Figure 14

[0026] Figure 17 is a block diagram of an example software / firmware / instruction distribution platform (e.g., one or more servers) to distribute software, instructions, or firmware (e.g., corresponding to example machine-readable instructions of Figure 7 and 13 to client devices associated with end users or consumers (e.g., for licensing, sale, or use), retailers (e.g., for sale, resale, licensing, or sub-licensing), or original equipment manufacturers (OEMs) (e.g., for inclusion in products to be distributed to, e.g., retailers or other end users (e.g., direct purchase customers)).

[0027] ​​​​​​The drawings are not necessarily to scale. In general, the same reference numbers in different drawings designate the same elements or parts. Although zones are shown with clear lines and boundaries, some or all of these lines and boundaries can be idealized. In practice, boundaries or lines can be unobservable, blended, or irregular. DETAILED DESCRIPTION

[0028] As used above and hereinafter, loudspeaker device nonlinearity refers to a nonlinear relationship between two related phenomena within a loudspeaker device. Examples of loudspeaker nonlinearity include, but are not limited to: a nonlinear relationship between the stiffness of a loudspeaker suspension and the force required to return the suspension to equilibrium; a nonlinear relationship between the voltage applied to a loudspeaker diaphragm and the distance the diaphragm moves; a nonlinear relationship between the acoustic pressure within a loudspeaker enclosure and the air flow; a nonlinear relationship between the stress and strain of a loudspeaker cone; etc. Designers and manufacturers of loudspeaker devices seek to reduce or mitigate nonlinearity because they can degrade performance and deteriorate the structure of the device. Furthermore, designing and implementing effective countermeasures for nonlinearity can increase the cost and complexity of the device.

[0029] One way in which loudspeaker nonlinearity degrades performance is through a degradation in audio quality. Generally, nonlinearity causes more audio distortion when the amplitude of the audio signal increases and the frequency of the audio signal decreases. Thus, audio signals that are set at a relatively high volume (e.g., large amplitude) and contain a relatively large amount of energy in low frequencies (e.g., the low frequency range) experience more distortion at a loudspeaker device than audio signals that are set at a relatively low volume (e.g., smaller amplitude) and contain a relatively small amount of energy in low frequencies. As used above and hereinafter, the terms "amplitude," "magnitude," and "voltage" of an audio signal can be used interchangeably.

[0030] Some loudspeaker devices attempt to mitigate the effects of audio distortion by applying a high-pass filter to remove low frequencies from the audio signal. However, many use cases (e.g., music) contain audio signals that intentionally have a large amount of energy in low frequencies. Thus, removing low frequencies to remove distortion still degrades audio quality because the filtering fundamentally changes the desired sound of the signal. Furthermore, removing low frequencies does not address audio distortion that is in response to large signal amplitudes and is not in the low frequency region.

[0031] Another way in which loudspeaker nonlinearity degrades performance is through mechanical degradation. Loudspeakers are designed to produce sound by vibrating a diaphragm back and forth around a set "zero" position. In some examples, the loudspeaker diaphragm is referred to as a cone. Loudspeakers are also designed with a maximum excursion value, which refers to the distance the diaphragm moves away from the zero position when vibrating. Generally, if the diaphragm does not vibrate beyond the maximum excursion value, then the loudspeaker device can meet its expected product lifetime. However, in some examples, due to nonlinearity, the diaphragm vibrates farther than the loudspeaker device is specified to, and thus beyond the maximum excursion value. As a result, the mechanical properties of the loudspeaker degrade over time due to nonlinearity.

[0032] DC shift refers to a condition in which the drive system within a loudspeaker device loses control of the moving mass causing the vibrations due to mechanical stress from the loudspeaker diaphragm repeatedly exceeding the maximum excursion value. As a result, the diaphragm of the loudspeaker no longer vibrates around the zero position. Instead, the vibrations of the loudspeaker are centered around some other position away from the zero position. DC shift further degrades the structure of the loudspeaker device because the loudspeaker can routinely exceed its specified maximum excursion, which reduces product lifetime.

[0033] Some high-power loudspeaker devices (e.g., loudspeakers rated for use at ten watts or more) reduce DC shift by implementing a pre-distortion filter to change the shape of an audio signal before the audio signal is played at the high-power loudspeaker device. The pre-distortion filter is responsive to a model of the loudspeaker device that predicts the amount the loudspeaker diaphragm moves at various frequencies. In high-power loudspeaker devices, the model prediction generally correlates well with actual diaphragm movement measured at the loudspeaker. However, the amount of nonlinear behavior exhibited by the loudspeaker is highly dependent on the mechanical structure of the loudspeaker and the surrounding environment. As used above and herein, the terms "loudspeaker device" and "loudspeaker" can be used interchangeably.

[0034] As used above and herein, low-power loudspeaker devices include, but are not limited to, loudspeaker devices rated for use at three watts of power or less. There are several differences in mechanical structure between high-power loudspeaker devices and low-power loudspeaker devices. For example, high-power loudspeakers generally encompass a larger volume (e.g., three-dimensional space) than low-power loudspeaker devices. The larger volume can support larger loudspeaker components, such as magnets, voice coils, etc. However, low-power loudspeaker devices encompass a smaller volume and thus have smaller components. In some examples, due to the difference in three-dimensional space, low-power loudspeaker devices implement a different architecture with different types of components than high-power loudspeakers. High-power loudspeakers also support diaphragms that vibrate a greater distance than small diaphragm loudspeakers. Furthermore, high-power loudspeakers generally have separate assemblies for their spider and suspension components, while similar components in low-power loudspeaker devices are generally glued to the voice coil.

[0035] High power speaker devices and low power speaker devices also have different surrounding environments. High power speaker devices can be implemented in vehicles, radios, as standalone devices at concert venues, etc. Thus, high power speaker devices typically have speaker grills that face directly out into the open air. In contrast, low power speaker devices can be implemented as internal components within mobile computing devices (e.g., smartphones, tablet computers, laptop computers, etc.). Thus, the sound produced by low power speaker devices typically travels through a port before reaching the open air, reflecting off other components of the mobile device along the way.

[0036] Due to the aforementioned mechanical and environmental differences, low power speaker devices typically exhibit more nonlinear behavior than high power speaker devices. These differences also cause designers to implement high power speaker devices with transistors that typically have greater headroom voltage and greater flexibility to pre-distort the audio signal compared to low power devices. Thus, techniques for modeling diaphragm excursion in high power speakers cannot be used to accurately model diaphragm excursion in low power speaker devices. Thus, the aforementioned pre-distortion filters do not improve performance in low power speaker devices.

[0037] The example methods, apparatus, and systems described herein reduce the effects of speaker device nonlinearity and enhance bass frequencies in low power speaker devices. An example modeling circuitry creates a speaker device nonlinearity model by measuring actual diaphragm excursion values when a speaker is implemented in a particular environment (e.g., within a particular model of a mobile device). Within a separate instance of the same mobile device, an example audio amplifier circuitry stores coefficients that form the speaker device nonlinearity model in a memory. The audio amplifier circuitry also includes an example resonant frequency tracker that determines the resonant frequency of the low power speaker device, e.g., substantially in real time, in response to example current sensing circuitry and example voltage sensing circuitry. Then, an example coefficient calculator circuitry uses the speaker device nonlinearity model and a version of the input signal centered at the current speaker device resonant frequency to determine equalization coefficients. An example equalizer circuitry uses the equalization coefficients to shape the audio signal such that, after the signal is amplified and provided to the low power speaker device, the amplitude of bass frequencies is increased, the diaphragm vibrations remain centered at the intended zero position, and the movement of the diaphragm remains at or below the maximum excursion value at all frequencies.

[0038] As used above and here, "substantially in real time" refers to processing of the input signal that occurs in a near-immediate manner, recognizing that there can be real-world delays in computation time, transmission, etc. Thus, "substantially in real time" refers to immediate signal processing + / - 1 second, unless otherwise specified.

[0039] Figure 1is a block diagram of an example environment that includes modeling circuitry and mobile devices. Figure 1 includes example mobile devices 102A and 102B, example modeling circuitry 106, and example nonlinear models 108. Mobile device 102A includes example main control circuitry 112A, example audio amplifier circuitry 116A, and example low-power speaker device 110A. Similarly, mobile device 102B includes example main control circuitry 112B that implements example software application 114, example audio amplifier circuitry 116B that stores nonlinear models 108, and example low-power speaker device 110B.

[0040] In examples described herein, mobile devices 102A and 102B are two different instances of the same product. Thus, the two mobile devices 102 have the same physical components, dimensions, weight, and mechanical structure.

[0041] Mobile device 102A can be a preliminary version of a device that is not available to the general public. Thus, audio amplifier circuitry 116A does not store a copy of nonlinear models 108. Instead, modeling circuitry 106 generates nonlinear models 108 by measuring at least one of a parameter, signal, or value provided by, related to, or representative of components of mobile device 102A. As used above and here, nonlinear models 108 refer to data that represents how an expected performance of low-power speaker device 110 differs from its actual performance due to nonlinearity. In conjunction with Figure 10 Modeling circuitry 106 is further described. In some examples, nonlinear models 108 are referred to as speaker device nonlinear models.

[0042] In contrast to mobile device 102A, mobile device 102B can be a finished product that is available for purchase by consumers. Main control circuitry 112B coordinates the operation of other components within mobile device 102B. For example, main control circuitry 112B executes an operating system, determines which visual objects are presented on a display, instructs camera circuitry within the mobile device to take a photograph, instructs interface circuitry within the mobile device to exchange data via a network, and so on. Main control circuitry 112B can be implemented using any type of programmable circuitry. Examples of programmable circuitry include, but are not limited to, programmable microprocessors, field programmable gate arrays (FPGAs) that can instantiate instructions, central processing unit (CPU), graphics processing unit (GPU), digital signal processor (DSP), XPU, or microcontrollers and integrated circuits such as application specific integrated circuits (ASICs).

[0043] Mobile device 102B also executes software application 114. Software application 114 refers to any type of machine-readable instruction or operation that generates an audio signal when executed by the main control circuit system 112B. The audio signal can be any type of audio, including but not limited to music, podcasts, videos, etc.

[0044] Audio amplifier circuitry 116B receives an audio signal from software application 114. Then, audio amplifier circuitry 116B uses a copy of the nonlinear model 108 programmed into audio amplifier circuitry 116B during the manufacture of mobile device 102B to adjust one or more properties of the audio signal. Audio amplifier circuitry 116B provides the adjusted audio signal to low-power speaker device 110B. Subsequently, the diaphragm of low-power speaker device 110B vibrates in response to the adjusted audio signal to generate sound.

[0045] In some examples, the audio amplifier circuit system 116B is implemented on a standalone integrated circuit (IC). In other examples, the audio amplifier circuit system 116B is implemented as part of a system-on-a-chip (SoC) with other components. Figure 2 The audio amplifier circuit system 116B is further described.

[0046] It is worth noting that the nonlinear model 108 enables the audio amplifier circuitry 116B to adjust the signal in such a way as to: a) enhance bass frequencies and b) keep the diaphragm movement below the maximum offset value across all frequencies. Therefore, the movement device 102B exhibits less nonlinear behavior, produces higher quality audio, and is more mechanically durable than movement devices combined with other low-power speaker units.

[0047] Figure 2 yes Figure 1 A block diagram of an example audio amplifier circuit system 116B is provided. The audio amplifier circuit system 116B includes an example equalizer circuit system 202, an example amplifier circuit system 204, an example measurement circuit system 206, example ADC circuit systems 208 and 210, and an example control circuit system 212. The control circuit system 212 includes an example resonant frequency (F0) tracker circuit system 216, an example filter bank circuit system 218, and an example coefficient calculator circuit system 220. The coefficient calculator circuit system 220 stores a nonlinear model 108.

[0048] The equalizer circuitry 202 adjusts the input audio signals it receives from the software application 114 to, for example, equalize the received audio signals. To adjust the signals, for example, the equalizer circuitry 202 applies a filter that attenuates low frequency signal components, amplifies components up to the Nyquist frequency, and reduces the magnitude of higher frequencies. In some examples, such adjustments are referred to as equalizing the signals. The equalizer circuitry 202 makes the adjustment operations in response to equalization (EQ) coefficients set by the control circuitry 212. In conjunction with Figure 6 The equalizer circuitry 202 is further described. In some examples, the equalizer circuitry 202 can be referred to as continuous time linear equalization (CTLE) circuitry.

[0049] The equalizer circuitry 202 includes an output coupled to an input of the amplifier circuitry 204. The amplifier circuitry 204 amplifies the equalized signals by increasing the amplitude of the signals. The ratio between the amplitude of the signals at the output of the amplifier circuitry 204 and the amplitude of the signals at the input of the amplifier circuitry 204 is referred to as the gain of the amplifier circuitry 204. In some examples, the amplifier circuitry 204 can support any gain within a continuous range of values (or within a set of discrete values). In such examples, the particular gain value used by the amplifier circuitry 204 can be selected by the control circuitry 212 or an external component of the audio amplifier circuitry 116B.

[0050] The amplifier circuitry 204 includes an output coupled to the low power speaker device 110B, enabling the low power speaker device 110B to produce sound in response to an amplified version of the adjusted audio signals. The output of the amplifier circuitry is also coupled to the measurement circuitry 206. In examples, the measurement circuitry 204 produces both a V SENSE signal representing the voltage of the output audio signal and an I SENSE signal representing the current of the audio exit signal. In other examples, the measurement circuitry 206 produces either the V SENSE signal or the I SENSE signal. The measurement circuitry 204 can include any suitable components and use any suitable techniques to produce the V SENSE signal and the I SENSE signal. In some examples, the measurement circuitry 204 is referred to as IV sense circuitry. In some examples, the control circuitry 212 is instantiated by programmable circuitry that executes amplifier instructions to perform operations represented by one or more flowcharts, such as the operations represented by Figure 7 and 13

[0051] The ADC circuitry 208 and 210 respectively convert the V​SENSE signal and I SENSE The signal is converted from an analog signal to a digital value. Both the incoming analog signal and the outgoing digital value represent the voltage and current, respectively, of the output audio signal. In some examples, the digital value is referred to as V SENSE (s) data and I SENSE (s) data, as described in connection with Figure 3 As further described, the voltage and current measurements change as a function of frequency.

[0052] Within the control circuitry 212, the F0 tracker circuitry 216 determines the resonant frequency of the low-power speaker device 110B, e.g., substantially in real-time, in response to the output audio signal. The value of the speaker device resonant frequency can change at any time due to any number of factors. Such factors include, but are not limited to, changes in the temperature of the surrounding environment when the low-power speaker device 110B produces sound or the mobile device 102B performs other operations, changes in the mass of the diaphragm as it wears or dust accumulates on it, etc. Tracking the F0 increases the accuracy of the audio amplifier circuitry 116B because the movement of the speaker diaphragm changes in response to changes in the value of the F0. As described in connection with Figure 3 The F0 tracker circuitry 216 is further described. In some examples, the F0 tracker circuitry 216 is instantiated by programmable circuitry that executes F0 tracker instructions to perform operations represented by one or more flowcharts, e.g., by Figure 7 and 13 operations represented by one or more flowcharts.

[0053] The F0 tracker circuitry 216 provides the speaker device resonant frequency, e.g., substantially in real-time, to the filter bank circuitry 218. The filter bank circuitry 218 filters a copy of the incoming audio signal to produce an audio version centered at the current resonant frequency. As described in connection with Figure 4 The filter bank circuitry 218 is further described. In some examples, the filter bank circuitry 218 is instantiated by programmable circuitry that executes filter bank instructions to perform operations represented by one or more flowcharts, e.g., by Figure 7 and 13 As used above and here, tracking a parameter (e.g., F0, current, or voltage) means updating the parameter substantially in real-time.

[0054] In this example, the coefficient calculator circuitry 220 uses: a) a centered version of the audio signal, b) the current resonant frequency value, and c) the nonlinear model 108 to generate equalization coefficients that take into account the nonlinearities within the low-power speaker device 110. For example, the coefficient calculator circuitry 220 can generate coefficients that, when used by the equalizer circuitry 202, reduce the amplitude of the incoming audio at a specific frequency. If the low-power speaker device 110B is to play an audio signal adjusted using equalization coefficients from different techniques, the diaphragm will exceed the maximum offset value at that specific frequency. As described above, such diaphragm movement will result in DC displacement and deterioration of product lifespan. Conversely, the low-power speaker device 110B plays audio adjusted using equalization coefficients from the control circuitry 212, and the diaphragm of the low-power speaker device 110B remains below the maximum offset value at all frequencies. In other examples, the coefficient calculator circuitry 220 uses one or a combination of two of the following to generate equalization coefficients: a) a centered version of the audio signal, b) the current resonant frequency value, and c) the nonlinear model 108. Figure 5 The coefficient calculator circuit system 220 is further described. In some examples, the coefficient calculator circuit system 220 is instantiated by a programmable circuit system that executes coefficient calculator instructions to perform, for example, by... Figure 7 and 13 An operation represented by one or more flowcharts.

[0055] In the examples described herein, the control circuitry 212 is implemented as a digital signal processor (DSP), a type of programmable circuitry that uses the nonlinear model 108 and other data stored in memory to execute machine-readable instructions. In other examples, the control circuitry 212 is implemented as a different type of programmable circuitry that uses logic hardware components instead of memory. In such other examples, the logic hardware of the audio amplifier circuitry is designed and implemented in a manner that still allows the control circuitry 212 to utilize the nonlinear model as described herein.

[0056] More generally, Figure 2 The control circuit system 212 can be instantiated (e.g., created, generated, implemented, etc. within any time period) by a programmable circuit system, such as a central processing unit (CPU) that executes the first instruction. Alternatively, Figure 2 The control circuitry system can be instantiated (e.g., instantiated, generated, implemented, etc., over any time period) by (i) an application-specific integrated circuit (ASIC) or (ii) a field-programmable gate array (FPGA) that is constructed or configured to perform operations corresponding to the first instruction in response to the execution of the second instruction. Therefore, Figure 2Some or all of the circuitry of the Figure 2 Some or all of the circuitry of the Figure 2 Some or all of the circuitry of the

[0057] Figure 3 is Figure 2 A block diagram of an example of F0 tracker circuitry 216 of the

[0058] Impedance calculator circuitry 302 uses V SENSE (s) data provided by ADC circuitry 208 and I SENSE (s) data provided by ADC circuitry 210 to determine a substantially real-time impedance of low-power speaker device 110 (which is referred to herein as Z(s)). To do so, impedance calculator circuitry 302 implements Equation 1:

[0059]

[0060] In Equation (1), (s) refers to the complex frequency domain, R e refers to the DC impedance of the voice coil of low-power speaker device 110B, and Z BEMF (s) refers to the impedance of the back electromotive force (BEMF) against changes in the induced current. When the audio signal operates at a DC voltage without frequency components, then Z BEMF (s) = 0, and the impedance of the speaker is equal to its impedance R e When the audio signal instead has non-zero frequency components, the value of Z BEMF (s) changes in response to the frequencies. To account for this changing value of Z BEMF (s), general impedance form 304 enables F0 tracker circuitry 216 to model the substantially real-time impedance as a second-order system with a bandpass filter. In particular, general impedance form 304 refers to Equations (2) through (6):

[0061]

[0062] where

[0063] a = R e (3)

[0064]

[0065] As used above, Bl from equation (4) refers to the force factor of the low-power speaker device 110B, and M ms from equations (5) and (6) refers to the mechanical mass of the speaker. Further, Q ms from equation (5) refers to the mechanical damping of the speaker, R ms from equations (5) and (6) refers to the mechanical compliance of the speaker, and C ms from equations (5) and (6) refers to the mechanical compliance of the speaker. In some examples, the parameters in equations (2) through (6) are referred to as Thiele / Small parameters. The general impedance form 304 can additionally or alternatively be referred to as a template impedance form.

[0066] The filter adaptor circuitry 306 applies a least mean squares adaptive filter to compare the general impedance form 304 to the results of the impedance calculator circuitry 302. To do so, the filter adaptor circuitry 306 estimates which values of k, b, and c from equations (4) through (6) best fit into equation (2), assuming that R e is constant, and that Z(s) is provided by the impedance calculator circuitry 302 using equation (1).

[0067] After determining the values of k, b, and c, the parameter extractor circuitry 308 extracts a value of F0from one or more of equations (5) or (6). For example, the parameter extractor circuitry 308 can determine F0by taking the square root of c to solve equation (6).

[0068] Notably, the filter adaptor circuitry 306 continuously re-solves equation (2) (or periodically re-solves equation (2) at regular intervals) to capture changes in I SENSE (s) and V SENSE (s) data that can occur at any time. Thus, the F0tracker circuitry 216 continuously tracks the resonant frequency of the low-power speaker device 110B as the value changes over time due to environmental conditions.

[0069] Figure 4 is Figure 2 a block diagram of an example of filter bank circuitry 218. The filter bank circuitry 218 includes example bandpass filters (BPFs) 402-1, 402-2, and 402-3 (collectively, BPFs 402), an example multiplexer 404, and an example filter applicator circuitry 406.

[0070] A BPF 402 refers to a signal defined by a minimum frequency value, a maximum frequency value, and a center frequency value equidistant between the two. When one of the BPFs 402 is applied to an input signal, the amplitude of the input signal is reduced to zero (e.g., cut-off) anywhere the frequency is outside the frequency band [minimum frequency, maximum frequency]. However, the input signal remains unchanged anywhere its frequency is within the aforementioned frequency band.

[0071] The frequency band lengths defined by the respective BPFs 402 are equal, but centered at different frequencies. In Figure 4 BPF 402-1 has a center frequency value F E which, in this document, refers to the original estimate of the resonant frequency of the low-power speaker device 110B. BPF 402-2 has a frequency value (F E + K), and BPF 402-3 has a frequency value (F E - K), where As an example, if F E = 750 Hz, then K = 350 Hz, BPF 402-1 is centered at 750 Hz, BPF 402-2 is centered at 1125 Hz, and BPF 402-3 is centered at 375 Hz.

[0072] In some examples, the filter bank circuitry 218 includes a different number or different types of filters than the three BPFs 402 shown in Figure 4 Similarly, in some examples, the filter bank circuitry 218 implements different K values to offset the various filters from one another. In some examples, F E is programmed into the audio amplifier circuitry 116B during design or manufacture of the mobile device 102B.

[0073] The multiplexer 404 includes one input for each of the BPFs 402. The multiplexer 404 also includes a control terminal coupled to the F0 tracker circuitry 216 and an output coupled to the filter applicator circuitry 406. The multiplexer 404 selects one of the BPFs 402 to pass to the filter applicator circuitry 406. The multiplexer 404 selects in response to the determined speaker device resonant frequency provided at the control terminal. In particular, the multiplexer 404 selects the BPF whose center frequency is closest to the current value of F0. Thus, the multiplexer 404 can select a different one of the BPFs 402 in response to a changed value of F0.

[0074] The filter applicator circuit system 406 applies a selected BPF to the incoming audio signal it receives from the software application 114. Therefore, the audio signal provided to the coefficient calculator circuit system 220 remains centered at F0 in the frequency domain, even if F0 changes due to environmental conditions. The filter applicator circuit system 406 can use any suitable technique (e.g., convolution) to apply the selected BPF to the incoming audio signal. The filter applicator circuit system 406 applies the BPF so that the coefficient calculator circuit system 220 generates equalization coefficients specifically designed to mitigate nonlinearity around F0 (as opposed to other frequencies). Figure 6 As described, the audio amplifier circuit system 116B uses different sets of equalization coefficients to mitigate nonlinearity corresponding to other frequencies.

[0075] Figure 5 yes Figure 2 A block diagram of an example coefficient calculator circuit system 220. The coefficient calculator circuit system 220 includes a nonlinear model 108, an example peak detector circuit system 502, an example maximum value recognizer circuit system 504, an example gain determiner circuit system 506, and an example coefficient generator circuit system 508.

[0076] Peak detector circuitry 502 receives audio centered at F0 from filter bank circuitry 218. Peak detector circuitry 502 detects peak values ​​within the filtered audio signal. As used above and herein, a peak value in a signal refers to the voltage at a local maximum value within the signal. Peak detector circuitry 502 detects peak voltages in the audio signal at frequencies surrounding F0 (e.g., frequencies transmitted by filter bank circuitry 218).

[0077] The maximum value recognizer circuit system 504 receives the audio signal centered at F0 from the filter bank circuit system 218. The maximum value recognizer circuit system 504 also receives the value of F0 from the F0 tracker circuit system 216. The maximum value recognizer circuit system 504 applies a nonlinear model 108 to the audio signal to receive the maximum voltage (which may be referred to herein as V). MAX As used above and here, V MAX This refers to the voltage applied to the low-power speaker device 110B that causes the diaphragm of the low-power speaker device 110B to move to its maximum offset value. Because the relationship between voltage and diaphragm movement is a function of frequency, the maximum value recognition circuit system 504 identifies different frequencies of V within the audio signal. MAX Different values.

[0078] Gain determiner circuit system 506 determines the gain of equalizer circuit system 202 across frequencies around F0 (and is referred to herein as G). EQ V PEAK(V OUT peak in the input audio voltage) and V OUT max in the outgoing audio signal) is provided in equation (7):

[0079] V PEAK max = (V EQ peak * G AMP ) (7)

[0080] In equation (7), G EQ refers to the gain of the equalizer circuitry 202, and G AMP refers to the gain of the amplifier circuitry 204. Notably, G EQ varies in response to the frequency of the audio signal, but G AMP remains constant across all frequencies. Thus, the gain determiner circuitry 506 uses equations (8) and (9) to determine different G EQ values for different frequencies around F0:

[0081] G EQ = 1 if V PEAK (G AMP ) < V MAX (8)

[0082] G EQ = (V MAX / G AMP ) if V PEAK (G AMP ) > V MAX (9)

[0083] Equation (8) indicates that if the product of the peak amplitude from the original input audio signal and the constant gain of the amplifier circuitry 204 is less than or equal to the maximum voltage determined by the maximum value identifier circuitry 504, then no attenuation from the equalizer circuitry 202 is needed because the output audio signal V PEAK (G AMP ) does not cause the diaphragm to exceed the maximum excursion value. Thus, in such examples, the gain determiner circuitry 506 sets G EQ = 1.

[0084] In contrast, equation (9) indicates that if the product of the peak amplitude from the original input audio signal and the constant gain of the amplifier circuitry 204 is greater than the maximum voltage determined by the maximum value identifier circuitry 504, then attenuation from the equalizer circuitry 202 is needed because the voltage V PEAK (G AMP ) will cause the diaphragm to exceed the maximum excursion value. Thus, the gain determiner circuitry 506 sets G EQ = (VMAX / G AMP This reduces the output voltage applied to the low-power speaker device 110B to V. MAX .

[0085] The coefficient generator circuit system 508 determines the equalization coefficients to control the equalizer circuit system 202 to apply various G values ​​across the frequencies within the audio signal. EQ Value. The technique used to find the equalization coefficient can be adapted to the structural topology used to implement the equalizer circuit system 202.

[0086] Figure 6 yes Figure 2 A block diagram of an example equalizer circuit system 202. The equalizer circuit system 202 includes an example nonlinear compensation (NLC) circuit system 602, an example bass enhancement circuit system 604, and an example bass equalization coefficient 606.

[0087] The NLC circuit system 602 includes a first input that receives an unadjusted copy of the input audio signal from the software application 114. The NLC circuit system 602 also includes a second input and output coupled to the coefficient calculator circuit system 220. Using equalization coefficients provided at the second input, the NLC circuit system 602 applies various G-type equalization coefficients in response to the substantially real-time frequency of the audio signal. EQ One of the values. Therefore, the NLC circuit system 602 performs real-time attenuation to account for the nonlinearity around F0 and prevents the diaphragm from vibrating beyond the maximum offset value.

[0088] In some examples, software application 114 attempts to prevent diaphragm vibration from exceeding the maximum offset value by scaling down the amplitude of the audio signal across all frequencies. In such examples, scaling down successfully prevents the speaker diaphragm from vibrating beyond the maximum offset value at frequencies around F0. However, such operation also scales down bass frequencies to an amplitude significantly below the maximum offset value, thereby reducing audio quality when the low-power speaker device 110B plays bass frequencies. Figure 9B The aforementioned scaling-down operation will be described further.

[0089] The NLC circuit system 602 alters the shape of the audio signal by reducing the signal amplitude at frequencies around F0. Therefore, in some examples, the output of the NLC circuit system 602 still contains unwanted signal attenuation at the bass frequencies as described above. To correct this, the output of the NLC circuit system 602 is coupled to a first input of the bass enhancement circuit system 604. The bass enhancement circuit system 604 also includes a second input receiving the bass equalization coefficient 606 and an output coupled to the amplifier circuit system 204.

[0090] The bass boost circuitry 604 corrects for the unwanted bass attenuation by using bass equalization coefficients 606 to increase the amplitude closer to the bass frequencies of V MAX . Thus, the final audio signal provided to the low-power speaker device 110B prevents the diaphragm from vibrating beyond the maximum excursion value at all frequencies, and also improves the audio quality of the signal at bass frequencies.

[0091] In some examples, the output of the coefficient calculator circuitry 220 is referred to as a first equalization coefficient, and the bass equalization coefficients 606 are referred to as second equalization coefficients. In some examples, the bass equalization coefficients 606 are programmed into the equalizer circuitry 202 during manufacturing of the mobile device 102B.

[0092] Figure 7 is a flowchart of example machine-readable instructions or example operations 700 that represent at least one of can be executed, instantiated, or ongoing by one or more components in the audio amplifier circuitry 116B, including the programmable circuitry, to adjust the audio signal. The machine-readable instructions or operations 700 begin when the F0 tracker circuitry 216 determines the resonant frequency (F0) of the speaker. (Block 702). In the examples described above and here, the speaker of block 702 is the low-power speaker device 110B. The F0 tracker circuitry 216 determines the F0 by comparing the current impedance of the low-power speaker device 110B to a general impedance form as described above in connection with Figure 3 . The F0 tracker circuitry 216 uses the V SENSE (s) data and I SENSE (s) data generated by the measurement circuitry 206, the ADC circuitry 208, and the ADC circuitry 210 to determine the current impedance value.

[0093] The filter applicator circuitry 406 within the filter bank circuitry 218 applies a bandpass filter centered at F0 to the audio signal. (Block 704). The audio signal of block 704 refers to the unadjusted input audio signal provided by the software application 114. As further described in connection with Figure 3 , the multiplexer 404 determines which filter to use at block 704 by selecting one of the BPFs 402 in response to the F0 value provided at block 702.

[0094] The maximum voltage identifier circuitry 504 within the coefficient calculator circuitry 220 determines the maximum voltage (V MAX ) of the filtered portion of the audio signal. (Block 706). As used above and here, the filtered portion of the audio signal refers to the output of the bandpass filter applied at block 704 (e.g., the portion of the signal with the F0 additional frequencies). To determine V MAX, the maximum identifier circuitry 504 applies the non-linear model 108 to the current frequency of the audio signal to determine what voltage controls the diaphragm of the loudspeaker to vibrate at the maximum excursion value when applied to the low-power loudspeaker device 110B at the current frequency.

[0095] The gain determiner circuitry 506 determines whether the magnitude of the peak voltage (V PEAK ) in the filtered portion of the audio signal at the corresponding frequency is greater than V MAX . (Block 708). The corresponding frequency of block 708 refers to the frequency at which the peak detector circuitry 502 identified V PEAK . Thus, the frequency of block 708 can be any frequency that remains after applying the bandpass filter.

[0096] If the magnitude of V PEAK at the corresponding frequency is greater than V MAX (Yes at block 708), then the audio signal needs to be attenuated at the corresponding frequency. Thus, in such examples, the gain determiner circuitry 506 sets the equalizer gain (G EQ ) equal to (V MAX / G AMP ), as described above in equation (9). (Block 710).

[0097] Alternatively, if the magnitude of V PEAK at the corresponding frequency is less than or equal to V MAX (No at block 708), then the audio signal does not need to be attenuated at the corresponding frequency. Thus, in such examples, the gain determiner circuitry 506 sets the equalizer gain (G EQ ) equal to 1, as described above in equation (8). (Block 712).

[0098] The coefficient generator circuitry 508 generates first equalization coefficient values that implement the G EQ values from blocks 710 and 712. (Block 714). Next, the NLC circuitry 602 within the equalizer circuitry 202 uses the first equalization coefficients to attenuate the filtered portion of the audio signal. (Block 716). To do so, the NLC circuitry 602 receives an unadjusted version of the audio signal from the software application 114, identifies which portions of the signal need to be attenuated in response to the first equalization coefficients, and decreases the magnitude of the signal accordingly. The NLC circuitry 602 identifies only frequencies near F0 for attenuation at block 716 because the first equalization coefficients are determined in response to the bandpass filter applied at block 704.

[0099] The bass boost circuitry 604 within the equalizer circuitry 202 uses second equalizer coefficients to increase the magnitude of bass frequencies in the audio signal. (Block 718). The second equalizer coefficients of block 718 refer toFigure 6 The bass equalization coefficient 606 of the low-pass filter 604. After increasing the bass, the bass enhancement circuitry 604 provides the audio to the amplifier circuitry 204, which applies a gain G AMP and provides the resulting signal to the low-power speaker device 110B.

[0100] The audio amplifier circuitry 116B determines whether to continue with the equalization operation. (Block 720). The audio amplifier circuitry 116B performs the equalization operation whenever the software application 114 provides an audio signal. The software application 114 can stop providing an audio signal at any time and for any reason (e.g., a song ends). If the audio amplifier circuitry 116B continues with the equalization operation (Block 720: YES), then control returns to Block 702, where the F0 tracker circuitry 216 updates the current F0 value of the low-power speaker device 110B. Alternatively, if the audio amplifier circuitry 116B does not continue with the equalization operation (Block 720: NO), then the machine-readable instructions or operations 700 end.

[0101] Figure 7 The example flowchart presents the machine-readable instructions or operations 700 as a serial set of operations (Blocks 702-718), which loops back and repeats at Block 720. In other examples, the machine-readable instructions or operations 700 continuously perform one or more of Blocks 702-718 to implement a pipeline of operations. Collectively, the machine-readable instructions or operations 700 prevent the diaphragm from vibrating beyond the maximum excursion value at all frequencies, and also improve the audio quality of the signal in the bass frequencies.

[0102] Figure 8A and 8B is a first example graph comparing the performance of the audio amplifier circuitry of the low-power speaker device 110B to other audio amplifiers. Figure 1 is a first example graph comparing the performance of the audio amplifier circuitry of the low-power speaker device 110B to other audio amplifiers. Figure 8A An example graph 802 is shown representing the speaker voltage provided by an audio amplifier circuit that does not track F0 or implement the nonlinear model 108. The graph 802 shows that because the circuit adjusts the audio signal without considering the nonlinear behavior of the speaker device, the speaker voltage has a relatively large amount of total harmonic distortion and noise (THD+N) of 11.14%. The graph 802 also shows that the THD+N also causes visual distortions in the speaker voltage (e.g., at local maxima and minima of the signal), which correspond to a decrease in audio quality.

[0103] In contrast, Figure 8BAn example graph 804 representing the speaker voltage provided by the audio amplifier circuitry 116B described in the examples herein is shown. The audio amplifier circuitry 116B does take into account the nonlinearity of the low-power speaker device 110B by tracking changes in F0, attenuating frequencies around the current value of F0 using the non-linear model 108, and boosting low frequencies. Thus, when processing the same audio signal provided to Figure 8A another amplifier circuit, the audio amplifier circuitry 116B has a relatively low THD+N of 6.60%. The graph 804 also has less visual distortion of the speaker voltage than the graph 802.

[0104] Figure 9A , 9B and 9C are second example graphs comparing the performance of the audio amplifier circuitry of Figure 1 to other audio amplifiers. Figure 9A to 9C The graphs include example graphs 902, 906, 910, and example regions 904, 908, and 912. Each of the graphs represents the performance of a low-power speaker device having a maximum excursion value of 0.4 millimeters (mm). Thus, the speaker device is designed to vibrate around 0 mm, and safely operates whenever the diaphragm is between [-0.4 mm, +0.4 mm]. If the diaphragm of the speaker moves outside of the foregoing excursion range, DC displacement accumulates and the speaker can become damaged.

[0105] The graphs 902, 906, and 910 represent three tests of three different amplifier circuits using the same input conditions. In the tests, the input to the amplifier circuits is a chirp signal whose frequency increases from 100 Hz to 300 kHz over time. Thus, the x-axes of the graphs 902, 906, and 910 represent both time and frequency. The graphs display the speaker excursion in mm on the y-axes.

[0106] Figure 9A represents the speaker excursion from a first audio amplifier circuit that does not track F0 or implement the non-linear model 108. The graph 902 shows that the first audio amplifier circuit is unable to keep the speaker excursion within the range [-0.4 mm, +0.4 mm] at any frequency, and extreme failure occurs in the region 904 (e.g., at F0 and frequencies around it). Thus, DC displacement accumulates, and the speaker coupled to the first audio amplifier circuit can become damaged.

[0107] Figure 9Brepresents the speaker excursion from a second audio amplifier circuit that does not track F0 or implement the non-linear model 108. The graph 902 shows that the second audio amplifier circuit scales the magnitude of the audio signal across all frequencies, keeping the speaker excursion within the range [-0.4 mm, +0.4 mm]. However, the second audio amplifier circuit suffers from poor audio quality because the low audio frequencies in the zone 908 are significantly below the maximum excursion value.

[0108] Figure 9C represents the speaker excursion from the audio amplifier circuitry 116B that tracks F0 and does implement the non-linear model 108. Thus, the graph 910 and the zone 912 show that the diaphragm of the low-power speaker device 110B vibrates close to but below 0.4 mm during low audio frequencies and frequencies close to F0. Thus, the audio amplifier circuitry 116B breaks the trade-off between low audio performance and DC displacement shown in Figure 9A and 9B .

[0109] Figure 10 is a block diagram of an example of the modeling circuitry 106. Figure 1 The modeling circuitry 106 includes an example control circuitry 1004, an example speaker measurement circuitry 1006, and an example non-linear analysis circuitry 1008. Figure 10 The modeling circuitry 106 includes an example control circuitry 1004, an example speaker measurement circuitry 1006, and an example non-linear analysis circuitry 1008.

[0110] The control circuitry 1004 uses the mobile device 102A to generate the non-linear model 108. The control circuitry 1004 can be implemented by any type of programmable circuitry. Within the control circuitry 1004, the speaker measurement circuitry 1006 measures the actual speaker excursion of the mobile device 102A. To do so, the speaker measurement circuitry 1006 first sends a control signal to the mobile device 102A. The control signal instructs the mobile device 102A to play a test audio that causes the diaphragm of the low-power speaker device 110A to vibrate. The speaker measurement circuitry 1006 measures the amount of diaphragm movement to receive actual speaker excursion data. In conjunction with the Figure 11C The actual speaker excursion data is further described.

[0111] In the example of Figure 10 the speaker measurement circuitry 1006 uses a laser to measure the diaphragm vibration. In other examples, the speaker measurement circuitry 1006 uses other techniques to measure the diaphragm vibration. Such techniques include, but are not limited to, positioning a microphone next to the low-power speaker device 110A, capacitive sensing, etc. Then, the non-linear analysis circuitry 1008 uses the actual speaker excursion data to create the non-linear model 108, as described in conjunction withFigure 11C and 12 are further described.

[0112] Figure 11A is an example plot of speaker profile data for the mobile device 102A of Figure 1 The example plot 1102 includes an example speaker profile 1104 as well as example data points 1106 and 1108. The plot 1102 displays frequency in hertz on the x-axis. The plot also displays excursion per volt measured in mm / V on the y-axis.

[0113] The plot 1102 illustrates that the excursion per volt for the low-power speaker device 110A changes as a function of frequency. For example, at data point 1106, the speaker profile 1104 indicates that the diaphragm moves approximately 0.07 mm in response to applying one volt to the low-power speaker device 110A at 120 Hz. At data point 1108, the speaker profile 1104 indicates that the diaphragm moves approximately 0.12 mm in response to applying one volt at F0 (which in this example equals 420 Hz). The speaker profile 1104 also indicates that the diaphragm excursion increases linearly as the voltage increases. Thus, in some examples, the speaker profile 1104 is referred to as a linear model for the low-power speaker device 110. Figure 11A

[0114] The speaker profile 1104 can be used to determine the expected voltage at different frequencies that results in the diaphragm moving a maximum excursion value at the frequency. For example, using 0.4 mm as the maximum excursion value results in equations (10) through (12):

[0115]

[0116] As used above and hereinafter, V x refers to the voltage applied to the low-power speaker device 110A at x Hz.

[0117] Figure 11B and 11C include example plots 1110 and 1112. Each of the plots represents the performance of a low-power speaker device with a maximum excursion value of 0.4 millimeters (mm). Thus, the speaker device is designed to vibrate around 0 mm and safely operate whenever the diaphragm is between [-0.4 mm, +0.4 mm]. If the diaphragm of the speaker moves outside of the aforementioned excursion range, DC displacement accumulates and the speaker can be damaged.

[0118] ​Plots 1110 and 1112 represent two tests in which the input to the amplifier circuit was a chirp signal whose frequency increased from 100 Hz to 300 kHz over time. Thus, the x-axes of plots 1110 and 1112 represent both time and frequency. The plots display the speaker excursion in mm on the y-axes.

[0119] Figure 11B Plots 1110 and 1112 show the expected amount of speaker excursion that occurs in response to speaker profile 1104. Notably, Figure 11B The expected speaker excursion of 0.53 mm at F0. Thus, Figure 11B Plots 1110 and 1112 imply that an audio amplifier circuit using only speaker profile 1104 can produce high-quality audio if the appropriate voltage is applied (e.g., if plot 1110 were scaled equally across all frequencies).

[0120] Figure 11C Plots 1110 and 1112 show the output of speaker measurement circuitry 1006. Because the same chirp signal was provided to low-power speaker device 110B to generate both plots 1110 and 1112, if speaker profile 1104 were accurate, Figure 11B and 11C would match. However, due to the nonlinearity of low-power speaker device 110, there are differences in the shape of plots 1110 and 1112. For example, applying 4.46 V at F0 causes a diaphragm excursion of 0.63 mm, not the 0.53 mm expected at equation (12). More generally, Figure 11B and 11C Plots 1110 and 1112 show the excess diaphragm movement in response to the nonlinearity at all frequencies, and especially around the resonant frequency. If left unmitigated, the nonlinearity causes a DC shift that damages low-power speaker device 110.

[0121] Figure 12 is an example plot showing Figure 1 nonlinear model 108 of low-power speaker device 110. Figure 12 shows nonlinear model 108, which includes data points that relate frequency (shown in hertz on the x-axis) to the amount of expected attenuation (shown in decibels (dB) on the y-axis).

[0122] Nonlinearity analysis circuitry 1008 produces the data points by comparing the expected speaker excursion to the actual speaker excursion. For example, as described above in equation (10), the expected speaker excursion data indicates that 3.33 V at F0 causes the diaphragm to reach a maximum excursion value of 0.4 mm. However, nonlinearity analysis circuitry 1008 evaluates equations (13) and (14) to determine that only about 2.8 V at F0 causes the diaphragm to reach the maximum excursion value:

[0123]

[0124] The nonlinear analysis circuitry 1008 includes a data point <F0, -10dB> to describe 2.8 The actual maximum voltage that can be applied at F0 without damaging the diaphragm (as opposed to the expected maximum voltage of 3.3V described above). In the example of Figure 12 The gain of the amplifier circuitry 204 is 8.92. Thus, the nonlinear analysis circuitry 1008 evaluates equations (15) and (16) to determine the value -10dB:

[0125]

[0126] -20 log 10 (0.31V) ~ -10dB (16)

[0127] The nonlinear analysis circuitry 1008 performs similar analyses across the range of possible input frequencies to populate the nonlinear model 108. Thus, a given data point in the nonlinear model 108 describes how much attenuation will keep the diaphragm of the loudspeaker at or below the maximum excursion value at a given frequency. In general, Figure 12 The graph shows that the attenuation grows to its maximum at F0 (e.g., F0 has the lowest y-value), and little to no attenuation is needed at frequencies further away from F0 (e.g., the y-value is at or near 0dB). One exception to this characterization is between 20Hz and 60Hz, where the attenuation increases from approximately -30dB to approximately 0dB, as the loudspeaker device exhibits nonlinear behavior at both F0 and the bass frequencies.

[0128] Notably, the nonlinear model 108 allows the audio amplifier circuitry 116B to preserve the shape of the incoming audio signal measured in volts and change the shape of the incoming signal measured in speaker excursion. For example, assume that the audio signal generated by the software application 114 ranges between [2.0V and 4.0V] at F0. In such an example, the audio amplifier circuitry 116B uses a value of -10dB in the nonlinear model 108 to scale down all voltages at F0 by approximately 1.43 times, resulting in a range of output voltages at F0 between [1.4V, 2.8V] and keeping all membrane vibrations at or below the maximum excursion value at F0. Further assume that the audio signal generated by the software application 114 also ranges between [2.0V and 4.0V] at 200Hz. The audio amplifier circuitry 116B scales down all voltages at F0 by 1.43 times because -6Hz > -10Hz, which means that the audio signal needs less attenuation at 200Hz than at F0 to stay at or below the maximum excursion value.

[0129] Figure 13 is an example machine-readable instruction or flowchart of example operations of at least one of the execution, instantiation, or performance of an example programmable circuitry implementation of modeling circuitry that can use Figure 1 The machine-readable instruction or operations 1300 begin when the speaker measurement circuitry 1006 measures actual speaker excursion data. (Block 1302). The actual speaker excursion data records how much the membrane of a low-power speaker device moves in response to an applied voltage at a given frequency. The speaker measurement circuitry 1006 can apply any suitable technique to measure the membrane movement, including but not limited to lasers, microphones, cameras, capacitive sensing, etc.

[0130] The nonlinear analysis circuitry 1008 calculates a maximum voltage based on the actual speaker excursion. (Block 1304). For example, the nonlinear analysis circuitry 1008 can execute versions of Equations (13) and (14) described above across a range of gain values and a range of frequencies.

[0131] Nonlinear analysis circuitry 1008 determines a nonlinear model in response to a maximum voltage (box 1306). Determining the nonlinear offset data includes, but is not limited to, performing versions of equations (15) and (16) described above for the corresponding maximum voltage. More generally, nonlinear model 108 includes dB values ​​describing what voltage is required at different frequencies of the incoming audio signal to keep the diaphragm of the low-power speaker device 110 at or below the maximum offset value. For example, nonlinear model 108 enables audio amplifier circuitry 116B to adjust the input audio signal by converting the input voltage from the input audio signal to a maximum voltage below the input voltage from box 1304. It is noteworthy that if an input voltage is applied at a specific frequency, the diaphragm of the low-power speaker device 110B vibrates beyond the maximum offset value. However, if the maximum voltage at box 1304 is applied at the same frequency, the diaphragm of the low-power speaker device 110B does not vibrate beyond the maximum offset value. In some examples, the nonlinear model 108 is referred to as the large-signal model because it improves performance on signals with relatively large amplitudes (e.g., high volume). As described above, the nonlinear model 108 also improves performance around F0 and in low-frequency ranges. Machine-readable instructions or operations 1300 end after box 1306.

[0132] Figure 14 This is a block diagram of an example programmable circuit system platform 1400, which is configured to execute or instantiate... Figure 7 and 13 One or more of the example machine-readable instructions or example operations are used to implement Figure 2 Or a modeling circuit system 106 or an audio amplifier circuit system 116B. The programmable circuit system platform 1400 can be, for example, a server, personal computer, workstation, self-learning machine (e.g., neural network), or mobile device (e.g., mobile phone, smartphone, e.g., iPad). TM Tablet computers, internet devices, or other wearable devices, or any other type of computing or electronic device.

[0133] The illustrated example programmable circuit system platform 1400 includes a programmable circuit system 1412. The illustrated example programmable circuit system 1412 is hardware. For example, the programmable circuit system 1412 can be implemented by one or more integrated circuits, logic circuits, FPGAs, microprocessors, CPUs, GPUs, DSPs, or microcontrollers from any desired family or manufacturer. The programmable circuit system 1412 can be implemented by one or more semiconductor-based (e.g., silicon-based) devices. In this example, the programmable circuit system 1412 implements control circuit system 212 or control circuit system 1004.

[0134] The illustrated programmable circuit system 1412 includes local memory 1413 (e.g., cache, registers, etc.). The illustrated programmable circuit system 1412 communicates with main memories 1414 and 1416 via bus 1418, the main memories including volatile memory 1414 and non-volatile memory 1416. The volatile memory 1414 may be one or more synchronous dynamic random access memories (SDRAM) or dynamic random access memories (DRAM). Dynamic Random Access Memory Or any other type of RAM device. The non-volatile memory 1416 may be implemented by one or a combination of flash memory or any other desired type of memory device. Access to the main memories 1414, 1416 of the illustrated example is controlled by the memory controller 1417. In some examples, the memory controller 1417 may be implemented by one or more integrated circuits, logic circuits, microcontrollers, or any other type of circuit system from any desired series or manufacturer to manage the data flow to and from the main memories 1414, 1416.

[0135] The illustrated programmable circuit system platform 1400 also includes an interface circuit system 1420. The interface circuit system 1420 can be implemented in hardware according to any type of interface standard, such as an Ethernet interface, a Universal Serial Bus (USB) interface, etc. Interfaces include Near Field Communication (NFC) interfaces, Peripheral Component Interconnect (PCI) interfaces, and Peripheral Component Interconnect High Speed ​​(PCIe) interfaces.

[0136] In the illustrated example, one or more input devices 1422 are connected to the interface circuitry 1420. The input devices 1422 allow a user (e.g., a human user, a machine user, etc.) to input one or more data or commands into the programmable circuitry 1412. The input devices 1422 may be implemented using, for example, an audio sensor, microphone, camera (still or video), keyboard, buttons, mouse, touchscreen, trackpad, trackball, isotope device, or voice recognition system, or a combination thereof.

[0137] One or more output devices 1424 are also connected to the interface circuitry 1420 of the illustrated example. The one or more output devices 1424 may, for example, be implemented by one or a combination of a display device (e.g., a light emitting diode (LED), an organic light emitting diode (OLED), a liquid crystal display (LCD), a cathode ray tube (CRT) display, an in-plane switching (IPS) display, a touchscreen, etc.), a tactile output device, a printer, or a speaker. Accordingly, the interface circuitry 1420 of the illustrated example includes one or a combination of a graphics driver card, a graphics driver chip, or graphics processor circuitry such as a GPU.

[0138] The interface circuitry 1420 of the illustrated example also includes a communication device, such as one or a combination of a transmitter, a receiver, a transceiver, a modem, a residential gateway, a wireless access point, or a network interface to facilitate exchange of data with external machines (e.g., computing devices of any kind) over a network 1426. The communication can occur via an Ethernet connection, a digital subscriber line (DSL) connection, a telephone line connection, a coaxial cable system, a satellite system, a point-to-point radio system, a wide area network, a local area network, a metropolitan area network, a private network, or a public network (e.g., the Internet) and combinations thereof.

[0139] The programmable circuitry platform 1400 of the illustrated example also includes one or more mass storage drives or devices 1428 to store one or more of firmware, software, or data. Examples of such mass storage drives or devices 1428 include one or more magnetic storage devices (e.g., a floppy diskette, a drive, a HDD, etc.), optical storage devices (e.g., a Blu-ray disk, a CD, a DVD, etc.), a RAID system, or a solid state storage drive or device such as a flash memory device and an SSD.

[0140] Machine-readable instructions 1432 that can be implemented by the machine- readable instructions of Figure 7 and 13 may be stored in the mass storage device 1428, one or a combination of the volatile memory 1414, the non-volatile memory 1416, or on at least one non-transitory computer-readable storage medium (e.g., a removable CD or DVD).

[0141] Figure 15 is a block diagram of an example of the programmable circuitry 1412 of Figure 14 In this example, the programmable circuitry 1412 of Figure 14 is implemented by a microprocessor 1500. For example, the microprocessor 1500 can be a general purpose microprocessor (e.g., general purpose microprocessor circuitry). The microprocessor 1500 executes some or all of the machine-readable instructions of the flowcharts of Figure 7 and 13 to effectively cause the programmable circuitry 1412 of Figure 2The circuit system is instantiated as a logic circuit to perform operations corresponding to those machine-readable instructions. In some such examples, Figure 2 A circuit system of 10 or more is instantiated by the hardware circuitry of microprocessor 1500 in conjunction with machine-readable instructions. For example, microprocessor 1500 can be implemented by a multi-core hardware circuitry system such as a CPU, DSP, GPU, XPU, etc. While it can contain any number of example cores 1502 (e.g., one core), this example microprocessor 1500 is a multi-core semiconductor device containing N cores. The cores 1502 of microprocessor 1500 can operate independently or collaboratively to execute machine-readable instructions. For example, machine code corresponding to firmware, embedded software programs, or software programs can be executed by one of the cores 1502, or by multiple cores 1502 at the same or different times. In some examples, the machine code corresponding to firmware, embedded software programs, or software programs is split into threads and executed in parallel by two or more cores 1502. Software programs can correspond to... Figure 7 and 13 A flowchart represents part or all of machine-readable instructions or operations.

[0142] Core 1502 can communicate via a first example bus 1504. In some examples, the first bus 1504 can be implemented as a communication bus to enable communication with one or more associated devices in core 1502. For example, the first bus 1504 can be implemented via at least one of an Interconnect Integrated Circuit (I2C) bus, a Serial Peripheral Interface (SPI) bus, a PCI bus, or a PCIe bus. Alternatively, the first bus 1504 can be implemented by any other type of computing or electrical bus. Core 1502 can receive data, instructions, and signals from one or more external devices via example interface circuitry 1506. Core 1502 can output data, instructions, and signals to one or more external devices via interface circuitry 1506. While the core 1502 of this example includes example local memory 1520 (e.g., a Level 1 (L1) cache, which can be split into an L1 data cache and an L1 instruction cache), the microprocessor 1500 also includes example shared memory 1510 (e.g., a Level 2 (L2) cache) that can be shared by the cores for high-speed access to data and instructions. Data and instructions can be transferred (e.g., shared) by writing to or reading from shared memory 1510. The local memory 1520 and shared memory 1510 of each of the cores 1502 can be multi-level cache memory and main memory (e.g., Figure 14The cache is part of the memory device hierarchy (main memory 1414, 1416). Generally, higher-level memories in the hierarchy exhibit shorter access times and smaller storage capacities compared to lower-level memories. Changes to the various levels of the cache hierarchy are managed by cache coherence strategies (e.g., reconciliation).

[0143] Each core 1502 may be referred to as a CPU, DSP, GPU, or any other type of hardware circuitry. Each core 1502 includes a control unit circuitry 1514, an arithmetic and logic (AL) circuitry (sometimes referred to as an ALU) 1516, multiple registers 1518, local memory 1520, and a second example bus 1522. Other structures may exist. For example, each core 1502 may include a vector unit circuitry, a single instruction multiple data (SIMD) unit circuitry, a load / store unit (LSU) circuitry, a branch / jump unit circuitry, a floating-point unit (FPU) circuitry, etc. The control unit circuitry 1514 includes semiconductor-based circuitry configured to control (e.g., coordinate) the movement of data within the corresponding core 1502. The AL circuitry 1516 includes semiconductor-based circuitry configured to perform one or more mathematical or logical operations on the data within the corresponding core 1502. Some examples of the AL circuitry 1516 perform integer-based operations. In other examples, the AL circuitry 1516 also performs floating-point operations. In other examples, the AL circuit system 1516 may include a first AL circuit system performing integer-based operations and a second AL circuit system performing floating-point operations. In some examples, the AL circuit system 1516 may be referred to as an arithmetic logic unit (ALU).

[0144] Register 1518 is a semiconductor-based architecture used to store data and instructions, such as the results of one or more operations performed by the AL circuitry 1516 corresponding to core 1502. For example, register 1518 may contain one or more vector registers, one or more SIMD registers, one or more general-purpose registers, one or more flag registers, one or more segment registers, one or more machine-specific registers, one or more instruction pointer registers, one or more control registers, one or more debug registers, one or more memory management registers, one or more machine check registers, etc. Register 1518 can be arranged in groups, such as... Figure 15 As shown in the diagram. Alternatively, register 1518 can be organized in any other arrangement, format, or structure, for example, by distributing it throughout core 1502 to reduce access time. The second bus 1522 can be implemented by at least one of an I2C bus, an SPI bus, a PCI bus, or a PCIe bus.

[0145] Each core 1502, or more generally microprocessor 1500, can include additional or alternative structures to those shown and described above. For example, there can be one or more clock circuits, one or more power supplies, one or more power gates, one or more cache home agents (CHA), one or more convergence / common mesh stoppers (CMS), one or more shifters (e.g., one or more barrel shifters), or other circuitry. Microprocessor 1500 is a semiconductor device manufactured to include a number of transistors interconnected to implement the structures described above in one or more integrated circuits (ICs) contained in one or more packages.

[0146] Microprocessor 1500 can include or cooperate with one or more accelerators (e.g., acceleration circuitry, hardware accelerators, etc.). In some examples, an accelerator is implemented by logic circuitry to perform certain tasks more quickly and efficiently than is possible with a general-purpose processor. Examples of accelerators include ASICs and FPGAs, such as those described herein. A GPU, DSP, or other programmable device can also be an accelerator. An accelerator can be on-board microprocessor 1500, in the same chip package as microprocessor 1500, or in one or more separate packages from microprocessor 1500.

[0147] Figure 16 is Figure 14 a block diagram of another example of programmable circuitry 1412. In this example, programmable circuitry 1412 is implemented by FPGA circuitry 1600. For example, FPGA circuitry 1600 can be implemented by an FPGA. FPGA circuitry 1600 can be used, for example, to perform operations that can otherwise be performed by example microprocessor 1500 executing corresponding machine-readable instructions. However, once configured, FPGA circuitry 1600 instantiates operations and functions in hardware that correspond to machine-readable instructions, and thus can generally perform operations / functions more quickly than can be performed by operations / functions of a general-purpose microprocessor executing corresponding software. Figure 15

[0148] More specifically, in contrast to microprocessor 1500 described above that is a general-purpose device that can be programmed to execute some or all of the machine-readable instructions represented by one or more flowcharts, but whose interconnect and logic circuitry is fixed once manufactured, Figure 15 Figure 7 and 13 in contrast to microprocessor 1500 described above that is a general-purpose device that can be programmed to execute some or all of the machine-readable instructions represented by one or more flowcharts, but whose interconnect and logic circuitry is fixed once manufactured, Figure 16 FPGA circuitry 1600 of the example, in contrast, includes interconnect and logic circuitry that can be one or a combination of configured, structured, programmed, and interconnected in different ways after manufacture to instantiate, for example, operations / functions that correspond to execution of some or all of the machine-readable instructions represented by one or more flowcharts, Figure 7 and 13 ​​The FPGA circuit system 1600 represents some or all of the operations / functions of machine-readable instructions represented by one or more flowcharts. Specifically, the FPGA circuit system 1600 can be considered as an array of logic gates, interconnects, and switches. Switches can be programmed to change the way logic gates are interconnected via interconnects, thereby effectively forming one or more dedicated logic circuits (unless and until the FPGA circuit system 1600 is reprogrammed). The logic circuits are configured so that logic gates can cooperate in different ways to perform different operations on data received by the input circuit system. These operations can correspond to... Figure 7 and 13 The FPGA circuit system 1600 can be configured or constructed to effectively utilize some or all of the instructions (e.g., software or firmware) represented by one or more flowcharts. Figure 7 and 13 Some or all of the machine-readable instructions of one or more flowcharts are instantiated into at least one of a special-purpose logic circuit to perform the operations / functions corresponding to those software instructions in a special-purpose manner similar to that of an ASIC. Therefore, the FPGA circuit system 1600 can be coupled with a general-purpose microprocessor to execute operations / functions corresponding to those software instructions. Figure 7 and 13 Surgical procedures / functions can be performed faster than some or all of the machine-readable instructions.

[0149] exist Figure 16 In some examples, the FPGA circuit system 1600 is configured or constructed in response to being programmed (or reprogrammed one or more times) in response to a binary file. In some examples, the binary file may be compiled or generated in response to instructions in, for example, Lucid's Hardware Description Language (HDL), the Very High Speed ​​Integrated Circuit (VHSIC) Hardware Description Language (VHDL), or Verilog. For example, a user (e.g., a human user, a machine user, etc.) may write code or programs corresponding to one or more operations / functions in the HDL; the code / program may be translated into a low-level language as needed; and the code / program (e.g., code / program in a low-level language) may be translated into a binary file (e.g., by a compiler, software application, etc.). In some examples, Figure 16 The FPGA circuit system 1600 can access or load at least one of the binary files to control... Figure 16 The FPGA circuit system 1600 can be configured or constructed to perform at least one of one or more operations / functions. For example, a binary file can be transmitted via... Figure 16one or a combination of bitstreams (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.), or machine-readable instructions accessible to the FPGA circuitry 1600 can be implemented to configure or construct Figure 16 at least one of the FPGA circuitry 1600 or one or more portions thereof.

[0150] In some examples, the binary file is at least one of compiled, generated, converted, or otherwise output from a unified software platform for programming the FPGA. For example, the unified software platform can translate first instructions (e.g., code or programs) corresponding to one or more operations / functions in a high-level language (e.g., C, C++, Python, etc.) to second instructions corresponding to one or more operations / functions in an HDL. In some such examples, the binary file is at least one of compiled, generated, or otherwise output from the unified software platform in response to the second instructions. In some examples, Figure 16 The FPGA circuitry 1600 can at least one of access or load the binary file to control Figure 16 The FPGA circuitry 1600 is configured or constructed to at least one of perform one or more operations / functions. For example, the binary file can be implemented by the Figure 16 one or a combination of bitstreams (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.), or machine-readable instructions accessible to the FPGA circuitry 1600 can be implemented to configure or construct Figure 16 at least one of the FPGA circuitry 1600 or one or more portions thereof.

[0151] Figure 16 The FPGA circuitry 1600 includes example input / output (I / O) circuitry 1602 to at least one of receive or output data to / from at least one of example configuration circuitry 1604 or external hardware 1606. For example, the configuration circuitry 1604 can be implemented by interface circuitry that can receive a binary file that can be implemented by one or more of bitstreams, data, or machine-readable instructions to configure the FPGA circuitry 1600 or one or more portions thereof. In some such examples, the configuration circuitry 1604 can receive the binary file from one or a combination of a user, a machine (e.g., hardware circuitry (e.g., programmable or dedicated circuitry) that can implement an artificial intelligence / machine learning (AI / ML) model to generate the binary file, etc.), or any one or more combinations thereof. In some examples, the external hardware 1606 can be implemented by external hardware circuitry. For example, the external hardware 1606 can be implemented byFigure 15 microprocessor 1500 implements.

[0152] FPGA circuitry 1600 also includes an array of example logic gate circuitry 1608, a plurality of example configurable interconnects 1610, and example storage circuitry 1612. The logic gate circuitry 1608 and configurable interconnects 1610 are configurable to instantiate logic circuits that can correspond to Figure 7 and 13 at least some of the machine-readable instructions of the microprocessor 1500, or other desired operations. Figure 16 The logic gate circuitry 1608 shown in FIG. 16 is fabricated in blocks or groups. Each block includes semiconductor-based electrical structures that can be configured into logic circuits. In some examples, the electrical structures include logic gates (e.g., AND gates, OR gates, NOT gates, etc.) that provide the basic building blocks for logic circuits. Electrically controlled switches (e.g., transistors) are present within each of the logic gate circuitry 1608 to enable one or combinations of the electrical structures or logic gates to be configured to form circuits to perform desired operations / functions. The logic gate circuitry 1608 can include other electrical structures, such as look-up tables (LUTs), registers (e.g., flip-flops or latches), multiplexers, etc.

[0153] The configurable interconnects 1610 of the illustrated example are electrically conductive paths, traces, vias, etc. that can include electrically controlled switches (e.g., transistors) whose state can be changed through programming (e.g., using an HDL instruction language) to activate or deactivate one or more connections between one or more of the logic gate circuitry 1608 to program the desired logic circuits.

[0154] The storage circuitry 1612 of the illustrated example is structured to store one or more results of one or more of the operations performed by the corresponding logic gates. The storage circuitry 1612 can be implemented by registers or the like. In the illustrated example, the storage circuitry 1612 is distributed among the logic gate circuitry 1608 to facilitate access and improve execution speed.

[0155] Figure 16The example FPGA circuit system 1600 also includes an example dedicated operating circuit system 1614. In this example, the dedicated operating circuit system 1614 includes a dedicated circuit system 1616 that can be invoked to implement common functions, thus eliminating the need for field programming of those functions. Examples of such dedicated circuit systems 1616 include memory (e.g., DRAM) controller circuit systems, PCIe controller circuit systems, clock circuit systems, transceiver circuit systems, memory and multiplier-accumulator circuit systems. Other types of dedicated circuit systems may be present. In some examples, the FPGA circuit system 1600 may also include an example general-purpose programmable circuit system 1618, such as an example CPU 1620 or an example DSP 1622. Other general-purpose programmable circuit systems 1618, such as GPUs, XPUs, etc., may also be present, either additionally or alternatively.

[0156] although Figure 15 and 16 illustrate Figure 14 Two examples of programmable circuit systems 1412 are provided, but many other approaches are envisioned. For instance, an FPGA circuit system could include an onboard CPU, such as... Figure 16 One or more of the example CPUs 1620. Therefore, Figure 14 The programmable circuit system 1412 can also be achieved by at least combining Figure 15 Example microprocessor 1500 and Figure 16 The example FPGA circuit system 1600 is used for implementation. In some such hybrid examples, Figure 15 One or more cores of the 1502 can execute by Figure 7 and 13 The first part of one or more flowcharts represents the machine-readable instructions to perform one or more first operations / functions. Figure 16 The FPGA circuit system 1600 can be configured or constructed to perform corresponding operations by... Figure 7 and 13 The flowchart represents at least one of one or more second operations / functions in the second part of a machine-readable instruction, or the ASIC can be configured or constructed to perform operations corresponding to those described by the flowchart. Figure 7 and 13 The flowchart represents at least one of one or more third operations / functions in the third part of a machine-readable instruction.

[0157] therefore, Figure 2 Some or all of a circuit system of 10 can be instantiated at the same or different times. For example, Figure 15 One or more identical or different parts of the microprocessor 1500 can be programmed to execute one or more machine-readable instructions at the same or different times. In some examples,Figure 16 One or more identical or different parts of the FPGA circuit system 1600 may be configured or constructed to perform at least one of the operations / functions corresponding to one or more parts of machine-readable instructions at the same or different times.

[0158] In some examples, Figure 2 Some or all of the circuitry in a system of 10 can be instantiated, for example, in one or more threads that execute in parallel or serial order. For instance, Figure 15 The microprocessor 1500 can execute machine-readable instructions in one or more threads, either in parallel or serial execution. In some examples, Figure 16 The FPGA circuit system 1600 can be configured or constructed to operate / function in parallel or serial manner, at least one of these. Furthermore, in some examples, Figure 2 Some or all of the circuits in a 10-element system can be used. Figure 15 It is implemented within one or more virtual machines or containers and executed on a microprocessor 1500.

[0159] In some examples, Figure 14 The programmable circuit system 1412 can be housed in one or more packages. For example, Figure 15 microprocessor 1500 or Figure 16 At least one of the FPGA circuit systems 1600 can be housed in one or more packages. In some examples, the XPU can be... Figure 14 The programmable circuit system 1412 is implemented, and the programmable circuit system may be located in one or more packages. For example, the XPU may be contained within a CPU in one package (e.g., Figure 15 Microprocessor 1500, Figure 16 CPU 1620, etc.), and DSP in another package (e.g., Figure 16 DSP 1622), GPU in another package, and FPGA in yet another package (e.g., Figure 16 FPGA circuit system 1600).

[0160] Figure 17 The flowchart in the middle describes the software (e.g., Figure 14Example software distribution platform 1705 that distributes example machine- readable instructions 1432 to other hardware devices (e.g., one or more hardware devices owned or operated by a third party from an owner or operator of the software distribution platform). Example software distribution platform 1705 can be implemented by any computer server, data facility, cloud service, etc. that is capable of storing software and transferring software to other computing devices. The third party can be a customer of an entity that does at least one of owns or operates software distribution platform 1705. For example, the entity that does at least one of owns or operates software distribution platform 1705 can be a software (e.g., Figure 14 Example machine-readable instructions 1432 of at least one of a developer, vendor, or licensor of the example machine-readable instructions 1432. The third party can be a consumer, user, retailer, OEM, etc. that purchases or licenses one or a combination of the software for at least one of use, resale, or sub-licensing. In the illustrated example, software distribution platform 1705 includes one or more servers and one or more storage devices. The storage devices store machine-readable instructions 1432, which can correspond to Figure 7 and 13 Example machine-readable instructions as described above. The one or more servers of example software distribution platform 1705 are in communication with example network 1710, which can correspond to any one or more of the Internet or any of the example networks described above. In some examples, the one or more servers transfer software to a requesting party in response to a request as part of a commercial transaction. Payment for at least one of delivery, sale, or licensing of the software can be handled by the one or more servers of at least one of the software distribution platform or by a third party payment entity. The servers enable one or more purchasers or licensor to download machine-readable instructions 1432 from software distribution platform 1705. For example, the software corresponding to Figure 7 and 13 Example machine-readable instructions can be downloaded to example programmable circuitry platform 1400, which will execute machine-readable instructions 1432 to implement modeling circuitry 106 or audio amplifier circuitry 116B. In some examples, one or more servers of software distribution platform 1705 periodically do at least one of provide, transfer, or cause to update example machine-readable instructions 1432 to ensure improvements, patches, updates, etc. are distributed and applied to the software of end-user devices. Although referred to as software above, the distributed "software" can instead be firmware. Figure 14

[0161] Figure 7 and 13 one or more flowcharts representing example machine-readable instructions that can be executed by programmable circuitry to cause at least one of modeling circuitry 106 or audio amplifier circuitry 116B to perform one or more of the example operations described above. Figure 2 ​or at least one of the modeling circuitry 106 or the audio amplifier circuitry 116B of the example apparatus 10 is implemented or instantiated. The machine-readable instructions can be executable program(s) or portion(s) of executable program(s) for execution by programmable circuitry (e.g., the programmable circuitry 1412 shown in the example programmable circuitry platform 1400 described below with reference to FIG. 14) to perform the operations described. Figure 2 or at least one of the modeling circuitry 106 or the audio amplifier circuitry 116B of the example apparatus 10 is implemented or instantiated. The machine-readable instructions can be executable program(s) or portion(s) of executable program(s) for execution by programmable circuitry (e.g., the programmable circuitry 1412 shown in the example programmable circuitry platform 1400 described below with reference to FIG. 14) to perform the operations described. Figure 14 The example machine-readable instructions described above can be executable program(s) or portion(s) of executable program(s) for execution by programmable circuitry (e.g., the programmable circuitry 1412 shown in the example programmable circuitry platform 1400 described below with reference to FIG. 14) to perform the operations described. The example machine-readable instructions can be one or more functions or portion(s) of functions performed by example programmable circuitry (e.g., an FPGA) described below with reference to FIG. 16. In some examples, the machine-readable instructions cause operations, tasks, or the like to be performed in the real world in an automated manner. As used herein, “automated” means without the need for human intervention. Figure 15 The example machine-readable instructions described above can be executable program(s) or portion(s) of executable program(s) for execution by programmable circuitry (e.g., the programmable circuitry 1412 shown in the example programmable circuitry platform 1400 described below with reference to FIG. 14) to perform the operations described. The example machine-readable instructions can be one or more functions or portion(s) of functions performed by example programmable circuitry (e.g., an FPGA) described below with reference to FIG. 16. In some examples, the machine-readable instructions cause operations, tasks, or the like to be performed in the real world in an automated manner. As used herein, “automated” means without the need for human intervention.

[0162] The programs can be embodied in instructions (e.g., software or firmware) stored on one or more non-transitory computer- or machine-readable storage media, such as one or a combination of cache memory, a magnetic storage device or magnetic disks (e.g., a floppy disk, a hard disk drive (HDD), etc.), an optical storage device or disk (e.g., a Blu-ray disk, a compact disk (CD), a digital versatile disk (DVD), etc.), a solid-state drive (SSD), an SSD memory, a non-transitory memory (e.g., an electrically erasable programmable read-only memory (EEPROM), a flash memory, etc.), a volatile memory (e.g., a random access memory (RAM) of any type, etc.), or any other storage device or disk. The instructions of the non-transitory computer- or machine-readable media can be programmed into or executed by programmable circuitry located in one or more hardware devices, although the entire program or portions thereof can alternatively be executed or instantiated by one or more hardware devices other than programmable circuitry or embodied in dedicated hardware. The machine-readable instructions can be distributed across multiple hardware devices or executed by two or more hardware devices (e.g., server and client hardware devices). For example, a client hardware device can be implemented by an endpoint client hardware device (e.g., a hardware device associated with a human or machine user) or an intermediary client hardware device gateway (e.g., a radio access network (RAN)) that can facilitate communications between a server and an endpoint client hardware device. Similarly, the non-transitory computer-readable storage media can include one or more media. Furthermore, although the example programmable circuitry is described herein as including one or more processors, the example programmable circuitry can include one or more hardware processors, one or more hardware processors executing one or more software programs, or one or more hardware processors executing one or more software programs and one or more hardware processors not executing one or more software programs. In other words, the example programmable circuitry can include one or more hardware processors executing one or more software programs and / or one or more hardware processors not executing one or more software programs. Figure 7 and 13The one or more flow diagrams described in the middle describe example procedures, but many other methods of implementing example modeling circuitry 106 or audio amplifier circuitry 116B can be used instead. For example, the order of execution of the blocks of one or more of the flow diagrams can be changed, or some of the blocks described can be changed, eliminated, or combined. Also, any or all of the blocks of a flow diagram can be implemented by one or more hardware circuits (e.g., processor circuitry, discrete, integrated analog or digital circuitry, FPGAs, ASICs, comparators, operational amplifiers (op-amps), logic circuits, etc.) structured to perform the corresponding operation without executing software or firmware. Programmable circuitry can be distributed across different network locations or local to one or more hardware devices (e.g., single core processors (e.g., single core CPUs), multi-core processors (e.g., multi-core CPUs, XPU, etc.)). For example, programmable circuitry can be one or a combination of: a CPU or FPGA located in the same package (e.g., the same integrated circuit (IC) package or in two or more separate housings), one or more processors in a single machine, multiple processors distributed across multiple servers of a server rack, multiple processors distributed across multiple server racks, etc., or any combination thereof.

[0163] The machine-readable instructions described herein can be stored in one or more of a compressed format, an encrypted format, a segmented format, a compiled format, an executable format, a packaged format, etc. The machine-readable instructions described herein can be stored as data (e.g., computer-readable data, machine-readable data, one or more bits (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), a bitstream (e.g., a computer-readable bitstream, a machine-readable bitstream, etc.), etc.) or a data structure (e.g., one or more portions of instructions, code, a representation of code, etc.) that can be used to create, manufacture, or produce machine-executable instructions. For example, the machine-readable instructions can be segmented and stored on one or more storage devices, disks, or computing devices (e.g., servers) located at the same or different locations of a network or collection of networks (e.g., in the cloud, in edge devices, etc.). The machine-readable instructions can need to be installed, modified, adapted, updated, combined, supplemented, configured, decrypted, decompressed, unpacked, distributed, reassigned, compiled, etc., in order for the machine-readable instructions to be directly readable, interpretable, or executable by a computing device or another machine. For example, the machine-readable instructions can be stored in multiple portions that are individually compressed, encrypted, or stored on separate computing devices such that the portions, when decrypted, decompressed, or combined, form a set of one or more computer- or machine-executable instructions that, together, can perform one or more functions or operations of a program (e.g., a program described herein).

[0164] In another example, machine-readable instructions can be stored in a state of being readable by programmable circuitry, but require the addition of a library (e.g., a dynamic link library (DLL)), a software development kit (SDK), an application programming interface (API), etc. in order to execute the machine-readable instructions on a particular computing device or another device. In another example, machine-readable instructions can require configuration (e.g., stored settings, data input, recorded network addresses, etc.) before the machine-readable instructions or one or more corresponding programs can be executed in whole or in part. Thus, machine-readable, computer-readable, or machine-readable medium, as used herein, can include one or a combination of instructions and one or more programs in any past, present, or future format or state of being regardless of the specific format or state of the machine-readable instructions or one or more programs.

[0165] Machine-readable instructions described herein can be represented by any past, present, or future instruction language, scripting language, programming language, etc. For example, machine-readable instructions can be represented using any of the following languages: C, C++, Java, C#, Perl, Python, JavaScript, HyperText Markup Language (HTML), Structured Query Language (SQL), Swift, etc.

[0166] As mentioned above, Figure 7 and 13Example operations of the can be implemented using executable instructions stored on one or more non-transitory computer-readable or machine-readable media (e.g., computer-readable or machine-readable instructions). As used herein, the terms non-transitory computer-readable medium, non-transitory computer-readable storage medium, non-transitory machine-readable medium, and non-transitory machine-readable storage medium are expressly defined in terms of the express definition of the term computer-readable storage device or storage disk, and do not include propagating signals and do not include transmission media. Examples of such non-transitory computer-readable media, non-transitory computer-readable storage media, non-transitory machine-readable media, or non-transitory machine-readable storage media include one or more of an optical storage device, a magnetic storage device, a HDD, a flash memory, a read only memory (ROM), a CD, a DVD, a cache, any type of RAM, a register, or any other storage device or storage disk in which information is stored for any duration (e.g., for extended periods of time, permanently, for brief instances, temporarily buffered, cached, etc.). As used herein, the terms “non-transitory computer-readable storage device” and “non-transitory machine-readable storage device” are defined as including any physical (mechanical, magnetic, electro-mechanical, or electrical) hardware device in which information is stored in a persistent (i.e., not transitory) fashion, but does not include propagating signals and does not include transmission media. Examples of non-transitory computer-readable storage devices or non-transitory machine-readable storage devices include one or a combination of: any type of random access memory, any type of read only memory, a solid state memory, a flash memory, an optical disk, a magnetic disk, a disk drive, or a redundant array of independent disks (RAID) system. As used herein, the term “device” refers to a physical structure, such as one or a combination of: a mechanical, electro-mechanical, or electrical device, hardware, or circuitry, which can or can not be configured by, or manufactured to execute, computer-readable instructions, machine-readable instructions, etc.

[0167] “Comprise” and “comprising” (and all forms of these terms, i.e., comprising / comprises / composed / comprise) are used herein as open-ended terms. Thus, whenever a claim employs the phrase “comprising” or “including” followed by an item, such claim will also include at least one of the items in the group of items that does not exceed the item that follows the “comprising” or “including” phrase. As used herein, the phrase “at least” followed by a comma followed by a listing of items (e.g., “at least A, B, and C”) means one or more items from the listing of items that follows the “at least” phrase, and that does not exceed the total number of items in the listing of items that follows the “at least” phrase. As used herein, the phrase “at least one of’ followed by a listing of items (e.g., “at least one of A, B, and C”) means one or more items from the listing of items that follows the “at least one of’ phrase, and that does not exceed the total number of items in the listing of items that follows the “at least one of’ phrase. As used herein, the phrase “at most” followed by a comma followed by a listing of items (e.g., “at most A, B, and C”) means one or more items from the listing of items that follows the “at most” phrase, and that does not exceed the total number of items in the listing of items that follows the “at most” phrase. As used herein, the phrase “at most one of’ followed by a listing of items (e.g., “at most one of A, B, and C”) means one or zero items from the listing of items that follows the “at most one of’ phrase, and that does not exceed the total number of items in the listing of items that follows the “at most one of’ phrase. As used herein, the phrase “at least one of’ followed by a listing of items (e.g., “at least one of A, B, and C”) means one or more items from the listing of items that follows the “at least one of’ phrase, and that does not exceed the total number of items in the listing of items that follows the “at least one of’ phrase. As used herein, the phrase “at most one of’ followed by a listing of items (e.g., “at most one of A, B, and C”) means one or zero items from the listing of items that follows the “at most one of’ phrase, and that does not exceed the total number of items in the listing of items that follows the “at most one of’ phrase.

[0168] As used herein, singular references (e.g., “a,” “an,” “first,” “second,” etc.) do not exclude the plural. As used herein, the term “a” or “an” object refers to one or more of the object. The terms “a” (or “an”), “one or more,” and “at least one” are used interchangeably herein. Furthermore, a plurality of items, structural parts, or acts can be performed by, e.g., a single entity or object, although items, structural parts or acts can be

[0169] Unless specifically stated otherwise, as used herein, adjectives such as "first", "second", "third", etc. do not carry significance as to priority, physical order, arrangement, or order of use, but are merely used as labels for convenience so as to distinguish one element from another. In some examples, the adjective "first" can be used to refer to an element in a particular implementation, however the same element can be referred to with a different adjective such as "second" or "third" in a technical solution. In such cases, such adjectives are used only to clearly identify those elements within the context of the discussion, e.g., within a technical solution, where elements can otherwise share the same name.

[0170] As used herein, "approximately" and "about" modifying the recited quantity of a value, to identify the potential presence of variation in real-world applications. For example, "approximately" and "about" can modify a dimension which can not be exact due to manufacturing tolerances or other real-world defects. For example, unless otherwise specified herein, "approximately" and "about" can indicate that such dimension can be within a tolerance range of + / - 10%.

[0171] As used herein, the phrase "communicate", including variations thereof, encompasses one or a combination of direct communication or indirect communication through one or more intermediary components, and does not require direct, physical (e.g., wired) communication or constant communication, but also includes selective communication at periodic intervals, predetermined intervals, non-periodic intervals, or at least one of a one-time event.

[0172] As used herein, "programmable circuitry" is defined to include at least one of (i) one or more special-purpose circuits (e.g., application-specific circuits (ASICs)) that are structured to perform one or more specific operations and include one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors), or (ii) one or more general-purpose semiconductor-based circuits that are programmable with instructions to perform one or more specific functions or operations and include one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors). Examples of programmable circuitry include programmable microprocessors, such as: a central processing unit (CPU) that is executable to perform one or more operations or functions with first instructions; a field-programmable gate array (FPGA) that is programmable with second instructions to at least one of configure or structure the FPGA to instantiate one or more operations or functions corresponding to the first instructions; a graphics processing unit (GPU) that is executable to perform one or more operations or functions with first instructions; a digital signal processor (DSP) that is executable to perform one or more operations or functions with first instructions; an XPU; a network processing unit (NPU); one or more microcontrollers that are executable to perform one or more operations or functions with first instructions; or an integrated circuit, such as an application-specific integrated circuit (ASIC). For example, an XPU can be implemented by a heterogeneous computing system that includes multiple types of programmable circuitry (e.g., one or more FPGAs, one or more CPUs, one or more GPUs, one or more NPUs, one or more DSPs, etc., and any combination thereof) and orchestration technology (e.g., one or more application programming interfaces (APIs)) that can allocate one or more computing tasks to any one or more of the multiple types of programmable circuitry that are suitable and available to perform the one or more computing tasks.

[0173] As used herein, integrated circuit / circuitry is defined to include one or more semiconductor packages that contain one or more circuit elements, such as transistors, capacitors, inductors, resistors, current paths, diodes, etc. For example, an integrated circuit can be implemented as one or more of an ASIC, an FPGA, a chip, a microchip, programmable circuitry, a semiconductor substrate that couples multiple circuit elements, a system-on-chip (SoC), etc.

[0174] In this specification, the term "coupled" can encompass a connection, communication, or signal path enabling a functional relationship consistent with this specification. For example, if device A produces a signal to control device B to act, then: (a) in a first example, device A is coupled to device B by a direct connection; or (b) in a second example, device A is coupled to device B through intermediate component C, provided that intermediate component C does not alter the functional relationship between device A and device B such that device B is controlled by device A via the control signal produced by device A.

[0175] A device "configured" to perform a task or function can be configured, e.g., programmed or hardwired, at a manufacturing plant when manufactured to perform the function, or can be configured (or reconfigured) by a user after manufacturing to perform the function and / or other additional or alternative functions. The configuration can be performed by at least one of firmware or software programming of the device, by at least one of the construction or layout of hardware components and interconnects of the device, or a combination thereof.

[0176] As used herein, the terms "terminal," "node," "interconnect," "pin," and "lead" can be used interchangeably. Unless specifically stated to the contrary, these terms are generally used to mean an interconnect or a terminal end between device elements, circuit elements, integrated circuits, devices, or other electronic devices or semiconductor components.

[0177] The circuits described herein can be reconfigurable to include replaced components to provide functionality at least similar to the functionality available prior to the component replacement. Unless otherwise stated, components shown as resistors generally represent any one or more elements coupled in at least one of series or parallel to provide an amount of impedance represented by the shown resistor. For example, a resistor or capacitor shown and described herein as a single component can instead be a plurality of resistors or capacitors, respectively, coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component can instead be a plurality of resistors or capacitors, respectively, coupled in series between the same two nodes as the single resistor or capacitor. Although certain elements of the described examples are included in an integrated circuit, and other elements are external to the integrated circuit, in other example embodiments, additional or fewer features can be incorporated into the integrated circuit. Additionally, some or all of the features illustrated as external to the integrated circuit can be included in the integrated circuit, and some features illustrated as internal to the integrated circuit can be incorporated external to the integrated circuit. As used herein, the term "integrated circuit" means one or more circuits that are at least one of: (i) incorporated in / on a semiconductor substrate; (ii) incorporated in a single semiconductor package; (iii) incorporated into the same module; or (iv) incorporated in / on the same printed circuit board.

[0178] Modifications can be made within the scope of the claims, and other embodiments can be possible.

[0179] From the foregoing, it will be appreciated that example systems, apparatus, articles of manufacture, and methods have been described herein that reduce non-linear behavior in low-power speaker devices. The described systems, apparatus, articles of manufacture, and methods improve efficiency in using a computing device by tracking the F0 of a low-power speaker device in substantially real-time, determining voltages at different frequencies that will keep the speaker at or below a maximum excursion value using a current F0 value and a non-linear model, and determining equalization coefficients to shape an audio signal to implement the foregoing voltages, as well as applying other equalization coefficients to implement bass frequency improvements. The described systems, apparatus, articles of manufacture, and methods are also directed to one or more improvements in the operation of a machine, such as a computer or other electronic, electromechanical, or mechanical device.

Claims

1. An apparatus comprising: equalizer circuitry having a first input and a second input and an output, the equalizer circuitry configured to adjust an audio signal at the first input in response to a coefficient value at the second input; amplifier circuitry having an input coupled to the output of the equalizer circuitry and having an output; and control circuitry having a first input coupled to the first input of the equalizer circuitry, having a second input coupled to the output of the amplifier circuitry, and having an output coupled to the second input of the equalizer circuitry, the control circuitry configured to determine a resonant frequency of a speaker device in response to the audio signal and a signal at the output of the amplifier circuitry, and to provide the coefficient value at the output of the control circuitry in response to the resonant frequency of the speaker device.

2. The apparatus of claim 1, further comprising measurement circuitry having an input coupled to the output of the amplifier circuitry, the measurement circuitry configured to determine a voltage and a current of an output audio signal.

3. The apparatus of claim 2, wherein the control circuitry is configured to determine the resonant frequency in response to the current and the voltage of the output audio signal.

4. The apparatus of claim 1, wherein the equalizer circuitry comprises: first equalizer circuitry having a first input coupled to the control circuitry, a second input, and an output, the first equalizer circuitry configured to receive the audio signal at the second input; and second equalizer circuitry having an input coupled to the output of the first equalizer circuitry and an output coupled to the amplifier circuitry.

5. The apparatus of claim 4, wherein: the coefficient value is a first coefficient; the first equalizer circuitry is configured to adjust the audio signal using the first coefficient to mitigate speaker device nonlinearity; and the second equalizer circuitry is configured to increase an amplitude of bass frequencies within the audio signal using a second coefficient.

6. An apparatus comprising: control circuitry configured to: determine a speaker device resonant frequency; and determine a coefficient value in response to the speaker device resonant frequency and a speaker device nonlinearity model; equalizer circuitry coupled to the control circuitry and configured to provide an adjusted audio signal using the coefficient value; and amplifier circuitry coupled to the equalizer circuitry and configured to amplify the adjusted audio signal to provide an output audio signal.

7. The apparatus of claim 6, wherein to determine the speaker device resonant frequency, the control circuitry is configured to: determine an impedance value based on the output signal; compare the impedance value to a template impedance form; and determine the speaker device resonant frequency in response to the comparison.

8. The apparatus of claim 6, wherein the control circuitry is configured to: generate a plurality of bandpass filters centered at different frequencies; determine a plurality of impedance values based on the output signal; and determine the speaker device resonant frequency in response to the plurality of impedance values and the plurality of bandpass filters. selecting a bandpass filter centered at a determined speaker device resonant frequency from bandpass filters centered at different frequencies; and applying the bandpass filter to the audio signal to produce a filtered audio signal.

9. The device of claim 8, wherein the control circuitry is configured to: determine a first voltage of the filtered audio signal at the determined speaker device resonant frequency using the nonlinear model; and determine a second voltage of the filtered audio signal at a low frequency less than the determined speaker device resonant frequency using the nonlinear model.

10. The device of claim 9, wherein the control circuitry is configured to: detect a peak in the filtered audio signal; and set a gain value for the filtered audio signal at the determined speaker device resonant frequency using the peak and the first voltage.

11. The device of claim 10, wherein: the control circuitry is configured to provide a coefficient to the equalizer circuitry responsive to the gain value; and the amplifier circuitry is configured to generate the output audio signal by multiplying the adjusted audio signal by the gain value at the resonant frequency.

12. The device of claim 10, wherein the control circuitry is configured to set the gain value to one responsive to a magnitude of the peak being less than the first voltage.

13. The device of claim 10, wherein the control circuitry is configured to set the gain value responsive to a combination of the first voltage and a gain of the amplifier circuitry responsive to a determination that a magnitude of the peak is greater than the first voltage.

14. The device of claim 9, wherein the control circuitry is configured to: detect a peak in the filtered audio signal; and set a gain value for the filtered audio signal at the low frequency using the peak and the second voltage.

15. Control circuitry configured to: measure a diaphragm excursion value of a speaker device at different frequencies to determine a maximum excursion value; determine a maximum voltage at different frequencies corresponding to the maximum excursion value; and determine a nonlinear model corresponding to the speaker device responsive to the maximum voltage.

16. The control circuitry of claim 15, wherein: a first maximum voltage within the maximum voltage corresponds to a first frequency; and the speaker device is configured to vibrate a diaphragm at the maximum excursion value responsive to receiving the first maximum voltage at the first frequency.

17. The control circuitry of claim 16, wherein: the control circuitry is a first control circuitry configured to provide the nonlinear model to a second control circuitry; and the second control circuitry is configured to adjust an audio signal corresponding to the speaker device using the nonlinear model.

18. A device comprising: a speaker device configured to vibrate a diaphragm to produce an audio signal; an equalizer circuitry configured to adjust the audio signal to produce an adjusted audio signal; and an amplifier circuitry configured to generate an output audio signal by multiplying the adjusted audio signal by a gain value at a resonant frequency of the speaker device.

19. The device of claim 18, further comprising: a control circuitry configured to: measure a diaphragm excursion value of the speaker device at different frequencies to determine a maximum excursion value; determine a maximum voltage at different frequencies corresponding to the maximum excursion value; and determine a nonlinear model corresponding to the speaker device responsive to the maximum voltage.

20. The device of claim 19, wherein: a first maximum voltage within the maximum voltage corresponds to a first frequency; and the speaker device is configured to vibrate a diaphragm at the maximum excursion value responsive to receiving the first maximum voltage at the first frequency.

21. The device of claim 20, wherein: the control circuitry is a first control circuitry configured to provide the nonlinear model to a second control circuitry; and the second control circuitry is configured to adjust the audio signal using the nonlinear model.

22. A device comprising: a speaker device configured to vibrate a diaphragm to produce an audio signal; an equalizer circuitry configured to adjust the audio signal to produce an adjusted audio signal; and an amplifier circuitry configured to generate an output audio signal by multiplying the adjusted audio signal by a gain value at a low frequency less than a resonant frequency of the speaker device.

23. The device of claim 22, further comprising: a control circuitry configured to: measure a diaphragm excursion value of the speaker device at different frequencies to determine a maximum excursion value; determine a maximum voltage at different frequencies corresponding to the maximum excursion value; and determine a nonlinear model corresponding to the speaker device responsive to the maximum voltage.

24. The device of claim 23, wherein: a first maximum voltage within the maximum voltage corresponds to a first frequency; and the speaker device is configured to vibrate a diaphragm at the maximum excursion value responsive to receiving the first maximum voltage at the first frequency.

25. The device of claim 24, wherein: the control circuitry is a first control circuitry configured to provide the nonlinear model to a second control circuitry; and the second control circuitry is configured to adjust the audio signal using the nonlinear model.

18. The control circuitry of claim 17, wherein to adjust the audio signal, the second control circuitry is configured to convert an input voltage corresponding to the first frequency to the first maximum voltage, the conversion being responsive to the non-linear model, the input voltage being responsive to a linear model of the speaker arrangement.

19. The control circuitry of claim 16, further configured to determine the non-linear model responsive to a combination of the maximum voltage and a gain value of the speaker arrangement, the maximum voltage and the gain value corresponding to the different frequencies.

20. The control circuitry of claim 19, further configured to measure the diaphragm excursion value using a laser.

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