Systems and methods for nanopore wet cleaning

Abstract

An exemplary semiconductor processing method may include providing a substrate to a processing region of a semiconductor processing chamber. The substrate may include an alternating stack of materials. Features may extend through the alternating stack of materials. One material in the alternating stack of materials may include a silicon-containing material. A natural oxide material may be disposed on at least a portion of the exposed surface of the silicon-containing material. The method may include performing a pre-cleaning process on the substrate. The method may include providing a fluorine-containing precursor to the treatment region. The method can include contacting the substrate with the fluorine-containing precursor, wherein the contacting removes natural oxides from the silicon-containing material.

Description

TECHNICAL FIELD

[0001] This application claims the benefit of and priority to U.S. Nonprovisional Application No. 18 / 442,681, filed March 15, 2024, which claims the benefit of U.S. Provisional Application No. 63 / 456,256, filed March 31, 2023, the contents of all of which are incorporated by reference herein in their entirety for all purposes.

[0002] The present technology relates to semiconductor processes and products. More particularly, the present technology relates to selective etching of material layers on a substrate. BACKGROUND

[0003] Integrated circuits can be fabricated by processes that produce complex patterned layers of material on a substrate surface. Producing patterned material on a substrate requires controlled methods of deposition and removal of exposed material. Chemical etching is used for various purposes, including transferring a pattern in photoresist to an underlying layer, thinning a layer, or removing a native oxide present on a surface. It is often desirable to have an etching process that etches one material more rapidly compared to another material, facilitating, for example, a pattern transfer process or independent material removal. Such an etching process is considered selective to the first material. Due to the diversity of materials, circuits, and processes, etching processes have been developed that are selective to various materials.

[0004] Etching processes can be referred to as wet or dry etching processes based on the materials used in the process. For example, wet etching can preferentially remove some oxide dielectrics compared to other dielectrics and materials. However, wet processes can have difficulty penetrating some confined trenches and can also sometimes distort the remaining material. Dry etching, produced in a localized plasma formed within a substrate processing region, can penetrate more confined trenches and exhibit less distortion of fragile remaining structures. However, localized plasma can damage a substrate by arcing through an electrical arc.

[0005] Accordingly, there is a need for improved systems and methods that can be used to produce high quality components and structures. These and other needs are addressed by the present technology. SUMMARY

[0006] An example semiconductor processing method can include providing a substrate to a processing region of a semiconductor processing chamber. The substrate can include an alternating stack of materials. A feature can extend through the alternating stack of materials. One of the alternating stack of materials can include a silicon-containing material. A native oxide material can be disposed on at least a portion of an exposed surface of the silicon-containing material. The method can include performing a pre-clean process on the substrate. The method can include providing a fluorine-containing precursor to the processing region. The method can include contacting the substrate with the fluorine-containing precursor, wherein the contacting removes the native oxide from the silicon-containing material.

[0007] In implementations, the alternating stack of materials can include a first nitrogen-containing material. A silicon-containing material can overlie the first nitrogen-containing material. A second nitrogen-containing material can overlie the silicon-containing material. An oxygen-containing material can overlie the second nitrogen-containing material. The feature can be characterized by an aspect ratio greater than or about 10: 1. The pre-clean process can include introducing water or steam into the substrate and filling a feature extending through the alternating stack of materials. The pre-clean process can include agitating the substrate to remove air bubbles from the feature. The pre-clean process condenses the steam at a lower portion of the feature extending through the alternating stack of materials. The feature can be filled from a bottom of the feature to a top of the feature. The feature can be filled without forming air bubbles. The method can include providing a surfactant, a fluorine-containing precursor, or both to the processing region during the pre-clean process. The surfactant can be or include a hydrophilic hydrocarbon. The fluorine-containing precursor can be or include diluted hydrofluoric acid.

[0008] Some implementations of the technology encompass a semiconductor processing method. The method can include providing a substrate to a processing region of a semiconductor processing chamber. The substrate can include an alternating stack of materials. A feature can extend through the alternating stack of materials. One of the alternating stack of materials can include a silicon-containing material. A native oxide material can be disposed on at least a portion of an exposed surface of the silicon-containing material. The method can include providing a fluorine-containing precursor to the processing region. The method can include contacting the substrate with the fluorine-containing precursor. The contacting can remove the native oxide from the silicon-containing material. The contacting can not form air bubbles at a lower portion of the feature.

[0009] In implementations, the alternating stack of materials can include a first nitrogen-containing material. A silicon-containing material can overlie the first nitrogen-containing material. A second nitrogen-containing material can overlie the silicon-containing material. An oxygen-containing material can overlie the second nitrogen-containing material. A height of the feature can be greater than or about 2 μιη. A pressure in the processing region can be less than or about 1,000 Torr. The method can include providing a surfactant to the processing region with the fluorine-containing precursor. The surfactant can be or include a hydrophilic hydrocarbon. The method can include performing a pre-clean process on the substrate. The pre-clean process can include filling the feature from a bottom of the feature to a top of the feature with water. The method can include cooling the substrate before performing the pre-clean process on the substrate or contacting the substrate with the fluorine-containing precursor. A relative humidity in the processing region can be maintained at greater than or about 70%.

[0010] Some implementations of the technology encompass a semiconductor processing system. The system can include a semiconductor processing chamber defining a processing region. The system can include a water evaporator in fluid communication with the processing region. The water evaporator can be operable to adjust a relative humidity in the processing region. The system can include a cooling unit in fluid communication with the processing region. The cooling unit can be operable to deliver a cooling fluid to the processing region. The system can include an acid container in fluid communication with the processing region. The acid container can be operable to deliver an etchant species to the processing region.

[0011] Such techniques can provide several benefits over conventional semiconductor processing methods and structures. For example, embodiments of the processing methods can reduce or eliminate the presence of bubbles in high aspect ratio features during a native oxide cleaning operation. By reducing or eliminating the presence of bubbles in high aspect ratio features during a cleaning operation, uniform native oxide removal can be achieved while minimizing removal of other materials. In addition, the removal time of native oxide can be reduced because bubbles can already be removed from the features. These and other embodiments, along with many of its advantages, are described in more detail in conjunction with the text below and attached drawings. BRIEF DESCRIPTION OF DRAWINGS

[0012] The nature and advantages of the disclosed technology can be further understood in view of the remaining portions of the specification and drawings.

[0013] Figure 1 A top plan view of one embodiment of an exemplary processing system in accordance with some embodiments of the present technology is illustrated.

[0014] Figure 2 A schematic view of an exemplary semiconductor processing system in accordance with some embodiments of the present technology is illustrated.

[0015] Figure 3 A block diagram showing an exemplary computer system in which embodiments of the present technology can be implemented is illustrated in accordance with some embodiments of the present technology.

[0016] Figure 4 Exemplary operations in a method in accordance with some embodiments of the present technology are illustrated.

[0017] Figures 5A to 5C A cross-sectional view of a processed substrate in accordance with embodiments of the present technology is illustrated.

[0018] The drawings include a number of drawings as schematic illustrations. It will be understood that the drawings are for illustrative purposes and, unless otherwise specifically stated, are not scale. Additionally, the drawings provided as schematic illustrations to aid in understanding and can not include all aspects or information as compared to actual representations, and can include exaggerated materials for illustrative purposes.

[0019] In the drawings, like components and / or features can have the same reference label. Also, various components of the same kind can be distinguished by following the reference labels by letters that distinguish among the various components of the same kind. If first reference labels are used solely to refer to components through various embodiments, then the description is not limited to a specific component unless the entire description is specifically stated as such. DETAILED DESCRIPTION

[0020] Dilute acids can be used in many different semiconductor processes to clean substrates and remove material from those substrates. For example, dilute hydrofluoric acid can be an effective etchant of silicon oxide, titanium oxide, and other materials, and can be used to remove such materials from a substrate surface. After an etch or clean operation is complete, the acid can be dried from the wafer or substrate surface. Using dilute hydrofluoric acid ("DHF") can be referred to as a "wet" etch, and the diluent is often water. Additional etch processes can be used that utilize precursors delivered to the substrate. For example, plasma enhanced processes can also perform dry etching by selectively etching materials through plasma enhanced precursors, including reactive ion etching.

[0021] While wet etchants using aqueous solutions or water-based processes can be effective for certain substrate structures, reduced feature sizes and increased aspect ratios can hinder wet etch operations, such as removal operations from native oxides of silicon-containing materials. For example, bubbles can become trapped at lower portions of features, such as holes or trenches, patterned into a material stack. If the trapped bubbles are not forced out, cleaning or etching can be non-uniform. To remove the trapped bubbles, agitation can be required to force the bubbles out of the features, which can increase the overall contact time between the substrate and the acid. With increased contact time, over-etching can occur at upper portions of the features, potentially leading to structural damage.

[0022] Embodiments of the present technology address problems of conventional wet etch processes by performing a pre-clean process or utilizing a surfactant. The pre-clean process can include soaking the substrate in water with optional agitation to completely fill the features with water. Alternatively, the pre-clean process can include condensing water in the features by capillary condensation to fill the features from the bottom up. A surfactant with a higher vapor pressure than the water or acid used during cleaning or etching can also be provided during the pre-clean process or with the acid. The high vapor pressure of the surfactant can force the bubbles out of the features. By performing the pre-clean process or utilizing the surfactant, the contact time between the substrate and the acid can be reduced while increasing the uniformity of native oxide removal within the features.

[0023] While the remaining disclosure will routinely identify specific etch processes that utilize the disclosed technology, it will be readily understood that the systems and methods are equally applicable to deposition and cleaning processes that can occur in the described chamber, as well as other etching techniques including mid- and back-end processes and other etching that can be performed utilizing a variety of exposed materials that can be maintained or substantially maintained. As such, the technology should not be considered so limited as to use with the example etch processes or the chamber alone. Furthermore, while an example chamber is described to provide a basis for the present technology, it will be understood that the present technology can be applied to nearly any semiconductor processing chamber that can allow for the described operations.

[0024] Figure 1 A top plan view of one embodiment of a processing system 100 of deposition, etch, bake, and cure chambers is illustrated according to embodiments. In the drawing, a pair of front opening unified pods (FOUPs) 102 supply substrates of various sizes that are received by a robotic arm 104 and placed into a low pressure holding area 106 before being placed into one of the substrate processing chambers 108a-f, which are positioned in serial sections 109a-c. A second robotic arm 110 can be used to transport substrate wafers from the holding area 106 to the substrate processing chambers 108a-f and back. Each substrate processing chamber 108a-f can be equipped to perform several substrate processing operations, including the etching processes described herein, in addition to cyclic layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etching, pre-cleaning, outgassing, orientation, and other substrate processes.

[0025] The substrate processing chambers 108a-f can include one or more system components for depositing, annealing, curing, and / or etching dielectric films on a substrate wafer. In one configuration, two pairs of processing chambers (e.g., 108c-d and 108e-f) can be used to deposit dielectric material on a substrate, and a third pair of processing chambers (e.g., 108a-b) can be used to etch the deposited dielectric. In another configuration, all three pairs of chambers (e.g., 108a-f) can be configured to etch dielectric films on a substrate. Any one or more of the processes described can be performed in chambers separate from the manufacturing systems shown in different embodiments. It will be appreciated that the system 100 contemplates additional configurations of deposition, etching, annealing, and curing chambers for dielectric films.

[0026] Figure 2 A schematic view of a semiconductor processing system 200 is shown. The system 200 can be included as part of the processing system 100. The system 200 can include a semiconductor processing chamber 205. The semiconductor processing chamber 205 can be, for example, one of the substrate processing chambers 108a-f of the processing system 100. The semiconductor processing chamber 205 can define a processing region that can accommodate a substrate during processing.

[0027] The water evaporator 210 can be in fluid communication with a processing region of the semiconductor processing chamber 205. The water evaporator 210 can be in fluid communication with the processing region of the semiconductor processing chamber 205 through a supply line 212. The water evaporator 210 can adjust a relative humidity in the processing region of the semiconductor processing chamber 205. For example, the relative humidity in the processing region can be adjusted during processing. The water evaporator 210 can increase the relative humidity to, for example, greater than or about 10% or greater, as discussed further below.

[0028] The cooling unit 215 can be in fluid communication with a processing region of the semiconductor processing chamber 205. The cooling unit 215 can deliver a cooling fluid to the processing region of the semiconductor processing chamber 205. The cooling unit 215 can be, for example, a water bath, a water evaporator, or a cooling air blower. For example, the water evaporator can be an ultrasonic water evaporator. The cooling unit 215 can be in fluid communication with the processing region of the semiconductor processing chamber 205 through a supply line 216. A return line 218 can fluidly couple the processing region of the semiconductor processing chamber 205 and the cooling unit 215 to return the cooling fluid to the cooling unit 215.

[0029] The acid container 220 can be in fluid communication with a processing region of the semiconductor processing chamber 205. The acid container 220 can deliver an etchant species to the processing region of the semiconductor processing chamber 205. The acid container 220 can be in fluid communication with the processing region of the semiconductor processing chamber 205 through a supply line 222. A return line 224 can fluidly couple the processing region of the semiconductor processing chamber 205 and the acid container 220 to return the etchant species to the acid container 220. Although not depicted, a filtration device can be present along the return line 224 to remove byproducts from the etchant species.

[0030] Figure 3 is a block diagram that illustrates an example computer system that can implement embodiments of the application. This example shows a computer system 300, such as can be used in whole or in part, or in various modifications, to provide the functionality of system 10, as well as other components and functionality of the application described herein.

[0031] The computer system 300 is shown comprising hardware elements that can electrically couple with bus 390. The hardware elements can include one or more central processing units 310, one or more input devices 320 (e.g., mouse, keyboard, etc.), and one or more output devices 330 (e.g., display devices, printers, etc.). The computer system 300 can also include one or more storage devices 340, which represent remote, local, fixed, and / or removable storage devices as well as storage media for temporarily and / or more permanently containing computer-readable information, and one or more storage media readers 350 that can access those storage devices 340. By way of example, storage devices 340 can be disk drives, optical storage devices, solid-state storage device such as random access memory ("RAM") and / or read-only memory ("ROM"), which can be programmable, flash- updateable, or the like.

[0032] The computer system 300 can additionally include a communication system 360 (e.g., a modem, a network card, an infrared communication device, a Bluetooth™ device, a near field communication (NFC) device, a cellular communication device, etc.). The communication system 360 can permit data to be exchanged with a network, system, computer, mobile device, and / or other component described earlier. The system 300 also includes an operating memory 380, which can include the RAM and ROM devices as described above. In some implementations, the computer system 300 can also include a processing acceleration unit 370, which can include a digital signal processor, a special- purpose processor, and / or the like.

[0033] The computer system 300 can also contain software elements, shown as being stored in the working memory 380, including an operating system 384 and / or other code 388. The software code 388 can be used to implement the functions of the various elements of the architecture as described herein. For example, software stored and / or executed by a computer system, such as system 300, can be used to implement processes described herein.

[0034] It will be appreciated that alternative implementations of a computer system 300 can have different architectures than that shown, and can be implemented using custom hardware and / or software (including portable software, such as applets) that allows the computer system 300 to perform the various functions described herein. Moreover, a computer system 300 can be connected to other computer systems using peripheral devices, such as network interfaces, and data acquisition devices (not shown).

[0035] System 100, or more specifically, a chamber (including chamber 200) integrated into system 100, or other processing systems, may be used to produce semiconductor structures according to some embodiments of the present technology. Figure 4 A method 400 for forming a semiconductor structure is illustrated, many operations of which may be performed, for example, in a chamber 200 as previously described. Method 400 may include one or more operations prior to the start of the method, including front-end processing, polishing, cleaning, deposition, etching, or any other operations that may be performed prior to the described operations. The method may include several optional operations as indicated in the figures, which may or may not be specifically associated with the method according to the present technology. For example, many operations are described to provide a broader range of structure formations, but such operations are not critical to the technology or may be performed by alternative methods as will be discussed further below.

[0036] Method 400 describes in Figures 5A to 5C The operations illustrated in the diagrams are explained in conjunction with the operation description of method 400. It will be understood that... Figures 5A to 5C Only partial schematic diagrams are shown, and structure 500 or substrate 505 may contain any number of transistor segments having the aspects shown in the figures. Method 400 may be performed to increase the uniformity of native oxide removal in features of alternating layers of material extending through the substrate 505. Method 300 may also be performed to prevent over-etching of one or more materials in alternating layers of material on the substrate 505. Method 400 may also be performed to reduce queuing time during native oxide removal in features of alternating layers of material extending through the substrate 505.

[0037] Method 400 may begin at operation 405, providing substrate 505 to a processing region of a semiconductor processing chamber, such as the processing region of chamber 205. Substrate 505 may be made of silicon or some other semiconductor substrate material or contain the like. As previously discussed, and as... Figure 5A As shown, substrate 505 may include alternating layers of materials. For example, the materials may include one or more silicon-containing materials, one or more silicon- and nitrogen-containing materials, and one or more silicon- and oxygen-containing materials. Figure 5A In the exemplary embodiment shown, the alternating layers of materials may include a first nitrogen-containing material 510, such as a silicon-nitrogen-containing material. A silicon-containing material 515 (such as polycrystalline silicon) may cover the first nitrogen-containing material 510. A second nitrogen-containing material 520 (such as a silicon-nitrogen-containing material) may cover the silicon-containing material. In this embodiment, the first nitrogen-containing material 510 and the second nitrogen-containing material 520 may be the same material. An oxygen-containing material 525 (such as a silicon-oxygen-containing material) may cover the second nitrogen-containing material. The next alternating layer of materials may include another layer of the first nitrogen-containing material 510 covering the oxygen-containing material 525.

[0038] Although Figures 5A to 5C While the structure 500 shown depicts only 3 portions of the alternating stack of materials, it is contemplated that the substrate 505 can have any number of materials deposited thereon. For example, the substrate 505 can include greater than 5 portions of the alternating stack of materials, such as greater than 7, greater than 10, greater than 15, greater than 20, greater than 25, greater than 30, greater than 35, greater than 40, greater than 45, greater than 50, greater than 55, greater than 60, greater than 65, greater than 70, greater than 75, or more portions of the alternating stack of materials.

[0039] The features 530, such as trenches or holes, can extend through the alternating stack of materials. The features 530 can have an aspect ratio or height-to-width ratio of greater than or about 10: 1, greater than or about 15: 1, greater than or about 20: 1, greater than or about 25: 1, greater than or about 30: 1, greater than or about 35: 1, greater than or about 40: 1, or more. The features 530 can have a height or depth of greater than or about 1 μιη, such as greater than or about 1.2 μιη, greater than or about 1.4 μιη, greater than or about 1.6 μιη, greater than or about 1.8 μιη, greater than or about 2 μιη, greater than or about 2.2 μιη, greater than or about 2.4 μιη, greater than or about 2.6 μιη, greater than or about 2.8 μιη, greater than or about 3 μιη, or more. Further, each layer can be characterized by a reduced width or thickness of less than or about 100 nm, such as less than or about 80 nm, less than or about 60 nm, less than or about 50 nm, less than or about 40 nm, less than or about 30 nm, less than or about 20 nm, less than or about 10 nm, less than or about 5 nm, less than or about 1 nm, or less, including any fraction of any of the recited numbers, such as 20.5 nm, 1.5 nm, etc. As discussed further below, such a combination of high aspect ratio and minimum thickness can preclude many conventional etching operations, or require substantially longer etching times to remove the layers along a vertical or horizontal distance through the restricted width. Further, conventional techniques can also result in damage or removal of other exposed layers.

[0040] A native oxide material 535 can be present along at least a portion of the exposed surfaces of the features, such as along the silicon-containing material. The native oxide material 535 can be formed due to exposure to ambient conditions after etching the features 530 through the alternating stack of materials. As shown in the left feature in Figure 5A The native oxide material 535 can form only on the exposed surfaces of the silicon-containing material 515. However, as shown in the right feature 530 in Figure 5A The native oxide material 535 can form on all exposed surfaces of the alternating stack of materials. It is contemplated that any amount of coverage of the native oxide material 535 on the exposed surfaces within the features 530.

[0041] It will be appreciated that the structure 500 is not intended to be limiting, and similarly encompasses any of a variety of other semiconductor structures. Other exemplary structures can include two-dimensional and three-dimensional structures common in semiconductor manufacturing, and with respect to one or more other materials, have a native oxide to be removed internal to or on the same. Moreover, while high aspect ratio structures can benefit from the present technology, the technology can be equally applicable to lower aspect ratio and any other structures.

[0042] At optional operation 410, the method 400 can include performing a pre-clean process on the substrate 505. In known processes for removing native oxide material within a feature extending through an alternating stack of materials on a substrate, an etchant species can be provided to the substrate without performing a pre-clean process. However, as the aspect ratio of features extending through an alternating stack of materials on a substrate continues to increase, the etchant species can not immediately reach the bottom of the feature. Instead, one or more bubbles can form and become trapped at the bottom of the feature. The presence of the bubbles can prevent the etchant species from immediately reaching the bottom of the feature. As such, the native oxide material can not be removed from the lower portion of the feature. In order to perform a complete removal of the native oxide, the etchant species can need to reside within the feature for a longer period of time. However, due to the increased contact time of the etchant species within the feature, the etchant species can begin to etch one or more of the materials in the alternating stack of materials. Etching of one or more of the materials in the alternating stack of materials can damage the structure.

[0043] As such, performing a pre-clean process can reduce or prevent the formation and / or trapping of bubbles at the bottom of the feature 530. In one embodiment, the pre-clean process can include introducing water or steam into the processing region and / or the substrate 505. In order to reduce or prevent the formation and / or trapping of bubbles, the pre-clean process can include filling the feature 530 extending through the alternating stack of materials. In embodiments, the pre-clean process can continue for a sufficient period of time to allow the water or steam to fill the feature 530. However, it is also contemplated that the pre-clean process can continue for a period of time to fill at least 25%, at least 30%, at least 35%, at least 40%, at least 45%, at least 50%, at least 65%, at least 60%, at least 65%, at least 70%, at least 75%, at least 80%, at least 85%, at least 90%, at least 95%, at least 97%, at least 99%, or more of the volume of the feature 530 extending through the alternating stack of materials on the substrate 505. By partially filling the feature 530, the aspect ratio of the feature 530 that remains unfilled can be effectively reduced to prevent the formation and / or trapping of bubbles.

[0044] In embodiments, the pre-cleaning process can include agitating the substrate 505. By agitating the substrate 505, the features 530 extending through the alternating layers of material can be filled in a shorter period of time. Further, agitation can ensure that all features 530 on the substrate are filled. To agitate the substrate 505, the substrate 505 can be vibrated or an ultrasonic wave can be directed at the substrate 505. Alternatively, the substrate 505 can be agitated by a water jet or by vacuum soaking. It is contemplated that any means of agitation can be used to accelerate the filling of the features 530 while reducing or eliminating the formation and / or trapping of air bubbles at the bottom of the features 530. The pre-cleaning process can include soaking the substrate 505 in water, such as deionized water. By soaking the substrate 505 in water, such as for an extended period of time, along with optional agitation, the features 530 can be completely filled in the absence of any air bubbles.

[0045] In embodiments, a reduced substrate temperature can facilitate filling the features 530. As such, the method 400 can include reducing the substrate temperature prior to or during the pre-cleaning process. In embodiments, the substrate temperature can be reduced to less than or about 300 °C, such as less than or about 280 °C, less than or about 260 °C, less than or about 240 °C, less than or about 220 °C, less than or about 200 °C, less than or about 180 °C, less than or about 160 °C, less than or about 140 °C, less than or about 120 °C, less than or about 100 °C, or lower, prior to or during the pre-cleaning process. By reducing the substrate temperature, the vapor can preferentially condense at the lower portion of the features 530 due to capillary condensation. As the capillary condensation can begin at the lower portion of the features 530 and gradually fill the features 530 from the bottom to the top, the formation and / or trapping of air bubbles will be reduced or eliminated.

[0046] Similarly, efficient filling of the features 530 extending through the alternating layers of material during the pre-cleaning process can be increased at high humidity. For example, at high humidity, the lower portion of the features 530 can become saturated, causing the vapor to condense and fill the features 530 from the bottom first. In embodiments, the relative humidity can be greater than or about 60%, greater than or about 65%, greater than or about 70%, greater than or about 75%, greater than or about 80%, greater than or about 85%, greater than or about 90%, or greater than or about 95%, greater than or about 99%, or higher. Similar to the case of reduced temperature, as the humidity is increased, the vapor can preferentially condense at the lower portion of the features 530 and gradually fill the features 530 from the bottom to the top without forming and / or trapping air bubbles.

[0047] Method 400 can include providing a fluorine-containing precursor to the processing region at operation 415. Exemplary fluorine-containing precursors used in method 400 can include hydrofluoric acid or ammonium fluoride. However, various other fluorine-containing precursors used or useful in semiconductor processing are also contemplated. Other sources of fluorine can be used in conjunction with or as an alternative to hydrofluoric acid. In embodiments, the fluorine-containing precursor can be provided in solution with water to dilute the fluorine-containing precursor.

[0048] In embodiments, a surfactant can be provided with the fluorine-containing precursor at optional operation 420. In the event that a bubble is formed or trapped within feature 530, the surfactant can be used to destabilize the bubble and force the bubble out of feature 530. The surfactant can be characterized by a high vapor pressure, which can force the bubble towards the upper portion of feature 530 and eventually out of feature 530. In embodiments, the surfactant can be characterized by a vapor pressure at room temperature of greater than or about 5 kPa, greater than or about 6 kPa, greater than or about 7 kPa, greater than or about 8 kPa, greater than or about 9 kPa, greater than or about 10 kPa, or higher. An exemplary surfactant can be a hydrophilic hydrocarbon, such as ethanol, acetone, or isopropyl alcohol.

[0049] The surfactant can be provided with or without performing an optional pre-clean process. It is also contemplated that the surfactant can be provided during the pre-clean process. In embodiments where the pre-clean process is not performed, the surfactant can still reduce or prevent the formation and / or trapping of bubbles in feature 530. In embodiments where the pre-clean process is performed, the surfactant can reduce the queue time by increasing the rate at which any formed bubbles are removed.

[0050] After providing the fluorine-containing precursor and optionally the surfactant, method 400 can include contacting substrate 505 with the fluorine-containing precursor and the surfactant, if present, at operation 425. The fluorine-containing precursor can remove native oxide material 535 from within feature 530. Native oxide material 530 can react with the fluorine-containing precursor to form a byproduct, such as hexafluorosilicic acid and water.

[0051] The pressure within the processing area can also affect the operations performed. In some embodiments, the pressure can be maintained below about 1,000 Torr, below or about 950 Torr, below or about 900 Torr, below or about 850 Torr, below or about 800 Torr, below or about 790 Torr, below or about 780 Torr, below or about 770 Torr, below or about 760 Torr, below or about 750 Torr, or even lower. The pressure can also be maintained within these ranges, within a smaller range encompassed by these ranges, or at any pressure between any of these ranges. In some embodiments, the processing pressure can be maintained between about 750 Torr and about 1,000 Torr, which can promote the initiation of etching and can promote the etching of the native oxide material 535.

[0052] In this implementation, performing a pre-cleaning treatment and / or providing a surfactant reduces the total time required to remove the native oxide material 535 compared to conventional techniques. In conventional techniques without performing a pre-cleaning treatment and / or providing a surfactant, removal of the native oxide material from a similar structure may require a dwell time of more than five minutes. Even so, the presence of air bubbles may prevent removal of the native oxide from the lower part of the feature and may result in over-etching of material at the upper part of the feature. In contrast, this technique can uniformly remove the native oxide material 535 from the entire feature 530 in less than or about five minutes, less than or about four minutes, less than or about three minutes, less than or about two minutes, less than or about one minute, or even less.

[0053] like Figure 5C As shown, after removing the native oxide material 535 from the silicon-containing material 515, a metal silicide 540 may be selectively formed on the exposed silicon-containing material 515. For example, a molybdenum-containing silicon material may be selectively formed on the exposed silicon-containing material 515. By performing the operations of this technique and removing the native oxide material 535 from the silicon-containing material 515, the metal silicide 540 may be formed on all exposed layers of the silicon-containing material 515 extending through the feature 530.

[0054] In the foregoing description, several details have been set forth for illustrative purposes to provide an understanding of various embodiments of the present technology. However, it will be apparent to those skilled in the art that certain embodiments may be practiced without some of these details or with additional details.

[0055] Having now described several embodiments, it will be apparent to those of ordinary skill in the art that many modifications, alternative constructions, and equivalents can be used without departing from the spirit of the disclosure. Additionally, a variety of well-known processes and elements have not been described in order to avoid unnecessarily obscuring the disclosure. Accordingly, the above description should not be taken as limiting the scope of the technology. Further, the methods or processes can be described in sequential order, but will be understood that some operations can be performed in different order, or performed concurrently, that the claims should not be interpreted as limited to the elements or steps shown as essential.

[0056] Where a range of values is provided, it is understood that each intervening value, to the lowest unit of the lower limit, and to the highest unit of the upper limit, is also specifically disclosed. For example, if a range of 1 -6 Z is disclosed, then 3.5 Z is specifically disclosed, as well as 3 Z and 4 Z. Any narrower range or value is therefore within the scope of the technology. Unless otherwise indicated, the description of a particular aspect will be representative of that aspect and will be understood and applied to each and every aspect of the technology within the scope of the technology. Also, the singular forms of "a", "an", and "the" include plural referents unless the context clearly dictates otherwise. "Approximately" and / or "about" as used herein and in the appended claims, when used in reference to a measurable value such as an amount, a time, and the like, encompasses variations that are within an acceptable range of error for the particular value as would be understood by one of ordinary skill in the art. "Substantially" as used herein and in the appended claims, when used in reference to a measurable value such as an amount, a time, a physical property (such as frequency), and the like, also encompasses variations that are within an acceptable range of error for the particular value as would be understood by one of ordinary skill in the art.

[0057] As used in the description herein and throughout the claims that follow, the meaning of "a", "an", and "the" includes plural reference unless the context clearly dictates otherwise. Thus, for example, reference to "a feature" includes a plurality of such features, and reference to "the material" includes reference to one or more materials and equivalents thereof known to those skilled in the art, and so forth.

[0058] Also, the use of the "comprise", "comprising", "contain", "containing", "include", and "including" when used in this specification and in the following claims is not to be construed as excluding the presence of other features, integers, steps, actions, or groups thereof.

Claims

1. A semiconductor processing method comprising: providing a substrate to a processing region of a semiconductor processing chamber, wherein the substrate comprises an alternating stack of materials, a substrate having a feature extending through an alternating stack of materials, wherein one of the alternating stack of materials comprises a silicon-containing material, and wherein a native oxide material is disposed on at least a portion of an exposed surface of the silicon-containing material; performing a pre-clean process on the substrate; providing a fluorine-containing precursor to the processing region; and contacting the substrate with the fluorine-containing precursor, wherein the contacting removes native oxide from the silicon-containing material.

2. The semiconductor processing method of claim 1, wherein the alternating stack of materials comprises a first nitrogen-containing material, the silicon-containing material overlying the first nitrogen-containing material, a second nitrogen-containing material overlying the silicon-containing material, and an oxygen-containing material overlying the second nitrogen-containing material.

3. The semiconductor processing method of claim 1, wherein the feature is characterized by an aspect ratio greater than or about 10:

1.

4. The semiconductor processing method of claim 1, wherein the pre-clean process comprises: introducing water or steam to the substrate; and filling the feature extending through the alternating stack of materials.

5. The semiconductor processing method of claim 4, further comprising: agitating the substrate to remove air bubbles from the feature.

6. The semiconductor processing method of claim 4, further comprising: condensing the steam at a lower portion of the feature extending through the alternating stack of materials, wherein the feature is filled from a bottom of the feature to a top of the feature.

7. The semiconductor processing method of claim 6, wherein the feature is filled without forming air bubbles.

8. The semiconductor processing method of claim 1, further comprising: providing a surfactant, the fluorine-containing precursor, or both to the processing region during the pre-clean process.

9. The semiconductor processing method of claim 8, wherein the surfactant comprises a hydrophilic hydrocarbon.

10. The semiconductor processing method of claim 1, wherein the fluorine-containing precursor comprises diluted hydrofluoric acid.

11. A semiconductor processing method comprising: providing a substrate to a processing region of a semiconductor processing chamber, wherein the substrate comprises an alternating stack of materials, a substrate having a feature extending through an alternating stack of materials, wherein one of the alternating stack of materials comprises a silicon-containing material, and wherein a native oxide material is disposed on at least a portion of an exposed surface of the silicon-containing material; providing a fluorine-containing precursor to the processing region; and contacting the substrate with the fluorine-containing precursor, wherein the contacting removes native oxide from the silicon-containing material, and wherein the contacting does not form air bubbles at a lower portion of the feature.

12. The semiconductor processing method of claim 11, wherein the alternating stack of materials comprises a first nitrogen-containing material, the silicon-containing material overlying the first nitrogen-containing material, a second nitrogen-containing material overlying the silicon-containing material, and an oxygen-containing material overlying the second nitrogen-containing material.

13. The semiconductor processing method of claim 11, wherein a height of the feature is greater than or about 2 μm.

14. The semiconductor processing method of claim 11, wherein a pressure in the processing region is less than or about 1,000 Torr.

15. The semiconductor processing method of claim 11, further comprising: providing a surfactant to the processing region with the fluorine-containing precursor, wherein the surfactant comprises a hydrophilic hydrocarbon.

16. The semiconductor processing method of claim 11, further comprising: performing a pre-clean process on the substrate.

17. The semiconductor processing method of claim 16, wherein the pre-clean process comprises filling the feature from a bottom of the feature to a top of the feature with water.

18. The semiconductor processing method of claim 16, further comprising: cooling the substrate prior to performing the pre-clean process on the substrate or contacting the substrate with the fluorine-containing precursor.

19. The semiconductor processing method of claim 16, wherein a relative humidity in the processing region is maintained at greater than or about 70%.

20. A semiconductor processing system, comprising: a semiconductor processing chamber defining a processing region; a water evaporator in fluid communication with the processing region, wherein the water evaporator is operable to adjust a relative humidity in the processing region; a cooling unit in fluid communication with the processing region, wherein the cooling unit is operable to deliver a cooling fluid to the processing region; and an acid container in fluid communication with the processing region, wherein the acid container is operable to deliver an etchant species to the processing region. ​

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