Interrupt checker instantiation method and device, equipment, medium and program
By obtaining the interrupt parameter table and automatically configuring the interrupt checker using the checker script macro, the problem of low interrupt verification efficiency in existing technologies is solved, and efficient and accurate interrupt signal verification is achieved.
Patent Information
- Application Number
- CN202511029094.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-24
- Publication Date
- 2025-11-11
AI Technical Summary
Existing technologies lack efficiency in the verification process, and human input of stimuli and checks are prone to deviations, resulting in a large workload and long verification cycle, making it difficult to guarantee the correctness of parameters.
An instantiation method for an interrupt checker is provided. By obtaining the interrupt parameter table and the checker script macro, the interrupt checker is automatically configured into the verification environment to achieve automated verification of interrupt signals.
It improves the efficiency and accuracy of interrupted verification, reduces the probability of human error, simplifies the interrupted verification process, and shortens the verification cycle.
Smart Images
Figure CN120929211A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computer technology, specifically to an instantiation method, apparatus, device, medium, and program for an interrupt checker. Background Technology
[0002] An interrupt is a special message between hardware and software, and between a device and the CPU (Central Processing Unit). Upon receiving this message, the CPU temporarily suspends the execution of the current program and executes the corresponding event handler. After processing, it returns to the original program. Problems with interrupts can affect chip performance, therefore, interrupt verification is necessary. In simulation verification platforms, an interrupt checker is a key component used to verify the correctness of interrupt signal processing logic and whether it meets expectations.
[0003] Against this backdrop, how to provide an instantiation method for an interrupt checker to improve the efficiency of interrupt verification has become a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention
[0004] In view of this, embodiments of this application provide an instantiation method, apparatus, device, medium, and program for an interrupt checker, which can instantiate different interrupt checkers according to the interrupt information corresponding to different interrupt signals, thereby improving the efficiency of interrupt verification.
[0005] To achieve the above objectives, the embodiments of this application provide the following technical solutions.
[0006] In a first aspect, embodiments of this application provide a method for instantiating an interrupt checker, including:
[0007] Obtain the interrupt parameter table, which includes multi-dimensional information. The one-dimensional information records a source interrupt information and a corresponding interrupt merging information. The source interrupt information indicates the interrupt information of the source interrupt signal generated by the source module. The interrupt merging information indicates the interrupt information corresponding to other interrupt signals merged with the source interrupt signal. The other interrupt signals are generated by other modules.
[0008] For any dimension of information, select the checker script macros that match the source interrupt information and the interrupt merging information respectively;
[0009] Using the inspector script macro, based on the source interrupt information and interrupt merging information recorded in the corresponding one-dimensional information, an interrupt inspector with corresponding functions is configured, and the interrupt inspector is instantiated in the verification environment to inspect the source interrupt signal and other interrupt signals merged with the source interrupt signal.
[0010] Optionally, the interrupt checker is used to check the source interrupt signal from which the source interrupt information originates, and takes the source interrupt signal as input to output an output signal corresponding to the source interrupt signal;
[0011] And / or,
[0012] The interrupt checker is used to perform a merge check on the source interrupt signal from the source interrupt information source and other interrupt signals from the interrupt merge information source, and outputs a merged output signal with the source interrupt signal and the other interrupt signals as input.
[0013] Optionally, the other interrupt signals from which the interrupt merging information originates include: other source interrupt signals from other source interrupt information sources; the interrupt checker takes the source interrupt signal and the other source interrupt signals as inputs and outputs corresponding output signals.
[0014] Optionally, other interrupt signals from which the interrupt merging information originates include: an interrupt masking signal; the interrupt checker takes the source interrupt signal and the interrupt masking signal as input and outputs a corresponding output signal;
[0015] Among the output signals, the signal segment of the source interrupt signal corresponding to the signal segment with the first interrupt masking signal is masked.
[0016] Optionally, other interrupt signals from which the interrupt merging information originates include: an interrupt clearing signal; the interrupt checker takes the source interrupt signal and the interrupt clearing signal as input and outputs corresponding output signals;
[0017] Among the output signals, the signal segment corresponding to the source interrupt signal of the signal segment where the interrupt clear signal is the first value is cleared.
[0018] Optionally, the other interrupt signals from the interrupt merging information source include: other source interrupt signals from other source interrupt information sources, interrupt masking signals, and interrupt clearing signals; the interrupt checker takes the source interrupt signal, at least one other source interrupt signal, interrupt masking signal, and interrupt clearing signal as input, and outputs the corresponding output signal;
[0019] Among the output signals, the signal segments of other source interrupt signals corresponding to the signal segments where the interrupt masking signal has a first value are masked, and the signal segments of source interrupt signals corresponding to the signal segments where the interrupt clearing signal has a first value are cleared.
[0020] Optionally, the interrupt merging information is at least one level of interrupt merging information, including first-level interrupt merging information, or first-level interrupt merging information and non-first-level interrupt merging information;
[0021] Among them, the first-level interrupt merging information indicates: the interrupt information corresponding to other source interrupt signals from other source interrupt information sources that are merged with the source interrupt signal from the source interrupt information source, or the interrupt information corresponding to other source interrupt signals from multiple other source interrupt information sources that are merged.
[0022] Non-Level 1 Interrupt Merging Information Indication: The previous level interrupt merging information of the source interrupt signal and other source interrupt signals from which the merging information originates.
[0023] Optionally, the interrupt checker processes the interrupt signal according to the interrupt priority of the interrupt signal;
[0024] Among them, the interrupt priority of software interrupt signals is higher than that of non-maskable interrupt signals; the interrupt priority of non-maskable interrupt signals is higher than that of maskable interrupt signals; and the interrupt priority of maskable interrupt signals is higher than that of single-step interrupt signals.
[0025] Secondly, embodiments of this application provide an instantiation device for an interrupt checker, comprising:
[0026] An interrupt information acquisition module is used to acquire an interrupt parameter table. The interrupt parameter table includes multi-dimensional information. One-dimensional information records a source interrupt information and a corresponding interrupt merging information. The source interrupt information indicates the interrupt information of the source interrupt signal generated by the source module. The interrupt merging information indicates the interrupt information corresponding to other interrupt signals merged with the source interrupt signal. The other interrupt signals are generated by other modules.
[0027] The inspector script macro determination module is used to select the inspector script macro that matches the source interrupt information and the interrupt merging information for any dimension of information.
[0028] The interrupt checker configuration and instantiation module is used to configure an interrupt checker with corresponding functions based on the source interrupt information and interrupt merging information recorded in the corresponding one-dimensional information using the checker script macro, and instantiate the interrupt checker into the verification environment to check the source interrupt signal and other interrupt signals merged with the source interrupt signal.
[0029] Thirdly, embodiments of this application provide a computer device including at least one memory and at least one processor, wherein the memory stores computer-executable instructions, and the processor invokes the computer-executable instructions to perform the instantiation method of the interrupt checker as described in the first aspect above.
[0030] Fourthly, embodiments of this application provide a storage medium that stores computer-executable instructions, which, when executed by a processor, implement the instantiation method of the interrupt checker as described in the first aspect above.
[0031] Fifthly, embodiments of this application provide a computer program product including computer-executable instructions, which, when executed by a processor, implement the instantiation method of the interrupt checker as described in the first aspect above.
[0032] As can be seen, the instantiation method of the interrupt checker provided in this application embodiment obtains an interrupt parameter table, which includes multi-dimensional information. One-dimensional information records a source interrupt information and corresponding interrupt merging information. The source interrupt information indicates the interrupt information of a source interrupt signal generated by a source module, and the interrupt merging information indicates the interrupt information corresponding to other interrupt signals merged with the source interrupt signal. These other interrupt signals are generated by other modules. For any one dimension of information, a checker script macro matching the source interrupt information and interrupt merging information is selected. Then, the checker script macro is used to, based on the corresponding source interrupt information and interrupt merging information recorded in the one-dimensional information, determine the interrupt information. The method merges information, configures corresponding interrupt checkers, and instantiates the interrupt checkers in the verification environment to check the source interrupt signal and other interrupt signals merged with the source interrupt signal. In other words, the instantiation method provided in this application can automatically obtain interrupt information corresponding to different interrupt sources in the interrupt parameter table through a script. The interrupt information includes source interrupt information and interrupt merging information. Then, the matching checker script macro can be selected according to the interrupt information, and the corresponding interrupt checker can be configured. Different interrupt checkers can be instantiated to verify the interrupt signal without manually de-instantiating the interrupt checker, thereby greatly improving the efficiency of interrupt verification. Attached Figure Description
[0033] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0034] Figure 1 This is a diagram illustrating an interruption process;
[0035] Figure 2 This is a schematic diagram of an interrupt signal merging process;
[0036] Figure 3 This is a diagram of an interrupted tree;
[0037] Figure 4 This is a flowchart illustrating the instantiation method of the interrupt checker provided in the embodiments of this application;
[0038] Figure 5 These are example diagrams of timing waveforms for signals of different interrupt types;
[0039] Figure 6 This is an example diagram of an interrupt checker used for interrupt type verification;
[0040] Figure 7 Based on Figure 6 Example of timing waveforms for the interrupt checker;
[0041] Figure 8 This is a schematic diagram of a design to be verified, involving interruption merging.
[0042] Figure 9 This is an example diagram of an interrupt checker used for interrupt merging verification;
[0043] Figure 10 Based on Figure 9 Example of timing waveforms for the interrupt checker;
[0044] Figure 11 This is an example diagram of an interrupt checker used for verifying interrupt-related registers;
[0045] Figure 12 Based on Figure 11 Example of timing waveforms for the interrupt checker;
[0046] Figure 13 This is another example diagram of an interrupt checker used for interrupt-related register verification;
[0047] Figure 14 Based on Figure 13 Example of timing waveforms for the interrupt checker;
[0048] Figure 15 This is another example diagram of an interrupt checker used for verifying interrupt-related registers;
[0049] Figure 16 Based on Figure 15 Example of timing waveforms for the interrupt checker;
[0050] Figure 17 This is a structural example diagram of an instantiation device of the interrupt checker provided in the embodiments of this application. Detailed Implementation
[0051] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0052] During the execution of a program by the CPU, if an emergency or abnormal event occurs, the CPU can obtain an interrupt request. The CPU then needs to suspend the currently executing program and handle the event, that is, execute the interrupt service routine. After handling the event, the CPU returns to the breakpoint to continue executing the suspended program. This process is called an interrupt. The breakpoint is the address of the first instruction that needs to be executed when returning to the currently executing program.
[0053] Interrupts are an indispensable function in CPUs and SOCs (System On Chips). During the sequential execution of a program by the CPU, if an interrupt event occurs from the internal or external source, the CPU needs to handle the interrupt event according to its settings. Interrupts generated internally by the CPU can come from software-defined interrupts, internal exception interrupts, etc.
[0054] To facilitate understanding of the interruption process, Figure 1 A schematic diagram of an interruption process is shown, such as Figure 1As shown, the interrupt process, including interrupt request occurrence, interrupt handling, and interrupt return, requires the following six steps to complete: First, the interrupt request, which is an interrupt request sent by the interrupt source to the CPU. This interrupt request can be issued by a hardware interrupt source or a software interrupt source. Second, the interrupt response, where the CPU checks the interrupt request input during the last clock cycle of each instruction execution to determine if an interrupt request exists. If the CPU receives the interrupt request signal and the interrupt enable trigger inside the CPU is in state 1, the CPU sends an INTA (InterruptAcknowledge) signal to respond to the interrupt after the current instruction is executed. Third, saving the context, where the CPU needs to save the breakpoint information of the currently executing program after the interrupt ends, so that the context remains intact after the interrupt is completed. The system can return to the breakpoint and continue execution; fourth, locate the interrupt service routine. An interrupt is a hardware mechanism used to notify the CPU that an asynchronous event has occurred. Once the interrupt is recognized by the system, the CPU saves part (or all) of the context, that is, the values of part (or all) of the registers, and jumps to a dedicated subroutine, namely the interrupt service routine; fifth, interrupt handling. The interrupt handling process is actually the process of the CPU executing the interrupt service routine. The program written by the user for the CPU to handle interrupts for interrupt sources is called the interrupt service routine. Since different interrupt sources have different roles in the system and different functions to be performed, the interrupt service routines are also different; sixth, interrupt return. After the interrupt routine is completed, the system returns to the program that was originally interrupted. This process is called interrupt return. The last instruction of the interrupt service routine is the interrupt return instruction, which restores the breakpoint and returns to the interrupted program.
[0055] In chip system architecture, interrupts are a means of interaction between hardware and software, and between the CPU and peripherals. If an interrupt fails, it may lead to a decrease in chip performance, the loss of certain features, or even the failure of the entire chip to function properly. Therefore, interrupt verification is of utmost importance.
[0056] During interrupt verification, to ensure the completeness and correctness of the verification, both the interrupt source and the output of interrupt merging need to be checked. The interrupt source is the origin of the interrupt; for example, each independent peripheral device can be an interrupt source, and the interrupt signal generated by the interrupt source can be called the source interrupt signal. Interrupt merging refers to merging the source interrupt signal generated by the interrupt source with interrupt signals generated by other modules, or merging multiple interrupt signals within a module. During interrupt handling, the number of external interrupts that the CPU core can receive is limited, while the number of interrupts reported within the SOC is far greater than the number that the CPU core can receive. Therefore, the interrupt signal generated by the interrupt source needs to be merged with interrupt signals generated by other modules, and then transmitted after being merged into a combined interrupt signal.
[0057] Figure 2 This is a schematic diagram of interrupt signal merging, such as... Figure 2 As shown, interrupt signals generated by interrupt sources, such as Int_src_0, and interrupt signals Int_src_1, Int_src_2, Int_src_3, Int_src_4, and Int_src_5 generated by other modules, are merged to obtain the merged interrupt signal Int_Merge_0. This merged interrupt signal Int_Merge_0 is then merged with interrupt signal Int_src_6 generated by other modules to obtain the merged interrupt signal Int_Merge_1 for signal transmission. It can be seen that during the interrupt merging process, interrupt signals from different interrupt sources may undergo multiple levels of interrupt merging processing before finally being connected to the external interrupt signal of the processor core for processing. Therefore, this can be figuratively called the interrupt tree of the SOC.
[0058] For ease of understanding, Figure 3 A schematic diagram of an interruption tree is shown, such as Figure 3 As shown, the layer closest to the source interrupt (e.g., INT_0, INT_1, INT_2, INT_3, INT_4, INT_5, ..., INT_N) is the first-level interrupt (e.g., Block_0, Block_1, Block_2, Block_3), and downwards are the second-level interrupts (e.g., Subsys_0, Subsys_1), the third-level interrupts (Core_0, Core_1)..., until the layer closest to the processor core.
[0059] Furthermore, interrupts can be classified into internal interrupts and external interrupts based on their source and function. External interrupts can be further divided into maskable interrupts and non-maskable interrupts. Maskable interrupts are those requested from the CPU via the INTR (Interrupt Request Line), primarily originating from external devices such as hard drives, printers, and network cards. These interrupts do not affect system operation and can be handled at any time, or even ignored, hence the name "maskable interrupts." Non-maskable interrupts are those requested from the CPU via the NMI (Non-Maskable Interrupt) line, such as power leakage or hardware circuit failures. These interrupts are more serious and masking is not recommended.
[0060] Internal interrupts can include traps, faults, and terminations. A trap is an intentional, pre-planned abnormal event. Traps can be deliberately set in the program; when the trap instruction is executed, the CPU will call a specific program to handle it, and then return to the next instruction after the trap instruction. Examples include system calls and program debugging functions. A fault is an unexpected event detected by the CPU before the instruction that caused the fault has finished executing. When an error occurs, it is handled by a fault handler. If the error can be corrected, control is returned to the instruction that caused the fault, meaning the CPU re-executes that instruction. If it cannot be corrected, an error is reported. Termination occurs when a fatal error occurs during instruction execution, which is irreparable and prevents the program from continuing. This is usually due to hardware errors. The termination handler does not return control to the original program but terminates it directly.
[0061] One approach to verifying source interrupts and merged interrupts is to verify them separately and step by step. When checking source interrupts, the output corresponding to each interrupt source can be checked based on the stimulus input to each interrupt source. When checking merged interrupts, each interrupt source is given an input stimulus, and then the merged interrupts are checked to see if they all have corresponding interrupt responses.
[0062] However, the above verification scheme only verifies the interrupt classification (including source interrupts and merged interrupts) or directly detects from end to end, lacking the inspection of the intermediate interrupt signal to the output signal. In order to ensure the completeness of the verification, it is necessary to test the intermediate source input stimulus of the interrupt, which will make the verification process lack continuity and significantly increase the workload of verification.
[0063] Furthermore, due to the numerous interrupt types and sources involved in chip systems, along with various interrupt merging and masking mechanisms, and the extensive interrupt stimulation and checks, manual input stimulation and checks can lead to a significant workload, potentially resulting in stimuli that do not meet test requirements and missed detections. Moreover, if the interrupt source of a module's IP (Intellectual Property Core) changes later, or if the interrupt merging structure changes, the workload for secondary manual modifications will be substantial, easily lengthening the interrupt-related verification cycle for the entire chip system. Additionally, during verification, if the correctness of input stimulus and output check parameters needs to be verified, the large workload and time required for querying may lead to deviations in the manual checking of input stimulus and output check parameters, making it difficult to guarantee the correctness of the input parameters.
[0064] To address the aforementioned issues, embodiments of this application provide an instantiation method for an interrupt checker, which can instantiate different interrupt checkers based on the interrupt information corresponding to different interrupt signals, thereby improving the efficiency of interrupt verification.
[0065] In the simulation verification platform, the checker is an important component used to verify the correctness of the processing logic of the object to be verified. Specifically, it can use the expected response of the object to be verified under the stimulus to compare the actual response generated by the object to be verified with the expected response. If the comparison results are the same, it means that the check result is passed; if the comparison results are different, it means that the check result is failed.
[0066] During interrupt verification, the interrupt checker is a key component used to verify the correctness of interrupt signal processing logic and whether the function meets expectations.
[0067] Figure 4 This is a flowchart illustrating the instantiation method of the interrupt checker provided in the embodiments of this application. (Refer to...) Figure 4 The instantiation method may include the following steps.
[0068] Step S401: Obtain the interrupt parameter table, which includes multi-dimensional information. The one-dimensional information records a source interrupt information and a corresponding interrupt merging information. The source interrupt information indicates the interrupt information of the source interrupt signal generated by the source module. The interrupt merging information indicates the interrupt information corresponding to other interrupt signals merged with the source interrupt signal. The other interrupt signals are generated by other modules.
[0069] In this embodiment of the application, interrupt information of multiple interrupt sources can be recorded in a table. This table can be called an interrupt parameter table. The interrupt parameter table provided in this application is described below with reference to Table 1. As shown in Table 1, the interrupt parameter table can include multi-dimensional information. One-dimensional information records the source interrupt information and interrupt merging information corresponding to an interrupt source.
[0070]
[0071] Table 1
[0072] The source interrupt information indicates the interrupt information of the source interrupt signal generated by the source module (i.e., the interrupt source), and the interrupt merging information indicates the interrupt information corresponding to other interrupt signals merged with the source interrupt signal, wherein the other interrupt signals are generated by other modules.
[0073] In an optional implementation, the multidimensional information can be a row of information or a column of information. The row and column are only ways in which the interrupt parameter table presents the interrupt information. The multidimensional information can be arranged along the row direction or along the column direction. In the embodiments of this application, as shown in Table 1, the multidimensional information is described using row information as an example. In other embodiments, the multidimensional information can also be arranged along the column direction.
[0074] In an optional implementation, the interrupt merging information is at least one level of interrupt merging information, including first-level interrupt merging information, or first-level interrupt merging information and non-first-level interrupt merging information; wherein, the first-level interrupt merging information indicates: the interrupt information corresponding to other source interrupt signals from other source interrupt information sources merged with the source interrupt signal from the source interrupt information source, or the interrupt information corresponding to other source interrupt signals from multiple other source interrupt information sources merged; the non-first-level interrupt merging information indicates: the interrupt merging information of the previous level of the source interrupt signal and the other source interrupt signals from other source interrupt information sources merged.
[0075] In an optional embodiment, as shown in Table 1, the interrupt merging information may include first-level interrupt merging information, second-level interrupt merging information, and third-level interrupt merging information. Taking the information in row 0 of the table as an example, the information in row 0 records the interrupt information corresponding to the source interrupt signal Int_src0 from which the source interrupt information originates. It includes the name or identifier of the source interrupt signal Int_src0 and the corresponding multi-level interrupt merging information. The first-level merged interrupt information indicates that other source interrupt signals Int_src1 from which other source interrupt information is merged with the source interrupt signal Int_src0 are merged to obtain the first-level merged interrupt signal Int_f0.
[0076] During the first-level interrupt merging process, the multiple source interrupt signals to be merged may include the source interrupt signal from the source interrupt information source and other source interrupt signals from other source interrupt information sources, or may only include other source interrupt signals from multiple other source interrupt information sources; for example, please refer to the second row of Table 1. The information in the second row records the interrupt information corresponding to the source interrupt signal Int_src2 from the source interrupt information source, including the name or identifier of the source interrupt signal Int_src2 and the corresponding multi-level interrupt merging information. The first-level interrupt merging information indicates that the multiple other source interrupt signals from multiple other source interrupt information sources to be merged include: Int_src0, Int_src1, Int_src3, but does not include the source interrupt signal Int_src2.
[0077] Continuing with the information recorded in row 0 of Table 1, the second-level merged interrupt information indicates that the first-level merged interrupt signal Int_f0 is merged with the first-level merged interrupt signal Int_f1 from other source interrupt information to obtain the second-level merged interrupt signal Int_s0; the third-level merged interrupt information indicates that the second-level merged interrupt signal Int_s0 is merged with the second-level merged interrupt signal Int_s2 from other source interrupt information to obtain the third-level merged interrupt signal Int_t0. The interrupt merging information of other source interrupt information (Int_src1, Int_src2, Int_src3, ..., Int_srcN) follows the same pattern, and will not be elaborated here.
[0078] In this embodiment of the application, interrupt information corresponding to different interrupt sources in the interrupt parameter table can be automatically obtained through scripts to improve verification efficiency.
[0079] Step S402: For any dimension of information, select the checker script macro that matches the source interrupt information and the interrupt merging information respectively.
[0080] After obtaining the interrupt parameter table, the source interrupt information of any dimension and the interrupt merging information corresponding to the source interrupt information can be obtained through the interrupt parameter table. Then, based on the information recorded in each dimension, the corresponding checker script macro can be selected to configure a checker that can perform the corresponding check function to detect the interrupt signal.
[0081] In an optional implementation, different identification information can be set for the source interrupt signal from which the source interrupt information originates, as well as for the interrupt signal obtained by merging the source interrupt signal with other interrupt signals, to distinguish them. That is, based on the identification information, it can be determined whether the interrupt signal to be verified is the source interrupt signal or the merged interrupt signal, and then the corresponding checker script macro can be selected for further verification.
[0082] In this embodiment of the application, the checker script macro is a preprocessing macro that can be used to configure interrupt checkers that implement different checking functions. The interrupt checker is a logic module used to actually perform interrupt checking functions, while the checker script macro is used to control the behavior, function selection, or whether to enable the interrupt checker.
[0083] Step S403: Using the inspector script macro, based on the source interrupt information and interrupt merging information recorded in the corresponding one-dimensional information, configure an interrupt inspector with the corresponding function, and instantiate the interrupt inspector in the verification environment to check the source interrupt signal and other interrupt signals merged with the source interrupt signal.
[0084] After selecting the corresponding checker script macro, the checker script macro can be used to configure an interrupt checker with corresponding functions based on the source interrupt information and interrupt merging information recorded in the corresponding one-dimensional information. The interrupt checker can then be instantiated in the verification environment. Through the interrupt checker, interrupt checking based on automated input stimulation can be realized to output corresponding results, thereby checking the source interrupt signal and other interrupt signals merged with the source interrupt signal. This eliminates the need to manually instantiate the interrupt checker, reduces the probability of human error, and can greatly improve verification efficiency and accuracy.
[0085] In this application embodiment, based on the characteristics of interrupts, interrupts can be verified from several aspects such as interrupt type, interrupt merging, and interrupt-related registers. The following, in conjunction with the accompanying drawings, provides a detailed description of the verification function of the interrupt checker, which is instantiated based on different characteristics of interrupts in this application embodiment.
[0086] First, the interrupt type verification in the embodiments of this application will be introduced.
[0087] In this embodiment of the application, the signal type of the interrupt signal includes at least pulse signals and level signals. Figure 5 These are example diagrams of timing waveforms for signals of different interrupt types, such as... Figure 5 As shown, CLK represents a continuous clock signal, serving as a reference for the clock signal width of pulse and level signals. int_pluse represents a pulse-type interrupt signal. It can be seen that the pulse interrupt signal has a shorter duration, which can be one (1clk in the figure) or several clock signal widths (3clk in the figure example). int_level represents a level-type interrupt signal, which can last for many clock signal widths (Nclk in the figure example).
[0088] In this embodiment of the application, interrupt merging can be performed based on source interrupts of the same signal type. For example, multiple pulse interrupt signals can be merged into one interrupt signal output. During the interrupt merging process, interrupt type conversion will occur. For example, possible conversions include: input pulse interrupt signal, merged output pulse interrupt signal; input pulse interrupt signal, merged output level interrupt signal; input level interrupt signal, merged output level interrupt signal.
[0089] Understandably, at each level of the interrupt merging node, there will be pulse, level, or other types of interrupt signals. These types can be determined according to system requirements. Therefore, when verifying interrupts, it is necessary to test whether the types of these interrupt signals meet the requirements. For example, the SVA (SystemVerilog Assertion) method can be used for verification. SVA is a dedicated syntax in the SystemVerilog language for assertion verification. By describing the timing behavior or functional attributes of the design, it can achieve automated verification of interrupt types, including detecting information such as the width and frequency of interrupt signals to determine the type of interrupt signal.
[0090] In an optional implementation, the interrupt checker can be used to check the source interrupt signal from which the source interrupt information originates, taking the source interrupt signal as input and outputting an output signal corresponding to the source interrupt signal; wherein, if the check passes, the output signal should be consistent with the signal segment of the input source interrupt signal, so that the output signal can be used to determine the input source interrupt signal and other source interrupt signals, and the signal type includes at least a pulse signal or a level signal.
[0091] In an optional embodiment, Figure 6 This is an example diagram of an interrupt checker used for interrupt type verification. Figure 7 Based on Figure 6 Example timing waveform diagram of the interrupt checker. Combined with... Figure 6 and Figure 7 CLK represents a continuous clock signal reference, int_check_en is the on / off parameter for controlling the interrupt checker. The interrupt checker takes the source interrupt signal int_src0 as the input interrupt to be verified and int_tag0 as the output interrupt. The output interrupt signal is completely consistent with the signal segment of the input source interrupt signal. Therefore, based on the output interrupt signal, it can be determined that the signal type of the interrupt signal is a pulse signal.
[0092] The interruption merging verification in the embodiments of this application will be described below.
[0093] Based on the interrupt information obtained from the interrupt parameter table, the interrupt merging process involves multi-level interrupt merging. For a certain level of interrupt merging, multiple interrupt inputs and outputs may be involved. Therefore, the merging of multiple interrupt signals can be verified by the interrupt checker.
[0094] In the design-to-be-verified process of interrupt merging, a generic interrupt merging IP (Intellectual Property Core) can be reused, such as... Figure 8 As shown, Figure 8This is a schematic diagram of a design to be verified involving interrupt merging. A certain level of interrupt merging involves multiple interrupt inputs (illustrated as Int_src_xxx) and outputs (illustrated as Int_Merge). During verification, the interrupt merging IP can be verified separately, for example, through simulation verification or formal verification. Formal verification is a verification technique that uses mathematical methods to prove whether the design to be verified meets specific specifications. It does not rely on test cases but uses logical reasoning, formal modeling, and automated mathematical proof to rigorously prove that the design to be verified behaves as expected under all possible inputs or scenarios. For example, the SVA verification method. In an optional implementation of this application, the interrupt checker can use the SVA verification method to implement the interrupt verification function.
[0095] In an optional implementation, the interrupt checker can be used to perform a merge check on the source interrupt signal from the source interrupt information source and other interrupt signals from the interrupt merging information source, taking the source interrupt signal and the other interrupt signals as inputs and outputting a merged output signal.
[0096] In a further optional implementation, the other interrupt signals from the interrupt merging information source may include: other source interrupt signals from other source interrupt information sources; the interrupt checker takes the source interrupt signal and the other source interrupt signals as inputs and outputs corresponding output signals.
[0097] In an optional embodiment, Figure 9 This is an example diagram of an interrupt checker used for interrupt merging verification. Figure 10 Based on Figure 9 Example timing waveform diagram of the interrupt checker. Combined with... Figure 9 and Figure 10 CLK represents a continuous clock signal reference, int_check_en is the on / off parameter for controlling the interrupt checker. The interrupt checker uses the source interrupt signal int_src0, as well as other source interrupt signals int_src1 and int_src2, as input interrupts to be verified. int_tag0 is the corresponding output signal, where int_tag0 can be a pulse-type merged interrupt signal, for example... Figure 10 The `int_merge_pluse` example shows that the input interrupt signals `int_src0`, `int_src1`, and `int_src2` are all pulse-type interrupt signals. The output merged interrupt signal `int_merge_pluse` can also be a pulse-type interrupt signal, or `int_tag0` can be a level-type merged interrupt signal, for example... Figure 10The int_merge_level shown is the merge interrupt signal output after int_merge_pluse is converted to a level type. The output merge interrupt type can be determined according to system requirements, and then the output merge interrupt signal can be used to determine whether it meets expectations.
[0098] Furthermore, during the interrupt merging process, not only are interrupt signals merged, but corresponding interrupt registers are also designed for each source interrupt signal to indicate which source interrupt signals are currently triggered. The processor core can use these corresponding interrupt status registers to read back and query level by level, and finally find all the source interrupt signals.
[0099] In this embodiment of the application, the interrupt matching register includes at least an interrupt mask register. If the value of the interrupt mask register matching a certain source interrupt signal is configured as 1, the source interrupt signal will be masked and will not be merged into the interrupt output. If the mask is configured as 0, the source interrupt signal will not be masked and can be merged into the interrupt output.
[0100] The raw status register without masking is the original interrupt status. Regardless of the mask configuration value, as long as a source interrupt signal is triggered, the raw register associated with that source interrupt signal will be automatically set to 1.
[0101] After the masking effect is applied to the STA status register, if the mask is configured to 0 after the source interrupt signal is triggered, the STA status register and the raw status register will both be set to 1. If the mask is configured to 1, the raw register will be automatically set to 1, while the value of the STA status register will remain at 0. That is, the STA status register is the state after the mask is applied to the source interrupt signal.
[0102] The Interrupt Clear (CLR) register is used by the processor core to clear the STA / raw status registers after identifying the source interrupt signal. Otherwise, the STA register will remain at 1, causing the processor core to continuously receive interrupts and resulting in an interrupt storm. Setting the CLR register to 1 will set both the raw and STA registers to 0. However, not all interrupt merging types include a CLR register. Only pulse-type source interrupt signals merged into level-type interrupts will have a CLR register, because the level signal of the source interrupt signal is generated by the source module and cannot be cleared by the processor core through the CLR register.
[0103] In this embodiment of the application, the function of the interrupt-related register also needs to be verified during interrupt verification.
[0104] In an optional implementation, the other interrupt signals from which the interrupt merging information originates include: an interrupt masking signal; the interrupt checker takes the source interrupt signal and the interrupt masking signal as inputs and outputs a corresponding output signal; wherein, in the output signal, the signal segment of the source interrupt signal corresponding to the signal segment where the interrupt masking signal has a first value is masked.
[0105] In an optional embodiment, Figure 11 This is an example diagram of an interrupt checker used for verifying interrupt-related registers. Figure 12 Based on Figure 11 Example timing waveform diagram of the interrupt checker. Combined with... Figure 11 and Figure 12 CLK represents the continuous clock signal reference, and int_check_en is the on / off parameter for controlling the interrupt checker. The interrupt checker takes the source interrupt signal int_src0 and the interrupt mask signal int_mask as inputs and outputs the corresponding output signal int_tag0. Specifically, for signal segments with an int_mask value of 1, the signal segment corresponding to int_src0 is masked, and the value of int_tag0 in the masked segment is 0. For signal segments with an int_mask value of 0, the signal segment corresponding to int_src0 is not masked, so the signal segment corresponding to int_tag0 in the unmasked segment is consistent with the signal segment of the input int_src0. This interrupt checker can verify whether the function of the interrupt mask register is as expected.
[0106] In an optional implementation, other interrupt signals from the interrupt merging information source include: an interrupt clearing signal; the interrupt checker takes the source interrupt signal and the interrupt clearing signal as inputs and outputs a corresponding output signal; wherein, in the output signal, the signal segment of the source interrupt signal corresponding to the signal segment where the interrupt clearing signal has a first value is cleared.
[0107] In an optional embodiment, Figure 13 This is another example diagram of an interrupt checker used for interrupt-related register verification. Figure 14 Based on Figure 13 Example timing waveform diagram of the interrupt checker. Combined with... Figure 13 and Figure 14CLK represents the continuous clock signal reference, and int_check_en is the on / off parameter for controlling the interrupt checker. The interrupt checker takes the source interrupt signal int_src0 and the interrupt clear signal int_clr as inputs and outputs the corresponding output signal int_tag0. Specifically, for signal segments with an int_clr value of 1, the signal segment corresponding to int_src0 is cleared, and the value of int_tag0 in the signal segment corresponding to the cleared segment is 0. For signal segments with an int_clr value of 0, the signal segment corresponding to int_src0 is not cleared, so the signal segment corresponding to int_tag0 in the uncleared segment is consistent with the signal segment of the input int_src0. This interrupt checker can be used to verify whether the interrupt clear register functions as expected.
[0108] Furthermore, the interrupt mask register function and the interrupt clear register function can be verified simultaneously.
[0109] In an optional implementation, the other interrupt signals from the interrupt merging information source include: other source interrupt signals from other source interrupt information sources, interrupt masking signals, and interrupt clearing signals; the interrupt checker takes the source interrupt signal, at least one other source interrupt signal, interrupt masking signal, and interrupt clearing signal as input, and outputs corresponding output signals; wherein, in the output signals, the signal segments of other source interrupt signals corresponding to the signal segments of the interrupt masking signal with a first value are masked, and the signal segments of source interrupt signals corresponding to the signal segments of the interrupt clearing signal with a first value are cleared.
[0110] In an optional embodiment, Figure 15 This is another example diagram of an interrupt checker used for verifying interrupt-related registers. Figure 16 Based on Figure 15 Example timing waveform diagram of the interrupt checker. Combined with... Figure 15 and Figure 16CLK represents the continuous clock signal reference, and int_check_en is the on / off parameter for controlling the interrupt checker. The interrupt checker takes the source interrupt signal int_src0, other source interrupt signals int_src1, interrupt mask signal int_mask, and interrupt clear signal int_clr as inputs, and outputs the corresponding output signal int_tag0. Specifically, for signal segments with an int_mask value of 1, the corresponding signal segment of int_src1 is masked, so the output value of int_tag0 in the corresponding signal segment is 0; for signal segments with an int_clr value of 1, the corresponding signal segment of int_src0 is cleared, so the output value of int_tag0 in the corresponding signal segment is 0; int_tag0 is the interrupt signal output by merging the two source interrupt signals int_src0 and int_src1 after interrupt masking and interrupt clearing.
[0111] Furthermore, in this embodiment, when faced with interrupt requests from multiple different interrupt sources, the interrupt checker can process the interrupt signals according to their interrupt priorities; wherein, the interrupt priority of software interrupt signals is higher than that of unmasked interrupt signals; the interrupt priority of unmasked interrupt signals is higher than that of maskable interrupt signals; and the interrupt priority of maskable interrupt signals is higher than that of single-step interrupt signals. Single-step interrupt is a debugging mechanism in computer systems that allows a program to execute instruction by instruction, triggering an interrupt after each instruction is executed.
[0112] In practical implementation, when multiple interrupt sources with different interrupt priorities issue interrupt requests simultaneously, they are processed sequentially according to their priority. Specifically, if a higher interrupt priority interrupt request occurs while a lower priority interrupt is being processed, the process should switch to handling the higher priority interrupt request. After processing the higher priority interrupt request, the process should return to the original interrupt service routine corresponding to the lower priority interrupt request. If a lower priority interrupt request occurs while a higher priority interrupt is being processed, it can be ignored immediately. Furthermore, if an interrupt request of the same priority level occurs during interrupt processing, the new interrupt request should only be processed after the current interrupt processing is completed.
[0113] As can be seen, the instantiation method of the interrupt checker provided in this application embodiment obtains an interrupt parameter table, which includes multi-dimensional information. One-dimensional information records a source interrupt information and corresponding interrupt merging information. The source interrupt information indicates the interrupt information of a source interrupt signal generated by a source module, and the interrupt merging information indicates the interrupt information corresponding to other interrupt signals merged with the source interrupt signal. These other interrupt signals are generated by other modules. For any one dimension of information, a checker script macro matching the source interrupt information and interrupt merging information is selected. Then, the checker script macro is used to, based on the corresponding source interrupt information and interrupt merging information recorded in the one-dimensional information, determine the interrupt information. The method merges information, configures corresponding interrupt checkers, and instantiates the interrupt checkers in the verification environment to check the source interrupt signal and other interrupt signals merged with the source interrupt signal. In other words, the instantiation method provided in this application can automatically obtain interrupt information corresponding to different interrupt sources in the interrupt parameter table through a script. The interrupt information includes source interrupt information and interrupt merging information. Then, the matching checker script macro can be selected according to the interrupt information, and the corresponding interrupt checker can be configured. Different interrupt checkers can be instantiated to verify the interrupt signal without manually de-instantiating the interrupt checker, thereby greatly improving the efficiency of interrupt verification.
[0114] Improving efficiency is very important for verification personnel. In order to better demonstrate the effect of the interrupt checker instantiation method provided in this application compared with the original technology, the inventors used two methods (the interrupt checker instantiation method provided in this application and the original technology) to perform interrupt verification on the same chip design to be verified. The verification results are compared in Table 2.
[0115]
[0116] Table 2
[0117] It is easy to see from Table 2 above that the efficiency improvement of the interrupt checker instantiation method provided by the embodiments of this application is significant, reducing the verification time from 10 days to 3 days, thus achieving the expected effect of improving the efficiency of interrupt verification.
[0118] In a further optional implementation, based on the instantiation method of the interrupt checker provided in the embodiments of this application, the embodiments of this application also provide an instantiation device for the interrupt checker. The instantiation device for the interrupt checker described below can be referred to in correspondence with the content of the instantiation method for the interrupt checker described above. In an optional implementation, Figure 17 This is a structural example diagram of an instantiation device of the interrupt checker provided in an embodiment of this application. (Refer to...) Figure 17 The device may include:
[0119] Interrupt information acquisition module 1701 is used to acquire an interrupt parameter table. The interrupt parameter table includes multi-dimensional information. One-dimensional information records a source interrupt information and a corresponding interrupt merging information. The source interrupt information indicates the interrupt information of the source interrupt signal generated by the source module. The interrupt merging information indicates the interrupt information corresponding to other interrupt signals merged with the source interrupt signal. The other interrupt signals are generated by other modules.
[0120] The inspector script macro determination module 1702 is used to select the inspector script macro that matches the source interrupt information and the interrupt merging information for any dimension of information.
[0121] The interrupt checker configuration and instantiation module 1703 is used to configure an interrupt checker with corresponding functions based on the source interrupt information and interrupt merging information recorded in the corresponding one-dimensional information using the checker script macro, and instantiate the interrupt checker into the verification environment to check the source interrupt signal and other interrupt signals merged with the source interrupt signal.
[0122] In an optional implementation, the interrupt checker is used to check the source interrupt signal from which the source interrupt information originates, and takes the source interrupt signal as input to output an output signal corresponding to the source interrupt signal.
[0123] And / or,
[0124] The interrupt checker is used to perform a merge check on the source interrupt signal from the source interrupt information source and other interrupt signals from the interrupt merge information source, and outputs a merged output signal with the source interrupt signal and the other interrupt signals as input.
[0125] In an optional implementation, the other interrupt signals from which the interrupt merging information originates include: other source interrupt signals from other source interrupt information sources; the interrupt checker takes the source interrupt signal and the other source interrupt signals as inputs and outputs corresponding output signals.
[0126] In an optional implementation, other interrupt signals from which the interrupt merging information originates include: an interrupt masking signal; the interrupt checker takes the source interrupt signal and the interrupt masking signal as input and outputs a corresponding output signal.
[0127] Among the output signals, the signal segment of the source interrupt signal corresponding to the signal segment with the first interrupt masking signal is masked.
[0128] In an optional implementation, other interrupt signals from which the interrupt merging information originates include: an interrupt clearing signal; the interrupt checker takes the source interrupt signal and the interrupt clearing signal as inputs and outputs corresponding output signals;
[0129] Among the output signals, the signal segment corresponding to the source interrupt signal of the signal segment where the interrupt clear signal is the first value is cleared.
[0130] In an optional implementation, the other interrupt signals from which the interrupt merging information originates include: other source interrupt signals from other source interrupt information sources, interrupt masking signals, and interrupt clearing signals; the interrupt checker takes the source interrupt signal, at least one other source interrupt signal, interrupt masking signal, and interrupt clearing signal as input, and outputs the corresponding output signal;
[0131] Among the output signals, the signal segments of other source interrupt signals corresponding to the signal segments where the interrupt masking signal has a first value are masked, and the signal segments of source interrupt signals corresponding to the signal segments where the interrupt clearing signal has a first value are cleared.
[0132] In an optional implementation, the interrupt merging information is interrupt merging information of at least one level, including first-level interrupt merging information, or first-level interrupt merging information and non-first-level interrupt merging information;
[0133] Among them, the first-level interrupt merging information indicates: the interrupt information corresponding to other source interrupt signals from other source interrupt information sources that are merged with the source interrupt signal from the source interrupt information source, or the interrupt information corresponding to other source interrupt signals from multiple other source interrupt information sources that are merged.
[0134] Non-Level 1 Interrupt Merging Information Indication: The previous level interrupt merging information of the source interrupt signal and other source interrupt signals from which the merging information originates.
[0135] In an optional implementation, the interrupt checker processes the interrupt signal according to the interrupt priority of the interrupt signal;
[0136] Among them, the interrupt priority of software interrupt signals is higher than that of non-maskable interrupt signals; the interrupt priority of non-maskable interrupt signals is higher than that of maskable interrupt signals; and the interrupt priority of maskable interrupt signals is higher than that of single-step interrupt signals.
[0137] In a further optional implementation, embodiments of this application also provide a computer device including at least one memory and at least one processor, the memory storing computer-executable instructions, and the processor invoking the computer-executable instructions to execute the instantiation method of the interrupt checker as described in the foregoing embodiments.
[0138] In a further optional implementation, this application embodiment also provides a storage medium that stores computer-executable instructions, which, when executed by a processor, implement the instantiation method of the interrupt checker as described in the foregoing embodiments.
[0139] In a further optional implementation, this application embodiment also provides a computer program product including computer-executable instructions, which, when executed by a processor, implement the instantiation method of the interrupt checker as described in the foregoing embodiments.
[0140] The foregoing describes multiple embodiment schemes provided by the embodiments of this application. The optional methods described in each embodiment scheme can be combined and cross-referenced with each other without conflict, thereby extending to a variety of possible embodiment schemes. These can all be considered as the embodiment schemes disclosed and published by the embodiments of this application.
[0141] While the embodiments disclosed above are described in this application, this application is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of this application; therefore, the scope of protection of this application should be determined by the scope defined in the claims.
Claims
1. A method for instantiating an interrupt checker, characterized in that, include: Obtain the interrupt parameter table, which includes multi-dimensional information. The one-dimensional information records a source interrupt information and a corresponding interrupt merging information. The source interrupt information indicates the interrupt information of the source interrupt signal generated by the source module. The interrupt merging information indicates the interrupt information corresponding to other interrupt signals merged with the source interrupt signal. The other interrupt signals are generated by other modules. For any dimension of information, select the checker script macros that match the source interrupt information and the interrupt merging information respectively; Using the inspector script macro, based on the source interrupt information and interrupt merging information recorded in the corresponding one-dimensional information, an interrupt inspector with corresponding functions is configured, and the interrupt inspector is instantiated in the verification environment to inspect the source interrupt signal and other interrupt signals merged with the source interrupt signal.
2. The instantiation method of the interrupt checker according to claim 1, characterized in that, The interrupt checker is used to check the source interrupt signal from which the source interrupt information originates, and takes the source interrupt signal as input to output an output signal corresponding to the source interrupt signal. And / or, The interrupt checker is used to perform a merge check on the source interrupt signal from the source interrupt information source and other interrupt signals from the interrupt merge information source, and outputs a merged output signal with the source interrupt signal and the other interrupt signals as input.
3. The instantiation method of the interrupt checker according to claim 2, characterized in that, Other interrupt signals from the interrupt merging information sources include: other source interrupt signals from other source interrupt information sources; the interrupt checker takes the source interrupt signal and the other source interrupt signals as inputs and outputs corresponding output signals.
4. The instantiation method of the interrupt checker according to claim 2, characterized in that, Other interrupt signals from which the interrupt merging information originates include: an interrupt masking signal; the interrupt checker takes the source interrupt signal and the interrupt masking signal as input and outputs a corresponding output signal; Among the output signals, the signal segment of the source interrupt signal corresponding to the signal segment with the first interrupt masking signal is masked.
5. The instantiation method of the interrupt checker according to claim 2, characterized in that, Other interrupt signals from which the interrupt merging information originates include: an interrupt clearing signal; the interrupt checker takes the source interrupt signal and the interrupt clearing signal as input and outputs the corresponding output signal; Among the output signals, the signal segment corresponding to the source interrupt signal of the signal segment where the interrupt clear signal is the first value is cleared.
6. The instantiation method of the interrupt checker according to claim 2, characterized in that, Other interrupt signals from the interrupt merging information source include: other source interrupt signals from other source interrupt information sources, interrupt masking signals, and interrupt clearing signals; the interrupt checker takes the source interrupt signal, at least one other source interrupt signal, interrupt masking signal, and interrupt clearing signal as input, and outputs the corresponding output signal; Among the output signals, the signal segments of other source interrupt signals corresponding to the signal segments where the interrupt masking signal has a first value are masked, and the signal segments of source interrupt signals corresponding to the signal segments where the interrupt clearing signal has a first value are cleared.
7. The instantiation method of the interrupt checker according to any one of claims 1-6, characterized in that, The interruption merging information is interruption merging information at least at one level, including first-level interruption merging information, or first-level interruption merging information and non-first-level interruption merging information; Among them, the first-level interrupt merging information indicates: the interrupt information corresponding to other source interrupt signals from other source interrupt information sources that are merged with the source interrupt signal from the source interrupt information source, or the interrupt information corresponding to other source interrupt signals from multiple other source interrupt information sources that are merged. Non-Level 1 Interrupt Merging Information Indication: The previous level interrupt merging information of the source interrupt signal and other source interrupt signals from which the merging information originates.
8. The instantiation method of the interrupt checker according to any one of claims 1-6, characterized in that, The interrupt checker processes the interrupt signals according to their interrupt priority. Among them, the interrupt priority of software interrupt signals is higher than that of non-maskable interrupt signals; the interrupt priority of non-maskable interrupt signals is higher than that of maskable interrupt signals; and the interrupt priority of maskable interrupt signals is higher than that of single-step interrupt signals.
9. An instantiation device for an interrupt checker, characterized in that, include: An interrupt information acquisition module is used to acquire an interrupt parameter table. The interrupt parameter table includes multi-dimensional information. One-dimensional information records a source interrupt information and a corresponding interrupt merging information. The source interrupt information indicates the interrupt information of the source interrupt signal generated by the source module. The interrupt merging information indicates the interrupt information corresponding to other interrupt signals merged with the source interrupt signal. The other interrupt signals are generated by other modules. The inspector script macro determination module is used to select the inspector script macro that matches the source interrupt information and the interrupt merging information for any dimension of information. The interrupt checker configuration and instantiation module is used to configure an interrupt checker with corresponding functions based on the source interrupt information and interrupt merging information recorded in the corresponding one-dimensional information using the checker script macro, and instantiate the interrupt checker into the verification environment to check the source interrupt signal and other interrupt signals merged with the source interrupt signal.
10. A computer device, characterized in that, It includes at least one memory and at least one processor, the memory storing computer-executable instructions, and the processor invoking the computer-executable instructions to perform an instantiation method of the interrupt checker as described in any one of claims 1-8.
11. A storage medium, characterized in that, The storage medium stores computer-executable instructions, which, when executed by a processor, implement the instantiation method of the interrupt checker as described in any one of claims 1-8.
12. A computer program product, characterized in that, Includes computer-executable instructions, which, when executed by a processor, implement the instantiation method of the interrupt checker as described in any one of claims 1-8.