Grid substation wiring diagram binarization method, device, equipment and medium

Abstract

The application relates to the technical field of computers and discloses a power grid station wiring diagram binarization method, device, equipment and medium. The method comprises the following steps: collecting a power grid station degradation wiring diagram, adjusting the power grid station degradation wiring diagram to obtain an original degradation image; inputting the original degradation image into a binarization network model, wherein the binarization network model comprises an encoding network, a feature fusion network and a decoding network; step-by-step down-sampling and encoding the original degradation image through the encoding network to obtain a plurality of feature maps with different scales; fusing the feature maps with different scales through the feature fusion network to obtain a plurality of fused feature maps; and sequentially up-sampling the fused feature maps through the decoding network to obtain a clear binarized image. The application effectively retains the integrity of key elements of a power grid station wiring diagram, balances the computing power and efficiency, and provides a feasible technical path for electronic and digital operation and maintenance of an intelligent power grid station wiring diagram.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method, apparatus, equipment and medium for binarizing power grid substation wiring diagrams. Background Technology

[0002] With the deepening development of smart grids and digital operation and maintenance, substation wiring diagrams are core materials for power system operation, maintenance, and simulation training. The diagrams are composed of elements such as busbars, circuit breakers, disconnectors, transformers, grounding disconnectors, and connecting lines. They are characterized by "many lines, dense symbols, strong directionality, and complex backgrounds." Therefore, the need for the digitization and semanticization of substation wiring diagrams is becoming increasingly urgent.

[0003] Wiring diagrams obtained through traditional scanning or photography often suffer from problems such as uneven lighting, ink fading, background grid interference, and element adhesion, posing significant challenges to subsequent element recognition, topology reconstruction, and fault diagnosis. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to overcome the shortcomings of the prior art and provide a binarization method, apparatus, equipment and medium for power grid substation wiring diagrams.

[0005] This invention provides the following technical solution:

[0006] In a first aspect, the present invention provides a method for binarizing power grid substation wiring diagrams, the method comprising:

[0007] Collect the degraded wiring diagrams of power grid substations, adjust the degraded wiring diagrams of power grid substations, and obtain the original degraded image;

[0008] The original degraded image is input into a binarization network model, wherein the binarization network model includes an encoding network, a feature fusion network, and a decoding network. The encoding network includes an initial stage encoding network and an intermediate stage encoding network. The feature fusion network includes a feature alignment module, an encoding module, and a linear projection module. The decoding network includes a decoding module and the linear projection module.

[0009] The original degraded image is progressively downsampled and encoded using the coding network to obtain multiple feature maps of different scales.

[0010] The feature fusion network is used to fuse the feature maps of different scales to obtain multiple fused feature maps;

[0011] The decoding network sequentially upsamples and decodes each of the fused feature maps to obtain a clear binarized image.

[0012] In an optional implementation, the initial stage coding network consists of a convolutional downsampling module, which is composed of a convolutional layer, a batch normalization layer and a ReLU activation function cascaded together.

[0013] The intermediate stage coding network is composed of a first intermediate stage sub-network, a second intermediate stage sub-network, a third intermediate stage sub-network, and a fourth intermediate stage sub-network cascaded together. Each of the first, second, third, and fourth intermediate stage sub-networks is composed of an image patch embedding layer, an element-wise addition module, an encoding module, and a linear projection module cascaded together. The image patch embedding layer is composed of a convolutional layer, a linear projection module, and a layer normalization layer cascaded together. The encoding module is composed of multiple Transformer blocks cascaded together. Each Transformer block is composed of a layer normalization layer, a multi-head self-attention block, an element-wise addition module, a layer normalization layer, a multilayer perceptron module, and an element-wise addition module cascaded together.

[0014] In an optional implementation, the step of progressively downsampling and encoding the original degraded image through the encoding network to obtain multiple feature maps of different scales includes:

[0015] The original degraded image is input into the initial stage coding network, and the original degraded image is subjected to feature extraction and downsampling through the convolutional downsampling module to obtain a feature map of the first scale;

[0016] The feature map at the first scale is input into the first intermediate stage sub-network. The feature map at the first scale is segmented and transformed by the image block embedding layer in the first intermediate stage sub-network to obtain the first embedded image block. The first embedded image block and its learnable position embedding code of the same size are added element-wise by the element-wise addition module in the first intermediate stage sub-network to obtain the first position embedded image block sequence. The first position embedded image block sequence is encoded and reconstructed by the encoding module and the linear projection module in the first intermediate stage sub-network to obtain the feature map at the second scale.

[0017] The feature map at the second scale is input into the second intermediate stage sub-network. The feature map at the second scale is segmented and transformed by the image block embedding layer in the second intermediate stage sub-network to obtain the second embedded image block. The second embedded image block and its learnable position embedding code of the same size are added element-wise by the element-wise addition module in the second intermediate stage sub-network to obtain the second position embedding image block sequence. The second position embedding image block sequence is encoded and reconstructed by the encoding module and the linear projection module in the second intermediate stage sub-network to obtain the feature map at the third scale.

[0018] The feature map at the third scale is input into the third intermediate stage sub-network. The feature map at the third scale is segmented and transformed by the image patch embedding layer in the third intermediate stage sub-network to obtain the third embedded image patch. The third embedded image patch and its learnable position embedding code of the same size are added element-wise by the element-wise addition module in the third intermediate stage sub-network to obtain the third position embedded image patch sequence. The third position embedded image patch sequence is encoded and reconstructed by the encoding module and linear projection module in the third intermediate stage sub-network to obtain the feature map at the fourth scale.

[0019] The feature map at the fourth scale is input into the fourth intermediate stage sub-network. The image patch embedding layer in the fourth intermediate stage sub-network segments and transforms the feature map at the fourth scale to obtain a fourth embedded image patch. The element-wise addition module in the fourth intermediate stage sub-network adds the fourth embedded image patch and its learnable position embedding code of the same size element-wise to obtain a fourth position embedded image patch sequence. The encoding module and linear projection module in the fourth intermediate stage sub-network encode and reconstruct the fourth position embedded image patch sequence to obtain the feature map at the fifth scale.

[0020] In an optional implementation, the step of encoding and reconstructing the first-position embedded image patch sequence through the encoding module and linear projection module in the first intermediate stage sub-network to obtain a feature map at the second scale includes:

[0021] The first position embedded image block sequence is encoded by each Transformer block in the encoding module of the first intermediate stage sub-network to obtain a corresponding encoding matrix. The multiple encoding matrices are reconstructed by the linear projection module in the first intermediate stage sub-network to obtain the feature map of the second scale.

[0022] The step of encoding the first-position embedded image block sequence by each Transformer block to obtain a corresponding encoding matrix includes:

[0023] The first position embedded image block sequence is normalized by the layer normalization layer in the Transformer block to obtain the query vector, key vector and value vector;

[0024] The query vector, the key vector, and the value vector are subjected to multiple self-attention calculations by the multi-head self-attention block in the Transformer block to obtain multiple self-attention output values. The self-attention output values ​​are concatenated and an output matrix is ​​generated by linear projection.

[0025] The output matrix and the first position embedded image block sequence are added element by element by the element-wise addition module to obtain a first addition result. The first addition result is normalized by the layer normalization layer to obtain a normalized first addition result.

[0026] The normalized first sum result is feature-mapped by the multilayer perceptron module to obtain the mapped first sum result. The element-wise addition module adds the mapped first sum result and the first sum result element-wise to obtain the corresponding encoding matrix.

[0027] In an optional implementation, the feature alignment module is composed of an upsampling module, a stitching module and a linear projection module cascaded together, and the decoding network further includes an upsampling module, and the decoding module is composed of multiple Transformer blocks cascaded together.

[0028] In an optional implementation, the step of fusing the feature maps of different scales through the feature fusion network to obtain multiple fused feature maps includes:

[0029] The feature maps at different scales are input into the feature alignment module. The feature alignment module upsamples the feature maps at the second scale, the third scale, the fourth scale, and the fifth scale to the same scale as the feature map at the first scale, respectively, to obtain the second spatial feature map, the third spatial feature map, the fourth spatial feature map, and the fifth spatial feature map.

[0030] The second spatial feature map, the third spatial feature map, the fourth spatial feature map, and the fifth spatial feature map are flattened by the upsampling module in the feature alignment module to obtain the second image block sequence, the third image block sequence, the fourth image block sequence, and the fifth image block sequence, respectively.

[0031] The stitching module stitches together the second image block sequence, the third image block sequence, the fourth image block sequence, and the fifth image block sequence to obtain a stitched image block sequence. The linear projection module in the feature alignment module reconstructs the stitched image block sequence to obtain a first reconstructed image block sequence.

[0032] The first reconstructed image block sequence is input into the encoding module of the feature fusion network, and the first reconstructed image block sequence is encoded by each Transformer block in the encoding module of the feature fusion network to obtain the encoded image block sequence.

[0033] The encoded image patch sequence is input into the linear projection module in the feature fusion network, and the encoded image patch sequence is reconstructed by the linear projection module in the feature fusion network to obtain a second reconstructed image patch sequence, wherein the second reconstructed image patch sequence includes multiple fused feature maps.

[0034] In an optional implementation, the step of sequentially upsampling and decoding each of the fused feature maps through the decoding network to obtain a binarized, clear image includes:

[0035] The fused feature maps are input into the upsampling module in the decoding network, and the upsampling module in the decoding network upsamples the fused feature maps to obtain an upsampled feature map sequence.

[0036] The upsampled feature map sequence is input into the decoding module, and each Transformer block in the decoding module encodes the upsampled feature map sequence to obtain the encoded feature map sequence.

[0037] The encoded feature map sequence is input into the linear projection module in the decoding network, and the encoded feature map sequence is reconstructed by the linear projection module in the decoding network to obtain the binarized clear image.

[0038] Secondly, the present invention provides a binarization device for power grid substation wiring diagrams, the device comprising:

[0039] The acquisition module is used to acquire degraded wiring diagrams of power grid substations and adjust the degraded wiring diagrams of power grid substations to obtain the original degraded image;

[0040] An input module is used to input the original degraded image into a binarization network model, wherein the binarization network model includes an encoding network, a feature fusion network, and a decoding network; the encoding network includes an initial stage encoding network and an intermediate stage encoding network; the feature fusion network includes a feature alignment module, an encoding module, and a linear projection module; and the decoding network includes a decoding module and the linear projection module.

[0041] The downsampling encoding module is used to progressively downsample and encode the original degraded image through the encoding network to obtain multiple feature maps of different scales.

[0042] The fusion module is used to fuse the feature maps of different scales through the feature fusion network to obtain multiple fused feature maps;

[0043] The upsampling decoding module is used to sequentially upsample and decode each of the fused feature maps through the decoding network to obtain a clear image after binarization.

[0044] Thirdly, this disclosure provides a computer device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the steps of the binarization method for power grid substation wiring diagrams described in the first aspect.

[0045] Fourthly, this disclosure provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the binarization method for power grid substation wiring diagrams described in the first aspect.

[0046] The beneficial effects of this application are:

[0047] The binarization method for power grid substation wiring diagrams provided in this application adopts a pyramid-structured encoding network, which limits global modeling to a manageable sequence size and introduces feature fusion and decoding networks. It balances the integrity of large structures with the details of small primitives, effectively preserves the integrity of key primitives in power grid substation wiring diagrams, balances computing power and efficiency, and improves the generalization of different power grid substation wiring diagrams. It provides a feasible and implementable technical path for the electronic and semantic representation of smart grid substation wiring diagrams and subsequent digital operation and maintenance such as primitive recognition and topology reconstruction.

[0048] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0049] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort. In the various drawings, similar components are numbered similarly.

[0050] Figure 1 This document illustrates a flowchart of a binarization method for a power grid substation wiring diagram provided in an embodiment of this application.

[0051] Figure 2 This illustration shows a structural diagram of a binarized network model provided in an embodiment of this application;

[0052] Figure 3 This illustration shows a schematic diagram of the structure of an initial stage coding network provided in an embodiment of this application;

[0053] Figure 4 This illustration shows a schematic diagram of the structure of an intermediate stage coding network provided in an embodiment of this application;

[0054] Figure 5 This paper shows a schematic diagram of the structure of a feature fusion network provided in an embodiment of this application;

[0055] Figure 6 This paper shows a schematic diagram of the structure of a decoding network provided in an embodiment of this application;

[0056] Figure 7 This paper shows a schematic diagram of the structure of a binarization device for a power grid substation wiring diagram provided in an embodiment of this application. Detailed Implementation

[0057] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0058] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0059] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the template description is for the purpose of describing particular embodiments only and is not intended to limit the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0060] Example 1

[0061] In existing technologies, traditional Otsu, Niblack, or Sauvola local thresholding methods are prone to over- or under-segmentation at abrupt changes in illumination and mesh backgrounds. While CNN models based on U-Net and DeepLab improve continuity, they suffer from pixel breaks and adhesion in areas with thin wires and tightly packed small primitives. The Transformer's advantage in global context modeling provides a new approach to refined binarization; however, directly applying ViT to high-resolution scan images results in unacceptable memory consumption.

[0062] Based on the above-mentioned pain points, this application proposes a binarization method for power grid substation wiring diagrams, such as... Figure 1 The diagram shown is a flowchart of a binarization method for a power grid substation wiring diagram according to an embodiment of this application. The binarization method for a power grid substation wiring diagram provided in this embodiment includes the following steps:

[0063] Step S110: Collect the degraded wiring diagram of the power grid substation, adjust the degraded wiring diagram of the power grid substation, and obtain the original degraded image.

[0064] In this embodiment, degraded wiring diagrams of power grid substations are first acquired. Since degraded wiring diagrams of power grid substations are characterized by "many lines, dense symbols, many thin and long wires, and tightly arranged small-sized primitives", by adjusting the size of the degraded wiring diagrams of power grid substations and cropping them to a standardized size (e.g., 256×256×1) of the original degraded image, the local processing range can be reduced, allowing the model to focus more on small-scale details, avoiding the problem of "global information masking local details" in large-sized images, improving the fidelity of binarization for fine structures, reducing interference differences within a single image, and reducing the difficulty of model learning.

[0065] If the entire large image is processed directly, interference from different regions will affect each other, leading to a decrease in the model's generalization ability. In the embodiments of this application, after adjusting and cropping to small image blocks of uniform size, the processing logic and output resolution of each block are completely consistent. Subsequently, it is only necessary to stitch them together in their original positions to restore the complete large image, avoiding splicing misalignment and information loss caused by differences in block size, and meeting the requirements of actual operation and maintenance for drawing accuracy.

[0066] Step S120: Input the original degraded image into a binarization network model, wherein the binarization network model includes an encoding network, a feature fusion network, and a decoding network. The encoding network includes an initial stage encoding network and an intermediate stage encoding network. The feature fusion network includes a feature alignment module, an encoding module, and a linear projection module. The decoding network includes a decoding module and the linear projection module.

[0067] Furthermore, input the original degraded image as follows: Figure 2 The binarization network model shown in this embodiment assumes that the original degraded image is... ,in This represents the spatial resolution of the original degraded image (height: 256, width: 256). This indicates the number of color channels. Since this embodiment addresses the binarization issue, the original degraded image can be converted to a grayscale image, i.e.: Correspondingly, the original degraded image can be represented as .

[0068] Depend on Figure 2 As can be seen, the binarization network model includes an encoding network, a feature fusion network, and a decoding network. The encoding network includes an initial stage encoding network and an intermediate stage encoding network. The feature fusion network includes a feature alignment module, an encoding module, and a linear projection module. The decoding network includes an upsampling module, a decoding module, and a linear projection module. The binarization network model can progressively downsample the original degraded image to extract global semantics, then progressively upsample to restore spatial resolution, and finally fuse and project to obtain a clear binarized image with the same resolution as the original degraded image.

[0069] First, the encoding network in this embodiment adopts a pyramidal visual Transformer architecture. Except for the initial stage encoding network which uses a CNN (Convolutional Neural Network) architecture, all intermediate stage sub-networks in the remaining intermediate stage encoding networks adopt a similar Transformer architecture, as follows:

[0070] (1) The initial stage coding network consists of a convolutional downsampling module, such as Figure 3 As shown, the convolutional downsampling module consists of a cascaded convolutional layer Conv2d (3x3 convolution, stride=2, achieving 2x downsampling), a batch normalization layer BatchNorm2d, and a ReLU activation function. The input to the encoding network in the initial stage is the original degraded image. The output is a feature map of the first scale. ,in, This indicates the number of channels for the preset output characteristics;

[0071] (2) The intermediate stage coding network is composed of a first intermediate stage sub-network, a second intermediate stage sub-network, a third intermediate stage sub-network, and a fourth intermediate stage sub-network cascaded together. The input of the first intermediate stage sub-network is the output of the initial stage coding network, that is, the feature map of the first scale. The output of the first intermediate stage sub-network is the feature map of the second scale. The input to the second intermediate stage subnetwork is the output of the first intermediate stage subnetwork, which is the feature map at the second scale. The output of the second intermediate stage sub-network is the feature map of the third scale. The input to the third intermediate stage subnetwork is the output of the second intermediate stage subnetwork, which is the feature map at the third scale. The output of the third intermediate stage sub-network is a feature map of the fourth scale. The input to the fourth intermediate stage subnetwork is the output of the third intermediate stage subnetwork, which is the feature map at the fourth scale. The output of the fourth intermediate stage subnetwork is the feature map of the fifth scale. By progressively downsampling in four stages (1 / 4→1 / 8→1 / 16→1 / 32) to gradually reduce the feature map size while increasing the number of channels, a pyramid feature representation similar to CNN is constructed. The internal structures of the first, second, third, and fourth intermediate stage subnetworks are identical, as follows: Figure 4 As shown in the left part, each consists of an image patch embedding layer and an element-wise addition module (referred to as "image patch embedding layer" in the accompanying drawings of this application). The image patch embedding layer consists of a concatenated element-wise addition module, an encoding module, and a linear projection module. The image patch embedding layer is composed of a concatenated convolutional layer, a linear projection module, and a layer normalization layer. The encoding module is composed of multiple concatenated Transformer blocks, such as... Figure 4 As shown on the right, the Transformer block consists of a layer normalization layer, a multi-head self-attention block, an element-wise addition module, a layer normalization layer, a multilayer perceptron module, and an element-wise addition module cascaded together.

[0072] Secondly, in this embodiment, the feature fusion network focuses on "how to integrate feature maps from multiple different scales (a total of 5 scales) of the encoding network". and The design goal of "fusion into a high-resolution output" is to unify the multi-scale feature maps (4×, 8×, 16×, 32×) output from different intermediate stage sub-networks to a resolution equivalent to half the size of the original degraded image output from the initial stage coding network, so as to facilitate subsequent fusion. Figure 5As shown, the feature alignment module is composed of an upsampling module, a splicing module and a linear projection module cascaded together. The encoding module of the feature fusion network has the same internal structure as the encoding module in the intermediate stage encoding network, which is also composed of multiple Transformer blocks cascaded together.

[0073] Finally, as Figure 6 As shown, the decoding module of the decoding network has the same internal structure as the encoding module in the intermediate stage encoding network, which is also composed of multiple Transformer blocks cascaded together.

[0074] The aforementioned binarization network model adopts a three-level architecture of "encoding-feature fusion-decoding". The encoding network is responsible for multi-scale feature extraction, the feature fusion network is responsible for cross-scale information interaction, and the decoding network is responsible for resolution restoration. The functions of each module are complementary, avoiding the binarization defects caused by the limitation of a single module.

[0075] Step S130: The original degraded image is progressively downsampled and encoded through the encoding network to obtain multiple feature maps of different scales.

[0076] Specifically, the original degraded image is first input into the initial stage encoding network, and the original degraded image is subjected to feature extraction and downsampling through the convolutional downsampling module to obtain the feature map of the first scale. The initial stage encoding network, as the first-level feature extractor of the encoding network, achieves preliminary spatial downsampling and feature transformation through convolution operations, laying the foundation for the subsequent Transformer processing in each stage.

[0077] Furthermore, the feature map at the first scale is first... The first intermediate stage sub-network is input, and the feature map at the first scale is segmented and transformed through the image patch embedding layer in the first intermediate stage sub-network. The convolutional layer in the first intermediate stage sub-network segments it into... There are 1 image patch, each image patch having a size of 1. Then, the linear projection module converts the segmented image blocks into a sequence format that can be processed by subsequent Transformer blocks, resulting in a size of... The first embedded image block, in which Let be the embedding dimension of each image patch in the sequence. Then, the first embedded image patch and its corresponding learnable positional embedding encoding of the same size are added element-wise through the element-wise addition module in the first intermediate stage sub-network to obtain the first positional embedded image patch sequence. Next, the first positional embedded image patch sequence is encoded and reconstructed through the encoding module and linear projection module in the first intermediate stage sub-network to obtain the feature map at the second scale. .

[0078] Similarly, the feature map at the second scale The second intermediate stage subnetwork is input, and the image patch embedding layer in the second intermediate stage subnetwork segments and transforms the feature map at the second scale to obtain the second embedded image patch. The element-wise addition module in the second intermediate stage subnetwork adds the second embedded image patch and its learnable positional embedding code of the same size element-wise to obtain the second positional embedded image patch sequence. The encoding module and linear projection module in the second intermediate stage subnetwork encode and reconstruct the second positional embedded image patch sequence to obtain the feature map at the third scale. .

[0079] Similarly, the feature map of the third scale The input is the third intermediate stage sub-network. The image patch embedding layer in the third intermediate stage sub-network segments and transforms the feature map at the third scale to obtain third embedded image patches. The element-wise addition module in the third intermediate stage sub-network adds the third embedded image patches and their corresponding learnable positional embeddings element-wise to obtain a sequence of third-positional embedded image patches. The encoding and linear projection modules in the third intermediate stage sub-network then encode and reconstruct this sequence to obtain the feature map at the fourth scale. .

[0080] Similarly, the feature map of the fourth scale The input is the fourth intermediate stage subnetwork. The image patch embedding layer in the fourth intermediate stage subnetwork segments and transforms the feature map at the fourth scale to obtain the fourth embedded image patch. The element-wise addition module in the fourth intermediate stage subnetwork adds the fourth embedded image patch and its corresponding learnable positional embedding code of the same size element-wise to obtain the fourth positional embedded image patch sequence. The encoding module and linear projection module in the fourth intermediate stage subnetwork encode and reconstruct the fourth positional embedded image patch sequence to obtain the feature map at the fifth scale. .

[0081] It should be noted that the working principle of the final encoding module and linear projection module in each intermediate stage sub-network is as follows (taking the first intermediate stage sub-network as an example):

[0082] (1) Assume the first position is embedded in the image block sequence as follows: The total number of image blocks in the first embedded image block sequence is , The embedding dimension for each image patch. First, the image patch sequence is embedded at the first position through a layer normalization layer in the Transformer block. Normalization is performed to obtain the normalized first-position embedded image patch sequence. .and then The query vector is obtained through linear transformation. Key vector Sum value vector ,in: express and Dimensions express The dimensions of these three elements can be obtained using the following formula:

[0083]

[0084] In the formula, These are the learnable parameter matrices;

[0085] (2) Then, the query vector, key vector, and value vector are input into the multi-head self-attention block in the Transformer block to perform multiple self-attention calculations, resulting in multiple self-attention output values. Specifically, it is obtained through the following calculation formula:

[0086]

[0087] In the formula, through Calculate inter-block similarity, scaling factor This is used to solve the problem of small gradient magnitudes caused by the calculation of the softmax function;

[0088] The multi-head self-attention block performs m (m is a hyperparameter, m=8 in this embodiment) self-attention calculations in parallel, and concatenates the multiple self-attention output values, generating an output matrix through linear projection. The process is as follows:

[0089]

[0090] In the formula, , It is a linear projection matrix. for The matrix, It is a linear projection matrix;

[0091] (3) Then, the output matrix is ​​processed by the element-by-element addition module. and the first position embedded image patch sequence Element-by-element addition is performed to obtain the first addition result. Then, the first addition result is normalized by the second normalization layer to obtain the normalized first addition result.

[0092] (4) The normalized first sum result is then feature-mapped using the multilayer perceptron module to obtain the mapped first sum result. The mapped first sum result and the first sum result are then added element-wise again using the element-by-element addition module to obtain the corresponding encoding matrix. ;

[0093] (5) Finally, the multiple encoding matrices are reconstructed through the last linear projection module in the first intermediate stage sub-network to obtain the feature map of the second scale. .

[0094] Similarly, the coding and linear projection modules in the second, third, and fourth intermediate stage subnetworks work in the same way as described above. The input of each stage is the output of the previous stage, and finally, feature maps of the third, fourth, and fifth scales can be obtained respectively.

[0095] The aforementioned encoding network progressively reduces the feature map size and increases the number of channels through a gradual downsampling process: an initial stage (2x downsampling) followed by four intermediate stages (1 / 4 → 1 / 8 → 1 / 16 → 1 / 32 downsampling sequentially). This constructs a pyramid-like feature representation similar to a CNN, preserving low-scale local details while enhancing high-scale global semantic features. The intermediate stage sub-networks imbue the image patch sequence with spatial location information through image patch embedding and learnable location embedding. Combined with multi-head self-attention computation of Transformer blocks, this enhances the modeling of relationships between different image patches, avoiding the shortcomings of traditional CNNs in long-distance feature dependency modeling and reducing problems such as "broken thin wires" and "terminal strip adhesion."

[0096] Step S140: The feature maps of different scales are fused through the feature fusion network to obtain multiple fused feature maps.

[0097] Specifically, the feature maps at different scales output by the encoding network are input into the feature alignment module. The upsampling module within the feature alignment module upsamples the feature maps at the second, third, fourth, and fifth scales to the same scale as the feature map at the first scale. The second, third, fourth, and fifth spatial feature maps are obtained respectively. Then, the upsampling module in the feature alignment module flattens the second, third, fourth, and fifth spatial feature maps respectively, resulting in the second, third, fourth, and fifth image block sequences (with lengths of...). The dimension of each sequence is ).

[0098] Furthermore, by using the splicing module along the dimensions of the sequence The second, third, fourth, and fifth image patch sequences are concatenated to obtain a concatenated image patch sequence. Then, the concatenated image patch sequence is reconstructed using the linear projection module in the feature alignment module, resulting in a sequence of length [length missing]. The first reconstructed image block sequence.

[0099] Furthermore, the first reconstructed image patch sequence is input into the encoding module of the feature fusion network. Each Transformer block in the encoding module of the feature fusion network encodes the first reconstructed image patch sequence, i.e., this process is repeated multiple times. (Number of times) self-attention computation allows the semantic information of the low-resolution image patch sequence to be globally propagated to the high-resolution image patch sequence, and the local details of the high-resolution image patch sequence can also be fed back to the low-resolution image patch sequence, resulting in an encoded image patch sequence. Next, the encoded image patch sequence is input into the linear projection module in the feature fusion network. The linear projection module in the feature fusion network reconstructs the encoded image patch sequence, resulting in a sequence of length [length missing]. The second reconstructed image patch sequence includes multiple fused feature maps.

[0100] The aforementioned feature fusion network uses "upsampling + serialization" to unify feature maps with different spatial resolutions into the same sequence space. Then, it uses an encoding module composed of multi-cascaded Transformer blocks for global interaction. Finally, it completes high-resolution fusion through three steps: splitting, upsampling, and cascading. This approach takes into account both global semantics and local details, providing a high-quality feature foundation for subsequent decoding.

[0101] Step S150: The fused feature maps are upsampled sequentially by the decoding network to obtain a clear image after binarization.

[0102] Specifically, the fused feature maps output by the feature fusion network are input into the upsampling module in the decoding network. The upsampling module in the decoding network upsamples each fused feature map to obtain an image with the same resolution as the original degraded image. The upsampled feature map sequence.

[0103] Further, the upsampled feature map sequence is input into the decoding module. Each Transformer block in the decoding module encodes the upsampled feature map sequence to obtain the encoded feature map sequence. Then, the encoded feature map sequence is input into the linear projection module in the decoding network. The linear projection module reconstructs the encoded feature map sequence, i.e.,... Each feature map sequence is mapped to the resolution of the original degraded image, ultimately outputting a clear binarized image with the same resolution as the original degraded image.

[0104] The aforementioned decoding network restores the fused feature map to the resolution of the original degraded image, and finally outputs a clear binarized image of the same size as the original degraded image, avoiding "missing primitives and blurred lines" caused by insufficient resolution, and meeting the requirements of downstream tasks such as primitive recognition and topology reconstruction for the integrity of the drawing.

[0105] In one alternative implementation, during the training of the binarization network model, the mean squared error (MSE) loss between the binarized sharp image output by the binarization network model and its corresponding ground truth image can be calculated. Assume the ground truth sharp image is... The binarized, clear image output by the binarization network model is Then, the mathematical expression for the error calculation process can be represented by the following formula:

[0106]

[0107] In the formula, The total number of pixels in the image is denoted as . Mean squared error (MSE) loss is used to quantitatively measure the pixel-level difference between the clear image after binarization and the ground truth image, guiding the model to accurately learn the foreground-background segmentation rules and reducing the deviation between the output and the ground truth.

[0108] In addition, to optimize the binarized network model, the weight decay Adam optimizer can be used as the optimization function during training. This optimizes the model parameters while suppressing overfitting of the parameters to the training data, improving the model's adaptability to unseen degraded line diagrams (such as different degrees of ink fading), and ensuring stability in practical applications.

[0109] The binarization method for power grid substation wiring diagrams provided in this application adopts a pyramid-structured encoding network, which limits global modeling to a manageable sequence size and introduces feature fusion and decoding networks. It balances the integrity of large structures with the details of small primitives, effectively preserves the integrity of key primitives in power grid substation wiring diagrams, balances computing power and efficiency, and improves the generalization of different power grid substation wiring diagrams. It provides a feasible and implementable technical path for the electronic and semantic representation of smart grid substation wiring diagrams and subsequent digital operation and maintenance such as primitive recognition and topology reconstruction.

[0110] Example 2

[0111] like Figure 7 The diagram shown is a structural schematic of a binarization device 700 for a power grid substation wiring diagram according to an embodiment of this application. The device includes:

[0112] The acquisition module 710 is used to acquire the degraded wiring diagram of the power grid substation, adjust the degraded wiring diagram of the power grid substation, and obtain the original degraded image;

[0113] The input module 720 is used to input the original degraded image into a binarization network model, wherein the binarization network model includes an encoding network, a feature fusion network, and a decoding network; the encoding network includes an initial stage encoding network and an intermediate stage encoding network; the feature fusion network includes a feature alignment module, an encoding module, and a linear projection module; and the decoding network includes a decoding module and the linear projection module.

[0114] The downsampling encoding module 730 is used to progressively downsample and encode the original degraded image through the encoding network to obtain multiple feature maps of different scales.

[0115] The fusion module 740 is used to fuse the feature maps of different scales through the feature fusion network to obtain multiple fused feature maps;

[0116] The upsampling decoding module 750 is used to sequentially upsample and decode each of the fused feature maps through the decoding network to obtain a clear image after binarization.

[0117] The binarization device for the power grid substation wiring diagram provided in this application embodiment can realize each process of the binarization method for the power grid substation wiring diagram corresponding to Embodiment 1, and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0118] The binarization device for power grid substation wiring diagrams provided in this application adopts a pyramid-structured encoding network, which limits global modeling to a manageable sequence size and introduces feature fusion and decoding networks. It balances the integrity of large structures with the details of small primitives, effectively preserves the integrity of key primitives in power grid substation wiring diagrams, balances computing power and efficiency, and improves the generalization of different power grid substation wiring diagrams. It provides a feasible and implementable technical path for the digitalization and semanticization of smart grid substation wiring diagrams and subsequent digital operation and maintenance such as primitive recognition and topology reconstruction.

[0119] This disclosure also provides a computer device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the steps of the binarization method for the power grid substation wiring diagram described in Embodiment 1.

[0120] This disclosure also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the binarization method for power grid substation wiring diagrams described in Embodiment 1.

[0121] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that, as an alternative implementation, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and combinations of blocks in the block diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0122] In addition, the functional modules or units in the various embodiments of the present invention can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0123] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a smartphone, personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium can be a non-volatile storage medium or a volatile storage medium. For example, the storage medium can be a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, or any other medium capable of storing program code.

[0124] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A binarization method for power grid substation wiring diagrams, characterized in that, The method includes: Collect the degraded wiring diagrams of power grid substations, adjust the degraded wiring diagrams of power grid substations, and obtain the original degraded image; The original degraded image is input into a binarization network model, which includes an encoding network, a feature fusion network, and a decoding network. The encoding network includes an initial stage encoding network and an intermediate stage encoding network. The feature fusion network includes a feature alignment module, an encoding module, and a linear projection module. The decoding network includes a decoding module and the linear projection module. The initial stage encoding network consists of a convolutional downsampling module. The intermediate stage encoding network is composed of a first intermediate stage sub-network, a second intermediate stage sub-network, a third intermediate stage sub-network, and a fourth intermediate stage sub-network cascaded together. Each of these sub-networks consists of an image patch embedding layer, an element-wise addition module, an encoding module, and a linear projection module cascaded together. The feature alignment module consists of an upsampling module, a stitching module, and a linear projection module cascaded together. The encoding module of the feature fusion network has the same internal structure as the encoding module in the intermediate stage encoding network, consisting of multiple Transformers. The decoding network is constructed by cascading blocks; the decoding module of the decoding network and the encoding module in the intermediate stage encoding network have the same internal structure, which is composed of multiple Transformer blocks cascading together in sequence; The original degraded image is progressively downsampled and encoded using the coding network to obtain multiple feature maps of different scales. The feature fusion network is used to fuse the feature maps of different scales to obtain multiple fused feature maps; The decoding network sequentially upsamples and decodes each of the fused feature maps to obtain a clear binarized image.

2. The binarization method for power grid substation wiring diagrams according to claim 1, characterized in that, The initial stage coding network consists of a convolutional downsampling module, which is composed of a convolutional layer, a batch normalization layer and a ReLU activation function cascaded together. The intermediate stage coding network is composed of a first intermediate stage sub-network, a second intermediate stage sub-network, a third intermediate stage sub-network, and a fourth intermediate stage sub-network cascaded together. Each of the first, second, third, and fourth intermediate stage sub-networks is composed of an image patch embedding layer, an element-wise addition module, an encoding module, and a linear projection module cascaded together. The image patch embedding layer is composed of a convolutional layer, a linear projection module, and a layer normalization layer cascaded together. The encoding module is composed of multiple Transformer blocks cascaded together. Each Transformer block is composed of a layer normalization layer, a multi-head self-attention block, an element-wise addition module, a layer normalization layer, a multilayer perceptron module, and an element-wise addition module cascaded together.

3. The binarization method for power grid substation wiring diagrams according to claim 2, characterized in that, The original degraded image is progressively downsampled and encoded through the encoding network to obtain multiple feature maps of different scales, including: The original degraded image is input into the initial stage coding network, and the original degraded image is subjected to feature extraction and downsampling through the convolutional downsampling module to obtain a feature map of the first scale; The feature map at the first scale is input into the first intermediate stage sub-network. The feature map at the first scale is segmented and transformed by the image block embedding layer in the first intermediate stage sub-network to obtain the first embedded image block. The first embedded image block and its learnable position embedding code of the same size are added element-wise by the element-wise addition module in the first intermediate stage sub-network to obtain the first position embedded image block sequence. The first position embedded image block sequence is encoded and reconstructed by the encoding module and the linear projection module in the first intermediate stage sub-network to obtain the feature map at the second scale. The feature map at the second scale is input into the second intermediate stage sub-network. The feature map at the second scale is segmented and transformed by the image block embedding layer in the second intermediate stage sub-network to obtain the second embedded image block. The second embedded image block and its learnable position embedding code of the same size are added element-wise by the element-wise addition module in the second intermediate stage sub-network to obtain the second position embedding image block sequence. The second position embedding image block sequence is encoded and reconstructed by the encoding module and the linear projection module in the second intermediate stage sub-network to obtain the feature map at the third scale. The feature map at the third scale is input into the third intermediate stage sub-network. The feature map at the third scale is segmented and transformed by the image patch embedding layer in the third intermediate stage sub-network to obtain the third embedded image patch. The third embedded image patch and its learnable position embedding code of the same size are added element-wise by the element-wise addition module in the third intermediate stage sub-network to obtain the third position embedded image patch sequence. The third position embedded image patch sequence is encoded and reconstructed by the encoding module and linear projection module in the third intermediate stage sub-network to obtain the feature map at the fourth scale. The feature map at the fourth scale is input into the fourth intermediate stage sub-network. The image patch embedding layer in the fourth intermediate stage sub-network segments and transforms the feature map at the fourth scale to obtain a fourth embedded image patch. The element-wise addition module in the fourth intermediate stage sub-network adds the fourth embedded image patch and its learnable position embedding code of the same size element-wise to obtain a fourth position embedded image patch sequence. The encoding module and linear projection module in the fourth intermediate stage sub-network encode and reconstruct the fourth position embedded image patch sequence to obtain the feature map at the fifth scale.

4. The binarization method for power grid substation wiring diagrams according to claim 3, characterized in that, The step of encoding and reconstructing the first-position embedded image patch sequence through the encoding module and linear projection module in the first intermediate stage sub-network to obtain a feature map at the second scale includes: The first position embedded image block sequence is encoded by each Transformer block in the encoding module of the first intermediate stage sub-network to obtain a corresponding encoding matrix. The multiple encoding matrices are reconstructed by the linear projection module in the first intermediate stage sub-network to obtain the feature map of the second scale. The step of encoding the first-position embedded image block sequence by each Transformer block to obtain a corresponding encoding matrix includes: The first position embedded image block sequence is normalized by the layer normalization layer in the Transformer block to obtain the query vector, key vector and value vector; The query vector, the key vector, and the value vector are subjected to multiple self-attention calculations by the multi-head self-attention block in the Transformer block to obtain multiple self-attention output values. The self-attention output values ​​are concatenated and an output matrix is ​​generated by linear projection. The output matrix and the first position embedded image block sequence are added element by element by the element-wise addition module to obtain a first addition result. The first addition result is normalized by the layer normalization layer to obtain a normalized first addition result. The normalized first sum result is feature-mapped by the multilayer perceptron module to obtain the mapped first sum result. The element-wise addition module adds the mapped first sum result and the first sum result element-wise to obtain the corresponding encoding matrix.

5. The binarization method for power grid substation wiring diagrams according to claim 3, characterized in that, The feature alignment module is composed of an upsampling module, a stitching module and a linear projection module cascaded together. The decoding network also includes an upsampling module. The decoding module is composed of multiple Transformer blocks cascaded together.

6. The binarization method for power grid substation wiring diagrams according to claim 5, characterized in that, The feature fusion network is used to fuse the feature maps of different scales to obtain multiple fused feature maps, including: The feature maps at different scales are input into the feature alignment module. The feature alignment module upsamples the feature maps at the second scale, the third scale, the fourth scale, and the fifth scale to the same scale as the feature map at the first scale, respectively, to obtain the second spatial feature map, the third spatial feature map, the fourth spatial feature map, and the fifth spatial feature map. The second spatial feature map, the third spatial feature map, the fourth spatial feature map, and the fifth spatial feature map are flattened by the upsampling module in the feature alignment module to obtain the second image block sequence, the third image block sequence, the fourth image block sequence, and the fifth image block sequence, respectively. The stitching module stitches together the second image block sequence, the third image block sequence, the fourth image block sequence, and the fifth image block sequence to obtain a stitched image block sequence. The linear projection module in the feature alignment module reconstructs the stitched image block sequence to obtain a first reconstructed image block sequence. The first reconstructed image block sequence is input into the encoding module of the feature fusion network, and the first reconstructed image block sequence is encoded by each Transformer block in the encoding module of the feature fusion network to obtain the encoded image block sequence. The encoded image patch sequence is input into the linear projection module in the feature fusion network, and the encoded image patch sequence is reconstructed by the linear projection module in the feature fusion network to obtain a second reconstructed image patch sequence, wherein the second reconstructed image patch sequence includes multiple fused feature maps.

7. The binarization method for power grid substation wiring diagrams according to claim 6, characterized in that, The step of sequentially upsampling and decoding the fused feature maps through the decoding network to obtain a clear binarized image includes: The fused feature maps are input into the upsampling module in the decoding network, and the upsampling module in the decoding network upsamples the fused feature maps to obtain an upsampled feature map sequence. The upsampled feature map sequence is input into the decoding module, and each Transformer block in the decoding module encodes the upsampled feature map sequence to obtain the encoded feature map sequence. The encoded feature map sequence is input into the linear projection module in the decoding network, and the encoded feature map sequence is reconstructed by the linear projection module in the decoding network to obtain the binarized clear image.

8. A binarization device for power grid substation wiring diagrams, characterized in that, The device includes: The acquisition module is used to acquire degraded wiring diagrams of power grid substations and adjust the degraded wiring diagrams of power grid substations to obtain the original degraded image; An input module is used to input the original degraded image into a binarization network model. The binarization network model includes an encoding network, a feature fusion network, and a decoding network. The encoding network includes an initial stage encoding network and an intermediate stage encoding network. The feature fusion network includes a feature alignment module, an encoding module, and a linear projection module. The decoding network includes a decoding module and the linear projection module. The initial stage encoding network consists of a convolutional downsampling module. The intermediate stage encoding network is composed of a first intermediate stage sub-network, a second intermediate stage sub-network, a third intermediate stage sub-network, and a fourth intermediate stage sub-network cascaded together. Each of these sub-networks consists of an image patch embedding layer, an element-wise addition module, an encoding module, and a linear projection module cascaded together. The feature alignment module consists of an upsampling module, a stitching module, and a linear projection module cascaded together. The encoding module of the feature fusion network has the same internal structure as the encoding module in the intermediate stage encoding network, consisting of multiple Transformers. The decoding network is constructed by cascading blocks; the decoding module of the decoding network and the encoding module in the intermediate stage encoding network have the same internal structure, which is composed of multiple Transformer blocks cascading together in sequence; The downsampling encoding module is used to progressively downsample and encode the original degraded image through the encoding network to obtain multiple feature maps of different scales. The fusion module is used to fuse the feature maps of different scales through the feature fusion network to obtain multiple fused feature maps; The upsampling decoding module is used to sequentially upsample and decode each of the fused feature maps through the decoding network to obtain a clear image after binarization.

9. A computer device, characterized in that, It includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the steps of the binarization method for the power grid substation wiring diagram according to any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the binarization method for the power grid substation wiring diagram as described in any one of claims 1-7.

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