Capacitor tower tripping delay setting method aiming at bird damage influence
By calculating the voltage factor and impedance value of the capacitor tower's arms, the tripping delay range was obtained, which solved the problem of false tripping of the capacitor tower and improved the operational reliability and equipment safety of the converter station.
Patent Information
- Application Number
- CN202510848942.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-24
- Publication Date
- 2025-11-11
AI Technical Summary
Existing technology cannot effectively distinguish between transient bird-related faults and permanent faults, leading to erroneous tripping of capacitor towers, affecting their normal operation and increasing maintenance costs.
By calculating the voltage factor and impedance value of the capacitor tower's arms, the tripping delay range of the capacitor tower can be obtained. The capacitor tower can then be controlled to wait for the bird damage fault to be automatically resolved within the tripping delay range, thus avoiding accidental tripping.
It improves the operational reliability of converter stations, avoids accidental tripping, ensures equipment safety, complies with national standards, and is applicable to various types of capacitor towers.
Smart Images
Figure CN120933867A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of capacitor tower protection technology, and in particular to a method for setting the trip delay of capacitor towers in response to bird damage. Background Technology
[0002] The capacitor towers in converter stations play a crucial role in filtering harmonics and providing reactive power support. However, in recent years, bird-related protection malfunctions have occurred frequently, seriously jeopardizing the safe and stable operation of the converter station. Due to the unique charging and discharging process of the capacitor towers, reclosing cannot be used to eliminate the impact of bird damage.
[0003] Existing capacitor tower protection methods mainly rely on unbalanced protection, which is designed primarily for short-circuit faults caused by the breakdown of internal components within capacitor cells. Since bird damage faults typically cause multiple capacitor cells to short-circuit simultaneously across floors, the resulting unbalanced current ratio (the ratio of unbalanced current to through current) is usually much greater than that of internal faults. Therefore, protection devices often misclassify transient bird damage faults as severe, permanent internal faults and trip within a very short delay, leading to false tripping accidents.
[0004] Currently, in order to reduce accidental activation, additional bird deterrent devices are usually installed on capacitor towers to physically drive away birds and prevent them from approaching, thereby reducing bird damage and accidental activation caused by birds. However, additional bird deterrent devices not only increase the cost of the devices, but also cannot completely drive away birds, and accidental activation caused by birds can still occur, affecting the normal operation of the capacitor tower, potentially causing voltage instability in the converter station, and increasing operation and maintenance costs. Summary of the Invention
[0005] Therefore, the technical problem to be solved by the present invention is to overcome the problem that the prior art cannot distinguish between instantaneous bird damage faults and permanent faults, which leads to bird damage faults causing malfunctions, affecting the normal operation of capacitor towers and increasing operation and maintenance costs.
[0006] To address the aforementioned technical problems, this invention provides a method for setting the tripping delay of capacitor towers in response to bird damage, comprising: Obtain the number of parallel connections in the left and right arms, the number of series connections in the upper and lower arms of the target capacitor tower, the effective voltage value, the operating angular frequency, and the capacitance value of the capacitor units. For each arm of the target capacitor tower, the minimum and maximum fault resistance values for the arm prone to bird damage are preset. The voltage factor of the faulty arm under different fault resistance values is obtained, including: The impedance value of the capacitor unit is obtained by taking the reciprocal of the product of the operating angular frequency of the target capacitor tower and the capacitance value of the capacitor unit. Based on the impedance value of the capacitor unit, the preset fault resistance value, and the number of bridge arms in parallel and series connection for each bridge arm, the impedance corresponding to each bridge arm is calculated. Based on the effective voltage value of the target capacitor tower, and the impedances of the upper left bridge arm, lower left bridge arm, upper right bridge arm, and lower right bridge arm, the voltage of the faulty bridge arm is obtained. Based on the voltage of the faulty bridge arm, the impedance value of the capacitor unit, the number of parallel bridge arms of the faulty bridge arm and the impedance, the voltage division of the non-faulty units on the faulty bridge arm is obtained. The ratio of the voltage drop across the non-faulty cell on the faulty bridge arm to the rated voltage of the capacitor cell is used as the voltage factor corresponding to the faulty bridge arm. Obtain the minimum and maximum voltage factors corresponding to the left upper arm, left lower arm, right upper arm, and right lower arm of the target capacitor tower under the preset minimum and maximum fault resistance values, and obtain the maximum and minimum values among them to form the target voltage factor range. Based on the mapping table between voltage factor and maximum duration, the tripping delay range of the capacitor tower is obtained.
[0007] Preferably, the impedance value of the capacitor unit is obtained based on the reciprocal of the product of the operating angular frequency of the target capacitor tower and the capacitance value of the capacitor unit, expressed as: ; in, This indicates the impedance value of a capacitor cell. Represents the imaginary unit. Indicates the operating angular frequency of the target capacitor tower. This indicates the capacitance value of a capacitor cell.
[0008] Preferably, based on the impedance value of the capacitor unit, a preset fault resistance value, and the number of bridge arms in parallel and series connections for each bridge arm, the impedance corresponding to each bridge arm is calculated, including: When the preset fault resistance value is the maximum fault resistance value At that time, the total number of short-circuit capacitor units is At this time, the impedance of the faulty bridge arm , represented as: ; Calculate the impedance of the other bridge arm connected in series with the faulty bridge arm. , represented as: ; The impedances of the two arms in the other arm connected in parallel with the faulty arm are calculated and expressed as: , ; in, Indicates the faulty bridge arm. This indicates the other bridge arm connected in series with the faulty bridge arm. and These represent the upper and lower arms of another bridge arm connected in parallel with the faulty bridge arm, respectively. This indicates the number of capacitor cells connected in parallel within the bridge arm containing the faulty bridge arm. This indicates the number of capacitor cells connected in series in the faulty bridge arm; This indicates the number of capacitor cells connected in series in another bridge arm that is connected in series with the faulty bridge arm; This indicates the number of capacitor cells connected in parallel in the other arm that is connected in parallel with the faulty arm; Indicates calculation and The parallel resistance value.
[0009] Preferably, based on the impedance value of the capacitor unit, a preset fault resistance value, and the number of bridge arms in parallel and series connections for each bridge arm, the impedance corresponding to each bridge arm is calculated, including: When the preset fault resistance value is the minimum fault resistance value At that time, all series segments between layers are short-circuited, and the number of series segments in a single layer is . The total number of short-circuit capacitor units is At this time, the impedance of the faulty bridge arm , represented as: ; Calculate the impedance of the other bridge arm connected in series with the faulty bridge arm. , represented as: ; Calculate the upper arm impedance of the other arm connected in parallel with the faulty arm. With lower bridge arm impedance , represented as: ; in, Indicates the faulty bridge arm. This indicates the other bridge arm connected in series with the faulty bridge arm. and These represent the upper and lower arms of another bridge arm connected in parallel with the faulty bridge arm, respectively. This indicates the number of capacitor cells connected in parallel within the bridge arm containing the faulty bridge arm. This indicates the number of capacitor cells connected in series in the faulty bridge arm; This indicates the number of capacitor cells connected in series in another bridge arm that is connected in series with the faulty bridge arm; This indicates the number of capacitor cells connected in parallel in the other arm that is connected in parallel with the faulty arm; Indicates calculation and The parallel resistance value.
[0010] Preferably, based on the effective voltage value of the target capacitor tower and the corresponding impedances of the upper left bridge arm, lower left bridge arm, upper right bridge arm, and lower right bridge arm, the voltage of the faulty bridge arm is obtained, expressed as: ; in, Indicates the voltage of the faulty bridge arm. This indicates the effective voltage value of the target capacitor tower.
[0011] Preferably, based on the voltage of the faulty bridge arm, the impedance value of the capacitor unit, the number of parallel connections and the impedance of the faulty bridge arm, the voltage division of the non-faulty units on the faulty bridge arm is obtained, expressed as: ; in, This indicates the voltage drop across the non-faulty cells on the faulty bridge arm.
[0012] Preferably, the ratio of the voltage drop across the non-faulty cells in the faulty bridge arm to the rated voltage of the capacitor cell is used as the voltage factor corresponding to the faulty bridge arm, expressed as: ; in, Indicates the voltage factor of the faulty bridge arm. This indicates the rated voltage of the capacitor cell.
[0013] Preferably, the mapping table between voltage factor and maximum duration includes: When the voltage factor is 1.00, the maximum duration is continuous; When the voltage factor is 1.10, the maximum duration is 12 hours out of every 24 hours; When the voltage factor is 1.15, the maximum duration is 30 minutes per 24 hours; When the voltage factor is 1.20, the maximum duration is 5 minutes; When the voltage factor is 1.30, the maximum duration is 1 minute.
[0014] Preferably, after obtaining the tripping delay range of the capacitor tower, the method further includes: optimizing the delay range based on the frequency of bird damage and the withstand voltage of the capacitor unit within the converter station where the target capacitor tower is located.
[0015] Preferably, after obtaining the capacitor tower trip delay range, the process includes: If the bird-related fault is resolved automatically within the trip delay time of the capacitor tower, the target capacitor tower will not trip. If the bird-related fault cannot be resolved automatically within the capacitor tower trip delay range and the fault persists, the circuit breaker will trip when the trip delay range is exceeded.
[0016] Compared with the prior art, the above-described technical solution of the present invention has the following advantages:
[0017] The capacitor tower trip delay setting method for bird damage described in this invention calculates the voltage factor corresponding to the preset maximum and minimum fault resistance values when the four arms of the target capacitor tower are all faulty arms. The maximum and minimum values are selected from these values to obtain the corresponding maximum duration, thus obtaining the capacitor tower trip delay range. This method controls the target capacitor tower not to trip within the trip delay range, waiting for the bird damage fault to be resolved automatically, thereby avoiding accidental tripping and significantly improving the operational reliability of the converter station.
[0018] This invention theoretically calculates the actual voltage and current conditions on capacitor cells that may experience overload after a bird-damage fault, thereby calculating the voltage factor for each bridge arm and obtaining the withstand time delay for the capacitor cell. By accurately calculating the electrical parameters of bird-damage faults, this invention achieves dynamic time-delay protection based on overvoltage levels, solving the problem of false tripping, ensuring equipment safety, and complying with national standards, thus possessing significant engineering practical value. Furthermore, this invention, through a standardized calculation process, is applicable to various types of capacitor towers, requiring only basic electrical parameters for setting, making it universally applicable. Attached Figure Description
[0019] To make the content of this invention easier to understand, the invention will be further described in detail below with reference to specific embodiments and accompanying drawings, wherein: Figure 1 This is a flowchart of the steps of the capacitor tower trip delay setting method for the impact of bird damage according to the present invention; Figure 2 This is a schematic diagram of a capacitor tower structure; Figure 3 This is a schematic diagram of the structure of the filter capacitor tower BP11. Detailed Implementation
[0020] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, so that those skilled in the art can better understand and implement the present invention. However, the embodiments described are not intended to limit the present invention.
[0021] In order to avoid transient bird damage faults and reduce the possibility of protection malfunctions, it is necessary to allow the bird damage to be eliminated automatically through a long delay. However, in order to prevent damage to the capacitor unit during the fault, it is necessary to set and calculate the maximum delay that the capacitor can withstand. In this way, the long delay can reduce the false tripping caused by bird damage faults, thereby improving the safety and stability of the entire converter station.
[0022] Reference Figure 1The flowchart shown is a step-by-step diagram of the capacitor tower tripping delay setting method for the present invention in response to bird damage. (Refer to...) Figure 2 The diagram shown is a schematic of the capacitor tower structure; the specific trip delay setting steps include: S101: Obtain the number of parallel connections in the left and right arms, the number of series connections in the upper and lower arms of the target capacitor tower, the effective voltage value, the operating angular frequency, and the capacitance value of the capacitor unit. S102: For each arm of the target capacitor tower, the minimum and maximum fault resistance values of the arm where bird damage occurs are preset. The voltage factor of the faulty arm under different fault resistance values is obtained, including: S103: Operating angular frequency based on the target capacitor tower With the capacitance value of the capacitor unit The reciprocal of the product is used to obtain the impedance value of the capacitor unit. , represented as: ; Represents the imaginary unit; S104: Based on the impedance value of the capacitor unit, the preset fault resistance value, and the number of parallel and series connections of each bridge arm, calculate the impedance corresponding to each bridge arm. S105: Based on the effective voltage value of the target capacitor tower The voltage of the faulty bridge arm is obtained by taking the impedances of the upper left bridge arm, lower left bridge arm, upper right bridge arm, and lower right bridge arm, and expressed as follows: ; S106: Based on the voltage of the faulty bridge arm, the impedance of the capacitor unit, the number of parallel connections and impedance of the faulty bridge arm, obtain the voltage drop across the non-faulty units in the faulty bridge arm. , represented as: ; S107: The voltage division of the non-faulty cell on the faulty bridge arm and the rated voltage of the capacitor cell. The ratio of the two values is used as the voltage factor corresponding to the faulty bridge arm. , represented as: ; S108: Obtain the minimum and maximum voltage factors corresponding to the left upper arm, left lower arm, right upper arm and right lower arm of the target capacitor tower under the preset minimum and maximum fault resistance values, and obtain the maximum and minimum values among them to form the target voltage factor range. S109: Obtain the capacitor tower trip delay range based on the mapping table between voltage factor and maximum duration.
[0023] The capacitor tower trip delay setting method for bird damage described in this invention calculates the voltage factor corresponding to the preset maximum and minimum fault resistance values when the four arms of the target capacitor tower are all faulty arms. The maximum and minimum values are selected from these values to obtain the corresponding maximum duration, thus obtaining the capacitor tower trip delay range. This method controls the target capacitor tower not to trip within the trip delay range, waiting for the bird damage fault to be resolved automatically, thereby avoiding accidental tripping and significantly improving the operational reliability of the converter station.
[0024] Specifically, in step S104, when the preset fault resistance value is the maximum fault resistance value... At that time, calculate the impedance corresponding to each bridge arm, including: When the preset fault resistance value is the maximum fault resistance value At that time, the total number of short-circuit capacitor units is At this time, the impedance of the faulty bridge arm , represented as: ; Calculate the impedance of the other bridge arm connected in series with the faulty bridge arm. , represented as: ; The impedances of the two arms in the other arm connected in parallel with the faulty arm are calculated and expressed as: , ; in, Indicates the faulty bridge arm. This indicates the other bridge arm connected in series with the faulty bridge arm. and These represent the upper and lower arms of another bridge arm connected in parallel with the faulty bridge arm, respectively. This indicates the number of capacitor cells connected in parallel within the bridge arm containing the faulty bridge arm. This indicates the number of capacitor cells connected in series in the faulty bridge arm; This indicates the number of capacitor cells connected in series in another bridge arm that is connected in series with the faulty bridge arm; This indicates the number of capacitor cells connected in parallel in the other arm that is connected in parallel with the faulty arm; Indicates calculation and The parallel resistance value.
[0025] Specifically, in step S104, when the preset fault resistance value is the minimum fault resistance value... At that time, calculate the impedance corresponding to each bridge arm, including: When the preset fault resistance value is the minimum fault resistance value At that time, all series segments between layers are short-circuited, and the number of series segments in a single layer is . The total number of short-circuit capacitor units is At this time, the impedance of the faulty bridge arm , represented as: ; Calculate the impedance of the other bridge arm connected in series with the faulty bridge arm. , represented as: ; Calculate the upper arm impedance of the other arm connected in parallel with the faulty arm. With lower bridge arm impedance , represented as: ; in, Indicates the faulty bridge arm. This indicates the other bridge arm connected in series with the faulty bridge arm. and These represent the upper and lower arms of another bridge arm connected in parallel with the faulty bridge arm, respectively. This indicates the number of capacitor cells connected in parallel within the bridge arm containing the faulty bridge arm. This indicates the number of capacitor cells connected in series in the faulty bridge arm; This indicates the number of capacitor cells connected in series in another bridge arm that is connected in series with the faulty bridge arm; This indicates the number of capacitor cells connected in parallel in the other arm that is connected in parallel with the faulty arm; Indicates calculation and The parallel resistance value.
[0026] Specifically, this invention, in accordance with the explicit provisions in Chapter 19 of the national standard GB / T 11024 / 1-2019, obtains a mapping table between voltage factor and maximum duration, including: When the voltage factor is 1.00, the maximum duration is continuous; When the voltage factor is 1.10, the maximum duration is 12 hours out of every 24 hours; When the voltage factor is 1.15, the maximum duration is 30 minutes per 24 hours; When the voltage factor is 1.20, the maximum duration is 5 minutes; When the voltage factor is 1.30, the maximum duration is 1 minute.
[0027] Based on the above embodiments, in this embodiment, after obtaining the tripping delay range of the capacitor tower, the method further includes: optimizing the delay range according to the frequency of bird damage in the converter station where the target capacitor tower is located and the withstand voltage of the capacitor unit.
[0028] Based on the above embodiments, in this embodiment, after obtaining the capacitor tower trip delay range, the following steps are included: if the bird damage fault is resolved on its own within the capacitor tower trip delay range, the target capacitor tower will not trip; if the bird damage fault cannot be resolved on its own within the capacitor tower trip delay range and the fault persists, the tower will trip when the trip delay range is exceeded.
[0029] This invention theoretically calculates the actual voltage and current conditions on capacitor cells that may experience overload after a bird-damage fault, thereby calculating the voltage factor for each bridge arm and obtaining the withstand time delay for the capacitor cell. By accurately calculating the electrical parameters of bird-damage faults, this invention achieves dynamic time-delay protection based on overvoltage levels, solving the problem of false tripping, ensuring equipment safety, and complying with national standards, thus possessing significant engineering practical value. Furthermore, this invention, through a standardized calculation process, is applicable to various types of capacitor towers, requiring only basic electrical parameters for setting, making it universally applicable.
[0030] This invention proposes a method for calculating overvoltage levels when bird-damage faults occur in capacitor towers of different structures and voltage levels. It also provides, in conjunction with national standards, the maximum delay that a capacitor unit can withstand under different overvoltage levels, enabling the setting and calculation of the tripping delay time after a bird-damage fault. This extended delay reduces false tripping caused by bird-damage faults, thereby improving the safety and stability of the entire converter station. (Refer to...) Figure 3 The diagram shown is a structural schematic of the filter capacitor tower BP11. In this invention, the influence of the minute resistance inside the capacitor unit is ignored during the calculation process, and the capacitor unit is considered as a pure capacitor. Taking the filter capacitor tower BP11 in a circulating station as an example, assuming the bird damage fault occurs in its upper left bridge arm, a time delay setting is performed. The specific process includes: S201: Determine the series and parallel connection structure of the capacitor units in the capacitor tower and the capacitance value of the capacitor units; at the same time, obtain the effective value of the voltage across the capacitor tower. In this example , , Simultaneously, the effective value of the voltage across the capacitor tower is obtained. and the system's operating angular frequency rad / s.
[0031] S202: Select the minimum fault resistance value when bird damage occurs. With maximum fault resistance Typically, the resistance is between 100Ω and 500Ω; S203: Under the lightest bird fault type, determine the maximum delay that the capacitor unit can withstand without damaging components. Assuming the fault occurs in the upper left bridge arm, and since this is the lightest fault condition, the number of short-circuit units is... Select the maximum value for the fault resistance. ; S204: Calculate the impedance value of the upper left bridge arm when the least severe fault occurs. The impedance value of the upper right bridge arm The impedance value of the lower left bridge arm and the impedance value of the lower right bridge arm , represented as: ; ; ; Among them, the impedance value of a single capacitor unit , This indicates the system's corresponding operating angular frequency; This indicates the number of capacitor cells connected in parallel in the left bridge arm. This indicates the number of capacitor cells connected in parallel in the right bridge arm. This indicates the number of capacitor cells connected in series in the upper bridge arm. This indicates the number of capacitor cells connected in series in the lower bridge arm; S205: When calculating the least faulty case, the voltage drop across the non-faulty cells in the faulty bridge arm includes: Calculate bridge arm voltage ; The voltage drop across the non-faulty unit after a bird-damage fault is calculated and expressed as: ; S206: Based on the least severe fault in the non-faulty unit, the overvoltage level is expressed as follows: ; in, Indicates the rated voltage of the capacitor cell; In this embodiment, under the mildest bird-related fault, the voltage factor is: .
[0032] S207: Under the most severe bird damage fault type, the maximum delay that the capacitor unit can withstand without damaging components. Assume the fault occurs in the upper left bridge arm; the most severe fault is calculated based on all series segments between the two layers being short-circuited. Assume the maximum number of series segments per layer is... In the most severe fault scenario, the number of short-circuit units is: Choose the minimum resistance value for the fault. ; S208: Calculate the impedance value of the upper left bridge arm under the most severe fault condition. The impedance value of the upper right bridge arm The impedance value of the lower left bridge arm impedance value of the lower right bridge arm , respectively represented as: ; ; ; S209: Calculate the voltage drop across the non-faulty cells in the faulty bridge arm under the most severe fault condition, including: Calculate the arm voltage of the faulty arm. ; Calculate the voltage drop across the non-faulty cells on the faulty bridge arm. ; S210: Calculate the overvoltage level on non-faulty units during the most severe fault based on the obtained fault current, expressed as: ; in, This indicates the voltage factor under the most severe fault condition. Indicates the rated voltage of the capacitor cell; The voltage factor under the most severe fault condition in this embodiment ; S211: Calculate the voltage factors corresponding to the most severe and least severe bird damage faults occurring on the left lower arm, right upper arm, and right lower arm; and select the maximum and minimum voltage factors from them, and obtain the delay range of the capacitor tower face under bird damage faults in accordance with the explicit provisions in Chapter 19 of GB / T11024 / 1-2019.
[0033] The mapping relationship between voltage factor and maximum duration, as clearly specified in Chapter 19 of GB / T 11024 / 1-2019, is shown in Table 1: Table 1. Mapping relationship between voltage factor and maximum duration form voltage factor Maximum duration illustrate power frequency 1.00 continuous The highest average value of the capacitor during any time period. power frequency 1.10 12 hours out of every 24 hours System voltage regulation and fluctuation power frequency 1.15 30 minutes every 24 hours System voltage regulation and fluctuation power frequency 1.20 5min Voltage rise under light load power frequency 1.30 1min
[0034] Therefore, in this embodiment, the trip delay selection range is from 1 minute to continuous operation. The specific trip delay selection needs to be combined with the frequency and severity of bird damage in the actual converter station.
[0035] This invention can quickly determine the overload level of capacitor cells under different degrees of bird damage faults in different types of capacitor towers through theoretical calculations. Furthermore, by combining this with current national standards, the corresponding delay time that the capacitor cells can withstand can be easily obtained. The calculation method requires simple and clear information, the calculation process is straightforward, it does not consume significant computing resources, and it can quickly yield the final result, demonstrating good economic efficiency. Moreover, this calculation method is not specific to any particular capacitor tower type and has universal applicability.
[0036] The capacitor tower trip delay setting method for bird damage described in this invention calculates the voltage factor corresponding to the preset maximum and minimum fault resistance values when all four arms of the target capacitor tower are faulty arms. The maximum and minimum values are selected to obtain the corresponding maximum duration, thus determining the capacitor tower trip delay range. This range controls the target capacitor tower to not trip, allowing the bird damage fault to resolve itself, thereby avoiding false tripping and significantly improving the operational reliability of the converter station. This invention theoretically calculates the actual voltage and current conditions on capacitor units that may experience overload after a bird damage fault, calculating the voltage factor corresponding to each arm and obtaining the delay time that the capacitor unit can withstand. By accurately calculating the electrical parameters of the bird damage fault, this invention achieves dynamic delay protection based on overvoltage levels, solving the problem of false tripping, ensuring equipment safety, and complying with national standards, demonstrating significant engineering practical value. Furthermore, this invention, through a standardized calculation process, is applicable to various types of capacitor towers, requiring only basic electrical parameters for setting, making it universally applicable.
[0037] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0038] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0039] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1The function specified in one or more boxes.
[0040] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0041] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.
Claims
1. A method for setting the tripping delay time of a capacitor tower in response to bird damage, characterized in that, include: Obtain the number of parallel connections in the left and right arms, the number of series connections in the upper and lower arms of the target capacitor tower, the effective voltage value, the operating angular frequency, and the capacitance value of the capacitor units. For each arm of the target capacitor tower, the minimum and maximum fault resistance values for the arm prone to bird damage are preset. The voltage factor of the faulty arm under different fault resistance values is obtained, including: The impedance value of the capacitor unit is obtained by taking the reciprocal of the product of the operating angular frequency of the target capacitor tower and the capacitance value of the capacitor unit. Based on the impedance value of the capacitor unit, the preset fault resistance value, and the number of bridge arms in parallel and series connection for each bridge arm, the impedance corresponding to each bridge arm is calculated. Based on the effective voltage value of the target capacitor tower, and the impedances of the upper left bridge arm, lower left bridge arm, upper right bridge arm, and lower right bridge arm, the voltage of the faulty bridge arm is obtained. Based on the voltage of the faulty bridge arm, the impedance value of the capacitor unit, the number of parallel bridge arms of the faulty bridge arm and the impedance, the voltage division of the non-faulty units on the faulty bridge arm is obtained. The ratio of the voltage drop across the non-faulty cell on the faulty bridge arm to the rated voltage of the capacitor cell is used as the voltage factor corresponding to the faulty bridge arm. Obtain the minimum and maximum voltage factors corresponding to the left upper arm, left lower arm, right upper arm, and right lower arm of the target capacitor tower under the preset minimum and maximum fault resistance values, and obtain the maximum and minimum values among them to form the target voltage factor range. Based on the mapping table between voltage factor and maximum duration, the tripping delay range of the capacitor tower is obtained.
2. The capacitor tower trip delay setting method for bird damage as described in claim 1, characterized in that, The impedance value of the capacitor unit is obtained by taking the reciprocal of the product of the operating angular frequency of the target capacitor tower and the capacitance value of the capacitor unit, and is expressed as: ； in, This indicates the impedance value of a capacitor cell. Represents the imaginary unit. Indicates the operating angular frequency of the target capacitor tower. This indicates the capacitance value of a capacitor cell.
3. The capacitor tower trip delay setting method for bird damage as described in claim 2, characterized in that, Based on the impedance value of the capacitor unit, the preset fault resistance value, and the number of parallel and series connections of each bridge arm, the impedance corresponding to each bridge arm is calculated, including: When the preset fault resistance value is the maximum fault resistance value At that time, the total number of short-circuit capacitor units is At this time, the impedance of the faulty bridge arm , represented as: ; Calculate the impedance of the other bridge arm connected in series with the faulty bridge arm. , represented as: ; The impedances of the two arms in the other arm connected in parallel with the faulty arm are calculated and expressed as: , ; in, Indicates the faulty bridge arm. This indicates the other bridge arm connected in series with the faulty bridge arm. and These represent the upper and lower arms of another bridge arm connected in parallel with the faulty bridge arm, respectively. This indicates the number of capacitor cells connected in parallel within the bridge arm containing the faulty bridge arm. This indicates the number of capacitor cells connected in series in the faulty bridge arm; This indicates the number of capacitor cells connected in series in another bridge arm that is connected in series with the faulty bridge arm; This indicates the number of capacitor cells connected in parallel in the other arm that is connected in parallel with the faulty arm; Indicates calculation and The parallel resistance value.
4. The capacitor tower trip delay setting method for bird damage according to claim 2, characterized in that, Based on the impedance value of the capacitor unit, the preset fault resistance value, and the number of parallel and series connections of each bridge arm, the impedance corresponding to each bridge arm is calculated, including: When the preset fault resistance value is the minimum fault resistance value At that time, all series segments between layers are short-circuited, and the number of series segments in a single layer is . The total number of short-circuit capacitor units is At this time, the impedance of the faulty bridge arm , represented as: ; Calculate the impedance of the other bridge arm connected in series with the faulty bridge arm. , represented as: ; Calculate the upper arm impedance of the other arm connected in parallel with the faulty arm. With lower bridge arm impedance , represented as: ; in, Indicates the faulty bridge arm. This indicates the other bridge arm connected in series with the faulty bridge arm. and These represent the upper and lower arms of another bridge arm connected in parallel with the faulty bridge arm, respectively. This indicates the number of capacitor cells connected in parallel within the bridge arm containing the faulty bridge arm. This indicates the number of capacitor cells connected in series in the faulty bridge arm; This indicates the number of capacitor cells connected in series in another bridge arm that is connected in series with the faulty bridge arm; This indicates the number of capacitor cells connected in parallel in the other arm that is connected in parallel with the faulty arm; Indicates calculation and The parallel resistance value.
5. The capacitor tower trip delay setting method for bird damage according to claim 3 or 4, characterized in that, Based on the effective voltage value of the target capacitor tower, and the corresponding impedances of the upper left, lower left, upper right, and lower right bridge arms, the voltage of the faulty bridge arm is obtained, expressed as: ； in, Indicates the voltage of the faulty bridge arm. This indicates the effective voltage value of the target capacitor tower.
6. The capacitor tower trip delay setting method for bird damage according to claim 5, characterized in that, Based on the voltage of the faulty bridge arm, the impedance of the capacitor unit, the number of parallel connections and impedance of the faulty bridge arm, the voltage division of the non-faulty units on the faulty bridge arm is obtained, expressed as: ； in, This indicates the voltage drop across the non-faulty cells on the faulty bridge arm.
7. The capacitor tower tripping delay setting method for bird damage according to claim 6, characterized in that, The ratio of the voltage drop across the non-faulty cells in the faulty bridge arm to the rated voltage of the capacitor cell is taken as the voltage factor corresponding to the faulty bridge arm, and is expressed as: ； in, Indicates the voltage factor of the faulty bridge arm. This indicates the rated voltage of the capacitor cell.
8. The capacitor tower trip delay setting method for bird damage according to claim 1, characterized in that, A mapping table between voltage factor and maximum duration, including: When the voltage factor is 1.00, the maximum duration is continuous; When the voltage factor is 1.10, the maximum duration is 12 hours out of every 24 hours; When the voltage factor is 1.15, the maximum duration is 30 minutes per 24 hours; When the voltage factor is 1.20, the maximum duration is 5 minutes; When the voltage factor is 1.30, the maximum duration is 1 minute.
9. The capacitor tower trip delay setting method for bird damage according to claim 1, characterized in that, After obtaining the tripping delay range of the capacitor tower, the process also includes: optimizing the delay range based on the frequency of bird damage and the withstand voltage of the capacitor unit within the converter station where the target capacitor tower is located.
10. The capacitor tower trip delay setting method for bird damage according to claim 1, characterized in that, After obtaining the capacitor tower trip delay range, it includes: If the bird-related fault is resolved automatically within the trip delay time of the capacitor tower, the target capacitor tower will not trip. If the bird-related fault cannot be resolved automatically within the capacitor tower trip delay range and the fault persists, the circuit breaker will trip when the trip delay range is exceeded.