Light emitting diode and preparation method thereof

Abstract

The invention discloses a light emitting diode and a preparation method thereof, and belongs to the technical field of semiconductors. The light emitting diode comprises a first semiconductor layer, a multi-quantum well layer, a second semiconductor layer, a lattice optimization layer and a transparent conductive layer which are stacked in sequence, the transparent conductive layer is a metal oxide layer, the lattice optimization layer is an Al doped layer, and an Al-O bond is arranged at the joint of the lattice optimization layer and the transparent conductive layer. Through the formation of A1-O bonds, the formation of oxygen vacancies can be remarkably inhibited, sub-band gap light absorption caused by the oxygen vacancies is reduced, the optical transmittance is greatly improved, and meanwhile, the small ion radius and strong bonding force of A1 improve the microstructure, promote crystallization, refine crystal grains and reduce the defect density, so that the crystal quality is improved; therefore, the transparent conductive layer obtains higher transmittance and better crystal quality, the better crystal quality ensures the current expansion effect, and the light emitting capacity of the light emitting diode is improved from two aspects.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and in particular to light-emitting diodes and methods for their fabrication. Background Technology

[0002] A light-emitting diode (LED) is a semiconductor electronic component that emits light. As a highly efficient, environmentally friendly, and green new type of solid-state lighting source, it is being rapidly and widely used in applications such as traffic lights, automotive interior and exterior lights, urban landscape lighting, and mobile phone backlights. Improving the luminous efficiency of LED chips is a goal that LEDs are constantly pursuing.

[0003] In related technologies, light-emitting diodes typically include a substrate and a first semiconductor layer, a multiple quantum well layer, a second semiconductor layer, and a transparent conductive layer sequentially grown on the substrate. The transparent conductive layer serves to spread the current.

[0004] However, ensuring high transmittance and good current spreading effect in the transparent conductive layer remains a current challenge. Summary of the Invention

[0005] This disclosure provides a light-emitting diode and its fabrication method, which can ensure high transmittance of the transparent conductive layer and good current spreading effect. The technical solution is as follows:

[0006] On one hand, embodiments of this disclosure provide a light-emitting diode, which includes a first semiconductor layer, a multiple quantum well layer, a second semiconductor layer, a lattice optimization layer and a transparent conductive layer stacked sequentially;

[0007] The transparent conductive layer is a metal oxide layer, the lattice optimization layer is an Al-doped layer, and the connection between the lattice optimization layer and the transparent conductive layer has Al-O bonds.

[0008] Optionally, the lattice optimization layer is an AlN layer, and the Al content in the lattice optimization layer is 10% to 60%.

[0009] Optionally, the thickness of the lattice optimization layer is 1–3 nm.

[0010] Optionally, the second semiconductor layer includes a high-temperature P-type layer, a P-type contact layer, and a low-temperature P-type layer;

[0011] The light-emitting diode also includes an electron blocking layer;

[0012] The low-temperature P-type layer, the electron blocking layer, the high-temperature P-type layer, and the P-type contact layer are sequentially stacked on the multi-quantum well layer.

[0013] Optionally, the thickness of the high-temperature P-type layer is 10–14 nm, the thickness of the P-type contact layer is 3–7 nm, and the thickness of the low-temperature P-type layer is 4–10 nm.

[0014] Optionally, the transparent conductive layer is an ITO layer, and the thickness of the transparent conductive layer is 10-200 nm.

[0015] On the other hand, embodiments of this disclosure provide a method for fabricating a light-emitting diode, the method comprising:

[0016] The first semiconductor layer, the multiple quantum well layer, and the second semiconductor layer are grown sequentially.

[0017] A lattice-optimized layer is grown on the second semiconductor layer, wherein the lattice-optimized layer is an Al-doped layer;

[0018] A transparent conductive layer is grown on the lattice-optimized layer. The transparent conductive layer is a metal oxide layer, and there are Al-O bonds at the junction of the lattice-optimized layer and the transparent conductive layer.

[0019] Optionally, a lattice-optimized layer is grown on the second semiconductor layer, including:

[0020] An AlN layer is grown at a growth temperature of 930–970℃ and a growth pressure of 150–200 torr, using N2 and H2 as carrier gases and introducing N and Al sources, to serve as the lattice optimization layer.

[0021] Optionally, the Al content in the lattice optimization layer is 10% to 60%, and the Al source is introduced for 2 to 5 minutes.

[0022] Optionally, the method further includes:

[0023] After the transparent conductive layer is grown, an annealing process is performed at a temperature of 500–650°C.

[0024] The beneficial effects of the technical solutions provided in this disclosure are:

[0025] In this embodiment, a lattice optimization layer is formed on the surface of the second semiconductor layer. The lattice optimization layer is an Al-doped layer. The Al atoms in the lattice optimization layer bond with the O atoms in the transparent conductive layer to form Al-O bonds. This significantly suppresses the formation of oxygen vacancies, reduces sub-bandgap light absorption caused by oxygen vacancies, and greatly improves optical transmittance. At the same time, the small ionic radius and strong bonding force of Al improve the microstructure, promote crystallization, refine the grains, and reduce the defect density, thereby improving the crystal quality. This allows the transparent conductive layer to obtain higher transmittance and better crystal quality. The better crystal quality ensures the current spreading effect, thus improving the light emission capability of the light-emitting diode from two aspects.

[0026] In addition, the Al in the lattice optimization layer and the GaN in the second semiconductor layer form a high-Al content AlGaN thin film with a large band gap, which is not easy to absorb the light emission of the epitaxial quantum well and can improve the epitaxial light emission capability. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure;

[0029] Figure 2 This is a flowchart of a method for fabricating a light-emitting diode provided in an embodiment of this disclosure;

[0030] Figure 3 This is a flowchart of another method for fabricating a light-emitting diode provided in this embodiment.

[0031] The attached figures are labeled as follows:

[0032] 100: Substrate;

[0033] 101: First semiconductor layer;

[0034] 102: Active layer;

[0035] 103: Second semiconductor layer;

[0036] 104: Lattice optimization layer;

[0037] 105: Transparent conductive layer;

[0038] 106: Electron blocking layer;

[0039] 131: High-temperature P-type layer;

[0040] 132: P-type contact layer;

[0041] 133: Low-temperature P-type layer. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0043] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure, with reference to... Figure 1As can be seen, the present disclosure provides a light-emitting diode, which includes a first semiconductor layer 101, a multi-quantum well layer 102, a second semiconductor layer 103, a lattice optimization layer 104 and a transparent conductive layer 105 stacked sequentially.

[0044] The transparent conductive layer 105 is a metal oxide layer, the lattice optimization layer 104 is an Al-doped layer, and the connection between the lattice optimization layer 104 and the transparent conductive layer 105 has Al-O bonds.

[0045] It should be noted that the transparent conductive layer 105 needs to be connected to the first electrode, and the first semiconductor layer 101 needs to be connected to the second electrode, with current flowing between the first and second electrodes. One of the first and second electrodes is an N-electrode, and the other is a P-electrode.

[0046] In this embodiment, a lattice optimization layer is formed on the surface of the second semiconductor layer. The lattice optimization layer is an Al-doped layer. The Al atoms in the lattice optimization layer bond with the O atoms in the transparent conductive layer to form Al-O bonds. This significantly suppresses the formation of oxygen vacancies, reduces sub-bandgap light absorption caused by oxygen vacancies, and greatly improves optical transmittance. At the same time, the small ionic radius and strong bonding force of Al improve the microstructure, promote crystallization, refine the grains, and reduce the defect density, thereby improving the crystal quality. This allows the transparent conductive layer to obtain higher transmittance and better crystal quality. The better crystal quality ensures the current spreading effect, thus improving the light emission capability of the light-emitting diode from two aspects.

[0047] In addition, the Al in the lattice optimization layer and the GaN in the second semiconductor layer form a high-Al content AlGaN thin film with a large band gap, which is not easy to absorb the light emission of the epitaxial quantum well and can improve the epitaxial light emission capability.

[0048] Optionally, the light-emitting diode may also include a substrate 100, on which a first semiconductor layer 101 is located.

[0049] For example, the substrate 100 can be a sapphire substrate 100, which is easy to manufacture and obtain.

[0050] Optionally, the light-emitting diode may also include a buffer layer, an undoped GaN layer, etc., with the buffer layer and the undoped GaN layer stacked on the substrate, and the first semiconductor layer 101 located on the undoped GaN layer.

[0051] For example, the buffer layer can be an AlN buffer layer, which can ensure the crystal quality of the epitaxial film grown on the buffer layer.

[0052] In one possible implementation of this disclosure, the first semiconductor layer 101 can be an N-type layer, and the second semiconductor layer 103 can be a P-type layer. In another possible implementation of this disclosure, the first semiconductor layer 101 can be a P-type layer, and the second semiconductor layer 103 can be an N-type layer.

[0053] For example, the first semiconductor layer 101 is an N-type GaN layer, and the second semiconductor layer 103 is a P-type GaN layer.

[0054] For example, the doping element of the first semiconductor layer 101 can be Si, and the doping concentration of Si can be 1×10⁻⁶. 19 ~3×10 19 cm -3 The first semiconductor layer 101 is of good overall quality.

[0055] For example, the thickness of the first semiconductor layer 101 can be 1 to 1.5 μm.

[0056] For example, the thickness of the first semiconductor layer 101 is 1 μm.

[0057] In this embodiment, the multiple quantum well layer 102 includes alternating layers of InGaN well layers and GaN barrier layers. This ensures stable light emission from the light-emitting diode.

[0058] For example, the thickness of the multiple quantum well layer 102 can be 0.3 to 0.4 μm.

[0059] For example, the thickness of the multiple quantum well layer 102 is 0.3 μm.

[0060] In this embodiment of the disclosure, the doping element of the second semiconductor layer 103 can be Mg, and the doping concentration of Mg can be 1×10⁻⁶. 18 ~1×10 20 cm -3 .

[0061] In this embodiment of the disclosure, the second semiconductor layer 103 includes a high-temperature P-type layer 131, a P-type contact layer 132, and a low-temperature P-type layer 133.

[0062] The light-emitting diode also includes an electron blocking layer 106.

[0063] The low-temperature P-type layer 133, the electron blocking layer 106, the high-temperature P-type layer 131, and the P-type contact layer 132 are sequentially stacked on the multi-quantum well layer 102.

[0064] In this implementation, by setting an electron blocking layer, electrons in the multiple quantum wells can be prevented from moving to the high-temperature P-type layer, thus ensuring the luminous efficiency of the multiple quantum wells; by setting high-temperature P-type layers and low-temperature P-type layers, the hole concentration can be increased, thereby improving the luminous efficiency; and by setting a P-type contact layer, the transparent conductive layer can be better contacted.

[0065] For example, the growth temperature of the high-temperature P-type layer 131 is 970–1000°C, and the growth temperature of the low-temperature P-type layer is 720–780°C.

[0066] For example, the high-temperature P-type layer 131 is a P-type GaN layer, the P-type contact layer 132 is a P-type AlInGaN (i.e., Al and In doped GaN) layer, the low-temperature P-type layer 133 is a P-type AlInGaN layer, and the electron blocking layer 106 is an AlInGaN layer.

[0067] For example, the thickness of the high-temperature P-type layer 131 is 10-14 nm, the thickness of the P-type contact layer 132 is 3-7 nm, the thickness of the low-temperature P-type layer 133 is 4-10 nm, and the thickness of the electron blocking layer 106 is 8-12 nm.

[0068] For example, the high-temperature P-type layer 131 has a thickness of 10 nm, the P-type contact layer 132 has a thickness of 5 nm, the low-temperature P-type layer 133 has a thickness of 5 nm, and the electron blocking layer 106 has a thickness of 10 nm.

[0069] In this embodiment, the lattice optimization layer 104 is an AlN layer, and the Al content in the lattice optimization layer 104 is 10% to 60%.

[0070] For example, the Al content in the lattice optimization layer 104 is 30%.

[0071] The content of 10% to 60% means that Al accounts for 10% to 60% of Al in AlN.

[0072] In this implementation, the Al content described above ensures both its bonding with O in the transparent conductive layer, improving the light transmittance and current spreading performance of the transparent conductive layer, and its formation of AlGaN with GaN, enhancing the epitaxial light extraction capability.

[0073] In this embodiment of the disclosure, the thickness of the lattice optimization layer 104 is 1 to 3 nm.

[0074] For example, the thickness of the lattice optimization layer 104 is 2 nm.

[0075] In this implementation, using a 1-3nm lattice optimization layer can ensure the formation of Al-O bonds and improve the crystal quality of the transparent conductive layer; it will not be too thick and thus affect the overall resistance too much.

[0076] In this embodiment of the disclosure, the transparent conductive layer 105 is an indium tin oxide (ITO) layer.

[0077] In this implementation, ITO is used as a transparent conductive layer, which can be combined with Al to form a transparent conductive layer with good light transmittance and current spreading performance.

[0078] For example, the thickness of the transparent conductive layer 105 is 10 to 200 nm.

[0079] For example, the thickness of the transparent conductive layer 105 is 50 nm.

[0080] In this implementation, the aforementioned thickness avoids the problem of insufficient thickness making current expansion difficult, while also avoiding excessive thickness affecting light transmittance and the overall thickness of the LED.

[0081] Figure 2 This is a flowchart of a method for fabricating a light-emitting diode according to an embodiment of this disclosure, with reference to... Figure 2 As can be seen, this disclosure provides a method for fabricating a light-emitting diode, the method comprising:

[0082] S101: The first semiconductor layer, the multiple quantum well layer, and the second semiconductor layer are grown sequentially.

[0083] S102: A lattice-optimized layer is grown on the second semiconductor layer, wherein the lattice-optimized layer is an Al-doped layer.

[0084] S103: A transparent conductive layer is grown on the lattice optimization layer. The transparent conductive layer is a metal oxide layer, and the connection between the lattice optimization layer and the transparent conductive layer has Al-O bonds.

[0085] In this embodiment, a lattice optimization layer is formed on the surface of the second semiconductor layer. The lattice optimization layer is an Al-doped layer. The Al atoms in the lattice optimization layer bond with the O atoms in the transparent conductive layer to form Al-O bonds. This significantly suppresses the formation of oxygen vacancies, reduces sub-bandgap light absorption caused by oxygen vacancies, and greatly improves optical transmittance. At the same time, the small ionic radius and strong bonding force of Al improve the microstructure, promote crystallization, refine the grains, and reduce the defect density, thereby improving the crystal quality. This allows the transparent conductive layer to obtain higher transmittance and better crystal quality. The better crystal quality ensures the current spreading effect, thus improving the light emission capability of the light-emitting diode from two aspects.

[0086] In addition, the Al in the lattice optimization layer and the GaN in the second semiconductor layer form a high-Al content AlGaN thin film with a large band gap, which is not easy to absorb the light emission of the epitaxial quantum well and can improve the epitaxial light emission capability.

[0087] Figure 3 This is a flowchart of another method for fabricating a light-emitting diode provided in this disclosure embodiment, see reference. Figure 3 It can be seen that the method for fabricating this light-emitting diode includes:

[0088] S201: Provide a substrate.

[0089] The substrate can be a sapphire substrate, which is easy to implement and fabricate.

[0090] The sapphire substrate can be 2 inches or 6 inches in size.

[0091] Optionally, step S201 may further include: placing the sapphire substrate in a graphite disk in an epitaxial vapor deposition reaction chamber, and treating the surface of the substrate for epitaxial layer growth for 2 to 30 minutes under a hydrogen atmosphere.

[0092] For example, when processing the surface of the substrate used for growing an epitaxial layer, the temperature of the reaction chamber can be 1000-1100°C, and the pressure of the reaction chamber can be 100-200 torr.

[0093] For example, the temperature of the reaction chamber can be 1100℃, the pressure of the reaction chamber can be 100 torr, and the time can be 5 minutes.

[0094] S202: Growing a buffer layer on the substrate.

[0095] The buffer layer can be an AlN buffer layer. The AlN layer can be obtained by magnetron sputtering.

[0096] For example, the deposition temperature of the AlN layer can be 400–800°C, the sputtering power can be 3000–5000 W, and the pressure can be 2–20 mtorr to obtain a better quality AlN layer.

[0097] S203: An undoped GaN layer is grown on the buffer layer.

[0098] For example, the thickness of the undoped GaN layer can be 0.5 to 3 μm.

[0099] For example, the growth temperature of the undoped GaN layer can be 1000-1100℃, and the growth pressure can be controlled at 100-300 torr, resulting in a high-quality undoped GaN layer.

[0100] S204: The first semiconductor layer is grown on an undoped GaN layer.

[0101] In this embodiment of the disclosure, step S204 may include:

[0102] In an environment with a growth temperature of 1075–1110℃ and a growth pressure of 150–200 torr, N2 and H2 are used as carrier gases, and N-source, Ga-source and Si-source are introduced to grow an N-type GaN layer as the first semiconductor layer.

[0103] In this embodiment, the thickness of the first semiconductor layer can be 1–1.5 μm. The Si doping concentration can be 1 × 10⁻⁶. 19 ~3×10 19 cm -3 .

[0104] For example, the thickness of the first semiconductor layer 101 is 1 μm.

[0105] S205: A multi-quantum well layer is grown on the first semiconductor layer.

[0106] In step S205, the multiple quantum well layer includes alternating stacked InGaN well layers and GaN barrier layers, and the alternating stacked InGaN well layers and GaN barrier layers can be obtained by alternately introducing different reactive materials into the reaction chamber.

[0107] In this embodiment of the disclosure, step S205 may include:

[0108] In an environment with a growth temperature of 760–910℃ and a growth pressure of 150–200 torr, N2 and H2 are used as carrier gases, and N source and Ga source are introduced, while In source is introduced intermittently, to grow a multi-quantum well layer with InGaN well layer and GaN barrier layer overlapping.

[0109] For example, the thickness of the multiple quantum well layer 102 can be 0.3 to 0.4 μm.

[0110] For example, the thickness of the multiple quantum well layer 102 is 0.3 μm.

[0111] S206: Low-temperature P-type layer for growing a second semiconductor layer on a multi-quantum-well layer.

[0112] In this embodiment of the disclosure, step S206 may include:

[0113] In an environment with a growth temperature of 720–780℃ and a growth pressure of 150–200 torr, N2 and H2 are used as carrier gases, and N source, Ga source, Mg source, Al source and In source are introduced to grow a P-type AlInGaN layer as the low-temperature P-type layer.

[0114] For example, the thickness of the low-temperature P-type layer 133 is 4 to 10 nm.

[0115] For example, the thickness of the low-temperature P-type layer 133 is 5 nm.

[0116] S207: An electron blocking layer is grown on the low-temperature P-type layer of the second semiconductor layer.

[0117] The electron blocking layer is an AlInGaN electron blocking layer, grown at a temperature of 930–990℃ and a growth pressure of 150–200 torr. Under these conditions, the AlInGaN electron blocking layer obtained is of good quality, which is beneficial for improving the luminous efficiency of the light-emitting diode.

[0118] S208: A high-temperature P-type layer and a P-type contact layer on which a second semiconductor layer is grown on an electron blocking layer.

[0119] In this embodiment of the disclosure, step S208 may include:

[0120] In an environment with a growth temperature of 970–1000℃ and a growth pressure of 150–200 torr, N2 and H2 are used as carrier gases, and N source, Ga source and Mg source are introduced to grow a P-type GaN layer as the high-temperature P-type layer.

[0121] In an environment with a growth temperature of 915–940℃ and a growth pressure of 150–200 torr, N2 and H2 are used as carrier gases, and N source, Ga source, Mg source, Al source and In source are introduced to grow a P-type AlInGaN layer as the P-type contact layer.

[0122] For example, the thickness of the high-temperature P-type layer 131 is 10-14 nm, and the thickness of the P-type contact layer 132 is 3-7 nm.

[0123] For example, the thickness of the high-temperature P-type layer 131 is 10 nm, and the thickness of the P-type contact layer 132 is 5 nm.

[0124] S209: A lattice-optimized layer is grown on the P-type contact layer, wherein the lattice-optimized layer is an Al-doped layer.

[0125] In this embodiment of the disclosure, step S209 may include:

[0126] An AlN layer is grown at a growth temperature of 930–970℃ and a growth pressure of 150–200 torr, using N2 and H2 as carrier gases and introducing N and Al sources, to achieve the lattice optimization layer.

[0127] For example, the Al content in the lattice optimization layer is 10% to 60%, and the Al source is introduced for 2 to 5 minutes.

[0128] For example, the surface of the P-type contact layer 132 is doped with 30% Al.

[0129] The content of 10% to 60% means that Al accounts for 10% to 60% of Al in AlN.

[0130] In this implementation, the Al doping content described above ensures both the bonding with O in the transparent conductive layer, improving the light transmittance and current spreading performance of the transparent conductive layer, and the formation of AlGaN with GaN, enhancing the epitaxial light extraction capability.

[0131] Optionally, the method may further include:

[0132] Once epitaxial growth is complete, the epitaxial wafer is removed and sent for testing. Only after the test is passed can subsequent steps be performed.

[0133] S210: A transparent conductive layer is grown on a lattice-optimized layer.

[0134] In this embodiment of the disclosure, the transparent conductive layer 105 is an ITO layer.

[0135] In this implementation, ITO is used as a transparent conductive layer, which can be combined with Al to form a transparent conductive layer with good light transmittance and current spreading performance.

[0136] For example, the thickness of the transparent conductive layer 105 is 10 to 200 nm.

[0137] For example, the thickness of the transparent conductive layer 105 is 50 nm.

[0138] In this implementation, the aforementioned thickness avoids the problem of insufficient thickness making current expansion difficult, while also avoiding excessive thickness affecting light transmittance and the overall thickness of the LED.

[0139] S211: After growing the transparent conductive layer, an annealing process is performed.

[0140] The annealing temperature is 500–650℃.

[0141] It should be noted that, Figure 3 The method for fabricating the light-emitting diode shown is relatively... Figure 2 The method for fabricating a light-emitting diode shown provides a more detailed approach to the growth of light-emitting diodes.

[0142] It should be noted that, in the embodiments disclosed herein, a Veeco K465iorC4orRB MOCVD (Metal-Organic Chemical Vapor Deposition) apparatus is used to realize the growth method of light-emitting diodes. High-purity H2 (hydrogen), high-purity N2 (nitrogen), or a mixture of high-purity H2 and high-purity N2 is used as the carrier gas; high-purity NH3 is used as the N-type source; trimethylgallium (TMGa) and / or triethylgallium (TEGa) are used as the gallium source; trimethylindium (TMIn) is used as the indium source; silane (SiH4) is used as the N-type dopant; trimethylaluminum (TMAl) is used as the aluminum source; and magnesium pyrocene (CP2Mg) is used as the P-type dopant.

[0143] The above description is only a preferred embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A light-emitting diode, characterized in that, The light-emitting diode comprises a first semiconductor layer (101), a multi-quantum well layer (102), a second semiconductor layer (103), a lattice optimization layer (104), and a transparent conductive layer (105) stacked sequentially. The transparent conductive layer (105) is a metal oxide layer, the lattice optimization layer (104) is an Al-doped layer, and the connection between the lattice optimization layer (104) and the transparent conductive layer (105) has Al-O bonds.

2. The light-emitting diode according to claim 1, characterized in that, The lattice optimization layer (104) is an AlN layer, and the Al content in the lattice optimization layer (104) is 10% to 60%.

3. The light-emitting diode according to claim 2, characterized in that, The thickness of the lattice optimization layer (104) is 1–3 nm.

4. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The second semiconductor layer (103) includes a high-temperature P-type layer (131), a P-type contact layer (132), and a low-temperature P-type layer (133); The light-emitting diode also includes an electron blocking layer (106); The low-temperature P-type layer (133), the electron blocking layer (106), the high-temperature P-type layer (131), and the P-type contact layer (132) are sequentially stacked on the multi-quantum well layer (102).

5. The light-emitting diode according to claim 4, characterized in that, The thickness of the high-temperature P-type layer (131) is 10-14 nm, the thickness of the P-type contact layer (132) is 3-7 nm, and the thickness of the low-temperature P-type layer (133) is 4-10 nm.

6. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The transparent conductive layer (105) is an ITO layer, and the thickness of the transparent conductive layer (105) is 10-200 nm.

7. A method for fabricating a light-emitting diode, characterized in that, The preparation method includes: The first semiconductor layer, the multiple quantum well layer, and the second semiconductor layer are grown sequentially. A lattice-optimized layer is grown on the second semiconductor layer, wherein the lattice-optimized layer is an Al-doped layer; A transparent conductive layer is grown on the lattice-optimized layer. The transparent conductive layer is a metal oxide layer, and there are Al-O bonds at the junction of the lattice-optimized layer and the transparent conductive layer.

8. The preparation method according to claim 7, characterized in that, Growing a lattice-optimized layer on the second semiconductor layer includes: An AlN layer is grown at a growth temperature of 930–970℃ and a growth pressure of 150–200 torr, using N2 and H2 as carrier gases and introducing N and Al sources, to achieve the lattice optimization layer.

9. The preparation method according to claim 8, characterized in that, The Al content in the lattice optimization layer is 10% to 60%, and the Al source is introduced for 2 to 5 minutes.

10. The preparation method according to any one of claims 7 to 9, characterized in that, The method further includes: After the transparent conductive layer is grown, an annealing process is performed at a temperature of 500–650°C.

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