Analog circuit early fault diagnosis method based on sub-sequence division and transformer

Abstract

The application discloses an analog circuit early fault diagnosis method based on subsequence division and a transformer. The method takes the time domain response signal of an analog circuit as input, combines a multi-class fault data set constructed by PSpice simulation and a Monte Carlo method, divides subsequence through a sliding window, then extracts local timing characteristics by using a deep separable convolution and an SE module and adaptively strengthens the resistance and capacitance fault sensitive frequency band; then, the timing information across the subsequence is maintained through token embedding and position coding, and the global dependence relationship is modeled by inputting the transformer encoder, the timing coupling effect generated by the collaborative degradation of multiple devices is captured at the same time, and finally, the multi-class fault diagnosis is completed through the full connection fault diagnosis module. The application can effectively identify the weak fault characteristics caused by early degradation and the long-range correlation across time slices, and the experimental results show that the method has high precision and good engineering application value under complex working conditions.

Description

Technical Field

[0001] This invention relates to the field of analog circuit fault diagnosis, specifically to an early fault diagnosis method for analog circuits based on subsequence partitioning and Transformer. Background Technology

[0002] With the continuous development of integrated circuits and electronic systems, analog circuits play a crucial role in fields such as industrial control, communications, medical care, and aerospace. Because analog circuit devices are sensitive to parameter disturbances and environmental changes, they are prone to performance degradation or component failure during long-term operation, leading to abnormal system function or even system failure. Therefore, conducting research on early fault identification of analog circuits has significant engineering implications and application value.

[0003] Existing analog circuit fault diagnosis methods mainly fall into three categories: model-driven, expert system-based, and data-driven. Model-driven methods rely on accurate physical or mathematical models of the circuit and are suitable for fault reasoning under ideal conditions, but they struggle to cover complex uncertainties such as device aging and parameter fluctuations in practical applications. Expert system methods, on the other hand, rely on a large number of human-based empirical rules, resulting in high construction complexity and limited versatility and transferability. In contrast, data-driven methods, leveraging artificial intelligence technologies such as deep learning, can learn the nonlinear mapping relationship between signals and fault types through a large amount of circuit response data, achieving end-to-end automated identification and gradually becoming the mainstream research direction.

[0004] However, most current data-driven methods still focus on extracting the overall statistical features or frequency domain spectral features of analog circuit response signals, lacking effective modeling of local dynamic modes such as non-stationary and weak amplitude disturbances. This results in insufficient perception of weak fault signals such as slight device degradation and early failure. While convolutional neural networks (CNNs) excel in local feature extraction, their ability to model long-term scale dependencies is limited by their fixed receptive field. They struggle to accurately identify complex fault modes such as joint degradation of multiple devices, feature coupling, or fault overlap, thus affecting diagnostic accuracy and generalization ability. In practical engineering applications, especially in early warning and fault-tolerant control scenarios with high requirements for circuit health status, this has become one of the key bottlenecks restricting the performance improvement of diagnostic systems.

[0005] In recent years, the Transformer architecture, with its multi-head self-attention mechanism, has demonstrated powerful long-range dependency modeling capabilities in natural language processing and time series modeling, effectively capturing contextual relationships across time periods and providing new insights for global signal modeling. However, the original Transformer lacks awareness of local structures, and directly applying it to analog circuit signal diagnostic tasks may overlook crucial local temporal information, affecting the model's ability to capture subtle fault features.

[0006] To enhance the diagnostic model's ability to model the multi-scale structure of signals, inspired by VisionTransformer (ViT) and time-series Transformer models (such as PatchTST), this paper proposes dividing the analog circuit response signal into several equal-length local segments (Patches) and using them as input tokens for subsequent feature learning and dependency modeling. By introducing a local feature extractor (e.g., depthwise separable convolution combined with channel attention mechanism) within each Patch, not only can local temporal features be efficiently extracted, highlighting the local patterns within the Patch in the time dimension, but the channel response corresponding to the fault-sensitive frequency bands of devices such as resistors and capacitors can also be adaptively strengthened, thereby improving the model's ability to discriminate early degradation signals. Based on this, the Patch mechanism can both preserve local temporal structure and capture short-term abrupt changes and weak perturbations, and combine global attention to model long-term dependencies across Patches, identifying complex coupled degradation patterns. In addition, this mechanism can significantly reduce the computational complexity of Transformer models, improving training and inference efficiency while ensuring performance.

[0007] In summary, there is an urgent need for a novel method that integrates local structure modeling and global dependency perception capabilities to achieve efficient and accurate identification of early degradation faults in analog circuits, thereby improving the reliability and fault tolerance of the system. Summary of the Invention

[0008] The purpose of this invention is to propose an early fault diagnosis method for analog circuits based on subsequence partitioning and Transformer, in order to solve the problems of unclear fault features, easy overlap of states, and insufficient classification accuracy in existing methods, and improve the ability to identify and diagnose the early degradation state of analog circuits.

[0009] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0010] An early fault diagnosis method for analog circuits based on subsequence partitioning and Transformer includes the following steps:

[0011] S1. Time-domain simulation is performed on the Sallen-Key filter circuit and the Leapfrog active filter circuit by applying pulse excitation signals. Sample signal data of various fault types are collected under different fault device and fault range conditions, and normalized preprocessing is performed. S2. The normalized sample signal data is divided into multiple equal-length subsequences. For each subsequence, a local feature extractor is used to extract local features and adaptively enhance the channel attention expression capability corresponding to the sensitive frequency bands of resistance and capacitance faults. S3. The local features extracted from each subsequence are converted into tokens through linear mapping. The embedding vector is added element-wise with the learnable position code to preserve the temporal position information of the analog circuit output in different time slices of transient response and slow drift, forming an embedding sequence; S4, the embedding sequence is input into the Transformer global modeling module to model the global dependency relationship between different sub-sequences, capture the cross-time slice correlation between high-frequency transient and low-frequency drift features in the analog circuit output signal, and obtain the global feature representation after the encoder layer output through a flattening operation; S5, the global feature representation obtained in step S4 is input into the fault diagnosis module, and after passing through the fully connected layer and the Softmax output layer, the classification and prediction of multiple fault types are realized.

[0012] Further, step S1 includes:

[0013] S1-1. The analog circuit under test is selected from Sallen-Key filter circuit and Leapfrog active filter circuit. Based on the analysis results of the output response sensitivity, the components that have a great impact on the circuit performance are identified as faulty components.

[0014] S1-2. Using the PSpice simulation tool, under the set parameter tolerance conditions, the parameter values ​​of the faulty component are set to an offset of ±10% to ±30% relative to the nominal value to simulate the fault state of the tested analog circuit in the early degradation stage.

[0015] S1-3. Apply a pulse excitation signal to the input terminal of the analog circuit under test. The pulse excitation signal simultaneously excites the high-frequency transient response and low-frequency steady-state component of the circuit.

[0016] S1-4. Acquire the time-domain response signal at the output of the analog circuit under test. For each fault type, Monte Carlo simulation is used to generate sample signal data.

[0017] S1-5. Divide the collected sample signal data into training set and test set in a 7:3 ratio, and map the features to the [0,1] interval using the maximum-minimum normalization method.

[0018] Further, step S2 includes:

[0019] S2-1: Set the step size S of the sliding window, where S is a positive integer not greater than the subsequence length L; divide the normalized sample signal data into multiple subsequences of length L segment by segment according to the sliding window method;

[0020] S2-2, Extract local features from each subsequence and enhance channel attention expression:

[0021] (1) The convolutional layers can be separated by one-dimensional depthwise, and the local features of each channel can be extracted independently;

[0022] (2) Pointwise convolutional layers are used to fuse information between channels;

[0023] (3) Batch normalization and nonlinear activation units are introduced after the convolution output to enhance the nonlinear expressive power;

[0024] (4) Channel attention enhancement is performed through the SE module, specifically including: global average pooling for each channel, extracting global context information, generating channel attention weights through a two-layer fully connected network and the Sigmoid function, and multiplying the weights element by element with the original channel features to achieve adaptive enhancement of key channels and suppression of redundant channels;

[0025] (5) Output the attention-enhanced subsequence representation as input to the subsequent Transformer global modeling module for cross-subsequence dependency modeling and fault mode identification.

[0026] Furthermore, in step S3, the dimension d of the token embedding vector is an integer between 32 and 128, and the position encoding is a learnable parameter, which is added element-wise to the token embedding to form the final input sequence.

[0027] Furthermore, in step S4, the core sub-module of the Transformer global modeling module is the Transformer encoder, which is composed of N encoder layers stacked together. Each encoder layer includes a multi-head self-attention sub-module, a feedforward neural network module, residual connections, and a normalization structure.

[0028] Further, step S4 includes:

[0029] S4-1, The Transformer global modeling module, based on the embedded sequence generated in step S3, models high-frequency transients, low-frequency drift, mid-frequency resonances and amplitude envelopes in parallel to achieve early fault identification across time scales;

[0030] S4-2, the embedding dimension of each input subsequence is set to 64. In each encoder layer of the Transformer encoder, the output of the multi-head self-attention submodule is added to the residual of the input of the encoder layer and then subjected to layer normalization.

[0031] S4-3, the feedforward neural network module consists of two linear transformation layers. The first linear transformation layer upscales the embedded features to an intermediate dimension. The second linear transformation restores the embedded features to the original embedding dimension, and the GELU activation function is used between the two linear transformations.

[0032] S4-4, the output of the feedforward neural network module, after being processed by residual connections and layer normalization, is passed to the next encoder layer. The subsequence embedding vectors of all Transformer encoder outputs are flattened into one-dimensional vectors. The flattened global feature representation contains multi-scale information of the circuit from fast response to slow decay under pulse excitation; and serves as the input for subsequent classification processing.

[0033] Furthermore, in step S5, the fault diagnosis module consists of the following structure: S5-1, the global feature representation output in step S4 is input into at least one fully connected neural network layer for feature compression and nonlinear transformation;

[0034] S5-2 inputs the output of the fully connected neural network to the Softmax output layer, and classifies the output to correspond to the specific response patterns of early degradation of different devices, thereby enabling the classification and prediction of multiple types of analog circuit faults.

[0035] This invention also proposes an early fault diagnosis system for analog circuits based on subsequence partitioning and Transformer for implementing the above method, comprising: a data acquisition module for acquiring and normalizing the preprocessed time-domain response signal of the analog circuit under test; a feature extraction module for extracting local features of each subsequence based on DWConv and SE modules; a Transformer global modeling module, consisting of a Transformer encoder formed by stacking N encoder layers, which performs global dependency modeling between subsequences based on the Transformer encoder, and flattens or aggregates the encoding results at the output to obtain a global feature representation for classification; and a fault diagnosis module for inputting the global feature representation output by the Transformer global modeling module into at least one fully connected network and a Softmax layer for classification, and outputting fault diagnosis results.

[0036] Furthermore, the system is deployed in an FPGA, edge computing unit, or industrial embedded platform, supporting real-time online fault diagnosis of analog circuits.

[0037] The beneficial effects of this invention are as follows:

[0038] (1) The early fault diagnosis method for analog circuits based on Patch partitioning and Transformer global attention mechanism proposed in this invention can fully integrate local timing features and global dependency information, solve the problems of insufficient fault feature extraction and low state discrimination in traditional methods, and improve the fault identification accuracy of complex analog circuits in the early degradation stage.

[0039] (2) A lightweight feature extraction structure combining depthwise separable convolution (DWConv) and Squeeze-and-Excitation (SE) modules is adopted, which effectively improves the feature discrimination ability of the model and significantly reduces the number of parameters and computational complexity, and has good engineering deployment efficiency.

[0040] (3) By introducing a position-based Transformer encoder, long-range modeling capability across patches is realized, enhancing the recognition effect of timing coupling mode. It can adapt to the diagnostic needs of various types of circuits and various early fault modes, and has good versatility and promotion value. Attached Figure Description

[0041] Figure 1 This is a schematic diagram of the early fault diagnosis method for analog circuits based on subsequence partitioning and Transformer according to the present invention.

[0042] Figure 2 It is a visual diagram of the input subsequence signal and the corresponding four attention heads;

[0043] Figure 3 This is the attention weight heatmap generated by the Transformer model in this invention for the 0th input sample under the 1st attention head;

[0044] Figure 4 This is the confusion matrix of the fault diagnosis results of test circuit 1 according to the present invention;

[0045] Figure 5 This is the confusion matrix of the fault diagnosis results of test circuit 2 according to the present invention;

[0046] Figure 6 The specific implementation of this invention is the test circuit 1: the Sallen-Key circuit;

[0047] Figure 7 The test circuit 2 in this invention is the Leapfrog circuit. Detailed Implementation

[0048] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present invention.

[0049] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0050] like Figure 1 As shown in the figure, this invention discloses an early fault diagnosis method for analog circuits based on subsequence partitioning and Transformer, including the following steps:

[0051] S1. Time-domain simulation of the Sallen-Key and Leapfrog circuits is performed using the PSpice simulation tool, applying excitation signals. Under different faulty devices and fault ranges, sample signal data for various fault types are collected using the Monte Carlo method, and the collected data is preprocessed by normalization. S2. The normalized signal data is divided into multiple equal-length patches using a fixed-length sliding window. For each patch, a local feature extractor consisting of depthwise separable convolution (DWConv) and Squeeze-and-Excitation (SE) modules is used to extract local features and adaptively enhance channels corresponding to the sensitive frequency bands of resistance and capacitance faults. Note the expressive power; S3, convert the local features extracted from each patch into a token embedding vector of dimension d through linear mapping, and add it element-wise with the learnable position code to maintain the temporal position information of the analog circuit output in different time slices such as transient response and slow drift, forming an embedding sequence; S4, input the embedding sequence into a global modeling module composed of multiple stacked Transformer encoders, model the global dependency relationship between different patches based on the multi-head self-attention mechanism, so as to capture the cross-time slice correlation between features such as high-frequency transient and low-frequency drift in the analog circuit output signal, especially the temporal coupling effect caused by multi-device collaborative degradation, and obtain a one-dimensional global feature representation after the encoder stack output through flattening operation; S5, input the one-dimensional global feature representation output in step S4 into a fault diagnosis module composed of several fully connected layers, and finally classify and predict 14 predefined fault types through the softmax output layer.

[0052] In step S1, the data acquisition module includes the following specific steps:

[0053] S1-1, Determine the circuit under test, and perform sensitivity analysis on the circuit under test in the simulation software to identify the components that have a significant impact on the circuit's output performance. Select the components with the greatest impact as the faulty components in the experiment (in the Sallen-Key circuit, R1, R2, R3, C1, and C2 are selected as faulty components through sensitivity analysis; in the Leapfrog circuit, R1, R2, R3, R4, and C2 are selected as faulty components through sensitivity analysis).

[0054] S1-2, In actual component manufacturing, due to process and other reasons, components such as resistors and capacitors will have certain tolerances. To simulate the actual situation, this invention sets the tolerances of capacitors and resistors in the Salley-Key bandpass filter circuit and Leapfrog circuit to 5% and 10%, respectively; the fault simulated during data acquisition is an early-range fault, which means that the component deviates from the nominal value. Therefore, the early fault is set near the tolerance range, that is, an early-range fault is used to simulate the early fault, and the early fault offset value is set to a range of 10~30% for the fault.

[0055] S1-3, because the pulse signal has the richest frequency domain components, the Salley-Key bandpass filter circuit is set to a pulse signal with an amplitude of 5V, a pulse period of 21µs, and a pulse width of 10µs. This pulse excitation signal can simultaneously excite the circuit's high-frequency transient response and low-frequency steady-state components, so that the circuit's transient ringing, mid-frequency resonance, and low-frequency drift characteristics can be reflected in the output signal.

[0056] S1-4: While applying the excitation signal, data is acquired at equal intervals at the output. The sampling range of the time-domain response signal is 0~60µs, the sampling rate is 10MHz, that is, the sampling interval is 0.1µs, and a total of 500 Monte Carlo analyses are performed. For the Leapfrog circuit, the same pulse signal as the Sallen-Key circuit is used, the circuit's time-domain response signal acquisition range is 0~3ms, the sampling interval is 2µs, and a total of 500 Monte Carlo analyses are performed.

[0057] In steps S1-5, the collected dataset of various fault signals from analog circuits is divided into a training set and a test set in a 7:3 ratio. The training set is used for model training, while the test set is used for performance evaluation and generalization capability verification. To improve the model's adaptability to data with different scales, normalization preprocessing is performed on the signal data of each channel in both the training and test sets. Specifically, the Min-MaxNormalization method is used to linearly map the feature values ​​of each sample to the [0, 1] interval, as shown in the following formula:

[0058] ) / );

[0059] in, For the i-th data point in a single sample, and These are the minimum and maximum values ​​of the sample. This is the normalized value.

[0060] Step S1-1 includes the following specific steps:

[0061] To comprehensively evaluate the effectiveness and generalization ability of the proposed algorithm in early fault diagnosis of analog circuits, typical Sallen-Key low-pass filter circuits and Leapfrog active filter circuits were selected as experimental objects, and various early single-fault conditions were designed for simulation experiments.

[0062] Step 1.1.1: For the Sallen-Key circuit, a total of 14 fault states are set, as shown in Table 1. These include one fault-free state (denoted as NF), 10 early degradation faults of individual components, and three multi-component combination faults. Specifically, the single fault covers the vertical offset of resistors and capacitors, including: R1↑, R1↓, R2↑, R2↓, R3↑, R3↓, C1↑, C1↓, C2↑, C2↓. The symbol "↑" indicates that the component parameter value is 10% to 30% higher than its nominal value; "↓" indicates that the component parameter value is 10% to 30% lower, both falling within the small degradation range of the early stage of circuit failure, consistent with common fault characteristics such as component aging and thermal drift in engineering. In addition, to further verify the adaptability of the diagnostic model to complex actual working conditions, several typical combined fault states were introduced into the simulation experiment, including but not limited to: simultaneous faults of R1↑ and R2↑ (denoted as R1↑R2↑), simultaneous faults of R1↑ and C1↓ (denoted as R1↑C1↓), and simultaneous faults of C1↓ and C2↓ (denoted as C1↓C2↓), etc.

[0063] Table 1. Fault Types of Sallen-Key Circuits

[0064]

[0065] Step 1.1.2: In the Leapfrog circuit, following the same design principles, key components such as R1, R2, R3, R4, and C2 were selected as fault injection points, and corresponding early degradation faults were set, as shown in Table 2. All the above fault states were simulated using the PSpice simulation platform combined with the Monte Carlo parameter perturbation method to generate analog signal data, ensuring the diversity of samples and their approximation to the actual degradation trend, thus providing sufficient data support for subsequent fault identification model training and verification.

[0066] Table 2 Leapfrog Circuit Fault Types

[0067]

[0068] In step S2, the feature extraction module includes the following specific steps:

[0069] S2-1, Patch partitioning module, divides the output signal of each normalized analog circuit. Consider it as a one-dimensional time series, where This represents the total number of sampling points for the signal. A fixed length is used. Sliding window (where The sequence is divided into several equal-length subsequences (patches) by an integer (between 16 and 128). If a non-overlapping partition is used, each patch is independent; if a sliding window partition is used, the sliding step size is... ,satisfy This can create partially overlapping patches, each patch Representing a local time segment of the original signal, a total of: This allows for the creation of individual patches, thereby providing local structural information for subsequent feature extraction while maintaining the temporal continuity of the original signal.

[0070] S2-2, the local feature extraction module includes a network structure composed of Depthwise separable convolutions and SE modules. Each patch is input into this network structure, and local features are extracted using DWConv. Then, the SE module is used to enhance channels related to fault-sensitive frequency bands to ensure that key local information is not diluted in subsequent global modeling. This includes the following steps:

[0071] (1) Feed the input Patch features into a one-dimensional Depthwise convolutional layer, perform convolution operation independently on each channel, and extract local temporal features;

[0072] (2) The output of the Depthwise convolution is fed into the Pointwise convolution layer, and 1×1 convolution is used to fuse all channel information to realize feature interaction between channels;

[0073] (3) After the convolution operation, batch normalization and nonlinear activation functions (such as ReLU or Swish) are performed in sequence to enhance the model's ability to express nonlinear relationships;

[0074] (4) Input the convolution result into the Squeeze-and-Excitation (SE) module. First, perform global average pooling on the feature map of the patch to generate statistical features for each channel. Then, calculate the channel weights through two fully connected layers and Sigmoid activation to achieve adaptive weighting of the features of each channel. The SE module performs adaptive weighting on the multi-channel temporal patch features extracted by convolution, which can enhance the channel response that is sensitive to the drift of devices such as resistors and capacitors, suppress irrelevant channels, thereby highlighting the fault features at different time scales and achieving efficient identification of early faults.

[0075] (5) Output the enhanced local feature representation for subsequent Transformer encoder processing.

[0076] Step S3 includes the following specific steps:

[0077] Extract the local feature vector (dimension ) from each patch ,in For the number of channels, (The length of the patch) is first linearly mapped through a one-dimensional convolutional or fully connected layer to convert it into a uniform dimension. A token embedding vector (e.g., 128 or 256). This linear mapping aligns feature dimensions and fuses local temporal features, providing a unified input representation for subsequent Transformer encoder processing;

[0078] To enhance the model's ability to perceive the position of the input patch within the sequence, a learnable positional encoding is added to each token embedding vector. This positional encoding has the same dimension as the token. The vector is automatically learned through backpropagation during training; the position index is usually based on the sequential numbering of the patches, forming a vector of the form... The encoding matrix, where Number of patches;

[0079] Finally, the linearly mapped token vector is added element by element to the corresponding position encoding vector to form an embedded sequence containing temporal position information, which is used as input to the Transformer encoder for global dependency modeling and fault feature extraction.

[0080] In step S4, the global modeling module includes:

[0081] The core of the global modeling module consists of N stacked Transformer encoder layers, where N ranges from 1 to 6 layers. Each encoder layer contains the following structure: S4-1. The Transformer global modeling module is used to perform global temporal dependency modeling on the Patch embedding sequence generated in step S3. It can also identify temporal coupling effects caused by the collaborative degradation of multiple devices. For example, when multiple capacitors experience slow parameter drift, the low-frequency steady-state part of the circuit output will show a long-term cumulative offset, while the high-frequency transient part will show a systematic change in damping and ringing frequency. The Transformer's multi-head self-attention mechanism can simultaneously model short-term high-frequency anomalies and long-term low-frequency trends, thereby achieving fault identification across time scales.

[0082] A multi-head self-attention mechanism is used to model global temporal dependencies between patch embeddings. This mechanism consists of h parallel attention heads, where h is 4. Each attention head uses a scaled dot product attention calculation method, in the form of:

[0083] ;

[0084] Where Q, K, and V represent the query, key, and value vectors, respectively. The embedding dimension for each attention head; the embedding dimension for each input patch feature is set to 64 dimensions;

[0085] This invention employs a multi-head self-attention mechanism, comprising four attention heads, each focusing on different feature patterns of the input signal. Each attention head calculates its attention weight in parallel, resulting in different attention distributions on the same input signal, thus enhancing feature representation and fault detection capabilities.

[0086] like Figure 2The diagram illustrates the attention patterns of different attention heads on the same input patch signal in the early fault diagnosis of analog circuits using the model of this invention. The first row shows the input patch signal, and the second to fifth rows show the normalized attention weights of Head1 to Head4, where the padding below the curves represents the attention intensity. It can be observed that different attention heads exhibit differentiated attention tendencies on the same input sample. For example, Head1 assigns higher weights to the first half of the impulse response, making it easier to capture high-frequency transient features; Head2 maintains strong attention at the tail end of the response, tending to reflect low-frequency drift trends; Head3 shows a higher weight distribution in the mid-frequency oscillation segment; while Head4 focuses more on the overall change in the amplitude envelope. The parallel focusing capability of multi-head attention enables the model to simultaneously capture high-frequency transients, low-frequency steady-states, mid-frequency resonances, and amplitude envelope features in different subspaces, thereby achieving early fault identification across time scales.

[0087] To further verify the interpretability advantages of the attention mechanism, this invention uses attention heatmaps for visualization analysis. For example... Figure 3 As shown, taking the attention matrix of the 0th test sample under Head1 as an example, the heatmap clearly shows that the model assigns higher attention weights to some time segments (Patch), indicating that the model can automatically highlight key areas that are highly related to fault features, thereby improving the ability to model and identify weak fault signals.

[0088] S4-2, following the multi-head attention mechanism, applies residual connections and a LayerNorm structure to improve training stability and gradient flow efficiency, avoiding information degradation in deep networks; S4-3, a feedforward fully connected subnetwork, consists of two linear transformation layers, where the first layer upscales the embedded features to an intermediate dimension d. ff The value is 2 to 4 times the original embedding dimension. The second layer restores the feature mapping to the original embedding dimension. The GELU activation function is used between the two linear layers to improve the non-linear modeling capability.

[0089] S4-4, the output of the feedforward network is again processed by residual connection and LayerNorm normalization to form the final output of the encoder layer, which is then passed as input to the next encoder layer or used for subsequent fault diagnosis module processing.

[0090] S4-5 After the encoder stack is modeled, the output embedding vectors of all patches are concatenated and flattened into a one-dimensional global feature representation (for example, if there are 10 patches, each with 64 dimensions, then the flattened representation is 640 dimensions). This global feature representation contains multi-scale temporal information across patches and serves as the input for the subsequent fault diagnosis module.

[0091] In step S5, the fault diagnosis module includes the following specific steps:

[0092] S5-1, the global feature representation output from step S4 is input into a two-layer fully connected neural network. The first fully connected layer compresses 640 dimensions to 256 dimensions, and the second fully connected layer further compresses it to 64 dimensions. The GELU activation function is used after each layer, and Dropout layers are inserted between each layer to prevent overfitting.

[0093] S5-2 inputs the 64-dimensional features into the final Softmax output layer, outputting an n-dimensional vector. The dimensions correspond to the defined set of analog circuit fault types, and the Softmax result represents the predicted probability of each type of fault.

[0094] Corresponding to the above method, this invention also discloses an early fault diagnosis system for analog circuits based on patch partitioning and Transformer global attention mechanism, comprising:

[0095] (1) Data acquisition module: used to simulate the Sallen-Key circuit and the Leapfrog circuit, acquire the time-domain response signal containing early faults, and normalize and preprocess the original signal to meet the requirements of subsequent model input.

[0096] (2) Feature Extraction Module: This module divides the normalized signal into equal-length patches and extracts local features from each patch. It uses Depthwise Separable Convolution (DWConv) to extract local temporal features and combines it with the Squeeze-and-Excitation (SE) module to enhance the dependencies between feature channels, thereby improving feature representation and reducing computational complexity. Subsequently, through linear mapping and positional encoding, each patch is converted into a token representation of a unified dimension, providing input for subsequent global modeling.

[0097] Furthermore, the feature extraction module includes:

[0098] Lightweight convolution submodule: used to extract local temporal features within each patch using depthwise separable convolution (DWConv);

[0099] Channel Attention Submodule: Used to introduce the Squeeze-and-Excitation (SE) structure to enhance the response of key feature channels and suppress irrelevant interference.

[0100] The Patch embedding submodule is used to convert the local features of each Patch into a token embedding of uniform dimension through linear mapping, and add it with the learnable positional encoding to form an embedding vector sequence with temporal information.

[0101] (3) Global Modeling Module: This module is used to model the global temporal dependencies between all patches. Based on the Transformer encoder structure, it consists of multiple stacked encoder layers, each including a multi-head self-attention mechanism, a feedforward neural network, residual connections, and a normalization layer. Its main function is to capture long-range dependencies across patches and model complex coupled fault evolution patterns. Further, the global modeling module specifically includes:

[0102] Transformer encoder submodule: It is used to receive the Patch embedding sequence output by step S3 and realize global dependency modeling through multi-layer Transformer encoding operations. Each layer includes a multi-head self-attention mechanism and a feedforward neural network unit, which can extract global context features across time scales.

[0103] Output processing submodule: It is used to concatenate and flatten the Patch embedding vectors output by all Transformer encoder layers into a one-dimensional global feature representation vector. This feature vector integrates multi-scale information of circuit response and provides a unified input for the fault diagnosis module.

[0104] (4) Fault diagnosis module: It is used to flatten the features output by Transformer and input them into a multi-layer fully connected neural network, and to classify and predict 11 predefined types of analog circuit faults through the Softmax output layer.

[0105] The experimental results of the method of this invention are compared with those of other methods, as shown in Table 3.

[0106] Table 3 Comparison of Fault Diagnosis Results

[0107]

[0108] This invention proposes an early fault diagnosis method for analog circuits based on patch partitioning and a Transformer encoder. The overall framework employs a local-global collaborative modeling mechanism, which effectively captures global dependencies across time slices and temporal coupling effects caused by multi-device collaborative degradation while preserving short-term local features of the circuit signal. Compared to traditional DNN structures, this method introduces a multi-level attention mechanism, enhancing the extraction and fusion capabilities of various feature patterns such as transient response, slow drift, and amplitude envelope changes. Compared to methods using only a Transformer Encoder, this invention adaptively strengthens the channel representation capabilities related to resistance and capacitance fault-sensitive frequency bands through the DWConv+SE local feature extraction module, improving sensitivity to short-term dynamics. Compared to the Patch-CNN method, the multi-head attention mechanism employed in this invention has stronger temporal dependency modeling capabilities, accurately characterizing the dynamic changes in the analog circuit response.

[0109] Experimental results show that, under the same dataset and evaluation metrics, the overall accuracy of this method in fault classification tasks is significantly improved compared with DNN, TransformerEncoder and Patch-CNN methods, verifying its effectiveness and robustness in early fault diagnosis of analog circuits.

[0110] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for early fault diagnosis of analog circuits based on subsequence partitioning and Transformer, characterized in that, Includes the following steps: S1. Apply pulse excitation signals to the Sallen-Key filter circuit and the Leapfrog active filter circuit to perform time-domain simulation. Under the conditions of setting different fault devices and fault intervals, collect sample signal data of various fault types and perform normalization preprocessing. S2. Divide the normalized sample signal data into multiple equal-length subsequences; For each subsequence, a local feature extractor is used to extract local features and adaptively enhance the channel attention expression capability corresponding to the frequency bands sensitive to resistance and capacitance faults; S3. The local features extracted from each subsequence are converted into token embedding vectors through linear mapping, and then added element by element to the learnable position code to preserve the temporal position information of the analog circuit output in different time slices of transient response and slow drift, thus forming an embedding sequence. S4. Input the embedded sequence into the Transformer global modeling module to model the global dependency between different sub-sequences, capture the cross-time-slice correlation between high-frequency transient and low-frequency drift features in the analog circuit output signal, and obtain the global feature representation by flattening after the encoder layer output. The core submodule of the Transformer global modeling module is the Transformer encoder, which consists of N stacked encoder layers. Each encoder layer includes a multi-head self-attention submodule, a feedforward neural network module, residual connections, and a normalization structure; including: S4-1, The Transformer global modeling module, based on the embedded sequence generated in step S3, models high-frequency transients, low-frequency drift, mid-frequency resonances and amplitude envelopes in parallel to achieve early fault identification across time scales; S4-2, the embedding dimension of each input subsequence is set to 64. In each encoder layer of the Transformer encoder, the output of the multi-head self-attention submodule is added to the residual of the input of the encoder layer and then subjected to layer normalization. S4-3, the feedforward neural network module consists of two linear transformation layers. The first linear transformation layer upscales the embedded features to an intermediate dimension. The second linear transformation restores the embedded features to the original embedding dimension, and the GELU activation function is used between the two linear transformations. S4-4, the output of the feedforward neural network module is processed by residual connection and layer normalization, and then passed to the next encoder layer. The subsequence embedding vector of all Transformer encoder outputs is flattened into a one-dimensional vector. The flattened global feature representation contains multi-scale information of the circuit from fast response to slow decay under pulse excitation; and serves as the input for subsequent classification processing. S5. Input the global feature representation obtained in step S4 into the fault diagnosis module, and after passing through the fully connected layer and the Softmax output layer, realize the classification and prediction of multiple fault types.

2. The method for early fault diagnosis of analog circuits based on subsequence partitioning and Transformer as described in claim 1, characterized in that, Step S1 includes: S1-1. The analog circuit under test is selected from Sallen-Key filter circuit and Leapfrog active filter circuit. Based on the analysis results of the output response sensitivity, the components that have a great impact on the circuit performance are identified as faulty components. S1-2. Using the PSpice simulation tool, under the set parameter tolerance conditions, the parameter values ​​of the faulty component are set to an offset of ±10% to ±30% relative to the nominal value to simulate the fault state of the tested analog circuit in the early degradation stage. S1-3. Apply a pulse excitation signal to the input terminal of the analog circuit under test. The pulse excitation signal simultaneously excites the high-frequency transient response and low-frequency steady-state component of the circuit. S1-4. Acquire the time-domain response signal at the output of the analog circuit under test. For each fault type, Monte Carlo simulation is used to generate sample signal data. S1-5. Divide the collected sample signal data into training set and test set in a 7:3 ratio, and map the features to the [0,1] interval using the maximum-minimum normalization method.

3. The method for early fault diagnosis of analog circuits based on subsequence partitioning and Transformer according to claim 1, characterized in that, Step S2 includes: S2-1: Set the step size S of the sliding window, where S is a positive integer not greater than the subsequence length L; divide the normalized sample signal data into multiple subsequences of length L segment by segment according to the sliding window method; S2-2, Extract local features from each subsequence and enhance channel attention expression: (1) The convolutional layers can be separated by one-dimensional depthwise, and the local features of each channel can be extracted independently; (2) Pointwise convolutional layers are used to fuse information between channels; (3) Batch normalization and nonlinear activation units are introduced after the convolution output to enhance the nonlinear expressive power; (4) Channel attention enhancement is performed through the SE module, specifically including: global average pooling for each channel, extracting global context information, generating channel attention weights through a two-layer fully connected network and the Sigmoid function, and multiplying the weights element by element with the original channel features to achieve adaptive enhancement of key channels and suppression of redundant channels; (5) Output the attention-enhanced subsequence representation as input to the subsequent Transformer global modeling module for cross-subsequence dependency modeling and fault mode identification.

4. The method for early fault diagnosis of analog circuits based on subsequence partitioning and Transformer as described in claim 1, characterized in that, In step S3, the dimension d of the token embedding vector is an integer between 32 and 128, and the position encoding is a learnable parameter, which is added element-wise to the token embedding to form the final input sequence.

5. The method for early fault diagnosis of analog circuits based on subsequence partitioning and Transformer according to claim 1, characterized in that, In step S5, the fault diagnosis module has the following structure composition: S5-1, Input the global feature representation output from step S4 into at least one fully connected neural network layer for feature compression and nonlinear transformation; S5-2 inputs the output of the fully connected neural network to the Softmax output layer, and classifies the output to correspond to the specific response patterns of early degradation of different devices, thereby enabling the classification and prediction of multiple types of analog circuit faults.

6. A system for early fault diagnosis of analog circuits based on subsequence partitioning and Transformer for implementing the method as described in any one of claims 1 to 5, characterized in that, include: The data acquisition module is used to acquire and normalize the preprocessed time-domain response signal of the analog circuit under test; The feature extraction module extracts local features of each subsequence based on the DWConv and SE modules; The Transformer global modeling module consists of a Transformer encoder formed by stacking N encoder layers. It performs global dependency modeling between subsequences based on the Transformer encoder and flattens or aggregates the encoding results at the output to obtain a global feature representation for classification. The fault diagnosis module is used to input the global feature representation output by the Transformer global modeling module into at least one fully connected network and a Softmax layer for classification, and output the fault diagnosis result.

7. The analog circuit early fault diagnosis system based on subsequence partitioning and Transformer as described in claim 6, characterized in that, The system is deployed in FPGAs, edge computing units, or industrial embedded platforms and supports real-time online fault diagnosis of analog circuits.

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