On-chip network blocking communication method and device

Abstract

This application discloses a communication method and apparatus for addressing on-chip network (NOC) congestion, relating to the field of computer technology. The on-chip NOC has a multi-channel distributed bus on the chip, sharing the same target routing direction as the NOC, for connecting a centralized controller and multiple routing nodes. The method includes detecting congestion information in multiple input directions corresponding to the multiple routing nodes, sending the congestion information to the physical bus associated with the congestion information; updating a global information status table based on the congestion information to query the congestion information of task routing nodes related to the communication task, planning the communication link for the communication task, and executing the communication task according to the communication link. This solves the problem that NOC avoidance operations often lag behind the congestion propagation speed and that the global acquisition controller has a heavy communication burden. It achieves the technical effects of refined proactive uploading and targeted broadcasting of information, reducing the burden on the centralized controller, and proactively avoiding congestion to solve the communication routing planning problem.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computers, and in particular, to a communication method and device for network-on-chip congestion. BACKGROUND

[0002] There are many networking methods for a network-on-chip (NOC), such as Mesh (here, referring to a standard 2D Mesh Topology), Fat Tree (Fat Tree Topology), Butterfly (Butterfly Topology), Star (Star Topology), Ring (Ring Topology), and 2D Torus (2-Dimensional Torus Topology), and the like. Among them, Mesh and 2D Torus are widely used in various NOC scenarios due to various advantages, and both are two-dimensional networks, and the algorithms are usually XY-based dimension order routing algorithms and their improved versions.

[0003] In related technologies, a dynamic avoidance algorithm (such as adaptive steering routing) in the NOC changes the routing only after a data packet arrives at a congestion neighborhood (≥ 3-hop distance). Taking adaptive steering routing as an example: there are a total of 8 steering directions, and the XY routing uses only 4 of them, and the adaptive routing increases to 6. While avoiding deadlock, the other two steering directions are selected to avoid congestion after encountering a congestion neighborhood.

[0004] However, in related technologies, the dynamic avoidance algorithm in the NOC changes the routing only after a data packet arrives at a congestion neighborhood (≥ 3-hop distance), and lacks global traffic prediction. When a hotspot area is formed, the avoidance operation often lags behind the congestion diffusion speed, and even triggers cascading congestion, resulting in a decline in the communication performance of the NOC network. Moreover, it often depends on a global collection controller, which causes the global collection controller to need to communicate with each node at a fixed time, and has a heavy burden, which needs to be solved urgently. SUMMARY

[0005] The present application provides a communication method and device for network-on-chip congestion, to at least solve the problems in related technologies that the dynamic avoidance algorithm in the NOC changes the routing only after a data packet arrives at a congestion neighborhood, lacks global traffic prediction, and when a hotspot area is formed, the avoidance operation often lags behind the congestion diffusion speed.

[0006] The application provides a communication method for network-on-chip blocking, a chip where the network-on-chip is located is provided with a multi-channel distributed bus in the same target routing direction as the network-on-chip, the multi-channel distributed bus is used for connecting a centralized controller and a plurality of routing nodes on the chip, and the method comprises the following steps: detecting blocking information of a plurality of input directions corresponding to the plurality of routing nodes, determining a physical bus in the multi-channel distributed bus related to the blocking information, and sending the blocking information from the plurality of routing nodes to the centralized controller to send the blocking information to the physical bus; updating a global information state table according to the blocking information transmitted through the physical bus, and querying blocking information of a task routing node related to a communication task corresponding to the plurality of routing nodes based on the updated global information state table, wherein the global information state table is updated by the blocking information of a plurality of input directions of a plurality of routing nodes in the network-on-chip sent by the physical bus last time; planning a communication link of the communication task based on the blocking information of the task routing node, and executing the communication task according to the communication link.

[0007] The application also provides a communication device for network-on-chip blocking, a chip where the network-on-chip is located is provided with a multi-channel distributed bus in the same target routing direction as the network-on-chip, the multi-channel distributed bus is used for connecting a centralized controller and a plurality of routing nodes on the chip, and the device comprises: a first sending module for detecting blocking information of a plurality of input directions corresponding to the plurality of routing nodes, determining a physical bus in the multi-channel distributed bus related to the blocking information, and sending the blocking information from the plurality of routing nodes to the centralized controller to send the blocking information to the physical bus; a querying module for updating a global information state table according to the blocking information transmitted through the physical bus, and querying blocking information of a task routing node related to a communication task corresponding to the plurality of routing nodes based on the updated global information state table, wherein the global information state table is updated by the blocking information of a plurality of input directions of a plurality of routing nodes in the network-on-chip sent by the physical bus last time; and a communication module for planning a communication link of the communication task based on the blocking information of the task routing node, and executing the communication task according to the communication link.

[0008] The application also provides an electronic device comprising a memory for storing a computer program and a processor for executing the computer program to implement the steps of any of the above communication methods for network-on-chip blocking.

[0009] The application further provides a nonvolatile computer readable storage medium, and the computer readable storage medium stores a computer program.

[0010] The application further provides a computer program product, comprising a computer program, and the computer program is executed by a processor to implement the steps of the communication method for network-on-chip congestion.

[0011] Through the application, the congestion information of all routing nodes can be collected through the cooperation of multiple routing nodes, a centralized controller and a multi-channel distributed bus and sent to each routing node through the centralized controller and the multi-channel distributed bus, so that each routing node updates its global state information table, and the communication link of the communication task is planned through the congestion information of the task routing node. The technical problem that the dynamic avoidance algorithm in the related art NOC only changes the route after the data packet arrives at the congestion neighborhood, lacks the pre-judgment of the global traffic, and when the hotspot area is formed, the avoidance operation often lags behind the congestion diffusion speed, and the global collection controller is often relied on, so that the global collection controller needs to communicate with each node regularly, and the burden is large. The technical effect that the collection, refinement and active upload of the congestion information are realized through multiple routing nodes, a centralized controller and a multi-channel distributed bus, the wiring cost and the propagation of redundant invalid information are reduced, the burden of the centralized controller for polling collection, responding to the node request and bearing the global communication route planning is reduced, the state information of the task routing node corresponding to the communication task is queried according to the global information state table by multiple routing nodes, the congestion of each routing node is understood in advance, the avoidance algorithm is used to avoid congestion in advance, the communication route planning problem is solved, and the overall operation efficiency of the system is improved. BRIEF DESCRIPTION OF DRAWINGS

[0012] In order to more clearly illustrate the embodiments of the application, the drawings needed in the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor.

[0013] Figure 1 The non-circulating grid topology structure schematic diagram of an embodiment of the application;

[0014] Figure 2 The circulating grid topology structure schematic diagram of an embodiment of the application;

[0015] Figure 3 The flowchart of the communication method for network-on-chip congestion provided by the embodiment of the application;

[0016] Figure 4 This is a schematic diagram of the principle of a centralized control device for a conventional NOC communication architecture according to an embodiment of this application;

[0017] Figure 5 This is a schematic diagram illustrating the application of a centralized control device according to an embodiment of this application;

[0018] Figure 6 This is a schematic diagram of a multi-channel distributed bus according to an embodiment of this application;

[0019] Figure 7 This is a schematic diagram of the physical bus of one embodiment of this application;

[0020] Figure 8 This is a schematic diagram illustrating the input direction according to one embodiment of this application;

[0021] Figure 9 This is a schematic diagram of the working architecture of the forwarding and queue management module according to one embodiment of this application;

[0022] Figure 10 This is a schematic diagram of bus arbitration according to one embodiment of this application;

[0023] Figure 11 This is a schematic diagram of a controller according to an embodiment of this application;

[0024] Figure 12 This is a schematic diagram of a forwarding channel according to an embodiment of this application;

[0025] Figure 13 This is a flowchart of the controller processing according to one embodiment of this application;

[0026] Figure 14 This is a flowchart illustrating the node processing of one embodiment of this application;

[0027] Figure 15 This is a schematic diagram of the structure of an on-chip network blocking communication device provided in an embodiment of this application.

[0028] Figure label:

[0029] Among them, 10 is an on-chip network blocking communication device; 100 is a first sending module; 200 is a query module; and 300 is a communication module. Detailed Implementation

[0030] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0031] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0032] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0033] Before explaining the on-chip network blocking communication method in the embodiments of this application, the technical terms involved in the embodiments of this application will be explained first.

[0034] NOC: NOC is a distributed communication architecture integrated within a single chip (such as a multi-core processor or System on Chip (SoC)) to connect multiple processing units (CPU (Central Processing Unit), GPU (Graphics Processing Unit), DSP (Digital Signal Processor)), storage units (cache, memory controller) and peripheral interfaces (USB (Universal Serial Bus), PCIe (Peripheral Component Interconnect Express)).

[0035] NoC introduces the concept of network communication into System-on-Chip (SoC), treating components such as processor cores and storage as network nodes. Data transmission is achieved through an on-chip network, significantly improving the architecture of on-chip communication. Building upon the NOC communication architecture, it borrows the packet switching concept from computer networks, enabling efficient data transmission between components through routers, communication links, and network interfaces. This solves the problems of poor scalability, insufficient parallelism, and high latency in traditional bus architectures under multi-core / heterogeneous scenarios.

[0036] NOC has many networking methods, such as Mesh (referring to standard 2D Mesh (standard 2D Mesh Topology), Fat Tree, Butterfly, Star, Ring, and 2D Torus. Among them, Mesh and 2D Torus have been widely used in large-scale arrays, all-to-all global communication, and high-reliability NOC scenarios due to their advantages such as good scalability, high fault tolerance, low latency, load balancing, simple routing algorithms, and low power consumption. Both are two-dimensional networks.

[0037] 2D mesh (2-Dimensional Mesh Topology) is a network topology structure in which nodes are arranged in a two-dimensional matrix. Each node is connected to its neighboring nodes through links, forming a "mesh"-like layout.

[0038] In 2D Mesh networks, non-around (standard 2D Mesh) and around (2D Torus) are key factors determining their topology characteristics (this application can be used for both networks simultaneously). Among them, 2D Torus is an efficient regularized interconnection scheme in NOC, especially suitable for multi-core / heterogeneous chip designs with high requirements for communication latency, throughput and reliability.

[0039] like Figure 1 and Figure 2 As shown, Figure 1 This is a schematic diagram of a non-circular mesh topology according to an embodiment of this application. Figure 2 This is a schematic diagram of a surrounding mesh topology according to an embodiment of this application.

[0040] The embodiments of this application provide a communication method for on-chip network blocking. The method is described in detail below in conjunction with the execution flow of the on-chip network blocking communication method.

[0041] Specifically, Figure 3 This is a flowchart of a communication method for on-chip network blocking according to an embodiment of this application.

[0042] like Figure 3 As shown, in this on-chip network blocking communication method, the chip where the on-chip network is located is equipped with a multi-channel distributed bus with the same target routing direction as the on-chip network. The multi-channel distributed bus is used to connect the centralized controller on the chip and multiple routing nodes. The method includes the following steps:

[0043] In step S301, blocking information for multiple input directions corresponding to multiple routing nodes is detected, the physical bus in the multi-channel distributed bus related to the blocking information is determined, and the blocking information is sent from multiple routing nodes to the central controller to send the blocking information to the physical bus.

[0044] Those skilled in the art will understand that in traditional NOC communication architectures, the method of collecting congestion information is often to centrally and actively collect information from each node one by one through a centralized controller (global acquisition controller). If a node wants to send a packet, it needs to request a route from the centralized controller. Figure 4 This is a schematic diagram of the principle of a centralized control device based on a conventional NOC communication architecture according to one embodiment of this application. Figure 5 This is a schematic diagram illustrating the application of a centralized control device according to an embodiment of this application, such as... Figure 4 and Figure 5 As shown, in the traditional NOC communication architecture, the central controller needs to be directly connected to each node. If the network scale expands, the central controller also needs to communicate with each node periodically, which is a heavy burden and has low communication efficiency.

[0045] Based on this, embodiments of this application can set up a multi-channel distributed bus on the chip where the on-chip network is located, which is in the same direction as the target routing direction of the on-chip network. The multi-channel distributed bus is used to connect the centralized controller on the chip and multiple routing nodes. Thus, the collection and transmission (sending and receiving) of blocking information can be realized through the multi-channel distributed bus.

[0046] In some embodiments, considering that the major directions in the NOC communication architecture can be divided into the x-direction and the y-direction, the embodiments of this application can set the arrangement direction of the multi-channel distributed bus, that is, the target routing direction. Figure 6 This is a schematic diagram of a multi-channel distributed bus according to an embodiment of this application. Figure 6 As shown, with the horizontal direction of the NOC communication architecture as the x-direction and the vertical direction as the y-direction, in this embodiment, the target routing direction of the multi-channel distributed bus can be, but is not limited to, the x-direction in the NOC communication architecture. That is, in this embodiment, the bus direction of the multi-channel distributed bus is the same as the x-direction of the NOC communication architecture. It should be noted that in practical applications, those skilled in the art can determine the target routing direction according to the actual situation. This embodiment is only illustrative and does not impose specific limitations.

[0047] Furthermore, Figure 7 This is a schematic diagram of the physical bus according to one embodiment of this application. Figure 7As shown, each physical bus in the multi-channel distributed bus is a crossover bus. That is, in this embodiment, each physical bus in the multi-channel distributed bus is a branch bus structure shared by multiple nodes. The centralized controller connected to the same physical bus and multiple routing nodes can be connected in parallel through this physical bus. Signals can be transmitted (broadcast) to all nodes on this physical bus, or multiple nodes can compete to send data. This crossover (branch) topology allows one physical bus to serve multiple routing nodes simultaneously, realizing "one-to-many" or "many-to-one" interaction of blocking information.

[0048] Furthermore, in this embodiment of the multi-channel distributed bus, the maximum speed of each physical bus is 5Mbps, and each physical bus can be configured with a maximum of 16 (routing) nodes. Because the more nodes there are, the more intense the bandwidth competition becomes, and the more severe the signal attenuation is in long-distance, multi-branch transmission. Therefore, this embodiment of the application can limit the maximum number of nodes that can be connected to each physical bus to ensure the reliability of blocked information transmission and avoid signal packet loss and a sharp increase in latency due to too many nodes.

[0049] Furthermore, considering that the physical bus can essentially be viewed as a transmission line, when a signal is transmitted on the physical bus, if the characteristic impedance of the physical bus does not match the impedance of the transmitting / receiving end (such as the interface impedance of a routing node), signal reflection may occur when the signal reaches the end (or branch point) of the physical bus. The reflected signal may be superimposed on the subsequently transmitted signal, causing waveform distortion, such as signal blurring or spikes, which in turn interferes with the correct interpretation of blocking information, such as misinterpreting "0" as "1". Therefore, in this embodiment, a characteristic impedance of 120Ω can be set on each physical bus, thereby matching the impedance of each physical bus with that of the node, preventing signal reflection, and ensuring that blocking information can be transmitted accurately.

[0050] After configuring the multi-channel distributed bus, the on-chip network can detect the blocking information in multiple input directions corresponding to multiple routing nodes (communication nodes used to connect components such as CPU, GPU, DSP, storage units, and peripheral interfaces) in the current communication architecture. Specifically, this includes Link N (North), Link E (East), Link S (South), and Link W (West), corresponding to the blocking information in the four directions of the routing node's communication protocol. For example... Figure 8 As shown, Figure 8 This is a schematic diagram of the input direction in one embodiment of this application, where red represents the input unit (node ​​service input unit), and Link N / E / S / W corresponds to the blocking states in the four directions of east, west, south, and north in the communication protocol.

[0051] Then, the embodiments of this application can determine the physical bus in the multi-channel distributed bus related to the blocking information, that is, at least one physical bus in the multi-channel distributed bus that the blocking information may affect, and send the blocking information from multiple routing nodes to the central controller through the multi-channel distributed bus, and then send the blocking information to at least one physical bus in the multi-channel distributed bus related to the blocking information through the central controller and the multi-channel distributed bus.

[0052] This application embodiment can set up a multi-channel distributed bus on the chip where the on-chip network is located, with the same target routing direction as the on-chip network. This eliminates the need for the central controller to connect to each node individually, reducing wiring costs. The multi-channel distributed bus connects the central controller on the chip to multiple routing nodes, thereby cooperating with the central controller to collect and broadcast congestion information. This simplifies the entire centralized collection scheme in the traditional NOC communication architecture, effectively reducing the burden on the central controller to poll for collection and respond to node requests.

[0053] Optionally, in one embodiment of this application, before detecting the blocking information of multiple input directions corresponding to multiple routing nodes, the method further includes: collecting multiple routing nodes of the on-chip network to construct a topology between the multiple routing nodes and their corresponding channels; and initializing the correspondence between the multiple routing nodes and channels of the on-chip network according to the topology to detect the blocking information.

[0054] Based on the descriptions of other embodiments, it is understood that the multi-channel distributed bus in the embodiments of this application has multiple physical buses, each of which is a cross bus. It is a branch bus structure shared by multiple nodes and can connect multiple routing nodes.

[0055] Before detecting the blocking information of multiple input directions corresponding to multiple routing nodes, in order to ensure the transmission accuracy of the centralized controller, this embodiment of the application can use the centralized controller to first collect multiple routing nodes of the on-chip network to construct the topology between multiple routing nodes and their corresponding channels (it should be noted that the channel here is essentially the physical bus in the multi-channel distributed bus). That is, by representing each routing node and channel through the topology, the relationship between each routing node and all channels in the on-chip network and the correspondence between each routing node and its corresponding channel can be displayed intuitively.

[0056] Therefore, in this embodiment of the application, the correspondence between multiple routing nodes and channels of the on-chip network can be initialized according to the topology. That is, through the node testing module, test commands are issued to each of the multiple routing nodes to detect whether each node and its corresponding channel correspond and whether they can communicate normally.

[0057] After issuing a test command, the central controller can receive feedback information from the test command, specifically whether each routing node can receive the test command and provide feedback through the channel corresponding to that routing node recorded in the topology. If successful, it proves that the correspondence between the routing node and the channel is correct, and communication can proceed correctly and effectively. Upon receiving the feedback information, the central controller can record the nodes and channels, confirm that all nodes and channels are functioning normally, and then allow the detection of blocking information, preventing omissions or errors in the propagation of blocking information due to abnormal nodes or channels.

[0058] This application embodiment can construct a topology between multiple routing nodes and channels to initialize the correspondence between multiple routing nodes and channels, thereby ensuring that communication between routing nodes and their corresponding channels can be carried out correctly and effectively, and detecting blocking information in multiple input directions of each routing node for subsequent processing.

[0059] Optionally, in one embodiment of this application, before detecting blocking information in multiple input directions corresponding to multiple routing nodes, determining the physical bus in the multi-channel distributed bus related to the blocking information, and sending the blocking information from multiple routing nodes to the central controller, the method further includes: identifying at least some bytes of the start bit, node code, blocking state, state mask, test bit, checksum, and end bit during on-chip network communication; determining the on-chip network communication protocol based on at least some bytes of the start bit, node code, blocking state, state mask, test bit, checksum, and end bit, so as to transmit the blocking information using the communication protocol.

[0060] In actual execution, communication between on-chip components such as CPU, GPU, DSP, memory units, and peripheral interfaces relies on communication protocols. These protocols contain various elements for identification, verification, testing, and more. Each element in the communication protocol occupies a certain number of bytes; the larger the byte size, the more bandwidth is used and the slower the transmission. Based on this, embodiments of this application can define the communication protocol for the on-chip network to obtain a simplified (communication) protocol.

[0061] In the embodiments of this application, the defined protocol content includes, but is not limited to, start bit, node code, blocking state, state mask, test bit, checksum, and end bit. Then, the embodiments of this application can identify at least some bytes among the start bit, node code, blocking state, state mask, test bit, checksum, and end bit.

[0062] It should be noted that, in this embodiment of the application, the transmission process between components on some chips may not require some protocol content. Therefore, "identifying at least some bytes" here refers to identifying bytes that contain all the content of the communication protocol (which may be missing some of the start bit, node code, blocking state, status mask, test bit, checksum, and end bit). However, in normal circumstances, the communication protocol between nodes and components on chips contains all the content. In this case, "identifying at least some bytes" refers to identifying bytes that contain all the content of the communication protocol (without missing any of the start bit, node code, blocking state, status mask, test bit, checksum, and end bit).

[0063] Table 1 is a simplified protocol byte table of one embodiment of this application, where bit represents a binary digit, 1 bit represents 1 binary digit, which is the smallest unit of information storage in a computer, and can represent two states, "0" or "1". Table 1 can be represented as follows:

[0064] Table 1

[0065]

[0066] Start bit 1: low level;

[0067] Encoding 8 bits: can accommodate up to 256 nodes, 16x16 network size; the lower 4 bits are the x-axis and the higher 4 bits are the y-axis; in addition, the most important nodes on the same bus have the smallest encoding.

[0068] The 4-bit blocking status represents the blocking status of the node. A value of 1 indicates that the node is about to enter the blocking state, while a value of 0 indicates that the node is unblocked.

[0069] The 4-bit state mask indicates whether the state is valid in each direction. It can be arbitrarily combined in the same packet. After receiving it, the relevant nodes will avoid obstacles in advance according to their own obstacle avoidance algorithms to avoid cascading congestion.

[0070] Test bit 1: Actively sent by the controller, the receiving node replies with status information after matching its own ID (node ​​identifier);

[0071] The 5-bit checksum enables single-bit error correction and double-bit error detection.

[0072] End bit 1: High level.

[0073] Therefore, the communication protocol consists of 3 bytes, providing an efficient communication method for blocking the propagation of information.

[0074] After identifying at least some bytes of the start bit, node code, blocking state, state mask, test bit, checksum, and end bit in the communication protocol used in the on-chip network communication process, the embodiments of this application can determine the communication protocol between components on the chip in the on-chip network based on at least some bytes of the start bit, node code, blocking state, state mask, test bit, checksum, and end bit, so as to use the communication protocol to transmit blocking information, that is, to generate and transmit blocking information according to the bytes defined in the communication protocol.

[0075] This application embodiment can set a simplified communication protocol for the communication process of the on-chip network, so that the byte length of the entire communication protocol is controlled within 3 bytes. With the advantage of greatly reducing transmission latency through extremely small data packet size, allowing routing nodes to perceive network congestion status more quickly, it reduces the occupation of bus bandwidth, supports the parallel transmission of more congestion information, thereby providing timely and sufficient basis for the dynamic routing decision of the on-chip network, and effectively improving the overall communication efficiency and stability.

[0076] Optionally, in one embodiment of this application, sending blocking information from multiple routing nodes to a centralized controller includes: determining the direct physical bus of the routing node corresponding to the blocking information based on the blocking information; sending the blocking information to the direct physical bus of the routing node corresponding to the blocking information; and sending the blocking information to the centralized controller based on the direct physical bus.

[0077] In some embodiments, the multi-channel distributed bus in this application includes multiple physical buses, such as... Figure 6 and Figure 7 As shown, each physical bus is also connected to multiple routing nodes (some of the routing nodes among all the routing nodes (multiple routing nodes) connected to all physical buses in the multi-channel distributed bus). That is to say, multiple routing nodes are connected to different physical buses, and some of these multiple routing nodes can be directly connected to a physical bus. In this embodiment of the application, for ease of explanation, the single physical bus directly connected to each routing node can be referred to as the direct physical bus of this routing node.

[0078] Therefore, in the process of sending blocking information from multiple routing nodes to the central controller, the embodiments of this application can first determine the routing node corresponding to each blocking information, and then determine the direct physical bus of the routing node corresponding to each blocking information.

[0079] This physical bus (the direct physical bus of the routing node corresponding to each blocking information) directly connects the routing node corresponding to each blocking information and the central controller. It is the shortest physical bus between the routing node corresponding to each blocking information and the central controller. Therefore, in this embodiment, the blocking information of each routing node can be sent to the direct physical bus of the routing node corresponding to the blocking information first, and then the blocking information of each routing node can be sent to the central controller through the physical bus.

[0080] For example, the blocking information for multiple input directions corresponding to multiple routing nodes mainly includes the blocking status of each routing node's own four input directions (Link N, Link E, Link S, Link W). When blocking occurs in at least one direction (any direction) of the multiple input directions, the blocking status bit for that direction is set and sent to the controller via the bus. Similarly, when blocking occurs in at least one direction (any direction) of the multiple input directions, the blocking status bit for that direction is cleared and set, and also sent to the controller via the bus.

[0081] The embodiments of this application can determine the direct physical bus of the routing node corresponding to the blocking information, and transmit the blocking information of each routing node to the central controller through the direct physical bus of the routing node corresponding to each blocking information. This maximizes the shortening of the transmission path of the blocking information from the routing node to the central controller, minimizes the transmission time of the blocking information, and improves the efficiency of blocking information transmission.

[0082] Optionally, in one embodiment of this application, sending the blocking information to the central controller based on the direct physical bus includes: detecting the level information of the routing node corresponding to the blocking information; detecting the validity of the routing node corresponding to the blocking information based on the level information; and sending the blocking information to the central controller via the direct physical bus based on the validity detection result of the routing node corresponding to the blocking information.

[0083] In some embodiments, multiple routing nodes may be connected on a single physical bus (some of the routing nodes among all the routing nodes connected to all physical buses in a multi-channel distributed bus). When multiple routing nodes coexist on a single physical bus, it is very likely that multiple routing nodes will need to transmit information through the same physical bus at the same time.

[0084] In situations where multiple routing nodes need to transmit information simultaneously through the same physical bus, in order to ensure the orderly transmission of information while multiple routing nodes are transmitting information through the same physical bus, embodiments of this application can detect the level information of the routing node corresponding to the blocking information and determine the validity of the routing node based on the level information of the routing node corresponding to each blocking information.

[0085] In this context, detecting the validity of the routing node corresponding to the blocking information can be understood as checking whether the routing node corresponding to the blocking information is valid at the current moment. The validity detection result of the routing node is whether the routing node is valid or invalid. Based on the validity detection result, it can be determined whether the routing node can send the blocking information of the routing node to the central controller through the direct physical bus of the routing node at the current moment.

[0086] Specifically, in this embodiment, when the level information of the routing node corresponding to the blocking information is low, it can be determined that the validity detection result of the routing node at the current moment is that the routing node is valid; when the level information of the routing node corresponding to the blocking information is high, it can be determined that the validity detection result of the routing node at the current moment is that the routing node is invalid.

[0087] This application embodiment can detect the validity of routing nodes through level information, filter invalid or erroneous blocking information while maintaining the orderliness of information transmission from multiple routing nodes, ensuring that the information transmitted to the central controller is true and reliable, and then efficiently transmitted via the physical bus, allowing the central controller to grasp the accurate network congestion status in a timely manner, providing precise basis for global routing optimization, and effectively reducing cascading congestion.

[0088] Optionally, in one embodiment of this application, based on the validity detection result of the routing node corresponding to the blocking information, the blocking information is sent to the central controller via the direct physical bus, including: if the detection result indicates that the routing node corresponding to the blocking information is valid, the blocking information of the valid routing node is sent to the central controller via the direct physical bus.

[0089] Based on the descriptions of other embodiments, it is understood that this application can send the blocking information to the centralized controller through the directly connected physical bus of the routing node corresponding to the blocking information, based on the validity detection result of the routing node corresponding to the blocking information.

[0090] In some embodiments, if the validity detection result of the routing node corresponding to the blocking information is that the routing node corresponding to the blocking information is valid, this application can directly send the blocking information of the valid routing node from the corresponding routing node to the central controller through the direct physical bus of the routing node corresponding to the blocking information.

[0091] For example, in this embodiment of the application, the forwarding and queue management module in the communication node (routing node) can be responsible for forwarding the service queue and monitoring the queue blocking status, and when the status changes, it will pass the information to the blocking information processing module in the communication node (routing node) to send it to the physical bus, such as... Figure 9 As shown,Figure 9 This is a schematic diagram of the working architecture of the forwarding and queue management module according to one embodiment of this application.

[0092] The congestion information processing module in the communication node (routing node) is responsible for sending data to the physical bus and listening to data on the physical bus; it is also responsible for bus arbitration during transmission. Bus arbitration during transmission involves detecting the voltage level of the routing node corresponding to the congestion information. If the voltage level of the routing node corresponding to the congestion information is low, the routing node is considered valid. As a valid routing node, the congestion information of the valid routing node can be sent to the central controller at the current moment through the direct physical bus of the routing node corresponding to the congestion information.

[0093] This application embodiment can identify the valid routing node at the current moment based on whether the routing node corresponding to the blocking information is at a low level, avoiding interference from invalid blocking information. In conjunction with the direct physical bus and bus arbitration mechanism, it can enable the valid blocking information to be transmitted to the centralized controller quickly and orderly, thereby efficiently optimizing global routing to reduce congestion.

[0094] Optionally, in one embodiment of this application, based on the validity detection result of the routing node corresponding to the blocking information, the blocking information is sent to the central controller via a direct physical bus, including: if the detection result is that the routing node corresponding to the blocking information is invalid, adding the blocking information of the invalid node to the sequence to be sent, and after sending the blocking information of the valid routing node to the central controller, detecting the validity of the routing nodes in the sequence to be sent, so that if at least one routing node in the sequence to be sent is valid, the blocking information of at least one routing node is sent to the central controller via the direct physical bus.

[0095] In other embodiments, when multiple routing nodes need to transmit information simultaneously through the same physical bus, if a routing node corresponding to a blocking message is determined to be valid at the current moment, then at the current moment there will be other routing nodes determined to be invalid (invalid nodes), that is, there are routing nodes with a high level signal at the current moment.

[0096] If the validity detection result of the routing node corresponding to the blocking information is that the routing node corresponding to the blocking information is invalid (the level information is high level), the embodiment of this application can first add the invalid node and its blocking information to be sent to the sending sequence to ensure that all routing nodes with information to be sent are not missed.

[0097] Then, after sending the blocking information of the valid node (the routing node with a low level) to the central controller through the direct physical bus of the valid node, the embodiments of this application can continue to detect the validity of the routing nodes (invalid nodes) in the sequence to be sent. Thus, when at least one routing node in the sequence to be sent is detected to be valid (i.e., the level information of at least one invalid node in the sequence to be sent is low), the blocking information of at least one routing node in the sequence to be sent is sent to the central controller through the direct physical bus of the at least one routing node (which is the same physical bus as the direct physical bus of the initial valid node, since both are connected to the same physical bus) based on the direct physical bus.

[0098] If multiple routing nodes corresponding to blocking information are detected as valid nodes (the routing nodes corresponding to multiple blocking information are at a low level) at the initial stage, or if multiple routing nodes corresponding to blocking information are valid nodes (the routing nodes corresponding to multiple blocking information are at a low level) in the sequence to be sent, the sending order can be set by those skilled in the art according to the actual situation, that is, certain rules can be set to determine the order in which the routing nodes are sent, such as prioritizing time, sending the first one to arrive, etc. The embodiments of this application are only illustrative examples and do not impose specific limitations.

[0099] In summary, this application embodiment can determine the validity detection result of a routing node based on whether the routing node corresponding to the blocking information is at a low or high level. A low level indicates that the routing node is valid at the current moment, while a high level indicates that the routing node is invalid at the current moment. If the validity detection result of the routing node is valid, the routing node can transmit information through the directly connected physical bus corresponding to the routing node corresponding to the blocking information at the current moment; if the routing node is invalid, the routing node cannot transmit information through the directly connected physical bus corresponding to the routing node corresponding to the blocking information at the current moment and needs to exit first and then send again later.

[0100] Figure 10 This is a schematic diagram of bus arbitration according to one embodiment of this application. Figure 10 As shown, because node 2 is low at bit 7 (7th bit), arbitration node 2 is valid and can continue to send. Node 1 temporarily exits and joins the waiting sequence, waiting to be detected later before sending.

[0101] The embodiments of this application enable currently valid routing nodes connected to the same physical bus to prioritize the transmission of blocking information, ensuring timely delivery of critical information, and adding currently invalid routing nodes and information to the pending sequence before detection and transmission. This ensures that no node information is missed, fully utilizes bus resources, and improves the efficiency and integrity of information transmission.

[0102] Optionally, in one embodiment of this application, before sending the blocking information to the physical bus, the method further includes: verifying the blocking information based on the check code of the central controller; if the blocking information verification is successful, parsing the blocking information to obtain a first parsing result of the blocking information, so as to send the blocking information to the physical bus according to the first parsing result.

[0103] Those skilled in the art will understand that during transmission, congestion information may be erroneous due to noise, interference, etc. For example, if congestion in direction A is transmitted as congestion in direction B, and the central controller directly forwards the congestion information, subsequent processing will be based on the erroneous information. This may cause data packets to flood into already congested nodes or detour to unnecessary paths, triggering global cascading congestion and severely dragging down NoC performance.

[0104] Meanwhile, the physical bus connecting the routing nodes and the central controller also suffers from problems such as signal attenuation and electromagnetic interference. Especially when multiple nodes share the bus, signal collisions or noise may cause bit information to flip (e.g., 0 becomes 1). If it is used directly without verification, erroneous information will be treated as valid information, creating a chain reaction where one mistake leads to another.

[0105] Based on this, in some embodiments, before the blocking information is sent to the physical bus in the multi-channel distributed bus by the centralized controller, the centralized controller can first verify the blocking information by checking the check code (redundant data appended to the blocking information (such as CRC code (Cyclic redundancy check, used to detect whether the information transmission is wrong)) to verify the integrity of the blocking information and ensure that the received blocking information is correct.

[0106] If the blocking information verification is successful, the central controller then parses the blocking information to obtain the first parsing result (the parsing result of the blocking information) and forwards it to the physical bus related to the blocking information through the bus. This avoids the NoC's routing decision logic being damaged due to transmission errors, and ensures the accuracy of network scheduling from the source.

[0107] This application embodiment can verify the blocking information with a checksum before the centralized controller transmits the blocking information, which can filter out invalid data with transmission errors and ensure that the information parsed by the centralized controller is accurate and reliable; thereby ensuring that the physical bus transmission is scheduled based on correct information, avoiding routing chaos caused by incorrect blocking information, and improving the communication stability and efficiency of the on-chip network.

[0108] Optionally, in one embodiment of this application, sending the blocking information to the physical bus includes: identifying the routing node and blocking direction corresponding to the blocking information; and sending the blocking information to the physical bus based on the routing node and blocking direction corresponding to the blocking information.

[0109] As one possible implementation, embodiments of this application can identify the routing node and blocking direction corresponding to the blocking information based on the blocking information, and then send the blocking information to the physical bus related to the blocking information based on the routing node and blocking direction corresponding to the blocking information.

[0110] Figure 11 This is a schematic diagram of a controller according to one embodiment of this application. Figure 11 As shown, the functions of the centralized controller in this embodiment include, but are not limited to, a node testing module, which is used to implement the process of collecting multiple routing nodes of the on-chip network to construct the topology between multiple routing nodes and corresponding channels, and initializing the correspondence between multiple routing nodes and channels of the on-chip network according to the topology, that is, issuing test commands to each node to detect blocking information; and a protocol parsing module, which is used to parse the status information in the protocol, that is, the blocking status information (direction and blocking status) in the blocking information.

[0111] The select forwarding channel module is used to identify the routing node and blocking direction corresponding to the blocking information, so as to send the blocking information to the physical bus associated with the blocking information.

[0112] Specifically, a multi-channel distributed bus has multiple physical buses distributed in parallel along the x-direction. Each physical bus is located in a different position within the multi-channel distributed bus, and the blocking direction of at least one routing node directly connected to each physical bus may also be different. Therefore, the different blocking directions contained in the blocking information of each routing node may affect the channel (directly connected physical bus) where each routing node is located, as well as different channels outside the channel that correspond to the blocking direction (different physical buses in the multi-channel distributed bus that correspond to the blocking direction other than the directly connected physical bus). That is, the blocking information will affect the physical buses in the multi-channel distributed bus that the blocking direction of each routing node points to. The channels that this blocking information can affect are the physical buses related to the blocking information.

[0113] Therefore, the embodiments of this application can enable the centralized controller to only forward the blocking information to the physical bus related to the blocking information. The physical bus forwarded to can be only a part of the multi-channel distributed bus, thereby reducing the communication burden and useless information transmission of the centralized controller, and thus realizing refined active uploading and targeted broadcasting of information, reducing the propagation of redundant and invalid information.

[0114] Optionally, in one embodiment of this application, sending the blocking information to the physical bus based on the routing node and blocking direction corresponding to the blocking information includes: when the blocking direction is different from the target routing direction or the opposite direction of the target routing direction, obtaining the physical bus related to the blocking direction in the multi-channel distributed bus based on the channel and blocking direction of the routing node corresponding to the blocking information, so as to send the blocking information to the physical bus; when the blocking direction is the same as the target routing direction or the opposite direction of the target routing direction, propagating the blocking information through the direct physical bus of multiple routing nodes.

[0115] In actual execution, since each routing node has four input directions, Link N and Link S both belong to the y direction, and Link E and Link W both belong to the x direction, when the routing node and the blocking direction corresponding to the blocking information are sent to the physical bus related to the blocking information through the centralized controller, this application can be divided into the following two cases, but not limited to:

[0116] Firstly, when the blocking direction is different from the target routing direction or the opposite direction of the target routing direction of the multi-channel distributed bus, that is, when the blocking direction belongs to the y direction such as Link N and Link S, the embodiments of this application can obtain the physical bus related to the blocking direction in the multi-channel distributed bus based on the channel and blocking direction of the routing node corresponding to the blocking information, so as to send the blocking information to these physical buses.

[0117] Figure 12 This is a schematic diagram of a forwarding channel according to an embodiment of this application. Figure 12 As shown, taking s27 as an example, the Link N direction is in a blocked state. According to the xy routing, only channels ch4~ch7 (physical bus) may use this information. That is, the blocked Link N direction of node s27 only affects channels ch4~ch7. Therefore, the central controller only needs to forward the blocking information to these channels.

[0118] When the blocking direction is the same as or opposite to the target routing direction, i.e., when the blocking direction belongs to the x-direction such as Link E and Link W, the physical bus that can be affected is the physical bus directly connected to the routing node corresponding to the blocking information of that blocking direction. Nodes on this physical bus can directly receive this information through the physical bus. Therefore, the central controller does not need to forward the blocking information. "Passing the blocking information to the physical bus" can be understood as the central controller controlling the directly connected physical bus to directly propagate the blocking information.

[0119] Figure 13This is a flowchart illustrating the controller processing of one embodiment of this application. Figure 13 As shown, in this embodiment of the application, a centralized controller can be used to initialize multiple routing nodes and their channels, then parse the blocking information sent by the multiple routing nodes to extract the blocking information of each routing node, and then forward the blocking information to a specific channel according to the channel (physical bus) where the routing node is located and the blocking direction.

[0120] Additionally, bus arbitration is involved in the process of the centralized controller sending information to the physical bus. The arbitration process can, but is not limited to, using conventional bus arbitration strategies. The embodiments in this application are merely illustrative and do not impose specific limitations. For example, a centralized arbitration mechanism can be used to select one of multiple requesting channels to grant bus access rights through fixed priority, round-robin priority, or dynamic priority algorithms: If fixed priority arbitration is used, the controller will preset a priority for each channel (such as critical link priority) and always respond to the requesting channel with the highest priority; if round-robin priority arbitration is used, all channels will take turns obtaining bus access rights to ensure fairness; if dynamic priority arbitration is used, the priority will be adjusted according to the channel's usage history (such as automatically increasing the priority of channels that have not been used for a long time).

[0121] This application embodiment can forward blocking information to a specific channel according to the channel where the routing node is located and the direction of the blockage, thereby realizing refined proactive uploading and targeted broadcasting of information, reducing the propagation of redundant and invalid information; and the centralized controller only needs to perform simple judgment and forwarding, without having to undertake the task of global communication routing planning (the communication routing planning problem is solved by the nodes in a distributed manner based on the status information), which can effectively improve the overall operating efficiency of the system.

[0122] Step S102: Update the global information status table according to the blocking information transmitted through the physical bus, so as to query the blocking information of the task routing nodes related to the communication tasks corresponding to multiple routing nodes based on the updated global information status table. The global information status table is updated by the blocking information of multiple input directions of multiple routing nodes in the on-chip network sent by the physical bus in the last time.

[0123] In some embodiments, after the central controller forwards the blocking information of different routing nodes to a certain physical bus, each routing node on the physical bus will synchronously receive this blocking information.

[0124] At this point, the routing node that receives the blocking information transmitted through the physical bus can update the global state information table based on this blocking information, so as to query the blocking information of the task routing nodes related to the communication tasks of multiple routing nodes based on the updated global state information table.

[0125] It should be noted that the "blocking information transmitted via the physical bus" here is essentially still blocking information for multiple input directions corresponding to multiple routing nodes. It is only used to describe the process by which the blocking information is sent from multiple routing nodes to the central controller (each routing node sends its own blocking information for multiple directions to the central controller), then sent by the central controller to the physical bus related to the blocking information (the central controller determines which physical bus the blocking information for multiple directions sent by each routing node may affect and sends it to that physical bus), and then propagated to each routing node through these physical buses (the routing node receives the blocking information for multiple directions from all routing nodes that may affect its own communication). The content of the information does not change.

[0126] In this context, a communication task can be understood as each routing node needing to transmit information (non-blocking information) to a specific chip component. A task routing node can be understood as the routing node for the chip component corresponding to each communication task. The blocking status of these task routing nodes can be queried through a global information status table.

[0127] The global status table is updated by the blocking information of multiple routing nodes in the on-chip network in multiple input directions, which was previously received from the physical bus. That is, each routing node in this embodiment has a global status table, and each routing node can update its global status table based on the latest blocking information of multiple routing nodes forwarded in real time by the central controller.

[0128] In this embodiment, the global status information table can be updated based on the latest blocking information of multiple routing nodes forwarded in real time by the central controller. Thus, the current blocking status of multiple routing nodes in the on-chip network can be obtained by querying the global status information table, which facilitates finding a non-blocking communication path for the communication task corresponding to its own node.

[0129] Optionally, in one embodiment of this application, updating the global information state table based on the blocking information transmitted via the physical bus includes: verifying the blocking information transmitted via the physical bus based on the corresponding check codes of multiple routing nodes; if the blocking information transmitted via the physical bus is successfully verified, parsing the blocking information transmitted via the physical bus to obtain a second parsing result of the blocking information transmitted via the physical bus, and updating the global information state table based on the second parsing result.

[0130] In some embodiments, when updating the global state information table based on the blocking information transmitted by the central controller through the physical bus, it is considered that the blocking information has undergone another forwarding. During the transmission process, it may also be subject to errors due to noise, interference, etc., just like the process of sending from the routing node to the central controller through the physical bus. In addition, the physical bus also has problems such as signal attenuation and electromagnetic interference.

[0131] Therefore, in this embodiment of the application, after the routing node receives the blocking information transmitted by the central controller through the physical bus, the routing node can also detect whether there is an error in the blocking information during the process of the central controller transmitting the blocking information to itself through the physical bus according to the check code. By checking the blocking information, the integrity of the blocking information is verified, and the received blocking information is ensured to be correct.

[0132] Similarly, if the blocking information verification is successful, the routing node will parse the blocking information to obtain a second parsing result (the parsing result of the blocking information) and update the global state information table according to the parsing result. This avoids the NoC's routing decision logic being disrupted due to transmission errors and prepares data for the accuracy of subsequent path planning.

[0133] It should be noted that both the first and second parsing results are essentially parsing results of the routing node's congestion information. The names "first parsing result" and "second parsing result" are merely used to distinguish between the central controller's parsing and the routing node's parsing. If no errors occur during the transmission process from the routing node to the central controller and from the central controller to the routing node, then the first and second parsing results should be the same, meaning they are essentially parsing results of the routing node collecting congestion information from multiple directions.

[0134] The embodiments of this application can ensure the integrity and correctness of the transmitted blocking information from beginning to end through secondary verification by the centralized controller and routing nodes, thereby avoiding subsequent communication failures or node congestion caused by errors in information acquisition.

[0135] Optionally, in one embodiment of this application, updating the global information status table based on the blocking information transmitted via the physical bus includes: obtaining the node identifier of the routing node corresponding to the blocking information transmitted via the physical bus; and updating the blocking status flag bit of the corresponding routing node and its input direction in the global information status table based on the node identifier.

[0136] In actual implementation, corresponding to the detection of blocking information in multiple input directions of multiple routing nodes, the global information state table in this application also includes node identifiers of multiple routing nodes and blocking status flags for each input direction. When updating the global information state table based on the blocking information transmitted via the physical bus, the blocking information of which routing node should be updated can be determined by obtaining the node identifier of the routing node corresponding to the blocking information transmitted via the physical bus, and then the corresponding routing node and the blocking status flags for the input direction in the global state information table can be updated.

[0137] The node identifier can be understood as an identifier used to distinguish each routing node, such as s1, s2, s3, etc.

[0138] Table 2 is a global state information table of one embodiment of this application. A bit represents a binary digit, and 1 bit represents 1 binary digit, which is the smallest unit of information storage in a computer. It can represent two states: "0" or "1". Table 2 can be represented as follows:

[0139] Table 2

[0140]

[0141] like Figure 2 As shown, the blocking status flag can be understood here as a flag in the global information status table used to indicate whether the blocking status of each routing node in each input direction is blocked, i.e., N, E, W, and S in Table 2. For example, setting it to 1 means that the input direction is blocked, and setting it to 0 means that the input direction is not blocked, etc.

[0142] The specific node identifiers and blocking status flags can be set by those skilled in the art according to the actual situation. The embodiments in this application are only illustrative and do not impose any specific limitations.

[0143] Figure 14 This is a flowchart illustrating the node processing of one embodiment of this application. Figure 14 As shown, the information management module in each routing node can collect the blocking information of its own node and send the status change information to the controller when the blocking status of its own node changes; it can also record the blocking information of other nodes, that is, when it receives the blocking information of other nodes, it updates the global status information table. In this way, it can be ensured that the blocking information in the global status table is up-to-date and valid, which is convenient for querying when the node needs to forward data packets.

[0144] It is important to note that, in order to maintain the real-time nature of the data without consuming excessive memory, each routing node needs to initialize its own blocking state and the stored global information state table before sending the blocking information from multiple input directions to the central controller.

[0145] The embodiments of this application can update the blocking status of each input direction of each routing node by using node identifier and blocking status flag bit to correspond one-to-one. This makes it easy to update the blocking status according to the node identifier and input direction of each routing node, and also makes it easy to query the blocking status of each input direction of the related task routing node.

[0146] Step S103: Based on the blocking information of the task routing node, plan the communication link of the communication task so as to execute the communication task according to the communication link.

[0147] Those skilled in the art will understand that traditional dynamic avoidance algorithms only change routes after a data packet arrives in the congestion neighborhood (within ≥3 hops), lacking prediction of global traffic. When hotspots form, avoidance operations often lag behind the congestion spread speed, and may even trigger cascading congestion, leading to a decline in NOC network communication performance.

[0148] As one possible implementation, this application can, after each routing node obtains the blocking information of the task routing node corresponding to its own communication task by querying its own global information status table, plan the communication link of each routing node's communication task based on the blocking information of the task routing node (including the blocking status of each input direction of the task routing node) in order to execute the communication task of each routing node.

[0149] Specifically, after querying the blocking information of the routing nodes involved in the communication task corresponding to each routing node, for example, if the communication task is to send to the CPU and the routing nodes of the CPU are s1, s2...s8, after querying the blocking information of each input direction of each routing node s1, s2...s8, if these routing nodes (and their corresponding multiple input directions) are not blocked, the communication task can be carried out directly. If these routing nodes (and their corresponding multiple input directions) are blocked, each routing node needs to avoid obstacles in advance according to its own routing avoidance algorithm. Under the condition of advance avoidance, a communication link that can successfully complete the communication task is planned so that the communication task can be completed according to the communication link.

[0150] In this embodiment, after each routing node queries the blocking information of the task routing node corresponding to its own communication task, in the event of blocking, each routing node can autonomously plan the communication link of the communication task in advance, allowing the central controller to perform simple judgment and forwarding without having to undertake the task of global communication route planning. This effectively improves the overall operating efficiency of the system. At the same time, the global status information table can predict global traffic, enabling avoidance operations to be performed before the speed of blocking spread, thus avoiding cascading congestion and degrading NOC network communication performance.

[0151] Optionally, in one embodiment of this application, planning the communication link for a communication task includes: detecting routing fault avoidance strategies corresponding to multiple routing nodes; and planning the communication link for the communication task based on the routing fault avoidance strategies corresponding to the multiple routing nodes.

[0152] Based on the descriptions of other embodiments, it is understood that when a task routing node is found to be congested, the embodiments of this application can enable each routing node to avoid obstacles in advance according to its own routing avoidance algorithm.

[0153] Based on this, the embodiments of this application can enable each routing node to set different routing avoidance algorithms, giving each routing node maximum space for setting avoidance algorithms. In practical applications, each routing node only needs to detect its own corresponding routing fault avoidance strategy and then implement the communication link that plans its own communication task.

[0154] For example, when data packets are forwarded between nodes, there are 8 normal routing options: E→N, E→W, E→S, N→E, N→W, N→S, W→E, W→S, S→E, S→N, and S→W. Typical dynamic avoidance algorithms include the XY routing algorithm and the adaptive routing algorithm.

[0155] The basic logic of the XY routing algorithm is to force data packets to be transmitted according to a preset dimensional priority (such as X before Y). It generally only allows four types of routing: E→E, E→N, W→W, and W→S. The path is single but there is no deadlock.

[0156] Adaptive routing, building upon XY routing, relaxes some turning restrictions (while still retaining deadlock avoidance rules), allowing six turning combinations, thereby increasing path diversity and providing more alternative paths when encountering congestion.

[0157] (1) W priority: A message must be transmitted in the W direction first before it can be transmitted in other directions. The six allowed directions are: East → North, East → South, East → East, West → North, West → South, North → South. This algorithm forces data packets to be transmitted in the west (negative direction) first, and then turn to other directions after completing the westward path. By prohibiting the westward-related reverse turns, the deadlock loop is cut off, while maintaining sufficient path diversity to avoid blocking.

[0158] (2) N low priority. Once the information is turned to N, it is not allowed to turn to other directions. The six directions allowed are: East → North, East → South, West → North, West → South, South → East, and South → West. The core logic is that "turning to the north is the last step". Once the data packet turns to the north, it must be transmitted directly to the target and no further turning is allowed. This avoids the formation of a deadlock loop in the north area and retains the flexibility of turning in other directions.

[0159] (3) Negative direction priority: information is first propagated in the negative direction (W / S) before it can be propagated in the positive direction (E / N). The six allowed directions are: East → North, West → North, West → South, South → East, South → North, East → East. This algorithm requires data packets to propagate in the negative direction (West, South) first, and then turn to the positive direction (East, North). Deadlock is avoided by restricting the order of "negative first, positive later". The six allowed directions can be flexibly switched to the positive direction based on the negative direction path to adapt to different blocking scenarios.

[0160] This application embodiment allows each routing node to independently set different adaptive routing algorithms such as W priority and N low priority. It can not only break deadlock loops through rules such as "transmit westward first", "turn north last", and "negative direction first and positive direction later", but also increase path diversity by adding turning combinations (from 4 to 6) on the basis of XY routing, allowing nodes to avoid congestion in advance. Each node only needs to plan the link according to its own algorithm, flexibly adapting to different congestion scenarios, and improving the overall congestion avoidance efficiency and communication reliability of the on-chip network.

[0161] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0162] Embodiments of this application also provide a communication device for on-chip network congestion, wherein the chip on which the on-chip network is located is provided with a multi-channel distributed bus with the same target routing direction as the on-chip network. The multi-channel distributed bus is used to connect the centralized controller on the chip and multiple routing nodes. Figure 15 This is a schematic diagram of the structure of an on-chip network blocking communication device provided according to an embodiment of this application. Figure 15 As shown, the on-chip network blocking communication device includes: a first transmitting module 100, a query module 200, and a communication module 300.

[0163] The first sending module 100 is used to detect the blocking information of multiple input directions corresponding to multiple routing nodes, determine the physical bus in the multi-channel distributed bus related to the blocking information, and send the blocking information from multiple routing nodes to the central controller so as to send the blocking information to the physical bus.

[0164] The query module 200 is used to update the global information status table based on the blocking information transmitted through the physical bus, so as to query the blocking information of the task routing nodes related to the communication tasks corresponding to multiple routing nodes based on the updated global information status table. The global information status table is updated by the blocking information of multiple routing nodes in multiple input directions in the on-chip network sent by the physical bus in the last time.

[0165] The communication module 300 is used to plan the communication link of the communication task based on the blocking information of the task routing node, so as to execute the communication task according to the communication link.

[0166] Optionally, in one embodiment of this application, it further includes an identification module and a definition module.

[0167] The identification module is used to identify at least some bytes of the start bit, node code, blocking state, state mask, test bit, check code, and end bit during the on-chip network communication process before detecting blocking information in multiple input directions of multiple routing nodes in the on-chip network and sending the blocking information to the central controller.

[0168] The determination module is used to determine the communication protocol of the on-chip network based on at least some bytes of the start bit, node code, blocking state, state mask, test bit, checksum, and end bit, so as to transmit blocking information using the communication protocol.

[0169] Optionally, in one embodiment of this application, the first sending module 100 includes: a determining unit, a first sending unit, and a second sending unit.

[0170] The determining unit is used to determine the direct physical bus of the routing node corresponding to the blocking information based on the blocking information.

[0171] The first sending unit is used to send the blocking information to the direct physical bus of the routing node corresponding to the blocking information.

[0172] The second transmitting unit is used to send blocking information to the central controller based on the direct-connect physical bus.

[0173] Optionally, in one embodiment of this application, the second transmitting unit includes: a first detection subunit, a second detection subunit, and a transmitting subunit.

[0174] The first detection subunit is used to detect the level information of the routing node corresponding to the blocking information.

[0175] The second detection subunit is used to detect the validity of the routing node corresponding to the blocking information based on the level information.

[0176] The transmitting subunit is used to send the blocking information to the central controller via a direct physical bus based on the validity detection result of the routing node corresponding to the blocking information.

[0177] Optionally, in one embodiment of this application, the sending subunit includes: a first sending subunit, configured to send the blocking information of the valid routing node to the central controller based on the direct-connect physical bus when the detection result indicates that the routing node corresponding to the blocking information is valid.

[0178] Optionally, in one embodiment of this application, the sending subunit includes: a second sending subunit, configured to add the blocking information of the invalid node to the sequence to be sent when the detection result is that the routing node corresponding to the blocking information is invalid, and after sending the blocking information of the valid routing node to the central controller, detect the validity of the routing nodes in the sequence to be sent, so that if at least one routing node in the sequence to be sent is valid, the blocking information of at least one routing node is sent to the central controller based on the direct physical bus.

[0179] Optionally, in one embodiment of this application, it further includes a construction module and a detection module.

[0180] The construction module is used to collect data on multiple routing nodes of the on-chip network before detecting blocking information in multiple input directions corresponding to multiple routing nodes, so as to construct the topology between multiple routing nodes and channels.

[0181] The detection module is used to initialize the correspondence between multiple routing nodes and channels of the on-chip network according to the topology in order to detect congestion information.

[0182] Optionally, in one embodiment of this application, it further includes: a verification module and a second sending module.

[0183] The verification module is used to verify the blocking information based on the checksum of the central controller before sending the blocking information to the physical bus.

[0184] The second sending module is used to parse the blocking information if the blocking information verification is successful, obtain the first parsing result of the blocking information, and send the blocking information to the physical bus according to the first parsing result.

[0185] Optionally, in one embodiment of this application, the first transmitting module 100 includes: a first detection unit and a third transmitting unit.

[0186] The identification unit is used to identify the routing node and the direction of the blockage corresponding to the blockage information.

[0187] The third sending unit is used to send the blocking information to the physical bus based on the routing node and blocking direction corresponding to the blocking information.

[0188] Optionally, in one embodiment of this application, the third sending unit includes: an acquisition subunit and a propagation subunit.

[0189] The acquisition subunit is used to acquire the channel bus related to the blocking direction in the multi-channel distributed bus based on the channel and blocking direction of the routing node corresponding to the blocking information when the blocking direction is different from the target routing direction or the opposite direction of the target routing direction, so as to send the blocking information to the physical bus.

[0190] The propagation subunit is used to propagate blocking information through the direct physical bus of multiple routing nodes when the blocking direction is the same as or opposite to the target routing direction.

[0191] Optionally, in one embodiment of this application, the query module 200 includes: a verification unit and a parsing unit.

[0192] The verification unit is used to verify the blocking information transmitted through the physical bus based on the corresponding check codes of multiple routing nodes.

[0193] The parsing unit is used to parse the blocking information transmitted through the physical bus if the blocking information is successfully verified, and obtain a second parsing result of the blocking information transmitted through the physical bus, so as to update the global information status table according to the second parsing result.

[0194] Optionally, in one embodiment of this application, the query module 200 includes: an acquisition unit and an update unit.

[0195] The acquisition unit is used to acquire the node identifier of the routing node corresponding to the blocking information transmitted through the physical bus.

[0196] The update unit is used to update the blocking status flag of the corresponding routing node and its input direction in the global information status table according to the node identifier.

[0197] Optionally, in one embodiment of this application, the communication module 300 includes: a second detection unit and a planning unit.

[0198] The detection unit is used to detect routing fault avoidance strategies corresponding to multiple routing nodes.

[0199] The planning unit is used to plan the communication links for communication tasks based on the routing failure avoidance strategies corresponding to multiple routing nodes.

[0200] For a description of the features in the embodiment of the on-chip network blocking communication device, please refer to the relevant description of the embodiment of the on-chip network blocking communication method, which will not be repeated here.

[0201] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above embodiments of the on-chip network blocking communication method.

[0202] Embodiments of this application also provide a non-volatile computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above embodiments of the on-chip network blocking communication method.

[0203] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0204] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above embodiments of the on-chip network blocking communication method.

[0205] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above embodiments of the on-chip network blocking communication method.

[0206] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0207] The foregoing has provided a detailed description of an on-chip network blocking communication method and apparatus. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A method of communicating network-on-chip congestion, comprising: The chip where the network on chip is located is provided with a multi-channel distributed bus in the same target routing direction as the network on chip, which is used to connect a centralized controller and a plurality of routing nodes on the chip, wherein the method comprises the following steps: detecting blocking information of a plurality of input directions corresponding to the plurality of routing nodes, determining a physical bus in the multi-channel distributed bus related to the blocking information, and sending the blocking information from the plurality of routing nodes to the centralized controller to send the blocking information to the physical bus; updating a global information state table according to the blocking information transmitted through the physical bus, and querying blocking information of a task routing node related to a communication task corresponding to the plurality of routing nodes based on the updated global information state table, wherein the global information state table is updated by the blocking information of a plurality of input directions of a plurality of routing nodes in the network on chip sent by the physical bus last time received; planning a communication link of the communication task based on the blocking information of the task routing node, and executing the communication task according to the communication link; wherein, before detecting the blocking information of a plurality of input directions corresponding to the plurality of routing nodes, determining the physical bus in the multi-channel distributed bus related to the blocking information, and sending the blocking information from the plurality of routing nodes to the centralized controller, it further comprises: identifying at least part of bytes of start bit, node code, blocking state, state mask, test bit, check code, end bit in the network on chip communication process; determining the communication protocol of the network on chip according to at least part of bytes of the start bit, the node code, the blocking state, the state mask, the test bit, the check code and the end bit, and transmitting the blocking information by using the communication protocol.

2. The method of claim 1, wherein, The sending of the blocking information from the plurality of routing nodes to the centralized controller comprises: determining a direct physical bus of a routing node corresponding to the blocking information according to the blocking information; sending the blocking information to the direct physical bus of the routing node corresponding to the blocking information; sending the blocking information to the centralized controller based on the direct physical bus.

3. The method of claim 2, wherein, The sending of the blocking information to the centralized controller based on the direct physical bus comprises: detecting level information of a routing node corresponding to the blocking information; detecting the validity of the routing node corresponding to the blocking information according to the level information; sending the blocking information to the centralized controller through the direct physical bus based on the validity detection result of the routing node corresponding to the blocking information.

4. The method of claim 3, wherein, The sending of the blocking information to the centralized controller through the direct physical bus based on the validity detection result of the routing node corresponding to the blocking information comprises: in the case that the detection result is that the routing node corresponding to the blocking information is valid, sending the blocking information of the valid routing node to the centralized controller based on the direct physical bus.

5. The method of claim 3, wherein, The validity detection result of the routing node corresponding to the blocking information is sent to the centralized controller through the direct-connection physical bus, and the method comprises the following steps: In the case that the detection result is that the routing node corresponding to the blocking information is invalid, the blocking information of the invalid node is added to a sending sequence, and after the blocking information of the valid routing node is sent to the centralized controller, the validity of the routing node in the sending sequence is detected, so that in the case that at least one routing node in the sending sequence is valid, the blocking information of the at least one routing node is sent to the centralized controller based on the direct-connection physical bus.

6. The method of claim 1, wherein, Before detecting the blocking information of the plurality of input directions corresponding to the plurality of routing nodes, the method further comprises the following steps: Collecting a plurality of routing nodes of the network-on-chip to construct a topology structure between the plurality of routing nodes and channels; Initializing the correspondence between the plurality of routing nodes and channels of the network-on-chip according to the topology structure to detect the blocking information.

7. The method of claim 1, wherein, Before sending the blocking information to the physical bus, the method further comprises the following steps: Verifying the blocking information based on the check code of the centralized controller; In the case that the blocking information is verified successfully, the blocking information is parsed to obtain a first parsing result of the blocking information, so that the blocking information is sent to the physical bus according to the first parsing result.

8. The method of claim 1, wherein, The sending of the blocking information to the physical bus comprises the following steps: Identifying the routing node and the blocking direction corresponding to the blocking information; Based on the routing node and the blocking direction corresponding to the blocking information, the blocking information is sent to the physical bus.

9. The method of claim 1, wherein, The updating of the global information state table according to the blocking information transmitted through the physical bus comprises the following steps: Verifying the blocking information transmitted through the physical bus according to the corresponding check code of the plurality of routing nodes; In the case that the blocking information transmitted through the physical bus is verified successfully, the blocking information transmitted through the physical bus is parsed to obtain a second parsing result of the blocking information transmitted through the physical bus, so that the global information state table is updated according to the second parsing result.

10. The method of claim 1, wherein, The updating of the global information state table according to the blocking information transmitted through the physical bus comprises the following steps: Obtaining the node identifier of the routing node corresponding to the blocking information transmitted through the physical bus; Updating the blocking state flag bit of the corresponding routing node and input direction in the global information state table according to the node identifier.

11. The method of claim 1, wherein, The planning of the communication link of the communication task comprises the following steps: Detecting the routing fault avoidance strategy corresponding to the plurality of routing nodes; Planning the communication link of the communication task according to the routing fault avoidance strategy corresponding to the plurality of routing nodes.

12. An electronic device, comprising: The method comprises the following steps: A memory is used to store a computer program; A processor is used to execute the computer program to realize the steps of the communication method of the network-on-chip blocking according to any one of claims 1 to 11.

13. A non-transitory computer readable storage medium, comprising: The computer readable storage medium stores a computer program, and the computer program, when executed by a processor, implements the steps of the communication method for network-on-chip congestion according to any one of claims 1 to 11.

14. A computer program product comprising a computer program, characterized in that, The computer program, when executed by a processor, implements the steps of the communication method for network-on-chip congestion according to any one of claims 1 to 11.

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