Interface display method and device, equipment, medium and program product

Abstract

The invention provides an interface display method and device, equipment, a medium and a program product. The method comprises the following steps: in response to a first trigger operation on an interface display interface, displaying a layout display page corresponding to a to-be-displayed interface indicated by the first trigger operation. Wherein the interface display interface is used for displaying a time sequence interface of a target module; the to-be-displayed interface is a time sequence interface in the target module. The layout display page is used for displaying the position of a time sequence path corresponding to the to-be-displayed interface in the target module, the position of a time sequence path corresponding to the worst time sequence interface in the first reference module and path description information of the displayed time sequence path; the worst time sequence interface is a time sequence interface which is connected with the to-be-displayed interface and has the worst time sequence margin; the first reference module is a module to which the worst time sequence interface belongs. In this way, the time sequence path information between the associated modules can be visually displayed, so that research and development personnel can more reasonably judge whether the interface to be displayed needs to be adjusted or not.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to a method, apparatus, device, medium, and program product for displaying an interface. Background Technology

[0002] As digital circuits become increasingly large, a single System-on-a-Chip (SoC) chip is typically divided into multiple partitions, each implemented by different developers. Currently, static timing analysis is usually performed after the backend has optimized the chip to determine the timing paths for each module's interface.

[0003] In related technologies, timing paths are generated into timing reports and presented to R&D personnel. R&D personnel then refer to these reports to adjust interface settings and optimize the chip. However, this method does not allow R&D personnel to intuitively understand the timing path information between related modules, resulting in low efficiency in adjusting interface settings. Summary of the Invention

[0004] The purpose of this application is to provide an interface display method, apparatus, device, medium, and program product to solve the problem that in related technologies, developers cannot intuitively understand the timing path information between related modules, resulting in low efficiency for developers to adjust interface setting logic.

[0005] This application provides a method for displaying an interface, comprising: responding to a first trigger operation on an interface display interface, displaying a layout display page corresponding to the interface to be displayed indicated by the first trigger operation; wherein: the interface display interface is used to display timing interfaces of a target module; the interface to be displayed is a timing interface in the target module; the layout display page is used to display the position of the timing path corresponding to the interface to be displayed in the target module, the position of the timing path corresponding to the worst timing interface in a first reference module, and path description information of the timing path being displayed; the worst timing interface is a timing interface with the worst timing margin connected to the interface to be displayed; the first reference module is the module to which the worst timing interface belongs.

[0006] In the above implementation, considering that even if the timing path corresponding to the timing interface of the target module has timing violations, the final overall timing path may not have any timing violations if the timing paths corresponding to the timing interfaces of other modules connected to that timing interface do not have timing violations. Therefore, by displaying the position of the timing path corresponding to the interface to be displayed in the target module, the position of the timing path corresponding to the worst-case timing interface in the first reference module, and the path description information of the displayed timing path, developers can intuitively understand the timing path information of two related modules. This facilitates developers in making a more reasonable judgment on whether the interface to be displayed needs to be adjusted, improving the efficiency of developers in adjusting interface setting logic. At the same time, by displaying the position of the timing path in the target module and the position of the timing path corresponding to the worst-case timing interface in the first reference module, developers can intuitively see the placement of each path point in the timing path in the corresponding module, thereby reducing the difficulty for developers in adjusting interface setting logic.

[0007] Furthermore, the map display page includes: a first module frame, a first path point set within the first module frame, a first fixed module set within the first module frame, a first annotation, a second module frame, a second path point set within the second module frame, a second fixed module set within the second module frame, and a second annotation; Wherein: the first path point is the path point passed through in the timing path corresponding to the interface to be displayed, and each of the first path points is displayed in the first module box according to its position in the target module; the first fixed module is used to represent the module that cannot be moved within the target module, and each of the first fixed modules is displayed in the first module box according to its position in the target module; the first annotation is path description information describing the timing path corresponding to the interface to be displayed. The second path point is the path point traversed in the timing path corresponding to the worst timing interface, and each second path point is displayed in the second module box according to its position in the first reference module; the second fixed module is used to represent the module that cannot be moved within the first reference module, and each second fixed module is displayed in the second module box according to its position in the first reference module; the second annotation is the path description information describing the timing path corresponding to the worst timing interface.

[0008] In the above implementation, by simultaneously displaying the first path point and the first fixed module in the first module frame, developers can easily view the positional relationship between the first path point and the first fixed module within their respective modules. This allows developers to intuitively see which positions the interface to be displayed can be adjusted to, facilitating adjustments to the interface setting logic. Similarly, displaying the second path point and the second fixed module in the second module frame allows developers to intuitively see which positions the worst-case timing interface can be adjusted to, facilitating adjustments to the interface setting logic.

[0009] Furthermore, the map display page includes: a first subpage and a second subpage; the first subpage displays the first module frame, the first path point, the first fixed module, and the first annotation; the second subpage displays the second module frame, the second path point, the second fixed module, and the second annotation.

[0010] In the above implementation, one subpage displays the position of the timing path corresponding to the interface to be displayed in the target module, while another subpage displays the position of the timing path corresponding to the worst-case timing interface in the first reference module. Users can operate the two subpages separately, increasing the flexibility of operation and viewing.

[0011] Furthermore, the map display page includes: a fifth module box, a third module box and a fourth module box set within the fifth module box, a first path point set within the third module box, a first fixed module set within the third module box, a second path point set within the fourth module box, a second fixed module set within the fourth module box, and a third annotation; Wherein: the third module box is displayed in the fifth module box according to the position of the target module in the parent module; the fourth module box is displayed in the fifth module box according to the position of the first reference module in the parent module; The first path point is the path point passed through in the timing path corresponding to the interface to be displayed, and each of the first path points is displayed in the third module box according to its position in the target module; the first fixed module is used to represent the module that cannot be moved within the target module, and each of the first fixed modules is displayed in the third module box according to its position in the target module. The second path point is the path point traversed in the timing path corresponding to the worst timing interface, and each second path point is displayed in the fourth module box according to its position in the first reference module; the second fixed module is used to represent the module that cannot be moved within the first reference module, and each second fixed module is displayed in the fourth module box according to its position in the first reference module. The third annotation is a path description information describing the displayed timing path.

[0012] In the above implementation, displaying the third and fourth module boxes within the fifth module box allows developers to intuitively understand the positional distance relationships between the parent module, target module, and first reference module. This method of displaying timing paths shows good consistency with backend timing, which helps improve the accuracy of timing violation analysis results.

[0013] Furthermore, the interface display interface is also used to display the connection between the timing interface of the target module and the timing interface of the second reference module; the second reference module is a module connected to the target module.

[0014] In the above embodiments, by demonstrating the connection between the timing interface of the target module and the timing interface of the second reference module, researchers can easily and intuitively view the relationship between the timing interfaces of the associated target module and the second reference module.

[0015] Furthermore, the presentation of timing interfaces as output interfaces differs from that of timing interfaces as input interfaces.

[0016] In the above embodiments, by setting the display form of the timing interface as an output interface to be different from that of the timing interface as an input interface, it is easier for users to intuitively see whether the timing interface is an input interface or an output interface.

[0017] Furthermore, the interface display includes: a sixth module frame and seventh module frames distributed around the sixth module frame; the sixth module frame has all the timing interfaces of the target module; each seventh module frame has all the timing interfaces connected to the timing interfaces of the target module and belonging to the same second reference module; the timing interfaces of the sixth module frame are connected to the timing interfaces of the corresponding seventh module frames.

[0018] In the above implementation, by arranging the seventh module frame around the sixth module frame, the overall view presented in this way can display larger modules and timing interfaces, improve the page utilization rate of the interface display interface, and thus improve the user's visual experience.

[0019] Furthermore, both the sixth module frame and the seventh module frame are square frames; each of the seventh module frames is evenly distributed on opposite sides of the sixth module frame, and the timing interface in each of the seventh module frames is only located on the side closest to the sixth module frame.

[0020] In the above implementation, by evenly distributing the seventh boxes on both sides of the sixth boxes, the usage rate of different areas in the interface display is minimized, thereby improving the user's visual experience. Simultaneously, by placing the timing interfaces only on the side closest to the sixth module box, the intersections between different connections are minimized, allowing users to more intuitively view the connection relationships between the various timing interfaces.

[0021] Furthermore, the interface display interface also includes a search box and a signal list box; the method further includes: when a character is received in the search box, displaying the interface name of the timing interface whose name contains the character in the signal list box; and when a second trigger operation is received on the interface name in the signal list box, displaying the timing interface corresponding to the interface name indicated by the second trigger operation in the central area of ​​the interface display interface.

[0022] In the above implementation, by displaying the timing interface searched by the user in the central area of ​​the interface display interface, the user's attention can be directly focused on the searched timing interface, making it easier for the user to view the timing interface they want to know.

[0023] Furthermore, the interface display also includes a menu box; the method further includes: in response to a third trigger operation on the menu box, displaying a timing path table; the timing path table is used to describe the violation paths corresponding to each timing interface of the target module, and each row in the timing path table describes a violation path; the violation path is the timing path corresponding to the timing interface of the target module whose total timing margin is negative; the total timing margin is the sum of the timing margin of the first interface and the timing margin of the second interface; the first interface is the timing interface of the target module; the second interface is a timing interface connected to the timing interface of the target module.

[0024] In the above implementation, all violation paths are displayed through a timing path table, making it easy for users to intuitively focus on the timing interfaces with problems.

[0025] Furthermore, in response to a first trigger operation on the interface display interface, displaying the layout display page corresponding to the interface to be displayed indicated by the first trigger operation includes: in response to a first trigger operation on one row in the timing path table, displaying the layout display page corresponding to the timing interface of the target module in the row indicated by the first trigger operation.

[0026] In the above implementation, clicking on one of the rows in the timing path table triggers a jump to the layout display page, which allows users to conveniently and comprehensively understand the timing information of timing interfaces with timing problems.

[0027] Furthermore, every preset time interval or in response to an update command, the latest timing report is obtained, and the path description information is updated according to the timing report; the timing report is used to describe the timing path corresponding to each timing interface.

[0028] In the above implementation, by updating the path description information, researchers can avoid incorrectly determining which timing interfaces need to be adjusted due to untimely updates of the path description information.

[0029] Furthermore, in response to the first trigger operation on the interface display interface, the method further includes: in response to the selection instruction, displaying the interface display interface corresponding to the target module indicated by the selection instruction.

[0030] In the above implementation, it is considered that a chip may have multiple modules. Typically, developers only need to understand one or more modules they are responsible for developing; that is, they only need to focus on a subset of modules. By selecting instructions, only the interface display of the target module that the developer needs to understand is shown, instead of directly showing the interface display of all modules. This saves hardware resources and allows for faster display of the interface display.

[0031] This application provides an interface display device, including: a first display module, which, in response to a first trigger operation on an interface display interface, displays a layout display page corresponding to the interface to be displayed indicated by the first trigger operation; wherein: the interface display interface is used to display timing interfaces of a target module; the interface to be displayed is a timing interface in the target module; the layout display page is used to display the position of the timing path corresponding to the interface to be displayed in the target module, the position of the timing path corresponding to the worst timing interface in a first reference module, and path description information of the displayed timing path; the worst timing interface is a timing interface with the worst timing margin connected to the interface to be displayed; the first reference module is the module to which the worst timing interface belongs.

[0032] This application provides a display device, including a processor and a memory. The memory stores computer-executable instructions that can be executed by the processor. The processor executes the computer-executable instructions to implement the above-described interface display method.

[0033] This application provides a storage medium storing computer-executable instructions. When the computer-executable instructions are called and executed by a processor, the computer-executable instructions cause the processor to implement the above-described interface display method.

[0034] This application provides a computer program product, which includes a computer program that, when executed by a processor, implements the above-described method for displaying the interface.

[0035] The above general description and the description below are exemplary and illustrative only and are not intended to limit this application. Attached Figure Description

[0036] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 A flowchart illustrating an interface display method provided in an embodiment of this application; Figure 2 A schematic diagram of an interface display provided in an embodiment of this application; Figure 3 A schematic diagram illustrating another interface provided in an embodiment of this application; Figure 4 A schematic diagram illustrating another interface provided in an embodiment of this application; Figure 5 A schematic diagram of a layout display page provided for an embodiment of this application; Figure 6 A schematic diagram of another layout display page provided for an embodiment of this application; Figure 7 A flowchart illustrating a method for generating time-series path data provided in an embodiment of this application; Figure 8 A schematic diagram of module interconnection provided for an embodiment of this application; Figure 9 A schematic diagram illustrating a module interface connection relationship provided in an embodiment of this application; Figure 10 This is a schematic diagram of an electronic device provided in an embodiment of this application.

[0038] Figure label: 1: Processor; 2: Memory; 3: Communication bus. Detailed Implementation

[0039] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0040] Example 1 Combination Figure 1 As shown in the figure, this application embodiment provides a method for displaying an interface, including: Step S101: In response to the selection command, display the interface display interface corresponding to the target module indicated by the selection command; the interface display interface is used to display the timing interface of the target module.

[0041] The target module refers to one or more modules within the chip.

[0042] Among them, timing interfaces are interfaces that contain timing information, such as interfaces whose functions are not clock, reset, test, etc.

[0043] For example, the interface display interface includes an interface summary table, which records each timing interface of the target module. As another example, the interface display interface includes an eighth module frame, which contains all the timing interfaces of the target module.

[0044] In some embodiments, the interface display interface is also used to display the connection between the timing interface of the target module and the timing interface of the second reference module.

[0045] The second reference module is the module connected to the target module.

[0046] In one optional embodiment of the above, the interface display interface includes: a connection relationship table; the connection relationship table is used to record the connection relationship between each timing interface of the target module and the timing interface of the second reference module.

[0047] For example, each row in the first column of the connection table records the timing interface of a target module, and the second column records the timing interfaces of the second reference modules directly connected to the timing interfaces of the target modules in the first column. It is possible that only one timing interface is recorded in each row of the second column, in which case different rows in the first column may record the timing interfaces of the same target module. Alternatively, multiple timing interfaces can be recorded in the same row of the second column, separated by special symbols such as "+", "*", or "&". For example, the first row of the first column records dram_module / ins_val, and the first row of the second column records instru_module / dram1_val + instru_module / dram2_val. This row shows that the timing interface "dram_module / ins_val" is connected to both the timing interface "instru_module / dram1_val" and the timing interface "instru_module / dram2_val".

[0048] In another optional embodiment described above, the interface display includes a display area. The display area includes a sixth module frame and seventh module frames distributed around the sixth module frame, wherein the timing interface of the sixth module frame is connected to the timing interface of each corresponding seventh module frame.

[0049] The sixth module block contains all the timing interfaces of the target module; a seventh module block contains all the timing interfaces that are connected to the timing interfaces of the target module and belong to the same second reference module.

[0050] The timing interface of the sixth module block is connected to the timing interfaces of the corresponding seventh module blocks, that is, the connection is made according to the connection relationship between the timing interface of the target module and the timing interface of the second reference module.

[0051] In the above optional method, the timing interface in each seventh module box is only set on the side closest to the sixth module box.

[0052] For example, assuming that the sixth and seventh module boxes are both triangles, the seventh module box can be distributed on three sides of the sixth module box.

[0053] For another example, suppose that both the sixth and seventh module boxes are pentagons. The seventh module boxes can be distributed across the five faces of the sixth module box, and the timing interfaces in each seventh module box are only located on the side closest to the sixth module box.

[0054] For example, both the sixth and seventh module boxes are rectangular. The seventh module boxes can be evenly distributed on opposite sides of the sixth module box, and the timing interfaces in each seventh module box are only located on the side closest to the sixth module box. Combined with... Figure 2 As shown, the box containing `dram_module` is the sixth module box. The boxes containing `top_module`, `alu_module`, and `instru_module` are all seventh module boxes. The timing interfaces in the sixth module box are connected to the timing interfaces in each of the seventh module boxes. Thus, since modules are usually in the form of boxes, by setting the sixth and seventh module boxes to boxes, the displayed module shape is more consistent with the actual module shape, providing a better user experience.

[0055] For example, combining Figure 2As shown, considering that a timing interface of the target module may connect to the timing interfaces of multiple second reference modules, for each timing interface of the target module: obtain the number of timing interfaces of the second reference modules connected to that timing interface; set the same number of such timing interfaces in the sixth module box. In this way, by setting the number of timing interfaces of the target module to be the same as the number of timing interfaces it needs to connect to, when displaying the connection relationships, a timing interface of the target module only needs to connect to one timing interface of the second reference module, ensuring that the connections between the timing interfaces do not overlap, making it easier for developers to view.

[0056] Optionally, the method further includes displaying the corresponding module names in the sixth and seventh module boxes.

[0057] Alternatively, the method further includes: in response to a fourth trigger operation on a module box, displaying the module name of the module box indicated by the fourth trigger operation.

[0058] In the above optional methods, the presentation of the timing interface as an output interface is different from that of the timing interface as an input interface.

[0059] Combination Figure 2 As shown, optionally, the timing interface used as an output interface can be set to a different color than the timing interface used as an input interface.

[0060] Alternatively, the shape of the timing interface used as an output interface can be different from the shape of the timing interface used as an input interface. For example, a triangle shape can be used as the timing interface for the output interface, and a circle shape can be used as the timing interface for the input interface.

[0061] Alternatively, the shape of the timing interface used as an output interface can be set to be twice the size of the shape of the timing interface used as an input interface.

[0062] In some embodiments, the interface display interface further includes a search box and a signal list box. The method further includes: upon receiving a character entered in the search box, displaying the interface name of the timing interface whose name contains the character in the signal list box. Upon receiving a second trigger operation on the interface name in the signal list box, displaying the timing interface corresponding to the interface name indicated by the second trigger operation in the central area of ​​the interface display interface.

[0063] The central area can be a region with a preset length and width, with the geometric center of the display area of ​​the interface as the midpoint.

[0064] For example, in combination Figure 3As shown, the interface display includes a display area, a search box, and a signal list box. A search box and a signal list box are added outside the display area. If no characters are entered in the search box, the signal list box displays the interface names of all timing interfaces within the display area. When characters are received in the search box, the signal list box displays the interface names whose names contain those characters.

[0065] In some embodiments, the interface display screen further includes a menu box. The method further includes displaying a timing path table in response to a third trigger operation on the menu box.

[0066] The timing path table describes the violation paths corresponding to each timing interface of the target module, and each row in the timing path table describes one violation path. The violation path is the timing path corresponding to the timing interface of the target module whose total timing margin is negative. The total timing margin is the sum of the timing margin of the first interface and the timing margin of the second interface. The first interface is the timing interface of the target module. The second interface is a timing interface connected to the timing interface of the target module.

[0067] In this application, the timing margin of a timing interface refers to the timing margin corresponding to the timing path with the worst timing margin. For example, if interface A has two timing paths, the timing margin of the first timing path corresponding to interface A is -20, and the timing margin of the second timing path corresponding to interface A is -40, this application considers the timing margin of interface A to be -40.

[0068] Optionally, the timing path table can be arranged in ascending order of timing margin, corresponding to the timing interfaces of the target module. This allows developers to focus directly on the timing interfaces that are most likely to require adjustment.

[0069] For each timing path, information such as the starting interface name (st), ending interface name (et), timing slack, path depth, and path delay can be recorded. Referring to Table 1, the first timing path has a starting interface name of PortA, an ending interface name of sub_module / A_reg, a timing slack of -120, a path depth of 10, and a path delay of 987.

[0070] Table 1

[0071] In some embodiments, the interface display screen further includes a title bar. The title bar is used to display the module name of the target module being displayed. In this way, if developers open multiple interface display screens, they can easily distinguish which module is being displayed in each interface by using the title name.

[0072] For example, in combination Figure 4 As shown, the interface display includes: a menu box, a display area, a title bar, a search box, and a signal list box. The menu box, search box, and signal list box are displayed on the left side of the display area, and the title bar is displayed at the top of the display area.

[0073] Step S102: In response to the first trigger operation on the interface display interface, display the layout display page corresponding to the interface to be displayed as indicated by the first trigger operation.

[0074] Wherein: the interface to be displayed is a timing interface in the target module; the layout display page is used to display the position of the timing path corresponding to the interface to be displayed in the target module, the position of the timing path corresponding to the worst timing interface in the first reference module, and the path description information of the timing path to be displayed; the worst timing interface is the timing interface with the worst timing margin connected to the interface to be displayed; the first reference module is the module to which the worst timing interface belongs.

[0075] In some embodiments, the interface display interface includes a menu box and a display area. The interface display interface displays a timing path table in response to a third trigger operation on the menu box. At this time, in response to a first trigger operation on the interface display interface, displaying the layout display page corresponding to the interface to be displayed indicated by the first trigger operation can be: in response to a first trigger operation on one row of the timing path table, displaying the layout display page corresponding to the timing interface of the target module in the row indicated by the first trigger operation.

[0076] In some embodiments, the interface display interface includes: the timing interface of the target module. In this case, responding to a first trigger operation on the interface display interface, displaying the layout display page corresponding to the interface to be displayed indicated by the first trigger operation can be: responding to a first trigger operation on the timing interface of the target module, displaying the layout display page corresponding to the timing interface of the target module indicated by the first trigger operation.

[0077] In some embodiments, the interface display interface includes a sixth module frame and seventh module frames distributed around the sixth module frame, wherein the timing interface of the sixth module frame is connected to the timing interfaces of each of the seventh module frames. In this case, responding to a first trigger operation on the interface display interface, displaying the layout display page corresponding to the interface to be displayed indicated by the first trigger operation can be: responding to a first trigger operation on the connection between the timing interfaces of the sixth module frame and the seventh module frames, displaying the layout display page corresponding to the timing interface of the sixth module frame connected by the connection indicated by the first trigger operation.

[0078] Combination Figure 5 As shown, in some embodiments, the layout display page includes: a first module frame, a first path point set within the first module frame, a first fixed module set within the first module frame, a first annotation, a second module frame, a second path point set within the second module frame, a second fixed module set within the second module frame, and a second annotation.

[0079] Wherein: the first path point is the path point passed through in the timing path corresponding to the interface to be displayed, and each first path point is displayed in the first module box according to its position in the target module; the first fixed module is used to represent the module that cannot be moved within the target module, and each first fixed module is displayed in the first module box according to its position in the target module; the first annotation is the path description information describing the timing path corresponding to the interface to be displayed.

[0080] The second path point is the path point traversed in the timing path corresponding to the worst timing interface, and each second path point is displayed in the second module box according to its position in the first reference module; the second fixed module is used to represent the module that cannot be moved within the first reference module, and each second fixed module is displayed in the second module box according to its position in the first reference module.

[0081] The second annotation describes the path description information for the timing path corresponding to the worst-case timing interface.

[0082] In the above embodiments, the layout display page includes: a first subpage and a second subpage; the first subpage displays a first module frame, a first path point, a first fixed module, and a first annotation; the second subpage displays a second module frame, a second path point, a second fixed module, and a second annotation.

[0083] Combination Figure 6 As shown, in some embodiments, the layout display page includes: a fifth module box, a third module box and a fourth module box set within the fifth module box, a first path point set within the third module box, a first fixed module set within the third module box, a second path point set within the fourth module box, a second fixed module set within the fourth module box, and a third annotation.

[0084] Specifically: the third module box is displayed in the fifth module box according to the position of the target module in the parent module; the fourth module box is displayed in the fifth module box according to the position of the first reference module in the parent module.

[0085] The first path point is the path point passed through in the timing path corresponding to the interface to be displayed, and each first path point is displayed in the third module box according to its position in the target module; the first fixed module is used to represent the module that cannot be moved within the target module, and each first fixed module is displayed in the third module box according to its position in the target module.

[0086] The second path point is the path point traversed in the timing path corresponding to the worst timing interface, and each second path point is displayed in the fourth module box according to its position in the first reference module; the second fixed module is used to represent the module that cannot be moved within the first reference module, and each second fixed module is displayed in the fourth module box according to its position in the first reference module.

[0087] The third annotation describes the path description information of the displayed timing path.

[0088] The parent module can be the top-level module.

[0089] The interface and tables shown in Example 1 above can be drawn in the manner described in Example 2.

[0090] Example 2 Combination Figure 7 As shown in the figure, this application provides a method for generating time-series path data, including: Step S201: Import the preset design file into the EDA tool.

[0091] The design files can be source code, netlist files, constraint files, and library files related to the chip for which the timing path is expected to be analyzed.

[0092] Among them, EDA (Electronic Design Automation) tools, such as DC (Logic Synthesis Tool).

[0093] For example, when using DC, the relevant settings of the Physical Optimization Tool (ICC2) need to be enabled to call the ICC2 physical algorithm engine to obtain the physical location coordinates of the timing interface.

[0094] Step S202: Use the EDA tool to extract the timing path data corresponding to the timing interface in the design file according to the commands in the command set.

[0095] The command set is a collection of timing information commands. A single timing information command is used to extract timing path data from a timing interface.

[0096] For example, researchers can pre-define the timing information commands corresponding to the timing interfaces from which they expect to extract timing path data into a command set.

[0097] Among them, timing path data is used to describe the information of the timing path with the worst timing margin corresponding to the timing interface.

[0098] For example, timing path data may include: path description information of the timing path with the worst timing margin, and path point coordinates of each path point in the timing path with the worst timing margin.

[0099] Each path point represents an interface or module.

[0100] The path description information includes timing margin. A positive timing margin indicates that the timing of the timing path is met, while a negative timing margin indicates that the timing path has a timing violation. The path description information may also include at least one of the following: point (path point name), cap (path point capacitance parameter), trans (transition time), Incr (delay value through a single path point), path (cumulative delay value), path depth, and Location / Load (path point coordinates).

[0101] For example, the timing information command is "report_timing -from portA -physical-nosplit -cap -tran", which means reporting the worst timing path starting from interface A, carrying the coordinates of the path points, the capacitance parameters of the path points, and the transition time. It also avoids splitting a long line into two lines when displaying the data. Thus, using this timing information command, regardless of whether the bit width of portA (interface A) is greater than 1, DC only reports the worst timing path for portA. Considering that the worst timing path is often the bottleneck of the design, using this worst timing path to represent the entire timing path of portA for subsequent analysis can reduce the number of paths and simplify subsequent processing logic.

[0102] For example, to easily distinguish between input and output interfaces, the command set may include an input set and an output set. The input set includes only timing information commands corresponding to the timing interfaces that serve as input interfaces. The output set includes only timing information commands corresponding to the timing interfaces that serve as output interfaces.

[0103] Step S203: Generate a timing report from the timing path data corresponding to the timing interface.

[0104] In some embodiments, the command set includes an input set and an output set. Correspondingly, the timing report includes: an input interface timing report and an output interface timing report. The timing path data corresponding to the timing interface that serves as the input interface is used to form the input interface timing report. The timing path data corresponding to the timing interface that serves as the output interface is used to form the output interface timing report.

[0105] Optionally, the time-series report is a file in RPT (data report stored in plain text format).

[0106] For example, the input_ports.rpt file is used as the input interface timing report. The timing path data corresponding to the timing interface used as the input interface is stored in the input_ports.rpt file, with some formatting examples as follows: PointCapTransIncrPathLocation / Load portA[0] (in)0.012515315r(-100,-10) submodule1 / func1 / U28 / X (AND2_1)0.023040355r(-20, 40) submodule1 / func1 / ser_reg / D (SD_1) empty 3020375r (30, 70) Slack (MEET) 375 In the above input interface timing report, the first row is the column header, and the last row is the timing margin value for that timing path. Except for the first and last rows, each row is used to describe a path point according to the header of the first row. If a path point does not have data corresponding to the header, the data is empty.

[0107] For another example, the output_ports.rpt file can be used as the timing report for the output interface. The timing path data corresponding to the timing interface used as the output interface is stored in the output_ports.rpt file, with some formatting examples as follows: PointCapTransIncrPathLocation / Load submodule1 / func1 / ser_load_reg / D (SD_1) empty 302020r (-30, 70) submodule1 / func1 / U32 / X (AND2_1)0.0220120140r(-100,60) Out_portA[0] (out) empty 5055195r(300, 40) Slack (VIOLATED)-45 In the timing report of the above output interface, the first line is the title, and the last line is the timing margin value of the timing path. Except for the first and last lines, each line is used to describe a path point according to the title of the first line. If a path point does not have data corresponding to the title, the data is empty.

[0108] In some embodiments, for ease of subsequent display, the timing report in RPT format can be converted to a CSV file. If the timing report includes an input interface timing report and an output interface timing report, the input interface timing report and the output interface timing report are converted to their respective CSV files.

[0109] Optionally, only preset content can be extracted from the time series report to form a CSV file. The preset content may be: for each path point in the time series path, extract the corresponding Point, Cap, Trans, Incr, Path, Location / Load, and the timing margin of the time series path.

[0110] For example, after converting the above input_ports.rpt file to an input_ports.csv file, the format of the input_ports.csv file is as follows: index,cap,trans,incr,path,location portA_isport, 0.01, 25, 15, 315, (-100, -10) 1, 0.02, 30, 40, 355, (-20, 40) 2, 0, 30, 20, 375, (30, 70) ENDPATH, 0, 0, 0, 0, 375 In this file, the first line is the title, and the last line only records the timing margin. The column corresponding to the title `index` is set with `_isport` to indicate the start of the path and `ENDPATH` to indicate the end of the path. Except for the first and last lines, each line describes a pathpoint according to the title in the first line; if a pathpoint has no corresponding data, the data is 0. Since the last line only contains timing margins, to maintain format consistency, the remaining positions are padded with 0s. In the above file, each column is separated by commas.

[0111] After converting the above output_ports.rpt file to an output_ports.csv file, the format of the output_ports.csv file is as follows: index,cap,trans,incr,path,location Out_portA_isport,0,0,0,0,0 1, 0, 30, 20, 20, (-30, 70) 2, 0.02, 20, 120, 140, (-100, 60) 3, 0, 50, 55, 195, (300, 40) ENDPATH, 0, 0, 0, 0, -45 In this file, the first line is the title, and the last line only records timing margins. The column corresponding to the title `index` is set with `_isport` indicating the start of the path and `ENDPATH` indicating the end of the path. Since the output interface is located at the end of the timing path, an additional line can be added before the first path point of that timing path, with `_isport` indicating the start of the path in the column header of that line. To clearly indicate which output interface corresponds to the timing path, the interface name can be set with `_isport` indicating the start of the path. Except for the first, second, and last lines, each line describes a path point according to the title of the first line. If a path point has no corresponding data, the data is 0. In the above file, each column is separated by commas.

[0112] In some embodiments, current large-scale digital circuit designs typically employ a hierarchical structure. Combined with Figure 8 As shown, the top-level module instance is `top_inst`, and the module name is `top_module`. The top-level module contains three sub-modules, with instances of `dram_inst1`, `dram_inst2`, and `core_inst1`. `dram_inst1` and `dram_inst2` share the same module name: `dram_module`. The module with the instance name `top_inst` is the parent module above the modules with instance names `dram_inst1`, `dram_inst2`, and `core_inst1`, i.e., the parent module mentioned above.

[0113] In chip design, the same module is often instantiated multiple times, a phenomenon that is quite common. For example, in multi-core CPU (processor) and GPU (graphics processing unit) designs, multiple computing cores may share the same module name. Considering that circuit implementation is module-based, circuit optimization requires identical modules to have a consistent layout; otherwise, the optimization results may only apply to some instances and not all, leading to numerous cross-module timing violations in the top-level module instances. Therefore, this invention considers modules with identical code and layout files as the same module, and modules with identical code but different layouts as different modules.

[0114] In some embodiments, each module has a corresponding DEF (module definition file). The physical information of the module to be displayed can be obtained from its DEF file; for example, if a target module needs to be displayed, its DEF file is retrieved. The physical information includes the boundary coordinates of the module to be displayed and the geometric center coordinates of fixed modules within the module to be displayed. Fixed modules are those that cannot be moved, such as hard cores and storage modules.

[0115] For example, the raw information stored in the DEF file of the module to be displayed, such as: DIEAREA (coordinate 1) (coordinate 2) (coordinate 3) (coordinate 4)...; COMPONENTS 13427; - blockA / sram1, ref_name1 + FIXED (coordinate 5); - blockB / sram2, ref_name2 + FIXED (coordinate 6); ... END COMPONENTS.

[0116] In the original information above, the first line records the boundary coordinates of the module to be displayed. Boundary coordinates are the coordinates of the turning points on the boundary that encloses the module to be displayed. Since there may be multiple turning points on the boundary, there will be multiple boundary coordinates. The second line records the number of modules inside the module to be displayed. The last line marks the end of the file. Except for the first, second, and last lines, each line describes the instance name, module name, and geometric center coordinates of a fixed module inside the module to be displayed.

[0117] For easier presentation later, the DEF file can be converted to a CSV file.

[0118] For example, the above DEF file is converted and saved to the module_def.csv file, with the following format: Instance, reference, coordinates DIEARER, NULL, (coordinate 1) (coordinate 2) (coordinate 3) (coordinate 4) blockA / sram1, ref_name1, (coordinate 5) blockB / sram2, ref_name2, (coordinate 6) In the above information, the first row contains column headings, where "Instance" is the instance name, "reference" is the module name, and "coordinates" is the physical information. The second row records the boundary coordinates of the module to be displayed. The third and fourth rows describe the fixed modules according to the column headings. The module name of the module to be displayed is filled with NULL (invalid value).

[0119] In the above embodiments, fixed modules can be determined from DEF files in the following way: the reference names in the DEF file are matched with a preset set of fixed module names. If the reference name exists in the set of fixed module names, the module corresponding to the reference name is a fixed module; otherwise, the module corresponding to the reference name is not a fixed module.

[0120] The fixed module name set records the reference names of all fixed modules. This allows for greater flexibility in finding the corresponding fixed module, considering that different process manufacturers may use different fixed module names.

[0121] For example, if a DEF file exists for the top-level module (i.e., the DEF file for the module above the one to be displayed), then the relative positions of each module to be displayed within the top-level module are parsed. The original information of the top-level module's DEF file is, for example: DIEAREA (coordinate 1) (coordinate 2) (coordinate 3) (coordinate 4)...; COMPONENTS 12427; - moduleA_inst module_name1 + PLACED coordinates 5); - moduleB_inst module_name2 + PLACED coordinates6); - moduleC_inst module_name3 + PLACED coordinates7); - moduleB_inst module_name3 + PLACED coordinates8); - moduleD_inst module_name4 + PLACED coordinate 9); ... END COMPONENTS.

[0122] The first line of the above information records the boundary coordinates of the top-level module. The second line records the number of modules within the top-level module. The last line marks the end of the file. Except for the first, second, and last lines, each line describes the module name, instance name, and coordinates within the top-level module of a submodule.

[0123] After converting the above DEF file, save it to the chip_def.csv file, with the following format: Instance, reference, coordinates DIEARER, NULL, (coordinate 1) (coordinate 2) (coordinate 3) (coordinate 4) moduleA_inst, module_name1, (coordinate 5) In the above information, the first line contains column headings. The second line records the boundary coordinates of the top-level module. The third line describes the submodules according to their column headings. The module name of the top-level module is filled with NULL values.

[0124] In some embodiments, considering that different companies use different processes to achieve inter-module interconnection, the generation methods of interconnection information vary. The required timing interface connection relationships can be extracted from the interconnection information describing the connection relationships between various modules to form a connection description file.

[0125] Combination Figure 8 As shown, if two modules are located at different levels, their interconnection information needs to be transmitted through the corresponding upper-level module. For example, if alu_module and dram_module are located at different levels, the interconnection information is transmitted as follows: alu_module transmits data to core_module, and core_module then transmits data to dram_module.

[0126] Combination Figure 9 As shown, taking dram_module as an example, the connection relationship between the timing interface of dram_module and the timing interfaces of other modules is described as follows: `dram_out`: The `dram_out` output interface of the `dram_module` is connected to the `PAD_CHA_out` and `PAD_CHB_out` interfaces of the `top_module`. `dram_in`: The `dram_in` input interface of the `dram_module` receives the `PAD_CHA_in` and `PAD_CHB_in` signals from the `top_module`. `ins_val`: The `ins_val` input interface of the `dram_module` is connected to the `dram1_val` and `dram2_val` interfaces of the `instru_module`. `ins_req`: The `ins_req` output interface of the `dram_module` is connected to the `dram1_req` and `dram2_req` interfaces of the `instru_module`. `misc_in`: The `misc_in` input interface of the `dram_module` receives the `PAD_misc_in` signal from the `top_module` or is connected to 0. `misc_out`: The `misc_out` output interface of the `dram_module` is connected to the `PAD_misc_out` interface of the `top_module` or remains unconnected.

[0127] Optionally, the connection description file can be converted to a CSV format file.

[0128] For example, convert the above content into a CSV file named connections.csv. The contents of the connections.csv file would be, for example: Port_name,direction,connections dram_out, out, top_module / PAD_CHA_out + top_module / PAD_CHB_out dram_in, in, top_module / PAD_CHA_in + top_module / PAD_CHB_in ins_val, in, instru_module / dram1_val + instru_module / dram2_val ins_req, out, instru_module / dram1_req + instru_module / dram2_req misc_in,in,top_module / PAD_misc_in misc_out,out,top_module / PAD_misc_out In the above description, the first row contains column headings. "Port_name" represents the interface name. "direction" indicates the data direction, and "connections" represents the module name of the other interfaces connected to this interface and the interface name of those other interfaces. Except for the first row, each row describes an interface according to the column headings in the first row.

[0129] The connection description file is converted to a CSV file, and the parsing follows this principle: the name of each timing interface connected to the target module's timing interface must be added to the `connections` column. Different interface names are separated by special symbols, such as using a plus sign to separate different interface names. For example, if the interface name `ins_val` connects to `dram1_val` in module instance `dram_inst1`, and the interface name `ins_val` connects to `dram2_val` in module instance `dram_inst2`, and the module name of `instru_1` is `instru_module`, then the final content of the `connections` column will be `instru_module / dram1_val + instru_module / dram2_val`.

[0130] Considering that the purpose of this application is timing analysis, for cases where the input signal is connected to a constant value or the output signal is not connected, since such interfaces have no timing information, their connection information can be ignored and not written to the CSV file.

[0131] In some embodiments, this application may construct an interface display interface based on the connection description file corresponding to the selection instruction.

[0132] The connection description file describes the connection relationships between the timing interfaces of the target module and the timing interfaces of other modules. The connection description file can be obtained using the method described above.

[0133] In some embodiments, the interface display interface includes a sixth module frame and a seventh module frame distributed around the sixth module frame. Correspondingly, the interface display interface can be constructed based on the connection description file corresponding to the selection instruction in the following manner: Based on the connection description file, obtain the number of timing interfaces possessed by each second reference module connected to the target module; sort the second reference modules according to the number of timing interfaces possessed by each second reference module; if the number of second reference modules connected to the target module is even, group the second reference modules in odd positions after sorting into a first group, and group the second reference modules in even positions after sorting into a second group; if the number of second reference modules connected to the target module is odd, group the first candidate modules in odd positions after sorting into a first group, and group the first candidate modules in even positions after sorting into a second group, and group the second candidate modules into the group with the smaller total number of timing interfaces. Draw the second reference modules in the first group on one side of the target module, and draw the second reference modules in the second group on the other side of the target module.

[0134] The second candidate module is the second reference module that is ranked last after sorting, and the first candidate module is the second reference module other than the second candidate module.

[0135] In this context, after the other modules in the first and second groups are drawn, the module box representing the second reference module is the seventh module box. After the target module is drawn, the module box representing the target module is the sixth module box.

[0136] In the above method, the second reference module in the first group is drawn on one side of the target module, and the second reference module in the second group is drawn on the other side of the target module. The method further includes: adjusting some of the second reference modules to the group where the second reference module is not present, so that the second quantity difference is not greater than the first quantity difference; the first quantity difference is the difference between the total number of timing interfaces in the first group before adjustment and the total number of timing interfaces in the second group after adjustment; the second quantity difference is the difference between the total number of timing interfaces in the first group after adjustment and the total number of timing interfaces in the second group after adjustment.

[0137] Optionally, adjusting a portion of the second reference module to the group where the second reference module is not present, so that the second quantity difference is not greater than the first quantity difference, can be done in the following two ways: Method 1: The group with the larger total number of timing interfaces in the first and second groups is designated as the group to be moved. The remaining groups are designated as another group. The second reference module with the fewest timing interfaces in the group to be moved is moved to the other group, and it is determined whether the second quantity difference is less than the first quantity difference. If it is less, the second quantity difference is used as the new first quantity difference. The above process is repeated until the second quantity difference is not less than the first quantity difference, or the number of moves reaches the preset number.

[0138] Method 2: For each pair of second reference modules: record the second quantity difference after swapping the pair of second reference modules in the first group and the second group; calculate the difference between the second quantity difference and the first quantity difference to obtain the degree of numerical improvement; sort the second reference modules in the first group and the second group according to the number of timing interfaces respectively, and the second reference modules with the same sequence number in the first group and the second group are regarded as a pair of second reference modules; swap the pair of second reference modules with the greatest degree of numerical improvement in the first group and the second group.

[0139] For example, adjustments can be made using either Method 1 or Method 2 alone, or by combining Method 1 and Method 2. For instance, first execute Method 1 to obtain the adjusted first and second groups. Then, based on the adjusted first and second groups, use Method 2 to make further adjustments.

[0140] For example, the connections.csv file can be converted into a dictionary all_con_dict, in the following format: all_con_dict = { top_module:[PAD_CHA_out:out, PAD_CHB_out:out, ...], instru_module:[dram1_val:in,dram2_val:in,...], ... } The dictionary uses a nested structure, with the first-level key being the module name, the second-level key being the interface name, and the value corresponding to the second-level key being the interface direction.

[0141] The second step is to simplify all_con_dict and generate the dictionary block_con_dict, with the following format: block_con_dict = { top_module: 6 instru_module: 4, ... } The first-level keys of the dictionary are the same as the first-level keys of all_con_dict, and the values ​​are the number of sequential interfaces that the module has (i.e., the length of the second-level value list of all_con_dict). The second level is canceled.

[0142] Based on the value of `block_con_dict`, the other modules are sequentially assigned to two groups, for example, `group1` and `group2`. For instance, if `block_con_dict` is sorted by value as {moduleA: 300, moduleB: 280, moduleC: 240, moduleD: 198, moduleE: 130, moduleF: 100, moduleG: 80}, then grouping them into pairs, `group1` and `group2` alternately select the larger value. Therefore, `group1` is assigned to `moduleA`, `moduleD`, and `moduleE`, and `group2` is assigned to `moduleB`, `moduleC`, and `moduleF`. Since the total number of modules is odd, the sum of `group2` is 620, and the sum of `group1` is 628. The last module, `moduleG`, is then assigned to the group with the smaller sum, `group2`. The initial groupings are: `group1 = [moduleA, moduleD, moduleE]`, `group2 = [moduleB, moduleC, moduleF, moduleG]`.

[0143] Based on the initial grouping, modules with the fewest timing interfaces are moved from the group with the largest sum to the group with the smallest sum, until the sum difference between the two groups cannot be further reduced or a set loop threshold is reached. At this point, the sum difference between the two adjusted groups is less than or equal to the difference between the initial groups. Then, the initial difference between the two adjusted groups, `current_diff`, is calculated first. In each iteration, each pair of modules in `group1` and `group2` is traversed, the degree of improvement in the sum difference after swapping the modules in that pair is calculated, and the index of the swap pair that brings the greatest improvement is recorded. If a swap that reduces the difference is found, the optimal swap is executed; otherwise, the loop terminates early. If the loop reaches the set threshold, it also terminates and returns the group with the smallest difference. In this way, through dynamic adjustment and successive optimization of the swapping algorithm, the most balanced grouping can be obtained.

[0144] With the above groupings in place, we can begin drawing the interface display. Draw the modules from the first group on one side of the target module, and the modules from the second group on the other side of the target module. This will display the sixth module frame and the seventh module frames surrounding it in the interface display. The following method can be used to achieve this.

[0145] The first step is to obtain preset variables, including the height and width of the interface (port_height and port_width), the vertical spacing between interfaces (port_space), the vertical spacing between modules (module_space), the width of the module (module_width), the margin at the top and bottom of the module (module_margin), and the horizontal spacing between the left and right sides of the module (module_distance), etc.

[0146] Preset variables can be pre-set by R&D personnel based on their experience. By properly configuring the preset variables, R&D personnel can generate more aesthetically pleasing interface displays.

[0147] Next, we begin constructing the module diagrams of the second reference modules located to the left and right of the target module. The module diagrams are drawn in rectangular form, which can be implemented using the QGraphicsRectItem class (a class in the graphics view framework used for drawing and manipulating rectangles) of Qt (a cross-platform development framework). These rectangles are placed in a scene, and before drawing, the position coordinates and module height of each rectangle need to be calculated.

[0148] The formula for calculating module height is as follows: height_1 = port_height × port_number + (port_space + 1) × port_number + module_margin.

[0149] Where height_1 is the module height and port_number is the number of timing interfaces within the module.

[0150] The scene coordinate system has its origin (0, 0) at the top left corner of the screen. At this point, the x-coordinate increases to the right, and the y-coordinate increases downwards.

[0151] The y-coordinates of the second reference modules on both the left and right sides are calculated in the same way, and the y-coordinate formula is as follows: start_pos_y(i)=module_space×i + start_pos_y(i−1) + height_1(i-1); start_pos_y(0) = 0; height_1(0) = 0.

[0152] Where start_pos_y(i) is the position of the i-th second reference module, and height_1(i-1) is the module height of the (i-1)-th module. The y-coordinate is calculated using a recursive algorithm. For the first element of group1 (i=1), the initial y-coordinate is module_space, and the y-coordinates of subsequent modules are calculated according to the above formula.

[0153] The x-coordinates of the second reference modules on the left and right sides are calculated differently. The x-coordinates of the second reference module on the left are calculated as follows: start_pos_x=module_space.

[0154] The x-coordinate of the second reference module on the right is calculated as follows: start_pos_x= module_space+ (module_distance + module_width)×2.

[0155] After completing the construction of the second reference modules on the left and right sides, begin constructing the target module. The height of the target module must cover the maximum height of the second reference modules on the left and right sides. The height formula is as follows: height_2=max(start_pos_y_l, start_pos_y_r).

[0156] Where height_2 is the height of the target module. start_pos_y_l is the y-coordinate of the second reference module at the bottom left, and start_pos_y_r is the y-coordinate of the second reference module at the bottom right.

[0157] The starting coordinates of the target module are: main_x= module_space+module_distance + module_width.

[0158] main_y = module_space.

[0159] After completing the drawing of the target module, start drawing the interfaces and connections.

[0160] The interface drawing methods for both the left and right sides are the same; taking the left module as an example, the previously mentioned dictionary `all_con_dict` is a two-level nested dictionary, therefore a double-loop structure is used to draw each interface. The coordinates of the left module interface are calculated as follows: port_x = module_rect.right() - port_width.

[0161] port_y(i)=module_rect.top()+module_margin / 2+(i-1)×(port_height+port_space).

[0162] The interface of the left-hand module is located at the far right of the module; the x-coordinate of the rightmost point is obtained by calling the `module_rect.right()` method. The y-coordinates increase sequentially from the top of the module; the y-coordinate of the top point is obtained by calling the `module_rect.top()` method. The height (`port_height`), width (`port_width`), and spacing (`port_space`) of the interface are all predefined values. Based on these coordinates, the interface can be drawn using Qt's `QGraphicsRectItem` class.

[0163] After the interface is drawn, the background of the output interface can be filled with blue, while the background of the input interface remains transparent.

[0164] While drawing the left-side module interface, draw the main module interface connected to it. The y-coordinate of the main module interface is the same as that of the left-side module interface, and the x-coordinate is obtained by calling the `right()` method of the main module's block diagram. The lines connecting the interfaces are drawn using the `QGraphicsLineItem` class (a control used for drawing and manipulating lines).

[0165] The signal list box is implemented using QListView (a control for displaying data in list or icon mode), and the interface names of the timing interfaces of the target module are filled in sequentially.

[0166] The search box is implemented using QLineEdit (a single-line text input control). When the content of the search box changes, QSortFilterProxyModel (used for sorting and filtering data) is triggered, thereby matching the search content in the signal list box in real time. Double-clicking a timing interface in the signal list box or pressing the Enter key on the keyboard will highlight the corresponding timing interface in the display area and move the area containing that timing interface to the center of the display area.

[0167] Once the display area is built, the functions of the menu area can be called, which are mainly divided into two categories: one is to refresh the interface timing data, and the other is to generate a timing report to view timing violations.

[0168] This application embodiment can construct a timing path table based on the timing path data corresponding to the timing interface of the target module. This application embodiment provides a method for constructing a timing path table, including: for each pair of connections: obtaining the sum of the timing margins corresponding to the connection relationship; if the sum of the timing margins is negative, obtaining the timing path data corresponding to the timing interface of the target module in the connection relationship; extracting the corresponding data from the timing path data according to the column headings of a preset timing path table, and filling it into the preset timing path table.

[0169] The connection between a timing interface of the target module and a timing interface of the second reference module is considered a pair of connections. The total timing margin is the sum of the timing margin of the first interface and the timing margin of the second interface. The first interface is the timing interface of the target module. The second interface is a timing interface connected to the timing interface of the target module.

[0170] The column headers of the preset timing path table may include: the interface name of the starting point, the interface name of the ending point, timing margin, path depth, and path delay value.

[0171] In the above embodiments, conditions can also be set to perform data extraction operations only on the timing interfaces of target modules that meet the set conditions. These conditions can be, for example, filtering timing interfaces used as output interfaces or filtering timing interfaces used as input interfaces.

[0172] In the above embodiments, after the timing path table is formed, the rows in the timing path table are arranged in ascending order of timing margin.

[0173] For example, the timing margin of PortA in the target module is -120. PortA of the target module is connected to the side_PortB of another module, and the timing margin of side_PortB is 200. The sum of the timing margins corresponding to PortA and side_PortB is 80. The sum of the timing margins is positive, which does not constitute a violation, so the row corresponding to PortA will not appear in the table. Conversely, if the sum of the timing margins is negative, it is considered a violation, and the relevant path information will be included in the table.

[0174] This embodiment uses the target module as an example to illustrate how to load inputs_port.csv. An interface class is created, with each interface being an instance of the class. The interface class contains the following attributes: name: interface name; direction: interface direction; slack: timing margin; cells: a list recording each cell and its coordinates, used for drawing the layout; length: number of cells, representing the path depth; startpoint: path start point; endpoint: path end point; cap: capacitance value of each cell; trans: flip time of each cell; incr: delay value of each cell; path: records the last value, representing the arrival time. The cells mentioned above are path points.

[0175] The timing interfaces of the target module are managed by the dictionary `main_module_port_slack_dict`. The first level of this dictionary has only one key: the name of the target module. The keys in the second level are the interface names of the timing interfaces, and the values ​​corresponding to the keys in the second level are instances of the classes corresponding to the timing interfaces.

[0176] main_module_port_slack_dict = { dram_module: {portA: Class_Inst_portA, ...} } Similarly, a dictionary side_module_port_slack_dict can be used to manage the interfaces of all second reference modules on the left and right sides. Its structure is consistent with main_module_port_slack_dict, containing the same key-value pairs and hierarchical relationships to ensure data format consistency.

[0177] That is, obtain the latest timing report, convert the timing report into a preset dictionary structure, and update the path description information and the information in the timing path table according to the preset dictionary structure. The preset dictionary structure includes the interface class corresponding to the timing interface.

[0178] In this way, CSV files can be converted into a directly usable dictionary structure. If the CSV file is updated, users only need to regenerate side_module_port_slack_dict and main_module_port_slack_dict to refresh the data, without modifying the code, thereby improving the maintainability and flexibility of the system.

[0179] In the absence of a DEF file for the parent module, this application can construct a layout display page based on the timing path data corresponding to the interface to be displayed and the worst timing interface indicated by the first triggering operation, the physical information of the target module, and the physical information of the first reference module.

[0180] Specifically: the first module frame can be drawn according to the boundary coordinates of the target module. The second module frame can be drawn according to the boundary coordinates of the first reference module.

[0181] The first fixed module can be drawn in the first module frame according to its center coordinates. The second fixed module can be drawn in the second module frame according to its center coordinates.

[0182] The height and width of a fixed module can be obtained by combining the center coordinates with the LEF file (a standard file format in integrated circuit design used to describe the physical layout information of a chip) provided by the process manufacturer.

[0183] The coordinates of path points can be obtained from the timing path data. First path points are drawn in the first module box according to the coordinates of the path points of the timing path corresponding to the interface to be displayed, and then connected. Second path points are drawn in the second module box according to the coordinates of the path points of the timing path corresponding to the worst-case timing interface, and then connected.

[0184] You can annotate timing margins, path depths, and path distances as annotations.

[0185] In the presence of a DEF file for the parent module, this application can construct a layout display page based on the timing path data corresponding to the interface to be displayed and the worst-case timing interface indicated by the first triggering operation, the physical information of the parent module, the physical information of the target module, and the physical information of the first reference module.

[0186] At this point, it is necessary to convert the physical information of the target module and the physical information of the first reference module to make them correspond to the coordinate system of the parent module.

[0187] For example, the process of drawing the layout display page is accomplished using the Matplotlib package (a data visualization library). Assume the layout display page contains three parts: the target module, a second reference module connected to the target module, and the parent module of the target module. Both the target module and the second reference module connected to the target module are child modules of the parent module. The parent module's DEF file (chip.def.csv) provides the boundary information of the parent module and the coordinate information of the small block diagrams. The child module's DEF file (module_def.csv) provides its own boundary information and the position information of fixed modules located within the child module.

[0188] Since the coordinates in the submodule's DEF file originate from the submodule's geometric center point, when drawing a box representing the submodule within a box representing the parent module, the submodule's coordinates must be transformed to those in the parent module's coordinate system. The transformation formula is as follows: small_poly_world_coords_1=small_poly_local_coords_1+small_poly_center_world_1.

[0189] Where small_poly_world_coords_1 is the transformed coordinate, small_poly_local_coords_1 is the original coordinate, and small_poly_center_world_1 is the position coordinate of the child module within the parent module.

[0190] The coordinates of fixed modules and path points within a submodule must be transformed to correctly draw the graphics.

[0191] All coordinates are represented in list form. For example, [0, 0] represents the origin. Multiple coordinate points are represented in nested lists. For example, the parent module boundary point coordinate list [[-100, -150], [-100, 150], [100, 150], [100, -150]] indicates that the parent module has a height of 300 and a width of 200.

[0192] To draw, first create the graphics window and the drawing area. The commands are as follows: fig, ax = plt.subplots(figsize=(8, 8)) fig, ax represents a canvas with a coordinate system, and plt.subplots() is used to create both the canvas and the coordinate system at the same time.

[0193] When drawing a block diagram, the list of boundary point coordinates is connected end-to-end to form a closed geometry, which can be drawn using `ax.plot()`. To ensure the diagram is closed, the last element of the boundary point coordinate list must be the same as the first element. Therefore, the starting point coordinates can be appended to the end of the original boundary coordinate data in `module_def.csv`. For example, `ax.plot(x=[-100, -100, 100, 100, -100], y=[-150, 150, 150, -150, -150])`.

[0194] The coordinates of modules and interfaces along the path are plotted as scatter points: ax.scatter(x=[x1,x2,x3,x4],y=[y1,y2,y3,y4]) Among them, ax.scatter() is used to draw scatter plots.

[0195] Since the path is a unidirectional, non-closed graph, the coordinate list in the CSV file needs to be split into two lists, x and y, and then the cells should be connected sequentially after the scatter points are plotted. ax.plot(x=[x1, x2, x3, x4], y=[y1, y2, y3, y4]) The ax.plot() function is used to draw line plots or marker plots.

[0196] You can add path description information to the graph to display key information such as path depth and slack. Finally, save the graph using plt.savefig('portA_full.png').

[0197] If there is no DEF file for the parent module, the two child modules are drawn directly in their respective coordinate systems, without the need for coordinate transformation. The implementation process is similar to that of the case where a parent module is included, and will not be described in detail here.

[0198] Example 3 This application provides an interface display device, including a first display module. The first display module, in response to a first trigger operation on an interface display interface, displays a layout display page corresponding to the interface to be displayed indicated by the first trigger operation. The interface display interface is used to display timing interfaces of a target module; the interface to be displayed is a timing interface within the target module; the layout display page is used to display the position of the timing path corresponding to the interface to be displayed within the target module, the position of the timing path corresponding to the worst-case timing interface within other modules to which the worst-case timing interface belongs, and path description information of the displayed timing path; the worst-case timing interface is a timing interface connected to the interface to be displayed that has the worst-case timing margin.

[0199] Based on the same inventive concept, this embodiment provides an electronic device, see [link to relevant documentation]. Figure 10 As shown, it includes a processor 1 and a memory 2. Wherein: Processor 1 is used to execute one or more programs stored in memory 2 to implement the display method of the above interface.

[0200] It is understandable that processor 1 can be a processor core or processor chip, or other circuitry capable of configuring and running programs. Memory 2 can be RAM (Random Access Memory), ROM (Read-Only Memory), flash memory, etc., but this is not a limitation.

[0201] It's understandable. Figure 10 The structure shown is for illustrative purposes only; the electronic device may also include components that are more advanced than those shown. Figure 10 The more or fewer components shown, or having the same Figure 10 Different configurations are shown. For example, it may also have an internal communication bus 3 for communication between processor 1 and memory 2; or it may have an external communication interface, such as a USB (Universal Serial Bus) interface, a CAN (Controller Area Network) bus interface, etc.; or it may have an information display component such as a display screen, but this is not a limitation.

[0202] This application provides a storage medium storing computer-executable instructions, which are configured to execute the display method of the above-described interface.

[0203] This application provides a computer program product, which includes a computer program that, when executed by a main control processor, implements the above-described interface display method.

[0204] The technical solutions of this application embodiment can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes one or more instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in this application embodiment. The aforementioned storage medium can be a non-transitory storage medium, including various media capable of storing program code such as USB flash drives, portable hard drives, read-only memory, random access memory, magnetic disks, or optical disks, or it can be a transient storage medium.

[0205] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed.

[0206] In the embodiments provided in this application, it should be understood that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of the embodiments of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data used can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. Unless otherwise stated, the term "a plurality of" means two or more. The term "and / or" describes an association between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or A and B. The term "corresponding" can refer to an association or binding relationship; A corresponding to B means that there is an association or binding relationship between A and B.

[0207] The above descriptions are merely embodiments of this application and are not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application. Furthermore, the above embodiments can be combined with each other to form new embodiments without conflict.

Claims

1. A method for displaying an interface, characterized in that, include: In response to the first trigger operation on the interface display interface, the layout display page corresponding to the interface to be displayed indicated by the first trigger operation is displayed; Wherein: the interface display interface is used to display the timing interface of the target module; The interface to be displayed is a timing interface in the target module; The layout display page is used to display the position of the timing path corresponding to the interface to be displayed in the target module, the position of the timing path corresponding to the worst timing interface in the first reference module, and the path description information of the timing path to be displayed; the worst timing interface is the timing interface with the worst timing margin connected to the interface to be displayed; the first reference module is the module to which the worst timing interface belongs.

2. The method according to claim 1, characterized in that, The map display page includes: a first module frame, a first path point set within the first module frame, a first fixed module set within the first module frame, a first annotation, a second module frame, a second path point set within the second module frame, a second fixed module set within the second module frame, and a second annotation; Wherein: the first path point is the path point passed through in the timing path corresponding to the interface to be displayed, and each of the first path points is displayed in the first module box according to its position in the target module; the first fixed module is used to represent the module that cannot be moved within the target module, and each of the first fixed modules is displayed in the first module box according to its position in the target module; the first annotation is path description information describing the timing path corresponding to the interface to be displayed. The second path point is the path point traversed in the timing path corresponding to the worst timing interface, and each second path point is displayed in the second module box according to its position in the first reference module; the second fixed module is used to represent the module that cannot be moved within the first reference module, and each second fixed module is displayed in the second module box according to its position in the first reference module; the second annotation is the path description information describing the timing path corresponding to the worst timing interface.

3. The method according to claim 2, characterized in that, The map display page includes: a first subpage and a second subpage; The first subpage displays the first module frame, the first path point, the first fixed module, and the first annotation; The second subpage displays the second module frame, the second path point, the second fixed module, and the second annotation.

4. The method according to claim 1, characterized in that, The map display page includes: a fifth module box, a third module box and a fourth module box set within the fifth module box, a first path point set within the third module box, a first fixed module set within the third module box, a second path point set within the fourth module box, a second fixed module set within the fourth module box, and a third annotation; Wherein: the third module box is displayed in the fifth module box according to the position of the target module in the parent module; the fourth module box is displayed in the fifth module box according to the position of the first reference module in the parent module; The first path point is the path point passed through in the timing path corresponding to the interface to be displayed, and each of the first path points is displayed in the third module box according to its position in the target module; the first fixed module is used to represent the module that cannot be moved within the target module, and each of the first fixed modules is displayed in the third module box according to its position in the target module. The second path point is the path point traversed in the timing path corresponding to the worst timing interface, and each second path point is displayed in the fourth module box according to its position in the first reference module; the second fixed module is used to represent the module that cannot be moved within the first reference module, and each second fixed module is displayed in the fourth module box according to its position in the first reference module. The third annotation is a path description information describing the displayed timing path.

5. The method according to claim 1, characterized in that, The interface display interface is also used to display the connection between the timing interface of the target module and the timing interface of the second reference module; the second reference module is a module connected to the target module.

6. The method according to claim 5, characterized in that, The presentation of a timing interface as an output interface differs from that of a timing interface as an input interface.

7. The method according to claim 5, characterized in that, The interface display includes: a sixth module frame and seventh module frames distributed around the sixth module frame; the sixth module frame has all the timing interfaces of the target module; each seventh module frame has all the timing interfaces connected to the timing interfaces of the target module and belonging to the same second reference module; the timing interfaces of the sixth module frame are connected to the timing interfaces of the corresponding seventh module frames.

8. The method according to claim 7, characterized in that, Both the sixth module frame and the seventh module frame are rectangular; each of the seventh module frames is evenly distributed on opposite sides of the sixth module frame, and the timing interface in each of the seventh module frames is only located on the side closest to the sixth module frame.

9. The method according to any one of claims 1 to 8, characterized in that, The interface display also includes a search box and a signal list box; the method also includes: When a character is received in the search box, the interface name of the timing interface whose name contains the character is displayed in the signal list box; Upon receiving a second trigger operation on the interface name in the signal list box, the timing interface corresponding to the interface name indicated by the second trigger operation is displayed in the central area of ​​the interface display interface.

10. The method according to any one of claims 1 to 8, characterized in that, The interface display also includes a menu box; the method also includes: In response to a third trigger operation on the menu box, a timing path table is displayed; the timing path table describes the violation paths corresponding to each timing interface of the target module, and each row in the timing path table describes one violation path; the violation path is the timing path corresponding to the timing interface of the target module whose total timing margin is negative; the total timing margin is the sum of the timing margin of the first interface and the timing margin of the second interface; the first interface is the timing interface of the target module; the second interface is a timing interface connected to the timing interface of the target module.

11. The method according to claim 10, characterized in that, In response to a first trigger operation on the interface display interface, displaying the layout display page corresponding to the interface to be displayed indicated by the first trigger operation includes: in response to a first trigger operation on one row in the timing path table, displaying the layout display page corresponding to the timing interface of the target module in the row indicated by the first trigger operation.

12. The method according to any one of claims 1 to 8, characterized in that, Every preset time interval or in response to an update command, the latest timing report is obtained, and the path description information is updated according to the timing report; the timing report is used to describe the timing path corresponding to each timing interface.

13. The method according to any one of claims 1 to 8, characterized in that, Before the first trigger operation on the interface display interface, the method further includes: in response to the selection instruction, displaying the interface display interface corresponding to the target module indicated by the selection instruction.

14. An interface display device, characterized in that, include: The first display module, in response to a first trigger operation on the interface display interface, displays the layout display page corresponding to the interface to be displayed indicated by the first trigger operation; Wherein: the interface display interface is used to display the timing interface of the target module; The interface to be displayed is a timing interface in the target module; The layout display page is used to display the position of the timing path corresponding to the interface to be displayed in the target module, the position of the timing path corresponding to the worst timing interface in the first reference module, and the path description information of the timing path to be displayed; the worst timing interface is the timing interface with the worst timing margin connected to the interface to be displayed; the first reference module is the module to which the worst timing interface belongs.

15. A display device, characterized in that, It includes a processor and a memory, the memory storing computer-executable instructions that can be executed by the processor, the processor executing the computer-executable instructions to implement the method of demonstrating the interface according to any one of claims 1 to 13.

16. A storage medium, characterized in that, The storage medium stores computer-executable instructions, which, when invoked and executed by a processor, cause the processor to implement the method of displaying the interface as described in any one of claims 1 to 13.

17. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the method of displaying the interface as described in any one of claims 1 to 13.

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