Short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross validation and use method

Abstract

The invention discloses a short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross validation, and relates to the technical field of power equipment test and verification, and the platform comprises a unified power grid model library module which is used for constructing a standardized power grid model description format, achieving the conversion and consistency verification of a power grid model between RTDS and UREP platforms, and providing a unified power grid model database; the model library comprises a basic power grid model, a fault scene model, a special working condition model and a user-defined model; and the interface adaptation layer comprises a hardware adaptation module and a software adaptation module, the hardware adaptation module realizes proportional transformation and multi-level protection of voltage and current signals, and the software adaptation module supports conversion of various communication protocols, microsecond-level time synchronization and system state control. According to the method, through mutual verification of two different principle simulation platforms, namely RTDS and UREP, systematic errors possibly caused by a single platform are eliminated, and the reliability of a test result is remarkably improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power equipment testing and verification, in particular to a short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification and a use method thereof. BACKGROUND

[0002] With the rapid development of power systems towards complexity and intelligence, as the core equipment to ensure the rationality of protection configuration and the stability of operation of power systems, the performance reliability verification of short-circuit parameter measurement devices has become a key link of power grid safe operation. At present, the testing and verification methods for short-circuit parameter measurement devices mainly include three types, but they all have significant limitations:

[0003] Although it can reflect the performance of the device under real power grid environment, it is difficult to cover all short-circuit conditions (such as short-circuit scenes under extreme faults and complex topologies) due to the limitation of power grid operation state, and there is a safety risk of power grid accidents caused by misoperation in the testing process, with high testing cost and poor repeatability.

[0004] By building a small physical simulation system for testing, but its scale is limited, and it is difficult to reproduce the dynamic characteristics of large-scale complex power grids, and the cost of hardware model building is high, and the flexibility of working condition adjustment is low, which is difficult to meet the diversified testing needs.

[0005] If RTDS (Real Time Digital Simulator) or UREP (Universal Real-time Electromechanical Platform) and other platforms are used for simulation testing, although they have the advantages of flexible working condition configuration and relatively low cost, but limited by the algorithm principle and precision characteristics of a single simulator, the test results are easy to have systematic deviation, for example, RTDS has high precision in electromagnetic transient simulation, but it has limitations in long-time dynamic process simulation; UREP is suitable for electromechanical hybrid simulation, but it has insufficient precision in high-frequency transient process simulation.

[0006] In addition, the existing testing technologies generally have the problems of low standardization degree and insufficient automation level: the model format and interface protocol of different testing platforms are not unified, resulting in high complexity of the connection between the measurement device and the simulation system; the testing process relies on manual intervention, which not only is low in efficiency, but also is easy to introduce human error. For short-circuit parameter measurement which requires high precision and reliability, a single testing platform cannot fully verify the performance of the device under various conditions, and the test results of multiple platforms are difficult to effectively integrate and evaluate the reliability due to the lack of a unified comparative analysis system, which seriously restricts the performance verification quality of short-circuit parameter measurement devices. SUMMARY

[0007] In view of the above problems, the present application is proposed.

[0008] Therefore, the technical problem solved by the present application is that the existing test technology generally has the problems of low standardization degree and insufficient automation level: the model format and interface protocol of different test platforms are not unified, leading to high complexity of the docking of the measuring device and the simulation system and the dependence of the test process on manual intervention, which not only is low in efficiency, but also is prone to introduce human error.

[0009] To solve the above technical problems, the present application provides the following technical solutions: a short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification, comprising a unified power grid model library module for constructing a standardized power grid model description format, realizing conversion and consistency verification of the power grid model between the RTDS and UREP platforms, and the model library containing basic power grid models, fault scenario models, special working condition models and user-defined models.

[0010] An interface adaptation layer comprises a hardware adaptation module and a software adaptation module, the hardware adaptation module realizes proportional transformation and multi-stage protection of voltage and current signals, and the software adaptation module supports conversion of multiple communication protocols, microsecond-level time synchronization and system state control.

[0011] A cross verification test scheme module is used to generate test cases covering basic characteristics, fault characteristics, dynamic characteristics and special working conditions, and realize cross verification of the RTDS and UREP platforms through three-stage strategies of parallel verification, alternate verification and difference analysis.

[0012] An automatic test tool module realizes test process automation based on an event-driven model and a finite state machine, and generates multi-scenario test instances through a parameterized test mechanism.

[0013] A result evaluation and analysis module evaluates the test results from four dimensions of precision, consistency, stability and adaptability, generates a comprehensive performance grade through weighted scoring, and supports hierarchical storage and visual display of test data.

[0014] As a preferred scheme of the short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification, the standardized power grid model description format of the unified power grid model library module comprises a topological structure, a node set, a line set, a power supply set, a parameter set and a control logic.

[0015] Model conversion to the RTDS and UREP platforms is realized through mapping functions respectively, and the consistency index of the simulation results of the two platforms is calculated through a similarity measurement function.

[0016] As a preferred scheme of the short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification, the unified power grid model library module introduces a dynamic interpolation algorithm based on a Gaussian kernel function to process the time step difference of different platforms, and the interpolation result is determined by the sum of the product of each sampling point value and the corresponding weight coefficient, and the weight coefficient satisfies the sum of 1.

[0017] As a preferred scheme of the short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification, the software adaptation module includes a data conversion submodule, a protocol conversion submodule, a time synchronization submodule and a state control submodule.

[0018] The protocol conversion submodule supports IEC61850, ModBus, TCP / IP, serial communication and user-defined protocol.

[0019] The time synchronization submodule uses the Precision Time Protocol (PTP) to control the time difference between the RTDS and UREP system clocks to be less than 10us.

[0020] The state control submodule manages the initialization, running, pause, reset and shutdown states of the system based on a finite state machine.

[0021] As a preferred scheme of the short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification, the fault characteristic test set of the cross verification test scheme module covers single-phase ground fault, two-phase ground fault, three-phase ground fault, phase-to-phase short circuit fault and phase-to-ground fault.

[0022] The dynamic characteristic test set includes load change test, power source change test, topology change test and parameter change test.

[0023] The special working condition test set includes harmonic environment test, unbalanced working condition test, weak system test and noise interference test.

[0024] As a preferred scheme of the short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification, the test case of the cross verification test scheme module is defined as a six-tuple containing unique identification, description, precondition, execution step, expected result and evaluation index.

[0025] The difference analysis stage generates the final test result by dynamically adjusting the weight coefficient to weight the results of the two platforms.

[0026] As a preferred scheme of the short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification, in the parameterized test mechanism of the automation test tool module, the parameter variable set is defined as a plurality of parameter name and corresponding value set mapping pairs, and a plurality of test instances are generated from one basic use case through parameter combination.

[0027] The test execution engine based on the event-driven model comprises an event source, an event queue, an event processor and a test framework.

[0028] As a preferred scheme of the short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification, in the accuracy evaluation of the result evaluation and analysis module, the mean absolute error (MAE), the mean percentage error (MPE) and the determination coefficient (R 2 ) are used as indexes.

[0029] The consistency evaluation uses the correlation index (CRI), the consistency difference coefficient (CCD) and the average percentage consistency (CPA) as indexes.

[0030] The comprehensive performance level is divided into five levels of excellent (A), good (B), qualified (C), basically qualified (D) and unqualified (E), and the sum of the products of the standardized scores of each evaluation dimension and the corresponding weight coefficients is determined.

[0031] Another object of the present application is to provide a use method of the short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification, to construct a standardized power grid model description format, to realize model conversion and consistency verification between RTDS and UREP platforms, to contain basic power grids, fault scenes, special working conditions and user-defined models, to realize voltage and current signal proportional transformation and multi-level protection, to support multi-communication protocol conversion, microsecond-level time synchronization and system state control, to generate test cases covering basic characteristics, fault characteristics, dynamic characteristics and special working conditions, to complete RTDS and UREP platform cross verification through three-stage strategies of parallel verification, alternate verification and difference analysis, to realize test process automation based on the event-driven model and the finite state machine, to generate multiple scene test instances through the parameterized test mechanism, and to evaluate the test results from the dimensions of accuracy, consistency, stability and adaptability, to generate a comprehensive performance level through weighted scoring, and to support hierarchical storage and visual display of test data.

[0032] Another object of the present application is to provide a short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification, which can verify each other through two different principle simulation platforms of RTDS and UREP, solve the systematic errors possibly caused by a single platform, and significantly improve the reliability of test results.

[0033] A computer device comprises a memory and a processor, the memory stores a computer program, and the processor executes the computer program to implement the steps of an RTDS and UREP cross-verification-based short-circuit parameter measurement semi-physical simulation platform.

[0034] A computer-readable storage medium stores a computer program, and the computer program, when executed by a processor, implements the steps of an RTDS and UREP cross-verification-based short-circuit parameter measurement semi-physical simulation platform.

[0035] The RTDS and UREP cross-verification-based short-circuit parameter measurement semi-physical simulation platform provided by the present application eliminates systematic errors that may be caused by a single platform through mutual verification of two different principle simulation platforms, significantly improves the reliability of test results, and achieves a consistency of more than 98%; a unified power grid model library and data exchange standard are designed to realize model consistency on different simulation platforms, with an average model parameter error controlled within 0.6%, providing a reliable foundation for cross-verification; a standardized hardware interface adaptation module and software protocol conversion mechanism are developed to realize seamless connection of the measurement device with different simulation platforms, reduce integration complexity, and achieve an interface response time of less than 5ms; a special test scheme for short-circuit parameter measurement is proposed to design a comprehensive test system covering static accuracy, dynamic response, fault characteristics and environmental adaptability, with a test coverage rate improved to 92%; a performance evaluation system based on multi-dimensional indexes is established to comprehensively consider four dimensions of accuracy, consistency, stability and adaptability, forming a scientific and objective device performance evaluation method; test process automation is realized, an event-driven test engine and parameterized test mechanism are developed, the test efficiency is improved by 4.2 times, and the test time is shortened from 2 weeks to 3 days. BRIEF DESCRIPTION OF DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0037] Figure 1 The overall flowchart of an RTDS and UREP cross-verification-based short-circuit parameter measurement semi-physical simulation platform and use method provided for the first embodiment of the present application.

[0038] Figure 2 The specific flowchart of an RTDS and UREP cross-verification-based short-circuit parameter measurement semi-physical simulation platform and use method provided for the second embodiment of the present application. DETAILED DESCRIPTION

[0039] In order to make the above objectives, characteristics and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the protection scope of the present application.

[0040] Embodiment 1, refer to Figure 1 For an embodiment of the present application, a short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross-validation is provided, comprising:

[0041] A unified power grid model library module is used to construct a standardized power grid model description format, realize the conversion and consistency verification of the power grid model between the RTDS and UREP platforms, and the model library contains basic power grid models, fault scenario models, special working condition models and user-defined models.

[0042] Furthermore, the standardized power grid model description format contains topology structure, node set, line set, power supply set, parameter set and control logic; the model conversion to the RTDS and UREP platforms is realized by mapping functions respectively, and the consistency index of the simulation results of the two platforms is calculated by a similarity measurement function; a dynamic interpolation algorithm based on Gaussian kernel function is introduced to process the time step difference of different platforms, wherein the interpolation result is determined by the sum of the product of each sampling point value and the corresponding weight coefficient, and the weight coefficient satisfies the sum of 1.

[0043] It should be noted that the basic power grid model covers the substation, transmission line and distribution network topology of typical voltage levels of 10kV-500kV, the fault scenario model presets 12 types of typical fault parameter templates such as single-phase grounding and two-phase short circuit, the special working condition model contains boundary condition configurations such as harmonic distortion rate 0-30% and load fluctuation range ±20%, and the user-defined model supports extension by importing SVG format topology graph and Excel parameter table through a graphical interface.

[0044] The interface adaptation layer includes a hardware adaptation module and a software adaptation module, the hardware adaptation module realizes the proportional transformation and multi-stage protection of voltage and current signals, and the software adaptation module supports multiple communication protocol conversion, microsecond-level time synchronization and system state control.

[0045] Further, the software adaptation module includes a data conversion submodule, a protocol conversion submodule, a time synchronization submodule, and a state control submodule; the protocol conversion submodule supports IEC61850, ModBus, TCP / IP, serial communication, and a user-defined protocol; the time synchronization submodule uses a precision time protocol (PTP) to control the time difference between the RTDS and the UREP system clock to be less than 10 μs; and the state control submodule manages the initialization, running, pausing, resetting, and closing states of the system based on a finite state machine.

[0046] It should be noted that the hardware adaptation module uses 0.1% precision voltage and current transformers to realize signal conditioning, and has built-in overvoltage, overcurrent, and surge protection circuits; the protocol conversion delay of the software adaptation module is ≤5 ms, and the time synchronization module supports cross-platform clock calibration through GPS and Beidou dual-mode time service.

[0047] The cross-validation test scheme module is used to generate test cases covering basic characteristics, fault characteristics, dynamic characteristics, and special working conditions, and to realize cross-validation of the RTDS and UREP platforms through a three-stage strategy of parallel verification, alternating verification, and difference analysis.

[0048] Further, the fault characteristic test set covers single-phase ground fault, two-phase ground fault, three-phase ground fault, phase-to-phase short circuit fault, and phase-to-ground fault; the dynamic characteristic test set includes load change test, power source change test, topology change test, and parameter change test; the special working condition test set includes harmonic environment test, unbalanced working condition test, weak system test, and noise interference test; the test case is defined as a six-tuple including a unique identifier, a description, a precondition, an execution step, an expected result, and an evaluation index; and the difference analysis stage performs weighted calculation on the results of the two platforms by dynamically adjusting the weight coefficient.

[0049] It should be noted that the basic characteristic test set contains 10 groups of steady-state parameter tests of different short-circuit currents and short-circuit voltages; the parallel verification stage uses a double-platform synchronous triggering mechanism with a data sampling interval ≤10 μs; and the alternating verification stage realizes platform role exchange by switching the master-slave control mode, and ensures system stability by standing still for 30 s after each switch.

[0050] The automatic test tool module realizes test process automation based on an event-driven model and a finite state machine, and generates multiple scenario test instances through a parameterized test mechanism.

[0051] Further, in the parameterized test mechanism, the parameter variable set is defined as a mapping pair of multiple parameter names and corresponding value sets, and multiple test instances are generated from a basic test case through parameter combination; the test execution engine based on the event-driven model includes an event source, an event queue, an event processor, and a test framework.

[0052] It should be noted that the parameterized test supports the combination configuration of 8 types of key parameters such as short circuit type, fault location, transition resistance, fault duration, and a single basic use case can generate up to 256 test instances; the event-driven model response time is ≤100ms, and the priority processing of abnormal events such as test interruption and emergency stop is supported.

[0053] The result evaluation and analysis module evaluates the test results from four dimensions of accuracy, consistency, stability and adaptability, generates a comprehensive performance grade through weighted scoring, and supports hierarchical storage and visual display of test data.

[0054] Further, the accuracy evaluation adopts mean absolute error (MAE), mean percentage error (MPE) and determination coefficient (R 2 ) as indexes; the consistency evaluation adopts correlation index (CRI), consistency difference coefficient (CCD) and average percentage consistency (CPA) as indexes; the comprehensive performance grade is divided into five levels of excellent (A), good (B), qualified (C), basically qualified (D) and unqualified (E), and is determined based on the product sum of the standardized scores of each evaluation dimension and the corresponding weight coefficients.

[0055] It should be noted that the data storage adopts a three-level architecture: the raw data (sampling rate 1MHz) is saved for 30 days, the processed data (sampling rate 1kHz) is saved for 1 year, and the result data is permanently archived; the visual display supports 12 types of charts such as time series comparison chart, error distribution histogram and performance radar chart, and can export test reports in PDF and Excel formats.

[0056] Embodiment 2 is a second embodiment of the application, which is different from the previous embodiment in that the system framework can be represented as:

[0057] S sys ={M grid ,P sim ,I adap ,D uut ,C test ,A data} (1)

[0058] Wherein, M grid is the power grid model layer, P sim is the simulation platform layer, I adap is the interface adaptation layer, D uut is the device under test layer, C test is the test management layer, and A data is the data analysis layer.

[0059] The core of the system is two sets of real-time simulators based on different principles:

[0060] Psim = {RTDS, UREP} (2)

[0061] Wherein, RTDS is based on electromagnetic transient simulation principle, with high precision, high sampling rate characteristics, suitable for simulating fast transient process; UREP is based on electromagnetic-mechanical hybrid simulation principle, taking into account the electromagnetic transient and power steady-state process, suitable for long time dynamic simulation.

[0062] The difference between the two simulation platform parameters:

[0063] CF = {SM, CT, SF, PR, IM} (3)

[0064] Wherein, SM is the solution method, CT is the calculation type, SF is the simulation frequency, PR is the precision range, M is the interface mode. These differences make the two platforms complementary, forming the basis for cross-validation.

[0065] Platform working mode design for three kinds:

[0066] WM = {M single ,M parallel ,M cross} (4)

[0067] Wherein, M single is a single platform test mode, suitable for preliminary verification; M parallel is a parallel test mode, the same test is performed on two platforms; M cross is a cross-validation mode, two platforms alternate test and verify the results.

[0068] Unified grid model library design

[0069] To ensure the effectiveness of cross-validation, consistent grid model needs to be implemented on two simulation platforms. First, define the standardized grid model description format:

[0070] M std = {T, N, L, S, P, C} (5)

[0071] Wherein, T is the topology structure, N is the node set, L is the line set, S is the power supply set, P is the parameter set, C is the control logic.

[0072] Based on the unified description, the standard model conversion mechanism is established:

[0073] M RTDS = f R (M std ) (6)

[0074] M UREP = f U (M std) (7)

[0075] where f R and f U are mapping functions for converting to RTDS and UREP models, respectively.

[0076] Model consistency verification is based on electrical characteristics comparison:

[0077]

[0078] where R i and U i are simulation results of the i-th test point on RTDS and UREP platforms, respectively, sim(·,·) is a similarity measure function, and n is the number of comparison points.

[0079] The model library contains typical distribution network structures and special test scenarios:

[0080] M lib = {M basic , M fault , M special , M custom} (9)

[0081] where M basic is the basic grid model, M fault is the fault scenario model, M special is the special working condition model, and M custom is the user-defined model.

[0082] To cope with the time step differences of different simulation platforms, a dynamic interpolation algorithm is introduced:

[0083]

[0084] where x(t) is the interpolation result at any time t, x(t i ) is the sample point value, w i is the weight coefficient, and satisfies The weight coefficient is calculated based on the time distance:

[0085]

[0086] where K(·) is the kernel function, and the Gaussian kernel function is adopted:

[0087]

[0088] In the formula, σ is the bandwidth parameter, which controls the smoothing degree.

[0089] Standardized interface adaptation design

[0090] The interface adaptation layer serves as a bridge connecting the simulation platform and the device under test, comprising both hardware and software adaptation components. The hardware adaptation layer structure is as follows:

[0091] I hw ={PS,AI,AO,DI,DO,SU,PU} (13)

[0092] Among them, PS is the power adapter unit, AI and AO are analog input / output interfaces, DI and DO are digital input / output interfaces, SU is the signal conditioning unit, and PU is the protection unit.

[0093] The signal conditioning unit performs proportional conversion of voltage and current signals.

[0094] V out =k v ·V sim +b v (14)

[0095] I out =k i ·I sim +b i (15)

[0096] Among them, V sim and I sim V is the simulation value. out and I out For the output value, k v k i b v b i These are the conversion parameters.

[0097] The protection unit design employs a multi-level protection strategy:

[0098] P level ={P soft ,P hard ,P emer} (16)

[0099] Among them, P soft As a software protection layer, P hard As a hardware protection layer, P emer Emergency disconnection protection. Protection trigger conditions:

[0100] Trigger = (|V|>V) th )∨(|I|>I th )∨(t>t max (17)

[0101] Among them, V th I th and t maxVoltage, current threshold and maximum allowed time, respectively.

[0102] The software adaptation layer is designed as a modular structure:

[0103] I sw = {DC, PC, TC, SC} (18)

[0104] Where DC is the data conversion module, PC is the protocol conversion module, TC is the time synchronization module, and SC is the state control module.

[0105] The data conversion module realizes the unification of different data formats:

[0106] D std = T d (D source , Format target ) (19)

[0107] Where D std is the standard format data, D source is the source data, T d is the conversion function, and Format target is the target format specification.

[0108] The protocol conversion module supports multiple communication protocols:

[0109] ProtocolSet = {IEC61850, ModBus, TCP / IP, Serial, Custom} (20)

[0110] The time synchronization module uses the Precision Time Protocol (PTP) to achieve microsecond-level synchronization:

[0111] Δt = |t RTDS -t UREP | < 10 μs (21)

[0112] Where t RTDS and t UREP are the RTDS and UREP system clocks, respectively.

[0113] The state control module manages the system running state, including initialization, running, pause, reset and shutdown five states. The state transition follows the Finite State Machine (FSM) model:

[0114] S next = FSM (S current , Event) (22)

[0115] Where S current is the current state, Event is the trigger event, and S next is the next state.

[0116] A special signal processing module is designed for the special requirements of short-circuit parameter measurement:

[0117] SC sig = f sc (V, I, t fault ) (23)

[0118] where SC sig is the short-circuit signal, V and I are the voltage and current signals respectively, t fault is the fault time, and f sc (·) is the short-circuit signal generation function.

[0119] Cross-validation test scheme design

[0120] Cross-validation is the core innovation of this patent. By mutual verification of two different simulation platforms, the reliability of test results is improved. The cross-validation test scheme design is as follows:

[0121] TS cross = {C basic , C fault , C dyn , C spec} (24)

[0122] where C basic is the basic characteristic test set, C fault is the fault characteristic test set, C dyn is the dynamic characteristic test set, and C spec is the special working condition test set.

[0123] The basic characteristic test includes static accuracy, dynamic response, and stability test:

[0124] C basic = {TC accuracy , TC response , TC stability} (25)

[0125] The fault characteristic test covers different types of short-circuit faults:

[0126] C fault = {TC spg , TC dpg , TC tpg , TC ll , TC llg} (26)

[0127] where TC spg is single-phase ground fault, TC dpg is two-phase ground fault, TC tpg is three-phase ground fault, and TCll TC for phase-to-phase short circuit fault llg TC for phase-to-ground fault

[0128] Dynamic performance test focuses on performance under system state change:

[0129] C dyn = {TC load , TC source , TC topo , TC param} (27)

[0130] Where TC load is load change test, TC source is power change test, TC topo is topology change test, TC param is parameter change test.

[0131] Special condition test targets at irregular working conditions:

[0132] C spec = {TC harm , TC asym , TC weak , TC noise} (28)

[0133] Where TC harm is harmonic environment test, TC asym is unbalanced condition test, TC weak is weak system test, TC noise is noise interference test.

[0134] Cross-validation execution strategy adopts three-stage design:

[0135] Parallel validation stage: two platforms execute same test cases simultaneously, compare result consistency

[0136] CV1 = Parallel (RTDS, UREP, TC i ) (29)

[0137] Alternating validation stage: two platforms alternate as main test platform and validation platform

[0138] CV2 = Alternate (RTDS→UREP, UREP→RTDS, TC i ) (30)

[0139] Difference analysis stage: analyze two-platform result difference, determine final result

[0140] Result = Analysis (R RTDS , RUREP W)(31)

[0141] where R RTDS and R UREP are the test results of RTDS and UREP platforms respectively, and W is the weight coefficient. The weight coefficient is dynamically adjusted based on platform features and test types:

[0142] W = f w (TestType, PlatformFeature)(32)

[0143] The test case is defined as a six-tuple:

[0144] TC = {ID, Desc, Precond, Steps, ExpRes, Metric} (33)

[0145] where ID is the unique identifier, Desc is the description, Precond is the precondition, Steps is the execution steps, ExpRes is the expected result, and Metric is the evaluation index.

[0146] Automatic Test Tool Development

[0147] The automatic test tool is the key to improve test efficiency and reliability. The test tool architecture is:

[0148] TA = {TM, SS, TR, TCM, DR, UI} (34)

[0149] where TM is the test management module, SS is the scene setting module, TR is the test running module, TCM is the test case management module, DR is the data recording module, and UI is the user interface module.

[0150] The test execution engine is based on the event-driven model:

[0151] TE = {ES, EQ, EH, TF} (35)

[0152] where ES is the event source, EQ is the event queue, EH is the event handler, and TF is the test framework.

[0153] The automatic test flow control is based on the finite state machine:

[0154] State next = δ(State current , Input) (36)

[0155] where δ is the state transition function, which defines the execution logic of the test flow.

[0156] To adapt to complex test scenarios, a parameterized test mechanism is designed:

[0157] TC' = Parameterize(TC, PV) (37)

[0158] Where TC is the base test case, PV is the parameter variable set, and TC' is the parameterized test case set. The parameter variable is defined as:

[0159] PV = {(p1, V1), (p2, V2),..., (p n , V n )} (38)

[0160] Where p i is the parameter name, and V i is the value set. Through parameter combination, multiple test instances can be generated from one base case.

[0161] Efficiency evaluation of automated test execution:

[0162]

[0163] Where N tc is the number of test cases, T manual is the average time for manual execution of a single case, T auto is the total automatic execution time, and T prep is the preparation time.

[0164] Measurement result evaluation system

[0165] Measurement result evaluation is a key step to verify the performance of short-circuit parameter measurement devices. The evaluation system includes four dimensions: precision evaluation, consistency evaluation, stability evaluation, and adaptability evaluation.

[0166] ES = {E acc , E cons , E stab , E adap} (40)

[0167] The precision evaluation uses multiple indicators:

[0168] E acc = {MAE, MAPE, RMSE, R 2} (41)

[0169] The calculation formulas are as follows:

[0170]

[0171] Where y i is the theoretical value, is the measured value, is the average value of the theoretical value.

[0172] Consistency assessment employs inter-platform result comparison:

[0173] E cons = {CRI, CCD, CPA} (46)

[0174] where CRI is the correlation index, CCD is the coefficient of consistency difference, and CPA is the average percentage consistency. The calculation formula is:

[0175]

[0176] where R i and U i are the test results on RTDS and UREP platforms, respectively.

[0177] Stability assessment focuses on the repeatability and consistency of results:

[0178] E stab = {CV, SR, TR} (50)

[0179] where CV is the coefficient of variation, SR is the success rate, and TR is the time reliability. The calculation formula is:

[0180]

[0181] where σ and μ are the standard deviation and mean value of the measurement results, respectively, N success is the number of successful measurements, N time is the number of times completed within the time requirement, and N total is the total number of tests.

[0182] Adaptability assessment investigates performance under different conditions:

[0183] E adap = {PSI, CSI, NSI} (54)

[0184] where PSI is the parameter sensitivity index, CSI is the condition adaptability index, and NSI is the noise sensitivity index. The calculation formula is:

[0185]

[0186] where Δy j and Δp j are the changes in output and parameters, respectively, MAE l is the average absolute error under a specific condition, MAE base is the error under the reference condition, MAE noise and MAE clean are the errors under noisy and noiseless environments, respectively.

[0187] The comprehensive evaluation model adopts a weighted scoring method:

[0188]

[0189] where w i is the weight coefficient, S i is the standardized score of each dimension. According to the scoring results, the performance of the device under test is divided into five levels: excellent (A), good (B), qualified (C), basically qualified (D), and unqualified (E).

[0190] Test data management and analysis

[0191] Test data management is the basis for ensuring the traceability of the test process and the reproducibility of the results. The data management architecture is:

[0192] DM = {DS, DP, DA, DV, DR} (59)

[0193] where DS is the data storage module, DP is the data processing module, DA is the data analysis module, DV is the data visualization module, and DR is the data reporting module.

[0194] The data storage adopts a hierarchical structure:

[0195] DS = {Raw, Processed, Results, Reports} (60)

[0196] Each data record contains metadata:

[0197] Metadata = {TS, TC, Platform, Config, User, Status} (61)

[0198] where TS is the timestamp, TC is the test case ID, Platform is the test platform information, Config is the configuration information, User is the operator, and Status is the test status.

[0199] The data processing process includes preprocessing, feature extraction, and result calculation:

[0200] D processed = Process(D raw , Method) (62)

[0201] where D raw is the original data, D processed is the processed data, and Method is the processing method.

[0202] Feature extraction targets short-circuit parameters, including:

[0203] Features={I sc ,Z sc ,S sc ,t resp ,Recovery} (63)

[0204] where I sc is short-circuit current, Z sc is short-circuit impedance, S sc is short-circuit capacity, t resp is response time, and Recovery is recovery characteristic.

[0205] Data analysis employs statistical analysis and difference comparison methods:

[0206] Analysis={Stats,Compare,Trend,Anomaly} (64)

[0207] Visualization employs various charts:

[0208] Visualization={TimeSeries,Scatter,Bar,Radar,Heatmap} (65)

[0209] The automated report generation system generates standardized reports according to preset templates:

[0210] Report=Generate(Data,Template,Format)(66)

[0211] Supports various report formats: PDF, Word, HTML, and Excel, etc.

[0212] Embodiment 3, which is different from the previous embodiment, is a third embodiment of the present application:

[0213] S1: Construct a standardized power grid model description format to realize model conversion and consistency verification between RTDS and UREP platforms, including basic power grid, fault scenarios, special working conditions, and user-defined models;

[0214] S2: Realize voltage and current signal proportional transformation and multi-level protection, support multi-communication protocol conversion, microsecond-level time synchronization, and system state control;

[0215] S3: Generate test cases covering basic characteristics, fault characteristics, dynamic characteristics, and special working conditions, complete cross-validation of RTDS and UREP platforms through three-stage strategies of parallel verification, alternating verification, and difference analysis;

[0216] S4: Based on the event-driven model and the finite state machine, test flow automation is realized, and multiple scene test instances are generated through a parameterized test mechanism;

[0217] S5: From the dimensions of precision, consistency, stability and adaptability, the test results are evaluated, a comprehensive performance level is generated through weighted scoring, and hierarchical storage and visual display of test data are supported.

[0218] If the functions are realized in the form of software function units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the parts that contribute to the prior art or parts of the technical solutions can be embodied in the form of a software product, which is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, and various media that can store program codes.

[0219] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered a list of executable instructions for implementing logical functions, and can be specifically embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus or device, such as a computer-based system, a system including a processor or other system that can fetch instructions from an instruction execution system, apparatus or device and execute them, or in conjunction with these instructions execution systems, apparatus or devices. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transport programs for instruction execution systems, apparatus or devices or in conjunction with these instruction execution systems, apparatus or devices.

[0220] More specific examples (non-exhaustive list) of computer-readable medium include the following: electrical connections having one or more wires (electronic devices), portable computer disks (magnetic devices), random access memories (RAM), read-only memories (ROM), erasable programmable read-only memories (EPROM or flash memories), fiber optic devices, and portable compact disc read-only memories (CDROMs). In addition, the computer-readable medium can even be paper or other suitable medium on which the program can be printed, as the program can be electronically obtained, for example, by optical scanning of the paper or other medium, followed by editing, interpretation or processing as necessary, and then stored in a computer memory if necessary. Other suitable media can also be used.

[0221] It should be understood that portions of the application can be implemented in hardware, software, firmware, or combinations thereof. In the embodiments described above, the various steps or methods can be implemented, in part, or in whole, by software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, and in another embodiment, any forms of hardware, or combinations of hardware and software, can be used, such as: discrete logic circuitry having logic gates for implementing logic functions upon data signals, application specific integrated circuits having appropriate combinational logic gates, programmable gate arrays (PGA), field programmable gate arrays (FPGA), and so forth.

[0222] Example 4, which is a fourth embodiment of the present application, provides a system of RTDS, UREP cross-validation based short-circuit parameter measurement semi-physical simulation platform, including that the semi-physical simulation platform has been applied in the short-circuit parameter measurement device verification of a certain power company. The test system is configured as follows:

[0223] RTDS system: RTDS Novacor platform, containing 4 racks, 24 processing cards, supporting 500 node scale power grid simulation, the minimum time step is 2μs.

[0224] UREP system: UREP-5000 platform, based on multi-core DSP architecture, supporting 1000 node power grid simulation, time step adjustable from 50μs to 200μs.

[0225] Test target: A newly developed portable short-circuit parameter measurement device, which needs to be fully verified for its measurement accuracy, response characteristics and environmental adaptability.

[0226] First, build an IEEE-33 node distribution network test model, and implement consistency verification on the two platforms:

[0227] Table 1: Consistency verification results of power grid model

[0228]

[0229] The results show that the models on the two platforms have high consistency, providing a reliable foundation for cross-validation. Next, cross-validation tests are performed, a total of 56 test cases are designed, covering various working conditions. Part of the test results are as follows:

[0230] Table 2: Comparison of basic short-circuit parameter measurement accuracy test results

[0231]

[0232] Test results under dynamic conditions and special environments:

[0233] Table 3: Short-circuit parameter measurement adaptability test under dynamic conditions

[0234]

[0235]

[0236] Short transient response characteristic test:

[0237] Table 4: Short-circuit transient response characteristic test results

[0238]

[0239] Based on the cross-validation results of the two platforms, the performance of the measured device is comprehensively evaluated:

[0240] Table 5: Comprehensive performance evaluation results

[0241]

[0242]

[0243] The test results show that the overall performance of the measured short-circuit parameter measurement device reaches a good (B+) level, with high measurement accuracy and stability, but there is still room for improvement in complex environment adaptability. Especially in the harmonic environment, the measurement accuracy decreases significantly, which needs to be further optimized. Through cross-validation of the two platforms, systematic errors caused by a single platform are eliminated, and the reliability of the test results is improved.

[0244] Advantage analysis of cross-validation method

[0245] Through actual application verification, the cross-validation method based on RTDS / UREP has the following advantages:

[0246] 1) Systematic error identification and elimination ability

[0247] By comparing the test results of the two platforms, the platform-related systematic error can be identified and quantified:

[0248]

[0249] Where ε sys is the systematic error, R platform is the platform test result, and R theory is the theoretical value.

[0250] In the case analysis, the RTDS platform has a systematic error of -0.93% in measuring short-circuit current, while the UREP platform has an error of -0.47%. Through cross-validation, this systematic error can be identified and compensated.

[0251] 2) Test result reliability improvement

[0252] Cross-validation significantly improves the reliability of test results, which can be quantified by consistency index:

[0253]

[0254] In case analysis, the consistency index of test results from two platforms averages 0.995, indicating that the test results are highly reliable. When two platforms with different principles produce similar results, the reliability of the results is greatly enhanced.

[0255] 3) Test coverage expansion

[0256] RTDS and UREP platforms have their own advantages: RTDS performs better in high-frequency transient simulation, while UREP has more advantages in long-time dynamic simulation. Cross-validation takes full advantage of the complementarity of the two platforms to expand the test coverage. The test coverage rate is improved to:

[0257] Coverage gain = Coverage cross -max(Coverage RTDS ,Coverage UREP ) (69)

[0258] In case applications, the coverage of cross-validation is improved by more than 15%.

[0259] 4) Test efficiency optimization

[0260] The automated cross-validation process optimizes test efficiency, saving a lot of manpower and time. The efficiency improvement calculation is:

[0261]

[0262] Cases show that the cross-validation method shortens the test time by about 70% and reduces the need for manual intervention.

[0263] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and not to limit it. Although the present application has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solutions of the present application can be modified or replaced by equivalents without departing from the spirit and scope of the present application, which should be covered by the scope of the claims of the present application.

Claims

1. A short-circuit parameter measurement semi-physical simulation platform based on RTDS, UREP cross-validation, characterized in that, The application relates to a unified power grid model library module, an interface adaptation layer, a cross-validation test scheme module and an automatic test tool module. The unified power grid model library module is used for constructing a standardized power grid model description format, realizing conversion and consistency verification of power grid models between RTDS and UREP platforms, and containing basic power grid models, fault scene models, special working condition models and user-defined models. The interface adaptation layer comprises a hardware adaptation module and a software adaptation module. The hardware adaptation module realizes proportional transformation and multi-stage protection of voltage and current signals. The software adaptation module supports conversion of multiple communication protocols, microsecond-level time synchronization and system state control. The cross-validation test scheme module is used for generating test cases covering basic characteristics, fault characteristics, dynamic characteristics and special working conditions, and realizing cross-validation of the RTDS and UREP platforms through three-stage strategies of parallel verification, alternate verification and difference analysis.

2. The RTDS, UREP cross-validated short circuit parameter measurement semi-physical simulation platform of claim 1, wherein: The automatic test tool module realizes test process automation based on an event-driven model and a finite state machine, and generates multiple-scene test instances through a parameterized test mechanism. The result evaluation and analysis module evaluates test results from four dimensions of precision, consistency, stability and adaptability, generates a comprehensive performance grade through weighted scoring, and supports hierarchical storage and visual display of test data.

3. The RTDS, UREP cross-validated short circuit parameter measurement semi-physical simulation platform of claim 2, wherein: The standardized power grid model description format of the unified power grid model library module comprises a topological structure, a node set, a line set, a power supply set, a parameter set and control logic.

4. The RTDS, UREP cross-validated short circuit parameter measurement hardware-in-the-loop simulation platform of claim 3, wherein: Model conversion to the RTDS and UREP platforms is realized through mapping functions, and the consistency index of simulation results of the two platforms is calculated through a similarity measurement function. The unified power grid model library module introduces a dynamic interpolation algorithm based on a Gaussian kernel function to process time step differences of different platforms, wherein an interpolation result is determined by the sum of products of each sampling point value and a corresponding weight coefficient, and the weight coefficient satisfies a total sum of 1. The software adaptation module comprises a data conversion submodule, a protocol conversion submodule, a time synchronization submodule and a state control submodule. The protocol conversion submodule supports IEC61850, ModBus, TCP / IP, serial communication and user-defined protocols.

5. The RTDS, UREP cross-validated short circuit parameter measurement hardware-in-the-loop simulation platform of claim 4, wherein: The time synchronization submodule controls the time difference of RTDS and UREP system clocks to be less than 10 mu s through a precise time protocol. The state control submodule manages initialization, running, pausing, resetting and closing states of the system based on a finite state machine. The fault characteristic test set of the cross-validation test scheme module covers single-phase ground fault, two-phase ground fault, three-phase ground fault, phase-to-phase short circuit fault and phase-to-ground fault.

6. The RTDS, UREP cross-validated short circuit parameter measurement semi-physical simulation platform of claim 5, wherein: The dynamic characteristic test set comprises load change test, power supply change test, topological change test and parameter change test. The special working condition test set comprises harmonic environment test, unbalanced working condition test, weak system test and noise interference test. The test case of the cross-validation test scheme module is defined as a six-tuple containing a unique identifier, a description, a precondition, an execution step, an expected result and an evaluation index. The difference analysis stage generates final test results through weighted calculation of the results of the two platforms by dynamically adjusting weight coefficients.

7. The RTDS, UREP cross-validated short circuit parameter measurement semi-physical simulation platform of claim 6, wherein: In the parameterized test mechanism of the automatic test tool module, the parameter variable set is defined as a mapping pair of a plurality of parameter names and corresponding value sets, and a plurality of test instances are generated from a basic use case through parameter combination; The test execution engine based on the event-driven model includes an event source, an event queue, an event processor, and a test framework; The accuracy evaluation of the result evaluation and analysis module uses mean absolute error, mean percentage error, and determination coefficient as indicators; The consistency evaluation uses correlation index, consistency difference coefficient, and average percentage consistency as indicators; The comprehensive performance level is divided into five levels: excellent, good, qualified, basically qualified, and unqualified, and the sum of the products of the standardized scores of each evaluation dimension and the corresponding weight coefficients determines the comprehensive performance level.

8. A method for using the short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification according to any one of claims 1-7, characterized in that: A standardized power grid model description format is constructed to realize model conversion and consistency verification between RTDS and UREP platforms, including basic power grid, fault scenario, special working condition, and user-defined model. Voltage and current signal proportional transformation and multi-level protection are realized, and multiple communication protocol conversion, microsecond-level time synchronization, and system state control are supported. Test cases covering basic characteristics, fault characteristics, dynamic characteristics, and special working conditions are generated, and cross verification of RTDS and UREP platforms is completed through three-stage strategies of parallel verification, alternating verification, and difference analysis. Test flow automation is realized based on the event-driven model and finite state machine, and multiple scenario test instances are generated through the parameterized test mechanism. The test results are evaluated from the dimensions of precision, consistency, stability, and adaptability, and the comprehensive performance level is generated by weighted scoring, supporting hierarchical storage and visual display of test data. 9.A computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the computer device is configured to perform the method according to any one of claims 1-8 when the computer program is executed by the processor. The processor executes the computer program to realize the steps of the short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification in any one of claims 1 to 7.

10. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to realize the steps of the short-circuit parameter measurement semi-physical simulation platform based on RTDS and UREP cross verification in any one of claims 1 to 7.

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