Display panel and display device

Abstract

The invention provides a display panel and a display device. The display panel comprises a plurality of pixels, a plurality of scanning signal lines and a plurality of data signal lines. The pixel electrodes of the pixels receive a driving voltage through the driving circuit, and the plurality of pixels include a first pixel. The scanning signal line extends in the first direction and participates in controlling the on-off state of the driving circuit. The data signal line extends in the second direction and provides an electric signal required for generating the driving voltage to the driving circuit. Wherein the first signal line is electrically connected with the driving circuit corresponding to the first pixel, and the first signal line is not overlapped with the pixel electrode corresponding to the first pixel; and / or, the second signal line is electrically connected with the driving circuit corresponding to the first pixel, and the second signal line is not overlapped with the pixel electrode corresponding to the first pixel. The fluctuation of the data signal on the first signal line and the fluctuation of the scanning signal on the second signal line are difficult to influence the voltage on the first pixel electrode, so that the risk that the voltage of the first pixel electrode is influenced by coupling is reduced.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a display panel and display device. Background Technology

[0002] In the manufacturing process of existing display panels, a common design involves overlapping some transistors, some signal lines, and other circuit structures with the pixel electrodes. This design can easily lead to feedthrough voltage between the pixel electrodes and the overlapping circuit structures, affecting the voltage stability of the pixel electrodes.

[0003] To mitigate the impact of the aforementioned feedthrough voltage, existing technologies commonly involve moving the pixel electrodes above the transistors and some signal lines. This reduces the overlap area between the pixel electrodes and transistors and positions the signal lines between adjacent pixel electrodes, thereby improving the voltage stability of the pixel electrodes. However, to improve signal transmission efficiency and charging rate, existing designs often feature relatively large signal line widths and transistor sizes. In such panel designs, the effect of adjusting the signal lines and pixel electrodes to reduce feedthrough voltage is relatively weak. Furthermore, in these panel designs, considering the limited voltage range transmitted by the chip to some constant-potential signal lines, the effect of using the voltage on these constant-potential signal lines to reduce feedthrough voltage is also poor, resulting in a weak improvement in the voltage stability of the pixel electrodes. Summary of the Invention

[0004] This application provides a display panel and display device to help solve the problem of feedthrough voltage affecting the voltage stability of pixel electrodes.

[0005] In view of this, this application provides a display panel including multiple pixels, multiple scan signal lines and multiple data signal lines.

[0006] A pixel includes a pixel electrode, which receives a driving voltage through a driving circuit, and a first pixel is included among multiple pixels.

[0007] The scanning signal line extends along the first direction and participates in controlling the opening and closing state of the drive circuit.

[0008] The data signal line extends along the second direction and provides the electrical signal required to generate the drive voltage to the drive circuit, and the first direction intersects the second direction.

[0009] Among the multiple data signal lines, there is a first signal line. The first signal line is electrically connected to the driving circuit corresponding to the first pixel, and the first signal line does not overlap with the pixel electrode corresponding to the first pixel. And / or, the multiple scan signal lines include a second signal line, the second signal line is electrically connected to the driving circuit corresponding to the first pixel, and the second signal line does not overlap with the pixel electrode corresponding to the first pixel.

[0010] Based on the same inventive concept, this application also provides a display device, including the above-mentioned display panel.

[0011] Compared with the prior art, the display panel and display device provided by the present invention achieve at least the following beneficial effects: In this configuration, the first signal line does not overlap with the first pixel electrode and / or the second signal line does not overlap with the first pixel electrode. Therefore, fluctuations in the data signal on the first signal line and the scanning signal on the second signal line are unlikely to affect the voltage on the first pixel electrode. This design helps to reduce the risk of the voltage of the first pixel electrode being affected by coupling and is conducive to further improving the voltage stability of the first pixel electrode. Attached Figure Description

[0012] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 A schematic diagram of a partial structure of a display panel provided in this application; Figure 2 This is an equivalent circuit diagram showing the connection relationships between pixel electrodes, driving circuits, and multiple signal lines included in the display panel. Figure 3 A schematic diagram of a partial structure of a display panel provided in this application; Figure 4 A schematic diagram of a partial structure of a display panel provided in this application; Figure 5 A schematic diagram of a partial structure of a display panel provided in this application; Figure 6 for Figure 5 The diagram shows the voltage fluctuations of some pixel electrodes in the display panel. Figure 7 A schematic diagram of a partial structure of a display panel provided in this application; Figure 8 This is a schematic diagram of a partial structure of a display panel provided in this application. Detailed Implementation

[0014] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0015] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0016] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0017] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0018] In existing technologies, designs where pixel electrodes overlap with transistors, signal lines, and other circuit structures are common. However, when pixel electrodes overlap with a portion of the circuit structure, coupling capacitance can easily form between that portion of the circuit structure and the pixel circuit. If signal fluctuations occur in the circuit structure, the voltage on the pixel electrode can easily be interfered with due to coupling, which is detrimental to the voltage stability of the pixel electrode. For example, if the pixel electrode overlaps with the gate of a transistor, when the gate voltage changes to control the switching state of the transistor, the voltage of the pixel electrode can easily change with the gate voltage due to the influence of the coupling capacitance, causing voltage fluctuations in the pixel electrode (this phenomenon can be called feedthrough voltage effect), thereby affecting the display effect.

[0019] To mitigate the aforementioned feedthrough voltage effect, existing designs typically adjust the relative positions of pixel electrodes, transistors, and signal lines to reduce the coupling capacitance corresponding to the pixel electrodes. For example, existing designs often remove or move the portion of the pixel electrode overlapping with the transistor to another area, and place some signal lines between adjacent pixel electrodes to reduce the overlap area between the pixel electrode and the transistor / signal lines, thereby reducing the feedthrough voltage caused by coupling.

[0020] However, for display panels characterized by large transistor sizes and wide signal lines, the space for device placement is limited. In such cases, the aforementioned method of adjusting the relative positions of devices is relatively difficult to implement and unlikely to improve pixel electrode voltage stability. Furthermore, considering the limited voltage range that the chip can provide to certain constant-potential signal lines (such as the common electrode voltage line, whose transmitted voltage can be called Vcom voltage), the method of using constant-potential signal lines to shield crosstalk and reduce feedthrough voltage is also unlikely to significantly improve pixel electrode voltage stability.

[0021] Figure 1 This is a schematic diagram of a partial structure of a display panel provided in this application. Figure 2 This is an equivalent circuit diagram showing the connection relationships between pixel electrodes, driving circuits, and multiple signal lines included in the display panel.

[0022] To address the aforementioned problems, this application provides a display panel 10, combined with... Figure 1 and Figure 2 The display panel 10 includes multiple pixels 01, which can be arranged in an array along a first direction X and a second direction Y, with the first direction X intersecting the second direction Y. Each pixel 01 includes a pixel electrode 011, which receives a driving voltage through a driving circuit 02. It is important to note that the pixel electrodes 011 and the driving circuit 02 can be electrically connected in a one-to-one correspondence. The driving circuit 02 can transmit a driving voltage to the pixel electrodes 011. Upon receiving the driving voltage, the pixel electrodes 011 can generate a control electric field. This control electric field can change the contact angle of a droplet (not shown in the figure) in the display panel 10, thereby controlling the movement of the droplet and achieving display.

[0023] The driving circuit 02 may include a driving transistor 021, which can generate a driving voltage and transmit the driving voltage to the pixel electrode 011.

[0024] The plurality of pixels 01 include a first pixel 01a. The pixel electrode 011 included in the first pixel 01a can be called the first pixel electrode 11a, and the driving circuit 02 corresponding to the first pixel 01a can be called the first driving circuit 02a.

[0025] The display panel 10 may include a plurality of pixel rows 1 extending along a first direction X and arranged along a second direction Y, wherein the pixel rows 1 may include a plurality of pixels 01 arranged along the first direction X. Accordingly, the pixel electrodes 011 corresponding to the plurality of pixels 01 in the same pixel row 1 may also be arranged along the first direction X.

[0026] The display panel 10 also includes multiple scan signal lines 03, which extend along a first direction X and participate in controlling the on / off state of the driving circuit 02. The scan signal lines 03 can be electrically connected to the control terminals of the driving transistors 021 in the driving circuit 02, so the scan signals transmitted by the scan signal lines 03 can control the on / off state of the driving transistors 021. It should be noted that one scan signal line 03 can be electrically connected to the control terminals of multiple driving transistors 021 corresponding to the same pixel row 1, and multiple scan signal lines 03 can each correspond one-to-one with multiple pixel rows 1.

[0027] During the display of one frame, multiple scan signal lines 03 can sequentially provide scan signals to pixel row 1 along the second direction Y. For example, for a first scan line 03a and a second scan line 03b that are adjacent along the second direction Y, during the display of one frame, the first scan line 03a transmits its scan signal to its corresponding pixel row 1 at a time earlier than the second scan line 03b transmits its scan signal to its corresponding pixel row 1.

[0028] The display panel 10 may include a plurality of pixel columns 2 extending along the second direction Y and arranged along the first direction X. Each pixel column 2 may include a plurality of pixels 01 arranged along the second direction Y. Correspondingly, the pixel electrodes 011 corresponding to the plurality of pixels 01 in the same pixel column 2 may also be arranged along the second direction Y.

[0029] The display panel 10 also includes multiple data signal lines 04, which extend along the second direction Y and provide electrical signals (hereinafter referred to as data signals) required to generate the driving voltage to the driving circuit 02. The data signal lines 04 can be electrically connected to the input terminals of the driving circuit 02, thus transmitting data signals to the input terminals of the driving transistors 021. It should be noted that one data signal line 04 can be electrically connected to the input terminals of multiple driving transistors 021 corresponding to the same pixel column 2, and multiple data signal lines 04 can correspond one-to-one with multiple pixel columns 2.

[0030] In one possible implementation, such as Figure 1As shown, the multiple data signal lines 04 include a first signal line 041. The first signal line 041 is electrically connected to the driving circuit 02 (first driving circuit 02a) corresponding to the first pixel 01a, and the first signal line 041 does not overlap with the pixel electrode 011 (first pixel electrode 11a) corresponding to the first pixel 01a. In this configuration, since the first signal line 041 and the first pixel electrode 11a do not overlap, the coupling effect between the first signal line 041 and the first pixel electrode 11a is weak. When the data signal transmitted by the first signal line 041 experiences voltage fluctuations, the risk of the voltage of the first pixel electrode 11a changing due to data signal fluctuations is small, which is beneficial to improving the voltage stability of the first pixel electrode 11a.

[0031] Figure 3 This is a schematic diagram of a partial structure of a display panel provided in this application.

[0032] In one possible implementation, such as Figure 3 As shown, the multiple scanning signal lines 03 include a second signal line 031. The second signal line 031 is electrically connected to the driving circuit 02 (first driving circuit 02a) corresponding to the first pixel 01a, and the second signal line 031 does not overlap with the pixel electrode 011 (first pixel electrode 11a) corresponding to the first pixel 01a. In this configuration, since the second signal line 031 and the first pixel electrode 11a do not overlap, the coupling effect between the second signal line 031 and the first pixel electrode 11a is weak. When the data signal transmitted by the second signal line 031 experiences voltage fluctuations, the risk of the voltage of the first pixel electrode 11a changing due to data signal fluctuations is small, which is beneficial to improving the voltage stability of the first pixel electrode 11a.

[0033] Figure 4 This is a schematic diagram of a partial structure of a display panel provided in this application.

[0034] In one possible implementation, such as Figure 4 As shown, the first signal line 041 does not overlap with the pixel electrode 011 (first pixel electrode 11a) corresponding to the first pixel 01a, and the second signal line 031 does not overlap with the pixel electrode 011 (first pixel electrode 11a) corresponding to the first pixel 01a. In this configuration, since neither the first signal line 041 nor the second signal line 031 overlaps with the first pixel electrode 11a, fluctuations in the data signal on the first signal line 041 nor fluctuations in the scan signal on the second signal line 031 are likely to affect the voltage on the first pixel electrode 11a. This design helps to further reduce the risk of the voltage of the first pixel electrode 11a being affected by coupling, and is beneficial to further improving the voltage stability of the first pixel electrode 11a.

[0035] In one embodiment of this application, combined with Figure 1 and Figure 4 The multiple data signal lines 04 include a first signal line 041, which is electrically connected to the driving circuit 02 (first driving circuit 02a) corresponding to the first pixel 01a, and the first signal line 041 does not overlap with the pixel electrode 011 (first pixel electrode 11a) corresponding to the first pixel 01a.

[0036] The display panel 10 also includes pixel row 1 and pixel column 2.

[0037] Pixel row 1 includes a plurality of pixels 01 arranged along the first direction X. Among the plurality of pixel rows 1, there are a first pixel row 101 and a second pixel row 102, which are arranged along the second direction Y.

[0038] Pixel column 2 includes multiple pixels 01 arranged along the second direction Y. The multiple pixel columns 2 include a first pixel column 201 and a second pixel column 202, which are arranged along the first direction X.

[0039] The plurality of pixels 01 also includes a second pixel 01b. Both the first pixel 01a and the second pixel 01b are located in the first pixel row 101 and in the second pixel column 202 and the first pixel column 201, respectively. That is, the first pixel 01a and the second pixel 01b can be located in the same pixel row 1 and can be located in different pixel columns 2.

[0040] The first signal line 041 overlaps with the pixel electrode (second pixel electrode 11b) corresponding to the second pixel 01b.

[0041] In this embodiment, the first signal line 041 overlaps with the second pixel electrode 11b, which means that in the actual manufacturing process, the first signal line 041 can be moved from the original area where the first pixel 01a is located to the area where the second pixel 01b is located, thereby eliminating the influence of the data signal fluctuation of the first signal line 041 on the voltage stability of the first pixel electrode 11a.

[0042] Figure 5 This is a schematic diagram of a partial structure of a display panel provided in this application.

[0043] In one embodiment of this application, such as Figure 5 As shown, the first pixel 01a and the second pixel 01b are adjacent in the first direction X.

[0044] In this embodiment, when the first signal line 041 is shifted to the area where the second pixel 01b is located, an additional connecting wire m is required to establish an electrical connection between the first pixel electrode 11a (via the first driving circuit 02a) and the first signal line 041. The greater the distance between the first pixel 01a and the second pixel 01b, the longer the connecting wire m needs to be, and the higher the wiring difficulty becomes. Therefore, this embodiment sets the first pixel 01a and the second pixel 01b to be adjacent, thereby shifting the first signal line 041 from the area where the first pixel 01a is located to the area where the second pixel 01b is located, minimizing the required length of the connecting wire m, which helps to reduce wiring difficulty and save costs.

[0045] In one embodiment of this application, combined with Figure 3 and Figure 4 The multiple scanning signal lines 03 include a second signal line 031. The second signal line 031 is electrically connected to the driving circuit 02 (first driving circuit 02a) corresponding to the first pixel 01a, and the second signal line 031 does not overlap with the pixel electrode 011 (first pixel electrode 11a) corresponding to the first pixel 01a.

[0046] The display panel 10 also includes pixel row 1 and pixel column 2.

[0047] Pixel row 1 includes a plurality of pixels 01 arranged along the first direction X. Among the plurality of pixel rows 1, there are a first pixel row 101 and a second pixel row 102, which are arranged along the second direction Y.

[0048] Pixel column 2 includes multiple pixels 01 arranged along the second direction Y. The multiple pixel columns 2 include a first pixel column 201 and a second pixel column 202, which are arranged along the first direction X.

[0049] The plurality of pixels 01 also includes a third pixel 01c. Both the first pixel 01a and the third pixel 01c are located in the second pixel column 202 and in the first pixel row 101 and the second pixel row 102, respectively. That is, the first pixel 01a and the third pixel 01c can be located in the same pixel column 2 and can be located in different pixel rows 1.

[0050] Among them, the second signal line 031 overlaps with the pixel electrode (third pixel electrode 11c) corresponding to the third pixel 01c.

[0051] In this embodiment, the second signal line 031 overlaps with the third pixel electrode 11c, which means that in the actual fabrication process, the second signal line 031 can be moved from the area where the first pixel row 101 is located to the area where the second pixel row 102 is located, thereby eliminating the influence of the data signal fluctuation of the second signal line 031 on the voltage stability of the first pixel electrode 11a.

[0052] In one embodiment of this application, such as Figure 5 As shown, the first pixel 01a and the third pixel 01c are adjacent in the second direction Y.

[0053] In this embodiment, when the second signal line 031 is shifted to the area where the second pixel row 102 is located, considering that the first driving circuit 02a needs to be electrically connected to the second signal line 031, an additional connecting line is required to achieve the electrical connection between the first driving circuit 02a, the second signal line 031, and the first pixel electrode 11a. The greater the distance between the first pixel 01a and the second pixel 01b, the longer the connecting line needs to be, and the wiring difficulty increases accordingly. Therefore, this embodiment sets the first pixel 01a and the third pixel 01c to be adjacent, thereby shifting the first signal line 041 from the area where the first pixel row 101 is located to the area where the closer second pixel row 102 is located, minimizing the required length of the additional connecting line, which helps to reduce wiring difficulty and save costs.

[0054] In one embodiment of this application, during the display of a frame, the driving circuit 02 corresponding to the first pixel 01a receives the electrical signal transmitted by the scanning signal line 03 before the driving circuit 02 corresponding to the third pixel 01c.

[0055] In this embodiment, when the second signal line 031 is shifted to the region where the second pixel row 102 is located, a coupling capacitor can be formed between the second signal line 031 and the pixel electrode 011 (such as the third pixel electrode 11c) in the second pixel row 102. However, considering that the first driving circuit 02a receives the scan signal before the third driving circuit 02c (i.e., multiple scan signal lines 03 can transmit the scan signal in a "line-by-line scanning" manner), the scan signal fluctuation on the second signal line 031 can cancel out the driving voltage fluctuation on the third pixel electrode 11c, thereby further reducing the impact of coupling crosstalk on the potential stability of the third pixel electrode 11c. Specifically, during the display panel 10 displaying a frame, when the scan signal transmitted from the second signal line 031 to the first driving circuit 02a changes from an enable signal to a disable signal, the first driving circuit 02a changes from an on state to an off state, and the first driving circuit 02a stops transmitting driving voltage to the first pixel electrode 11a. At this time, the pixel 01 corresponding to the first pixel row 101 stops displaying. During this period, since the second signal line 031 and the third pixel electrode 11c can overlap, the scan signal fluctuation on the second signal line 031 can have a coupling effect on the voltage of the third pixel electrode 11c (this coupling effect can be called scan coupling fluctuation). Meanwhile, since multiple scanning signal lines 03 can be scanned "line by line" along the second direction Y, when the electrical signal transmitted by the second signal line 031 changes from an enable signal to a de-enable signal, the third driving circuit 02c begins to receive the enable signal transmitted by the third signal line 032 and begins to output a driving voltage to the third pixel electrode 11c. As a result, the voltage on the third pixel electrode 11c fluctuates (which can be called driving voltage fluctuation). This driving voltage fluctuation can offset the effects of the scanning coupling fluctuation mentioned above, thereby helping to ensure good voltage stability of the third pixel electrode 11c.

[0056] Figure 6 for Figure 5 The diagram shows voltage fluctuations in some pixel electrodes on the display panel for ease of understanding. Figure 6 The image shows the voltage fluctuation (solid line) corresponding to the first pixel electrode (11a') in the existing design, and also demonstrates the voltage fluctuation when using... Figure 5 The voltage fluctuation of the first pixel electrode (11a) (thin dashed line) and the voltage fluctuation of the third pixel electrode (11c) (thick dashed line) after the design are shown.

[0057] like Figure 6 As shown, compared with the existing design, the voltage fluctuation amplitude on the first pixel electrode 11a is improved after adopting the design of this application, and the voltage fluctuation amplitude on the third pixel electrode 11c is significantly reduced.

[0058] In one embodiment of this application, such as Figure 5 As shown, the driving circuit 02 also includes a driving transistor 021. The first end of the driving transistor 021 is electrically connected to the data signal line 04, the second end of the driving transistor 021 is electrically connected to the pixel electrode 011, and the control end of the driving transistor 021 is electrically connected to the scan signal line 03.

[0059] In this configuration, the pixel electrode 011 (first pixel electrode 11a) of the first pixel 01a does not overlap with the first transistor 21a. The first transistor 21a is the driving transistor 021 corresponding to the first pixel 01a. When the scan signal transmitted by the second signal line 031 is an enable signal, the first transistor 21a turns on and outputs a driving voltage to the first pixel electrode 11a. During this period, the gate potential of the first transistor 21a may change. If there is an overlap between the gate of the pixel electrode 011 and the gate of the first transistor 21a, the change in gate potential can easily affect the voltage magnitude of the pixel electrode 011.

[0060] In this embodiment, by setting the first transistor 21a and the first pixel electrode 11a to not overlap, it helps to avoid the influence of the gate potential change of the first transistor 21a on the voltage of the first pixel electrode 11a, which is beneficial to further improve the voltage stability of the first pixel electrode 11a.

[0061] Figure 7 This is a schematic diagram of a partial structure of a display panel provided in this application.

[0062] In one embodiment of this application, such as Figure 7 As shown, the display panel 10 also includes pixel row 1 and pixel column 2.

[0063] Pixel row 1 includes multiple pixels 01 arranged along the first direction X. Among the multiple pixel rows 1, there are a first pixel row 101 and a second pixel row 102. The first pixel row 101 and the second pixel row 102 are arranged adjacent to each other along the second direction Y.

[0064] Pixel column 2 includes multiple pixels 01 arranged along the second direction Y. The multiple pixel columns 2 include a first pixel column 201 and a second pixel column 202, which are arranged adjacent to each other along the first direction X.

[0065] The plurality of pixels 01 also includes a fourth pixel 01d, which is located in the second pixel row 102 and in the first pixel column 201, and the first pixel 01a is located in the first pixel row 101 and in the second pixel column 202.

[0066] The first transistor 21a overlaps with the pixel electrode 011 of the fourth pixel 01d.

[0067] In this embodiment, considering that changes in the gate potential of the driving transistor 021 can easily affect the voltage of the pixel electrode 011, placing the first transistor 21a outside the region where the first pixel 01a is located can prevent changes in the gate potential of the first transistor 21a from interfering with the voltage of the first pixel electrode 11a. Furthermore, since the relative spacing between the first pixel 01a and the fourth pixel 01d is small, placing the first transistor 21a in the region where the fourth pixel 01d is located helps to minimize the length of the additional connecting wire required to electrically connect the first transistor 21a and the first pixel electrode 11a, thus reducing wiring complexity and saving costs.

[0068] In one embodiment of this application, combined with Figure 2 and Figure 7 The multiple data signal lines 04 include a first signal line 041, which is electrically connected to the driving circuit 02 (first driving circuit 02a) corresponding to the first pixel 01a.

[0069] The multiple scanning signal lines 03 include a second signal line 031, which is electrically connected to the driving circuit 02 corresponding to the first pixel 01a.

[0070] The first signal line 041 and the second signal line 031 overlap with the pixel electrode 011 of the fourth pixel 01d, and the orthographic projection of the first signal line 041 on the substrate 05 and the orthographic projection of the second signal line 031 on the substrate 05 intersect in the first region S1. The orthographic projection of the first transistor 21a on the substrate 05 is located in the first region S1.

[0071] In this embodiment, since the first transistor 21a needs to be electrically connected to the first signal line 041 and the second signal line 031 respectively, to simplify the device layout, the distance between the orthographic projection of the first transistor 21a on the substrate 05 and the orthographic projections corresponding to the first signal line 041 and the second signal line 031 should not be too large. Therefore, by placing the first transistor 21a in the first region S1, this embodiment helps to minimize the distance between the first transistor 21a and the first signal line 041 and the second signal line 031, and reduce the wiring difficulty, while avoiding the voltage of the first pixel electrode 11a being affected by the gate voltage changes of the first signal line 041, the second signal line 031, and the first transistor 21a.

[0072] Figure 8 This is a schematic diagram of a partial structure of a display panel provided in this application.

[0073] In one embodiment of this application, such as Figure 8As shown, the electric field generated by the pixel electrode 011 is used to adjust the contact angle corresponding to the display droplet n. After receiving the driving voltage, the pixel electrode 011 can generate a control electric field, which can act on the display droplet n in the channel layer 06, change the contact angle between the display droplet n and the hydrophobic layer 07, and thus realize the display function.

[0074] This application provides a display device, which includes the aforementioned display panel 10. The display device can be a mobile phone, or it can also be an electronic device such as a computer or television.

[0075] The voltage stability corresponding to the pixel electrode 011 in the display device provided in this application embodiment has been effectively improved.

[0076] The same or similar parts between the various embodiments in this specification can be referred to mutually. In particular, the device embodiments and terminal embodiments are basically similar to the method embodiments, so the description is relatively simple, and the relevant parts can be referred to the description in the method embodiments.

Claims

1. A display panel, characterized in that, include: Multiple pixels, including pixel electrodes, wherein the pixel electrodes receive a driving voltage via a driving circuit; The plurality of pixels includes the first pixel; Multiple scanning signal lines extend along a first direction and participate in controlling the opening and closing state of the driving circuit; Multiple data signal lines extend along a second direction and provide the driving circuit with the electrical signals required to generate the driving voltage. The first direction intersects with the second direction; Among the multiple data signal lines, there is a first signal line, which is electrically connected to the driving circuit corresponding to the first pixel, and the first signal line does not overlap with the pixel electrode corresponding to the first pixel. And / or, the plurality of scanning signal lines includes a second signal line, the second signal line being electrically connected to the driving circuit corresponding to the first pixel, and the second signal line not overlapping with the pixel electrode corresponding to the first pixel.

2. The display panel according to claim 1, characterized in that, The plurality of data signal lines include a first signal line, which is electrically connected to the driving circuit corresponding to the first pixel, and the first signal line does not overlap with the pixel electrode corresponding to the first pixel. The display panel also includes pixel rows and pixel columns; The pixel row includes a plurality of pixels arranged along a first direction; the plurality of pixel rows include a first pixel row and a second pixel row, the first pixel row and the second pixel row being arranged along the second direction; The pixel column includes a plurality of pixels arranged along the second direction; the plurality of pixel columns include a first pixel column and a second pixel column, the first pixel column and the second pixel column being arranged along the first direction; The plurality of pixels also includes a second pixel, wherein the first pixel and the second pixel are both located in the first pixel row and respectively in the second pixel column and the first pixel column; The first signal line overlaps with the pixel electrode corresponding to the second pixel.

3. The display panel according to claim 2, characterized in that, The first pixel and the second pixel are adjacent in the first direction.

4. The display panel according to claim 1, characterized in that, The plurality of scanning signal lines include a second signal line, which is electrically connected to the driving circuit corresponding to the first pixel, and the second signal line does not overlap with the pixel electrode corresponding to the first pixel; The display panel also includes pixel rows and pixel columns; The pixel row includes a plurality of pixels arranged along a first direction; the plurality of pixel rows include a first pixel row and a second pixel row, the first pixel row and the second pixel row being arranged along the second direction; The pixel column includes a plurality of pixels arranged along the second direction; the plurality of pixel columns include a first pixel column and a second pixel column, the first pixel column and the second pixel column being arranged along the first direction; The plurality of pixels also includes a third pixel, wherein the first pixel and the third pixel are both located in the second pixel column and respectively in the first pixel row and the second pixel row; The second signal line overlaps with the pixel electrode corresponding to the third pixel.

5. The display panel according to claim 4, characterized in that, The first pixel and the third pixel are adjacent in the second direction.

6. The display panel according to claim 5, characterized in that, During the display of a frame, the driving circuit corresponding to the first pixel receives the electrical signal transmitted by the scan signal line before the driving circuit corresponding to the third pixel.

7. The display panel according to claim 1, characterized in that, The driving circuit further includes a driving transistor, the first terminal of which is electrically connected to the data signal line, the second terminal of which is electrically connected to the pixel electrode, and the control terminal of which is electrically connected to the scan signal line. Wherein, the pixel electrode of the first pixel does not overlap with the first transistor, and the first transistor is the driving transistor corresponding to the first pixel.

8. The display panel according to claim 7, characterized in that, The display panel also includes pixel rows and pixel columns; The pixel row includes a plurality of pixels arranged along the first direction; the plurality of pixel rows include a first pixel row and a second pixel row, wherein the first pixel row and the second pixel row are arranged adjacent to each other along the second direction; The pixel column includes a plurality of pixels arranged along the second direction; the plurality of pixel columns include a first pixel column and a second pixel column, the first pixel column and the second pixel column being arranged adjacent to each other along the first direction; The plurality of pixels also includes a fourth pixel, which is located in the second pixel row and in the first pixel column, and the first pixel is located in the first pixel row and in the second pixel column; The first transistor overlaps with the pixel electrode of the fourth pixel.

9. The display panel according to claim 8, characterized in that, The plurality of data signal lines include a first signal line, which is electrically connected to the driving circuit corresponding to the first pixel. The plurality of scanning signal lines includes a second signal line, which is electrically connected to the driving circuit corresponding to the first pixel; The first signal line and the second signal line overlap with the pixel electrode of the fourth pixel, and the orthographic projection of the first signal line on the substrate and the orthographic projection of the second signal line on the substrate intersect in the first region; the orthographic projection of the first transistor on the substrate is located in the first region.

10. The display panel according to claim 1, characterized in that, The electric field generated by the pixel electrode is used to adjust the contact angle corresponding to the display droplet.

11. A display device, characterized in that, Includes the display panel as described in any one of claims 1-10.

Images