Gamma reference voltage generator, source driver and display device

Abstract

The invention discloses a gamma reference voltage generator, a source driver and a display device. The gamma reference voltage generator comprises a voltage difference generation circuit, a selection voltage generation circuit and a voltage calculation circuit. The voltage difference generating circuit generates a first voltage difference and a second voltage difference. The selection voltage generation circuit generates an initial voltage and receives a power supply voltage. The selection voltage generation circuit selectively outputs the initial voltage or the power supply voltage as a selection voltage according to a voltage level of the power supply voltage. The voltage calculation circuit receives a selection voltage, a first voltage difference and a second voltage difference, the voltage calculation circuit correspondingly outputs a first gamma reference voltage and a second gamma reference voltage, the first gamma reference voltage is a sum value of the selection voltage and the first voltage difference, and the second gamma reference voltage is a difference value of the selection voltage and the second voltage difference. The circuit is simple in design, the circuit area can be reduced, and then the production cost and power consumption are reduced.

Description

Technical Field

[0001] This invention relates to a gamma reference voltage generator, and more particularly to a gamma reference voltage generator, a source driver, and a display device. Background Technology

[0002] Organic light-emitting diode (OLED) displays offer advantages such as wide viewing angles, high-speed response, thinness, and low power consumption. The voltage difference between the power supply voltage (e.g., ELVDD) applied to the display panel and the source output signal is proportional to the emission current generated by the OLED display. Therefore, this voltage difference needs to remain constant to avoid brightness deviations in the displayed image between multiple internal areas of the display panel. Summary of the Invention

[0003] The present invention aims to provide a gamma reference voltage generator, comprising a voltage difference generation circuit, a selection voltage generation circuit, and a voltage calculation circuit. The voltage difference generation circuit generates a first voltage difference and a second voltage difference. The selection voltage generation circuit generates an initial voltage and receives a power supply voltage, selectively outputting either the initial voltage or the power supply voltage as the selection voltage based on the voltage level of the power supply voltage. The voltage calculation circuit is coupled to the voltage difference generation circuit and the selection voltage generation circuit to receive the selection voltage, the first voltage difference, and the second voltage difference. The voltage calculation circuit outputs a first gamma reference voltage and a second gamma reference voltage, wherein the first gamma reference voltage is the sum of the selection voltage and the first voltage difference, and the second gamma reference voltage is the difference between the selection voltage and the second voltage difference.

[0004] In some embodiments, when the power supply voltage is at a low voltage level, the initial voltage output by the selection voltage generation circuit is used as the selection voltage. When the power supply voltage is at a high voltage level, the power supply voltage output by the selection voltage generation circuit is used as the selection voltage.

[0005] In some embodiments, the voltage calculation circuit includes an adder circuit and a subtractor circuit. The adder circuit receives a selected voltage and a first voltage difference and generates a first gamma reference voltage accordingly. The subtractor circuit receives a selected voltage and a second voltage difference and generates a second gamma reference voltage accordingly.

[0006] In some embodiments, the voltage difference generation circuit includes a first digital-to-analog converter (DAC), a first non-inverting amplifier, a second DAC, and a second non-inverting amplifier. The first DAC is used to convert a first digital code. The first non-inverting amplifier is coupled to the first DAC. The second DAC is used to convert a second digital code. The second non-inverting amplifier is coupled to the second DAC. The output signal of the first DAC is input to the first non-inverting amplifier, causing the first non-inverting amplifier to output a first voltage difference. The output signal of the second DAC is input to the second non-inverting amplifier, causing the second non-inverting amplifier to output a second voltage difference.

[0007] In some embodiments, the selected voltage generation circuit includes a third DAC and a buffer amplifier. The third DAC is used to convert a third digital code. The buffer amplifier is coupled to the third DAC. The output signal of the third DAC is input to the buffer amplifier, causing the buffer amplifier to output an initial voltage.

[0008] In some embodiments, the selected voltage generation circuit includes a 2-to-1 multiplexer. The 2-to-1 multiplexer receives an initial voltage and a power supply voltage and outputs a selected voltage accordingly based on a selection signal, wherein the selection signal represents whether the power supply voltage is at a high voltage level or a low voltage level.

[0009] The present invention aims to provide a source driver for a display device, comprising a gamma reference voltage generator, a gamma voltage generator, and a source signal generator. The gamma reference voltage generator generates a first gamma reference voltage and a second gamma reference voltage. The gamma voltage generator is coupled to the gamma reference voltage generator to receive the first gamma reference voltage and the second gamma reference voltage, and correspondingly generates a plurality of gamma voltages. The source signal generator is coupled to the gamma voltage generator to receive the plurality of gamma voltages, and correspondingly generates a plurality of source signals, wherein the plurality of source signals are respectively supplied to a plurality of pixels of the display device. The gamma reference voltage generator includes a voltage difference generation circuit, a selection voltage generation circuit, and a voltage calculation circuit. The voltage difference generation circuit generates a first voltage difference and a second voltage difference. The selection voltage generation circuit generates an initial voltage and receives a power supply voltage, and selectively outputs either the initial voltage or the power supply voltage as a selection voltage based on the voltage level of the power supply voltage. The voltage calculation circuit is coupled to the voltage difference generation circuit and the selection voltage generation circuit to receive the selection voltage, the first voltage difference, and the second voltage difference. The voltage calculation circuit outputs a first gamma reference voltage and a second gamma reference voltage, wherein the first gamma reference voltage is the sum of the selected voltage and the first voltage difference, and the second gamma reference voltage is the difference between the selected voltage and the second voltage difference.

[0010] In some embodiments, when the power supply voltage is at a low voltage level, the initial voltage output by the selection voltage generation circuit is used as the selection voltage. When the power supply voltage is at a high voltage level, the power supply voltage output by the selection voltage generation circuit is used as the selection voltage.

[0011] In some embodiments, the voltage calculation circuit includes an adder circuit and a subtractor circuit. The adder circuit receives a selected voltage and a first voltage difference and generates a first gamma reference voltage accordingly. The subtractor circuit receives a selected voltage and a second voltage difference and generates a second gamma reference voltage accordingly.

[0012] In some embodiments, the voltage difference generating circuit includes a first DAC, a first non-inverting amplifier, a second DAC, and a second non-inverting amplifier. The first DAC is used to convert a first digital code. The first non-inverting amplifier is coupled to the first DAC. The second DAC is used to convert a second digital code. The second non-inverting amplifier is coupled to the second DAC. The output signal of the first DAC is input to the first non-inverting amplifier, causing the first non-inverting amplifier to output a first voltage difference. The output signal of the second DAC is input to the second non-inverting amplifier, causing the second non-inverting amplifier to output a second voltage difference.

[0013] In some embodiments, the selected voltage generation circuit includes a third DAC and a buffer amplifier. The third DAC is used to convert a third digital code. The buffer amplifier is coupled to the third DAC. The output signal of the third DAC is input to the buffer amplifier, causing the buffer amplifier to output an initial voltage.

[0014] In some embodiments, the selected voltage generation circuit includes a 2-to-1 multiplexer. The 2-to-1 multiplexer receives an initial voltage and a power supply voltage and outputs a selected voltage accordingly based on a selection signal, wherein the selection signal represents whether the power supply voltage is at a high voltage level or a low voltage level.

[0015] The present invention aims to provide a display device comprising a pixel circuit, a scan driver, and a source driver. The pixel circuit includes multiple pixels for receiving multiple scan signals and multiple source signals. The scan driver supplies the multiple scan signals to the multiple pixels. The source driver supplies the multiple source signals to the multiple pixels. The source driver includes a gamma reference voltage generator, a gamma voltage generator, and a source signal generator. The gamma reference voltage generator generates a first gamma reference voltage and a second gamma reference voltage. The gamma voltage generator is coupled to the gamma reference voltage generator to receive the first gamma reference voltage and the second gamma reference voltage, and correspondingly generates multiple gamma voltages. The source signal generator is coupled to the gamma voltage generator to receive the multiple gamma voltages, and correspondingly generates the multiple source signals. The gamma reference voltage generator includes a voltage difference generation circuit, a selected voltage generation circuit, and a voltage calculation circuit. The voltage difference generation circuit generates a first voltage difference and a second voltage difference. The voltage selection circuit generates an initial voltage and receives the power supply voltage. Based on the voltage level of the power supply voltage, the selection circuit selectively outputs either the initial voltage or the power supply voltage as the selection voltage. A voltage calculation circuit is coupled to the voltage difference generation circuit and the selection voltage generation circuit to receive the selection voltage, a first voltage difference, and a second voltage difference. The voltage calculation circuit outputs a first gamma reference voltage and a second gamma reference voltage, where the first gamma reference voltage is the sum of the selection voltage and the first voltage difference, and the second gamma reference voltage is the difference between the selection voltage and the second voltage difference.

[0016] In some embodiments, when the power supply voltage is at a low voltage level, the initial voltage output by the selection voltage generation circuit is used as the selection voltage. When the power supply voltage is at a high voltage level, the power supply voltage output by the selection voltage generation circuit is used as the selection voltage.

[0017] In some embodiments, the voltage calculation circuit includes an adder circuit and a subtractor circuit. The adder circuit receives a selected voltage and a first voltage difference and generates a first gamma reference voltage accordingly. The subtractor circuit receives a selected voltage and a second voltage difference and generates a second gamma reference voltage accordingly.

[0018] In some embodiments, the voltage difference generating circuit includes a first DAC, a first non-inverting amplifier, a second DAC, and a second non-inverting amplifier. The first DAC is used to convert a first digital code. The first non-inverting amplifier is coupled to the first DAC. The second DAC is used to convert a second digital code. The second non-inverting amplifier is coupled to the second DAC. The output signal of the first DAC is input to the first non-inverting amplifier, causing the first non-inverting amplifier to output a first voltage difference. The output signal of the second DAC is input to the second non-inverting amplifier, causing the second non-inverting amplifier to output a second voltage difference.

[0019] In some embodiments, the selected voltage generation circuit includes a third DAC and a buffer amplifier. The third DAC is used to convert a third digital code. The buffer amplifier is coupled to the third DAC. The output signal of the third DAC is input to the buffer amplifier, causing the buffer amplifier to output an initial voltage.

[0020] In some embodiments, the selected voltage generation circuit includes a 2-to-1 multiplexer. The 2-to-1 multiplexer receives an initial voltage and a power supply voltage and outputs a selected voltage accordingly based on a selection signal, wherein the selection signal represents whether the power supply voltage is at a high voltage level or a low voltage level.

[0021] In some embodiments, the display device is an OLED display device.

[0022] In some embodiments, the display device is an active-matrix organic light-emitting diode (AMOLED) display device.

[0023] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0024] A better understanding of the invention can be obtained from the following detailed description taken in conjunction with the accompanying drawings. It should be noted that, according to industry standard practice, the features are not drawn to scale. In fact, the dimensions of the features can be arbitrarily increased or decreased for clarity of discussion.

[0025] Figure 1 This is a schematic diagram of a display device according to an embodiment of the present invention;

[0026] Figure 2 This is a block diagram of the source driver of a display device according to an embodiment of the present invention;

[0027] Figure 3 This is an exemplary schematic diagram of a gamma voltage generator according to an embodiment of the present invention;

[0028] Figure 4 This is a block diagram of a gamma reference voltage generator according to an embodiment of the present invention;

[0029] Figure 5 This is an exemplary schematic diagram of a gamma reference voltage generator according to an embodiment of the present invention;

[0030] Figure 6 This is a schematic diagram of an exemplary embodiment of a pixel.

[0031] [Symbol Explanation]

[0032] 10: Display device

[0033] 100: Source Driver

[0034] 110: Gamma reference voltage generator

[0035] 112: Voltage Difference Generation Circuit

[0036] 112a: First digital-to-analog converter

[0037] 112b: First non-inverting amplifier

[0038] 112c: Second Digital-to-Analog Converter

[0039] 112d: Second non-inverting amplifier

[0040] 114: Selecting the voltage generation circuit

[0041] 114a: Third Digital-to-Analog Converter

[0042] 114b: Buffer amplifier

[0043] 114c: 2-to-1 multiplexer

[0044] 116: Voltage Calculation Circuit

[0045] 116a: Adder circuit

[0046] 116b: Subtractor Circuit

[0047] 120: Gamma Voltage Generator

[0048] 130: Source signal generator

[0049] 200: Scan Driver

[0050] 300: Pixel Circuit

[0051] 400: Power Supply Unit

[0052] 500: Timing Controller

[0053] C: Storage capacitor

[0054] CTL1, CTL2: Control signals

[0055] D1: Organic Light Emitting Diode

[0056] DC1: First digital code

[0057] DC2: Second digital code

[0058] DC3: Third Digital Code

[0059] ELVDD, ELVSS: Power supply voltage

[0060] ELVDD_INT: Initial voltage

[0061] ELVDD_SEL: Select voltage

[0062] ELVDD_SEL+ΔV1: First Gamma Reference Voltage

[0063] ELVDD_SEL-ΔV2: Second Gamma Reference Voltage

[0064] EM: Light emission scanning signal

[0065] G1~GN,Gj: Scanning signals

[0066] I OLED Drive current

[0067] R: Resistance

[0068] S1~SM, Si: Source signal

[0069] SS: Selection Signal

[0070] SW1: Switching transistor

[0071] SW2: Control transistor

[0072] T1: Driving transistor

[0073] V0~V255: Gamma voltage

[0074] Vg: First node

[0075] ΔV1: First voltage difference

[0076] ΔV2: Second voltage difference Detailed Implementation

[0077] The embodiments of the present invention will be discussed in detail below. However, it will be understood that the embodiments provide many applicable concepts that can be implemented in a wide variety of specific contexts. The discussed and disclosed embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. The terms "first," "second," "third," etc., as used herein, do not specifically refer to any order or sequence, but are merely used to distinguish elements or operations described using the same technical terms.

[0078] Figure 1This is a schematic diagram of a display device 10 according to an embodiment of the present invention. The display device 10 includes a source driver 100, a scan driver 200, a pixel circuit 300 (or a display panel), a power supply unit 400, and a timing controller 500. In embodiments of the present invention, the display device 10 may be an OLED display device, an AMOLED display device, or other display devices.

[0079] The pixel circuit 300 includes multiple pixels (not shown). The pixel circuit 300 is connected via M source lines (i.e., Figure 1 The pixel circuit 300 is coupled to the source driver 100 via the vertical arrow line segment between the pixel circuit 300 and the source driver 100. The pixel circuit 300 is connected to the source driver 100 via N scan lines (i.e., Figure 1 The horizontal arrow segment between the pixel circuit 300 and the scan driver 200 is coupled to the scan driver 200. In embodiments of the present invention, the plurality of pixels included in the pixel circuit 300 can be disposed at a plurality of positions corresponding to a plurality of intersections of M source lines and N scan lines.

[0080] The scan signal and source signal are used to drive the pixels, causing the pixels to emit light according to the voltage level of the source signal. To drive each pixel, power supply voltages ELVDD and ELVSS are also applied to the pixels. The following will refer to... Figure 6 An exemplary embodiment of the pixel will be described in detail below.

[0081] The source driver 100 supplies multiple source signals S1, S2, ..., SM to multiple pixels of the pixel circuit 300 via M source lines. The scan driver 200 supplies multiple scan signals G1, G2, ..., GN to multiple pixels of the pixel circuit 300 via N scan lines. In other words, the pixel circuit 300 includes M*N pixels (M and N are natural numbers) for receiving multiple scan signals and multiple source signals.

[0082] A plurality of source signals corresponding to a gamma voltage are generated based on a voltage level of a gamma reference voltage. The source driver 100 generates the plurality of source signals based on image data and at least partially based on the gamma reference voltage. In other words, the source driver 100 generates a plurality of source signals corresponding to a plurality of gamma voltages.

[0083] Power supply unit 400 is coupled to pixel circuit 300, and provides power supply voltages ELVDD and ELVSS to pixel circuit 300. Power supply unit 400 is also coupled to source driver 100, and provides power supply voltage ELVDD to source driver 100. Power supply voltage ELVDD is a high power supply voltage and power supply voltage ELVSS is a low power supply voltage.

[0084] A timing controller 500 is coupled to a source driver 100. The timing controller 500 controls the source driver 100 at least in part based on a plurality of control signals CTL1. The plurality of control signals CTL1 are, for example, a horizontal synchronization start signal STH and a load signal TP for providing reference timing, so that the source driver 100 outputs a source signal accordingly. The timing controller 500 is coupled to a scan driver 200. The timing controller 500 controls the scan driver 200 at least in part based on a plurality of control signals CTL2. The plurality of control signals CTL2 are, for example, a vertical synchronization start signal STV for selecting the first scan line, a gate clock signal CPV for subsequently selecting the next scan line, and an output enable signal OE for controlling the output of the scan driver 200, so that the scan driver 200 sequentially scans a plurality of pixels accordingly.

[0085] The timing controller 500 receives image data signals and multiple input control signals from an image source (e.g., an external graphics device). These multiple input control signals may include a master clock signal, a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), and a data enable signal.

[0086] In some embodiments, the display device 10 further includes a light-emitting control unit, which outputs a light-emitting scanning signal. The light-emitting scanning signal is used to control the light-emitting operation of a plurality of pixels included in the pixel circuit 300. The light-emitting scanning signal will be referred to in a later paragraph. Figure 6 Provide a detailed description.

[0087] Figure 2 This is a block diagram of the source driver 100 of a display device 10 according to an embodiment of the present invention. The source driver 100 includes a gamma reference voltage generator 110, a gamma voltage generator 120, and a source signal generator 130. The gamma reference voltage generator 110 generates a first gamma reference voltage (in... Figure 2 The middle label is ELVDD_SEL+ΔV1) and the second gamma reference voltage (in Figure 2 (Indicated as ELVDD_SEL-ΔV2). Gamma voltage generator 120 is coupled to gamma reference voltage generator 110. Gamma voltage generator 120 receives a first gamma reference voltage (ELVDD_SEL+ΔV1) and a second gamma reference voltage (ELVDD_SEL-ΔV2) and generates multiple gamma voltages V0, V1, V2, ..., V255 accordingly. Source signal generator 130 is coupled to gamma voltage generator 120. Source signal generator 130 receives multiple gamma voltages V0 to V255 and generates multiple source signals S1, S2, ..., SM corresponding to the multiple gamma voltages V0 to V255 respectively.

[0088] Figure 3This is an exemplary schematic diagram of a gamma voltage generator 120 according to an embodiment of the present invention. The gamma voltage generator 120 includes a plurality of resistors R connected in series. The gamma voltage generator 120 uses the plurality of resistors R to divide a first gamma reference voltage (ELVDD_SEL+ΔV1) and a second gamma reference voltage (ELVDD_SEL-ΔV2) to generate a plurality of gamma voltages V0 to V255.

[0089] The gamma voltage generator 120 can generate multiple different gamma voltages for multiple data signals. Furthermore, the number of gamma voltages V0 to V255 can vary depending on the structure of the resistor string, and the number of gamma voltages V0 to V255 is not limited to 256. Specifically, the first gamma reference voltage (ELVDD_SEL+ΔV1) is the maximum value of the gamma voltage (e.g., the pixel circuit 300 emits light with the maximum brightness level and maximum grayscale level), and the second gamma reference voltage (ELVDD_SEL-ΔV2) is the minimum value of the gamma voltage (e.g., the pixel circuit 300 emits light with the minimum brightness level and minimum grayscale level).

[0090] Figure 4 This is a block diagram of a gamma reference voltage generator 110 according to an embodiment of the present invention. The gamma reference voltage generator 110 includes a voltage difference generation circuit 112, a selection voltage generation circuit 114, and a voltage calculation circuit 116. The voltage difference generation circuit 112 generates a first voltage difference ΔV1 and a second voltage difference ΔV2. The selection voltage generation circuit 114 generates an initial voltage (not shown, but will be referred to in a later paragraph). Figure 5 (Described as follows), and (from power supply unit 400) receives power supply voltage ELVDD, and selectively outputs either an initial voltage or power supply voltage ELVDD as a selection voltage ELVDD_SEL based on the voltage level of power supply voltage ELVDD (to be referred to in a later paragraph). Figure 5 (Detailed description follows). Voltage calculation circuit 116 is coupled to voltage difference generation circuit 112 and selection voltage generation circuit 114. Voltage calculation circuit 116 receives selection voltage ELVDD_SEL, first voltage difference ΔV1, and second voltage difference ΔV2. Voltage calculation circuit 116 outputs a first gamma reference voltage (ELVDD_SEL+ΔV1) and a second gamma reference voltage (ELVDD_SEL-ΔV2). Specifically, the first gamma reference voltage (ELVDD_SEL+ΔV1) is the sum of selection voltage ELVDD_SEL and first voltage difference ΔV1, and the second gamma reference voltage (ELVDD_SEL-ΔV2) is the difference between selection voltage ELVDD_SEL and second voltage difference ΔV2.

[0091] Figure 5This is an exemplary schematic diagram of a gamma reference voltage generator 110 according to an embodiment of the present invention. The voltage difference generation circuit 112 includes a first digital-to-analog converter (DAC) 112a for converting a first digital code DC1, a first non-inverting amplifier 112b coupled to the first DAC 112a, a second DAC 112c for converting a second digital code DC2, and a second non-inverting amplifier 112d coupled to the second DAC 112c. The output signal of the first DAC 112a is input to the first non-inverting amplifier 112b, causing the first non-inverting amplifier 112b to output a first voltage difference ΔV1. The output signal of the second DAC 112c is input to the second non-inverting amplifier 112d, causing the second non-inverting amplifier 112d to output a second voltage difference ΔV2. The first digital code DC1 is a digital signal that can be determined by the designer and is used to set the value of the first voltage difference ΔV1. The second digital code DC2 is a digital signal that can be determined by the designer and is used to set the value of the second voltage difference ΔV2.

[0092] The voltage selection generation circuit 114 includes a third DAC 114a for converting a third digital code DC3, and a buffer amplifier 114b coupled to the third DAC 114a. The output signal of the third DAC 114a is input to the buffer amplifier 114b, causing the buffer amplifier 114b to output an initial voltage ELVDD_INT. The third digital code DC3 is a digital signal that can be determined by the designer and is used to set the value of the initial voltage ELVDD_INT.

[0093] The selection voltage generation circuit 114 also includes a 2-to-1 multiplexer 114c to receive the initial voltage ELVDD_INT and the power supply voltage ELVDD, and outputs a selection voltage ELVDD_SEL according to the selection signal SS. The selection signal SS is used to indicate whether the power supply voltage ELVDD is at a high voltage level or a low voltage level. In other words, when the power supply voltage ELVDD is at a low voltage level, the selection voltage generation circuit 114 outputs the initial voltage ELVDD_INT as the selection voltage ELVDD_SEL; when the power supply voltage ELVDD is at a high voltage level, the selection voltage generation circuit 114 outputs the power supply voltage ELVDD as the selection voltage ELVDD_SEL.

[0094] The voltage calculation circuit 116 includes an adder circuit 116a to receive the selected voltage ELVDD_SEL and a first voltage difference ΔV1 and correspondingly generate a first gamma reference voltage (ELVDD_SEL + ΔV1). The voltage calculation circuit 116 also includes a subtractor circuit 116b to receive the selected voltage ELVDD_SEL and a second voltage difference ΔV2 and correspondingly generate a second gamma reference voltage (ELVDD_SEL - ΔV2).

[0095] Figure 6 This is a schematic diagram of an exemplary embodiment of a pixel. A single pixel according to the exemplary embodiment may include a switching transistor SW1, a driving transistor T1, a control transistor SW2, a storage capacitor C, and an organic light-emitting diode (OLED) D1. When a scan signal Gj (i.e., one of G1, G2, ..., GN) is applied, the switching transistor SW1 is turned on, and a source signal Si (i.e., one of S1, S2, ..., SM) is applied to the first node Vg. Therefore, the voltage of the first node Vg can be the voltage level of the source signal Si.

[0096] The control transistor SW2 is controlled by the light emission scanning signal EM. The light emission scanning signal EM turns on the control transistor SW2, thereby controlling the light emission operation of OLED D1, causing the driving transistor T1 to output a driving current I to OLED D1. OLED According to the transistor's current formula, the driving current I OLED It is determined by the voltage difference between the gate and the source and the threshold voltage Vthp, as shown in Equation 1 below (where K is the transconductance parameter):

[0097] I OLED =K(ELVDD-Vg-|VThp|) 2 (1)

[0098] exist Figure 6 In this case, the voltage difference between the gate voltage and the source voltage is equal to the voltage difference between the power supply voltage ELVDD and the voltage of the first node Vg, i.e., (ELVDD-Vg).

[0099] As shown in Equation 1 above, when the power supply voltage ELVDD changes, the driving current I flowing through OLED D1... OLED This will be affected. Therefore, the voltage of the first node Vg (i.e., the voltage level of the source signal Si) needs to change with the power supply voltage ELVDD, so that the voltage difference (ELVDD-Vg) between the power supply voltage ELVDD and the voltage of the first node Vg is fixed, thereby maintaining the driving current I flowing through OLED D1. OLED The brightness deviation of the display device 10 is eliminated by keeping it unchanged, thereby displaying high-quality images.

[0100] like Figure 2 As shown, the voltage level of the source signal Si (i.e., one of S1, S2, ..., SM) corresponds to the first gamma reference voltage (ELVDD_SEL+ΔV1) and the second gamma reference voltage (ELVDD_SEL-ΔV2). Figure 4 and Figure 5As shown, when the power supply voltage ELVDD is at a high voltage level, the first gamma reference voltage (ELVDD_SEL+ΔV1) and the second gamma reference voltage (ELVDD_SEL-ΔV2) correspond to the power supply voltage ELVDD. When the power supply voltage ELVDD is at a low voltage level, the first gamma reference voltage (ELVDD_SEL+ΔVEL1) and the second gamma reference voltage (ELVDD_SEL-ΔV2) correspond to the initial voltage ELVDD_INT. Specifically, the gamma reference voltage generator 110 disclosed in this invention generates a first gamma reference voltage (ELVDD_SEL+ΔV1) and a second gamma reference voltage (ELVDD_SEL-ΔV2) that tracks the power supply voltage ELVDD, so that the voltage level of the source signal changes with the power supply voltage ELVDD to maintain a constant voltage difference (ELVDD-Vg) between the power supply voltage ELVDD and the voltage of the first node Vg. In summary, the gamma reference voltage generator 110 disclosed in this invention can maintain the driving current I flowing through OLED D1. OLED It remains unchanged.

[0101] The present invention also has the following advantages: (1) Due to the simple circuit design, the circuit area is reduced, thereby reducing the production cost and power consumption. (2) The number of multiple control signals relative to the digital code is reduced. (3) The selection voltage generation circuit used to detect the power supply voltage ELVDD is located in the middle stage of the gamma reference voltage generator rather than the later stage, thus reducing the jiggle of the output voltage of the gamma reference voltage generator.

[0102] The foregoing has outlined the features of several embodiments, thus enabling those skilled in the art to better understand the nature of the invention. Those skilled in the art will recognize that this invention can be readily used as a basis to design or modify other processes and structures, thereby achieving the same objectives and / or advantages as the embodiments described herein. Those skilled in the art will also understand that these equivalent constructions do not depart from the spirit and scope of the invention, and that various changes, substitutions, and modifications can be made without departing from the spirit and scope of the invention.

Claims

1. A gamma reference voltage generator, characterized in that, include: A voltage difference generating circuit is used to generate a first voltage difference and a second voltage difference; A selective voltage generation circuit is configured to generate an initial voltage and receive a power supply voltage, wherein the selective voltage generation circuit is configured to selectively output either the initial voltage or the power supply voltage as a selective voltage based on a voltage level of the power supply voltage; and A voltage calculation circuit is coupled to the voltage difference generation circuit and the selected voltage generation circuit to receive the selected voltage, the first voltage difference and the second voltage difference; The voltage calculation circuit is used to output a first gamma reference voltage and a second gamma reference voltage, wherein the first gamma reference voltage is the sum of the selected voltage and the first voltage difference, and the second gamma reference voltage is the difference between the selected voltage and the second voltage difference.

2. The gamma reference voltage generator according to claim 1, characterized in that, When the power supply voltage is at a low voltage level, the selection voltage generation circuit outputs the initial voltage as the selection voltage. When the power supply voltage is at a high voltage level, the selection voltage generation circuit outputs the power supply voltage as the selection voltage.

3. The gamma reference voltage generator according to claim 1, characterized in that, The voltage calculation circuit includes: An adder circuit is used to receive the selected voltage and the first voltage difference and correspondingly generate the first gamma reference voltage; and A subtractor circuit is used to receive the difference between the selected voltage and the second voltage and generate the second gamma reference voltage accordingly.

4. The gamma reference voltage generator according to claim 1, characterized in that, The voltage difference generating circuit includes: A first digital-to-analog converter for converting a first digital code; A first non-inverting amplifier is coupled to the first digital-to-analog converter; A second digital-to-analog converter for converting a second digital code; and A second non-inverting amplifier is coupled to the second digital-to-analog converter; An output signal from the first digital-to-analog converter is input to the first non-inverting amplifier, causing the first non-inverting amplifier to output the first voltage difference; An output signal of the second digital-to-analog converter is input to the second non-inverting amplifier, causing the second non-inverting amplifier to output the second voltage difference.

5. The gamma reference voltage generator according to claim 1, characterized in that, The selected voltage generation circuit includes: A third digital-to-analog converter for converting a third digital code; and A buffer amplifier is coupled to the third digital-to-analog converter; An output signal from the third digital-to-analog converter is input to the buffer amplifier, causing the buffer amplifier to output the initial voltage.

6. The gamma reference voltage generator according to claim 1, characterized in that, The selected voltage generation circuit includes: A 2-to-1 multiplexer is used to receive the initial voltage and the power supply voltage, and output the selected voltage according to a selection signal, wherein the selection signal represents whether the power supply voltage is at a high voltage level or a low voltage level.

7. A source driver for a display device, characterized in that, include: A gamma reference voltage generator is used to generate a first gamma reference voltage and a second gamma reference voltage; A gamma voltage generator is coupled to the gamma reference voltage generator to receive the first gamma reference voltage and the second gamma reference voltage, and correspondingly generate multiple gamma voltages; and A source signal generator is coupled to the gamma voltage generator to receive the plurality of gamma voltages and generate a plurality of source signals accordingly, wherein the plurality of source signals are respectively supplied to a plurality of pixels of the display device; The gamma reference voltage generator includes: A voltage difference generating circuit is used to generate a first voltage difference and a second voltage difference; A selective voltage generation circuit is configured to generate an initial voltage and receive a power supply voltage, wherein the selective voltage generation circuit is configured to selectively output either the initial voltage or the power supply voltage as a selective voltage based on a voltage level of the power supply voltage; and A voltage calculation circuit is coupled to the voltage difference generation circuit and the selected voltage generation circuit, and is used to receive the selected voltage, the first voltage difference and the second voltage difference; The voltage calculation circuit is used to output the first gamma reference voltage and the second gamma reference voltage, wherein the first gamma reference voltage is the sum of the selected voltage and the first voltage difference, and the second gamma reference voltage is the difference between the selected voltage and the second voltage difference.

8. The source driver of the display device according to claim 7, characterized in that, When the power supply voltage is at a low voltage level, the selection voltage generation circuit outputs the initial voltage as the selection voltage. When the power supply voltage is at a high voltage level, the selection voltage generation circuit outputs the power supply voltage as the selection voltage.

9. The source driver of the display device according to claim 7, characterized in that, The voltage calculation circuit includes: An adder circuit is used to receive the selected voltage and the first voltage difference and correspondingly generate the first gamma reference voltage; and A subtractor circuit is used to receive the difference between the selected voltage and the second voltage and generate the second gamma reference voltage accordingly.

10. The source driver of the display device according to claim 7, characterized in that, The voltage difference generating circuit includes: A first digital-to-analog converter for converting a first digital code; A first non-inverting amplifier is coupled to the first digital-to-analog converter; A second digital-to-analog converter for converting a second digital code; and A second non-inverting amplifier is coupled to the second digital-to-analog converter; An output signal from the first digital-to-analog converter is input to the first non-inverting amplifier, causing the first non-inverting amplifier to output the first voltage difference; An output signal of the second digital-to-analog converter is input to the second non-inverting amplifier, causing the second non-inverting amplifier to output the second voltage difference.

11. The source driver of the display device according to claim 7, characterized in that, The selected voltage generation circuit includes: A third digital-to-analog converter for converting a third digital code; and A buffer amplifier is coupled to the third digital-to-analog converter; An output signal from the third digital-to-analog converter is input to the buffer amplifier, causing the buffer amplifier to output the initial voltage.

12. The source driver of the display device according to claim 7, characterized in that, The selected voltage generation circuit includes: A 2-to-1 multiplexer is used to receive the initial voltage and the power supply voltage, and output the selected voltage according to a selection signal, wherein the selection signal represents whether the power supply voltage is at a high voltage level or a low voltage level.

13. A display device, characterized in that, include: A pixel circuit includes multiple pixels for receiving multiple scan signals and multiple source signals; A scan driver for supplying the plurality of scan signals to the plurality of pixels; and A source driver for supplying the plurality of source signals to the plurality of pixels, wherein the source driver includes: A gamma reference voltage generator is used to generate a first gamma reference voltage and a second gamma reference voltage; A gamma voltage generator, coupled to the gamma reference voltage generator to receive the first gamma reference voltage and the second gamma reference voltage, and correspondingly generate a plurality of gamma voltages; and A source signal generator is coupled to the gamma voltage generator to receive the plurality of gamma voltages and generate the plurality of source signals accordingly. The gamma reference voltage generator includes: A voltage difference generating circuit is used to generate a first voltage difference and a second voltage difference; A selective voltage generation circuit is configured to generate an initial voltage and receive a power supply voltage, wherein the selective voltage generation circuit is configured to selectively output either the initial voltage or the power supply voltage as a selective voltage based on a voltage level of the power supply voltage; and A voltage calculation circuit is coupled to the voltage difference generation circuit and the selected voltage generation circuit. And it is used to receive the selected voltage, the first voltage difference, and the second voltage difference; The voltage calculation circuit is used to output the first gamma reference voltage and the second gamma reference voltage, wherein the first gamma reference voltage is the sum of the selected voltage and the first voltage difference, and the second gamma reference voltage is the difference between the selected voltage and the second voltage difference.

14. The display device according to claim 13, characterized in that, When the power supply voltage is at a low voltage level, the selection voltage generation circuit outputs the initial voltage as the selection voltage. When the power supply voltage is at a high voltage level, the selection voltage generation circuit outputs the power supply voltage as the selection voltage.

15. The display device according to claim 13, characterized in that, The voltage calculation circuit includes: An adder circuit is used to receive the selected voltage and the first voltage difference and correspondingly generate the first gamma reference voltage; and A subtractor circuit is used to receive the difference between the selected voltage and the second voltage and generate the second gamma reference voltage accordingly.

16. The display device according to claim 13, characterized in that, The voltage difference generating circuit includes: A first digital-to-analog converter for converting a first digital code; A first non-inverting amplifier is coupled to the first digital-to-analog converter; A second digital-to-analog converter for converting a second digital code; and A second non-inverting amplifier is coupled to the second digital-to-analog converter; An output signal from the first digital-to-analog converter is input to the first non-inverting amplifier, causing the first non-inverting amplifier to output the first voltage difference; An output signal of the second digital-to-analog converter is input to the second non-inverting amplifier, causing the second non-inverting amplifier to output the second voltage difference.

17. The display device according to claim 13, characterized in that, The selected voltage generation circuit includes: A third digital-to-analog converter for converting a third digital code; and A buffer amplifier is coupled to the third digital-to-analog converter; An output signal from the third digital-to-analog converter is input to the buffer amplifier, causing the buffer amplifier to output the initial voltage.

18. The display device according to claim 13, characterized in that, The selected voltage generation circuit includes: A 2-to-1 multiplexer is used to receive the initial voltage and the power supply voltage, and output the selected voltage according to a selection signal, wherein the selection signal represents whether the power supply voltage is at a high voltage level or a low voltage level.

19. The display device according to claim 13, characterized in that, The display device is an organic light-emitting diode (OLED) display device.

20. The display device according to claim 13, characterized in that, This display device is an active matrix organic light-emitting diode display device.

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