Chip component and manufacturing method thereof

By pre-fabricating external electrodes and employing an automated coating process, the problem of low fabrication efficiency of multi-faceted external electrodes for chip components has been solved, achieving more efficient production and better electrical performance.

CN120980894AActive Publication Date: 2025-11-18SHENZHEN ZHENHUA FU ELECTRONICS
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Patent Information

Application Number
CN202510919264.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-03
Publication Date
2025-11-18
Estimated Expiration
2045-07-03

AI Technical Summary

Technical Problem

In the existing technology, the process of fabricating external electrodes on multiple surfaces of chip components is cumbersome, resulting in low production efficiency and quality problems such as misalignment of external electrodes, inconsistent dimensions, and exposed ceramic.

Method used

When fabricating chip components, an outer electrode is prefabricated on the carrier layer, and then the inner layer structure, the second outer layer structure, and the first outer layer structure are stacked to reduce the number of steps in fabricating the outer electrode. The outer electrode is automatically coated using roller coating and dip coating processes, and high-precision tooling fixtures are used to ensure alignment accuracy.

Benefits of technology

The process of manufacturing and flipping the external electrode has been reduced, which has improved production efficiency, reduced operational complexity, ensured the alignment accuracy and uniformity of the external electrode, reduced exposed ceramic, and improved electrical performance and reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of component manufacturing, in particular to a chip component and a manufacturing method thereof. The manufacturing method of the chip component comprises the following steps: preparing an inner layer structure; preparing a first outer layer structure and a second outer layer structure; laminating the second outer layer structure, the inner layer structure and the first outer layer structure to prepare a laminated monomer; the stacked single bodies are sintered to obtain a sintered body, the sintered body comprises two oppositely-arranged first outer surfaces and a plurality of second outer surfaces without electrodes, and the two first outer surfaces are provided with a first outer electrode and a second outer electrode respectively; preparing an outer electrode on the second outer surface to obtain a component blank; and preparing a surface metal layer on the surfaces of the first external electrode, the second external electrode and the external electrode. The operation complexity is reduced, the production time is shortened, and the production efficiency is improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of component manufacturing, and more particularly, to a chip component and a manufacturing method thereof. BACKGROUND

[0002] Chip components (such as chip resistors, chip capacitors, chip inductors, chip filters, etc.) are widely used in modern electronic devices due to their advantages of high reliability, high integration density, and high performance. The manufacturing process of the chip components includes steps of slurry preparation, molding, lamination, layer pressing, cutting, sintering, and external electrode preparation. The external electrode preparation is a key step, and a conductive paste is uniformly coated on the surface or end face of a ceramic body by screen printing, dip coating, or roll coating, and then the conductive particles are combined to form a dense conductive layer through high-temperature sintering, and then the conductive property and soldering property are enhanced through electroplating (such as nickel and tin). However, for chip components that need to have external electrodes on six surfaces and have complex electrode design, the screen printing process has significant limitations; the preparation of external electrodes on each surface needs to be completed through multiple operations such as feeding, printing, baking, surface changing, and unloading, which is complicated and makes the production efficiency low.

[0003] It should be noted that the information disclosed in the above background section is only used to strengthen the understanding of the background of the present application, and therefore can include information that does not constitute prior art known to those of ordinary skill in the art. SUMMARY

[0004] The purpose of the embodiments of the present application is to provide a chip component and a manufacturing method thereof, which aims to solve the technical problem of low production efficiency due to complicated process when preparing external electrodes on multiple surfaces of a chip component in the related art.

[0005] To achieve the above-mentioned purpose, the technical solution adopted by the present application is:

[0006] The present application provides a manufacturing method of a chip component, comprising:

[0007] preparing an inner layer structure, the inner layer structure comprising a dielectric layer, and an inner electrode disposed on a surface of the dielectric layer;

[0008] preparing a first outer layer structure and a second outer layer structure, the first outer layer structure comprising a first carrier layer and a first outer electrode disposed on a surface of the first carrier layer, and the second outer layer structure comprising a second carrier layer and a second outer electrode disposed on a surface of the second carrier layer;

[0009] stacking the second outer layer structure, the inner layer structure, and the first outer layer structure to prepare a stacked monomer;

[0010] sintering the laminated monomer to obtain a sintered body, the sintered body comprising two first outer surfaces oppositely arranged and a plurality of second outer surfaces without electrodes, the two first outer surfaces being respectively provided with the first outer electrode and the second outer electrode;

[0011] preparing an outer electrode on the second outer surface to obtain a component blank;

[0012] preparing a surface metal layer on the surfaces of the first outer electrode, the second outer electrode and the outer electrode.

[0013] In some implementations, the preparing the first outer layer structure and the second outer layer structure comprises:

[0014] preparing the first carrier layer by using a ceramic slurry or a carbon film slurry, and preparing the first outer electrode on a surface of the first carrier layer;

[0015] preparing the second carrier layer by using a carbon film slurry, and preparing the second outer electrode on a surface of the second carrier layer.

[0016] In some implementations, the laminating the second outer layer structure, the inner layer structure and the first outer layer structure to prepare a laminated monomer comprises:

[0017] laminating the second outer layer structure, the inner layer structure and the first outer layer structure from bottom to top to form a laminated blank;

[0018] cutting the laminated blank to form a plurality of laminated monomers.

[0019] In some implementations, the laminating the second outer layer structure, the inner layer structure and the first outer layer structure from bottom to top to form a laminated blank comprises:

[0020] laminating the inner layer structure on the surface of the second carrier layer provided with the second outer electrode, so that the other surface of the second carrier layer opposite to the second outer electrode is exposed;

[0021] laminating the first outer layer structure above the inner layer structure to form a preliminary laminated body;

[0022] applying pressure to the preliminary laminated body by isostatic pressing to form the laminated blank.

[0023] In some implementations, the sintering the laminated monomer comprises:

[0024] sintering the laminated monomer in an oxygen atmosphere.

[0025] In some implementations, the preparing an outer electrode on the second outer surface to obtain a component blank comprises:

[0026] preparing a conductive layer on the second outer surface;

[0027] baking the conductive layer to form the outer electrode.

[0028] In some implementations, the preparing a conductive layer on the second outer surface comprises:

[0029] coating silver paste on the second outer surface to prepare the conductive layer.

[0030] In some implementations, before the preparing a surface metal layer on surfaces of the first outer electrode, the second outer electrode and the outer electrode, the manufacturing method further comprises:

[0031] performing a burn-end operation on the component blank.

[0032] In some implementations, the preparing an inner layer structure comprises:

[0033] preparing the dielectric layer by using ceramic paste;

[0034] preparing an inner electrode on a surface of the dielectric layer.

[0035] The application provides a chip component prepared by using the manufacturing method of the chip component as described in any of the above.

[0036] The chip component and the manufacturing method thereof provided by the application have the following beneficial effects:

[0037] The application prepares the first outer electrode and the second outer electrode before stacking the second outer layer structure, the inner layer structure and the first outer layer structure, so that for the chip component which needs to be provided with outer electrodes on six surfaces, the subsequent manufacturing of outer electrodes on two surfaces can be reduced, thereby reducing the multiple flipping and alignment operations, reducing the process steps, reducing the operation complexity, reducing the production time and improving the production efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the application, and for those skilled in the art, other drawings can also be obtained from these drawings without creative labor.

[0039] Figure 1 is a flowchart of the manufacturing method of the chip component provided by the embodiments of the application.

[0040] Figure 2 is a structural schematic diagram of a chip component provided by an embodiment of the present application;

[0041] Figure 3 is a structural schematic diagram of the chip component from another perspective provided by an embodiment of the present application;

[0042] Figure 4 is a structural schematic diagram of a first external electrode provided by an embodiment of the present application;

[0043] Figure 5 is a structural schematic diagram of a second external electrode provided by an embodiment of the present application;

[0044] Figure 6 is a structural schematic diagram of a third external electrode provided by an embodiment of the present application;

[0045] Figure 7 is a structural schematic diagram of a fourth external electrode provided by an embodiment of the present application;

[0046] Figure 8 is a structural schematic diagram of a fifth external electrode provided by an embodiment of the present application;

[0047] Figure 9 is a structural schematic diagram of a sixth external electrode provided by an embodiment of the present application.

[0048] Main figure mark explanation:

[0049] 100, chip component; 101, first external electrode; 102, second external electrode; 103, third external electrode; 104, fourth external electrode; 105, fifth external electrode; 106, sixth external electrode. DETAILED DESCRIPTION

[0050] In order to make the technical problems to be solved by the present application, the technical solutions and beneficial effects clearer and more apparent, the present application will be further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0051] In the related art, chip components (such as chip resistors, capacitors, inductors, filters, etc.) are widely used in modern electronic devices due to their advantages of high reliability, high integration density and high performance. The manufacturing process includes steps such as slurry preparation, molding, lamination, lamination, cutting, sintering and external electrode preparation. Among them, external electrode preparation is a key link, usually using screen printing, dipping or rolling coating, etc. The conductive paste is uniformly coated on the surface or end face of the ceramic body, and then the conductive particles are combined to form a dense conductive layer through high temperature sintering, and then electroplated (such as nickel, tin) to enhance the conductivity and solderability. However, for chip components that need to set external electrodes on six surfaces and have complex electrode design, the screen printing process has significant limitations; this method needs to complete the preparation of the external electrodes on each surface through multiple operations such as feeding, printing, baking, surface changing and unloading, which is complicated and makes the production efficiency low. In addition, due to the lack of positioning accuracy, it is easy to cause mispositioning of the external electrodes, size difference and ceramic exposure, which affects the electrical performance and reliability of the components.

[0052] Therefore, the embodiments of the present application provide a chip component 100 and a manufacturing method thereof to solve the problems in the related art. The manufacturing method of the chip component and the chip component provided by the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0053] Referring to Figure 1 As shown in the drawings, the manufacturing method of the chip component provided by the embodiments of the present application can be used to manufacture chip resistors, capacitors, inductors or filters. The manufacturing method can include at least a part or all of the following steps S100 to S602.

[0054] Step S100, preparing an inner layer structure, the inner layer structure including a dielectric layer, and an inner electrode disposed on a surface of the dielectric layer.

[0055] Step S200, preparing a first outer layer structure and a second outer layer structure, the first outer layer structure including a first carrier layer and a first outer electrode 101 disposed on a surface of the first carrier layer, and the second outer layer structure including a second carrier layer and a second outer electrode 102 disposed on a surface of the second carrier layer.

[0056] Step S300, laminating the second outer layer structure, the inner layer structure and the first outer layer structure to prepare a laminated monomer;

[0057] Step S400, sintering the laminated monomer to obtain a sintered body, the sintered body including two first outer surfaces disposed opposite to each other and a plurality of second outer surfaces without electrodes, and the two first outer surfaces being respectively provided with the first outer electrode 101 and the second outer electrode 102.

[0058] Step S500, preparing an outer electrode on the second outer surface to obtain a component body.

[0059] Step S600, a surface metal layer is prepared on the surface of the first outer electrode 101, the second outer electrode 102 and the outer electrode.

[0060] The manufacturing method of the chip component provided by the embodiment of the present application prepares the first outer electrode 101 and the second outer electrode 102 in advance before the second outer layer structure, the inner layer structure and the first outer layer structure are stacked, so that for the chip component 100 which needs to be provided with the outer electrode on six surfaces, the subsequent manufacturing of the outer electrode on two surfaces can be reduced, thereby the multiple flipping and alignment operations can be reduced, the process steps are reduced, the operation complexity is reduced, the production time is reduced, and the production efficiency is improved.

[0061] In step S100, when the inner electrode is prepared on the surface of the dielectric layer, the inner electrode can be prepared only on one surface of the dielectric layer, i.e., the inner electrode is prepared on one surface of each dielectric layer. The number of the inner layer structures can be multiple, and the number of the inner layer structures can be specifically designed according to the needs. When the number of the inner layer structures is multiple, in step S300, the multiple inner layer structures are sequentially stacked. When the multiple inner layer structures are stacked, the surfaces of each dielectric layer on which the inner electrode is provided are in the same direction, and the multiple inner layer structures are still located between the second outer layer structure and the first outer layer structure. It should be noted that in some other possible embodiments, the inner electrode can also be prepared on both surfaces of the dielectric layer.

[0062] In some embodiments, for step 100, the method for preparing the inner layer structure includes:

[0063] Step S101, the dielectric layer is prepared by using ceramic slurry, so that the dielectric layer prepared can have insulation and provide the required dielectric constant. For example, the ceramic slurry is prepared into the dielectric layer by a flow casting process.

[0064] Step S102, the inner electrode is prepared on the surface of the dielectric layer. For example, the inner electrode is prepared on one surface of the dielectric layer by using silver paste through a screen printing process, so that the dielectric layer on which the inner electrode is printed can be obtained. It can be understood that when the number of the inner layer structures is multiple, multiple dielectric layers can be prepared first, and then the inner electrode is prepared on the surface of each dielectric layer, which is beneficial to realize batch production, reduce the operation complexity, reduce the production time and improve the production efficiency.

[0065] In some embodiments, for step S200, the method for preparing the first outer layer structure and the second outer layer structure includes:

[0066] Step S201, a first carrier layer is prepared by using ceramic slurry or carbon film slurry, and a first outer electrode 101 is prepared on a surface of the first carrier layer, so that a first outer layer structure is obtained. For example, the first outer electrode 101 can be prepared only on one surface of the first carrier layer, that is, only one of the two opposite surfaces of the first carrier layer has the first outer electrode 101. The ceramic slurry can be prepared into the first carrier layer by a flow casting process. The carbon film slurry can be prepared into the first carrier layer by a flow casting process, and the thickness of the first carrier layer prepared by the carbon film slurry can be 20-50 μm, and the thickness can be 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm or 50 μm. The carbon film slurry can include graphite powder, a binder and an organic solvent, and the graphite powder, the binder and the organic solvent can be mixed uniformly by a ball milling method to obtain the carbon film slurry. Then, the electrode slurry (for example, silver slurry) can be printed on the surface of the first carrier layer according to a preset pattern by a printing process to form the first outer electrode 101. It can be understood that after step S102 is performed, step S201 can be performed. In addition, the preset pattern of the first outer electrode 101 can be designed to be regular or irregular according to needs. The appearance shape of the first outer electrode 101 is shown in FIG. 1. Figure 4

[0067] Step S202, a second carrier layer is prepared by using carbon film slurry, and a second outer electrode 102 is prepared on a surface of the second carrier layer, so that a second outer layer structure is obtained. For example, the second outer electrode 102 can be prepared only on one surface of the second carrier layer, that is, only one of the two opposite surfaces of the second carrier layer has the second outer electrode 102. The carbon film slurry can be prepared into the second carrier layer by a flow casting process, and the thickness of the second carrier layer prepared by the carbon film slurry can be 20-50 μm, and the thickness can be 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm or 50 μm. The carbon film slurry can include graphite powder, a binder and an organic solvent, and the graphite powder, the binder and the organic solvent can be mixed uniformly by a ball milling method to obtain the carbon film slurry. Then, the electrode slurry (for example, silver slurry) can be printed on the surface of the second carrier layer according to a preset pattern by a printing process to form the second outer electrode 102. It can be understood that the preset pattern of the second outer electrode 102 can be designed to be regular or irregular according to needs. The appearance shape of the second outer electrode 102 is shown in FIG. 2. Figure 5

[0068] ​​It should be noted that when the first carrier layer is prepared by using the ceramic slurry, the first carrier layer and the dielectric layer can have the same structure, and thus the first carrier layer can be prepared when the plurality of dielectric layers are prepared. When the first carrier layer is prepared by using the carbon film slurry, the first carrier layer and the second carrier layer can have the same structure, and thus the first carrier layer and the second carrier layer can be prepared first, and then the first external electrode 101 and the second external electrode 102 are prepared. In this way, batch production can be realized, the operation complexity is reduced, the production time is reduced, and the production efficiency is improved. When the carrier layer (the first carrier layer and / or the second carrier layer) is prepared by using the carbon film slurry, the carrier layer can act as a sacrificial layer, which can react with oxygen to generate carbon dioxide during sintering of the laminated element, so as to be removed, so that the external electrode (the first external electrode 101 and / or the second external electrode 102) on the carrier layer is exposed.

[0069] In some embodiments, for step S300, the method for laminating the second outer layer structure, the inner layer structure, and the first outer layer structure to prepare the laminated element comprises:

[0070] In step S301, the second outer layer structure, the inner layer structure, and the first outer layer structure are sequentially laminated from bottom to top to form a laminated green body. In this way, the sheet type component can be manufactured by lamination. Since the number of the inner layer structure is multiple, the plurality of inner layer structures are located between the second outer layer structure and the first outer layer structure.

[0071] For step S301, the method for laminating the second outer layer structure, the inner layer structure, and the first outer layer structure from bottom to top to form a laminated green body comprises:

[0072] In step S3011, the inner layer structure is laminated on the surface of the second carrier layer provided with the second external electrode 102, so that the other surface of the second carrier layer away from the second external electrode 102 is exposed. In this way, the second external electrode 102 can be protected by the second carrier layer, and the integrity of the second external electrode 102 during sintering is ensured. The plurality of inner layer structures are located on the surface of the second carrier layer provided with the second external electrode 102, so that the other surface of the second carrier layer away from the second external electrode 102 is exposed; the other surface of the second carrier layer away from the second external electrode 102 is not provided with an electrode. For example, after step S202 is performed, step S3011 can be performed.

[0073] Step S3012, stack the first outer layer structure above the inner layer structure to form a preliminary stack, so that the inner layer structure is sandwiched between the first outer layer structure and the second outer layer structure. Illustratively, the preliminary stack can also be referred to as a bar block. It should be noted that when the first carrier layer of the first outer layer structure is prepared by using ceramic slurry, the surface of the first carrier layer provided with the first external electrode 101 faces away from the inner layer structure, and the other surface of the first carrier layer faces the inner layer structure; when the first carrier layer of the first outer layer structure is prepared by using carbon film slurry, the surface of the first carrier layer provided with the first external electrode 101 faces the inner layer structure, and the other surface of the first carrier layer faces away from the inner layer structure.

[0074] Step S3013, apply pressure to the preliminary stack by isostatic pressing to form a laminated blank. Isostatic pressing is a process of compacting materials by applying uniform pressure in a liquid or gas medium; isostatic pressing can apply uniform pressure from all directions, reduce internal stress concentration, and improve the density and consistency of the laminated blank. During the process of applying pressure by isostatic pressing, the maximum temperature is 70-80°C, which helps to soften the binder (such as organic binder) in the ceramic green body, so that it can deform and bond more easily under pressure; the holding pressure is 10-30MPa, which can ensure that the layers are fully compacted and voids are removed, improving the density; the holding time is 2-10min, which can avoid deformation of the material or excessive flow of the binder due to too long time. In the process of isostatic pressing, the "maximum temperature" refers to the temperature maintained during the holding process. Specifically, it refers to the ambient temperature of the preliminary stack during the application of 10-30MPa pressure and the maintenance of 2-10min time. During isostatic pressing, the preliminary stack is placed in a sealed pressure vessel, and uniform pressure is transmitted through a liquid (such as water or oil), while being heated to 70-80°C and maintained at this temperature to ensure that the layers are fully bonded and voids are removed. Illustratively, during the process of applying pressure by isostatic pressing, the temperature can be 70°C, 75°C or 80°C; the holding pressure can be 10Mpa, 20Mpa or 30Mpa; the holding time is 2min, 3min, 5min, 6min or 10min; min represents minutes.

[0075] Step S302, cutting the laminated blank to form a plurality of laminated units. After step S3013 is performed, step S302 can be implemented to cut the laminated blank into a plurality of unit structures, i.e. laminated units.

[0076] Before step S400 is performed, the method for manufacturing the chip component further comprises:

[0077] Step S310, performing a degassing treatment on the laminated body; the degassing treatment is a heat treatment performed on the laminated body after the laminated green body is cut to remove organic substances such as the binder, so that the ceramic body will not have defects (such as cracks or pores) caused by the residual organic substances during the subsequent sintering. For example, the laminated body can be placed on a sintering plate for heating to perform the degassing treatment. The other surface of the second supporting layer opposite to the second external electrode 102 is in contact with the sintering plate, i.e., the second external electrode 102 is not in contact with the sintering plate, so that the second external electrode 102 will not be adhered to the sintering plate during the sintering process. Step S310 can be performed after step S302, and after step S310 is performed, step S400 can be performed.

[0078] In some embodiments, in step S400, the method of sintering the laminated body includes: sintering the laminated body in an oxygen-containing atmosphere, so that the supporting layer (the first supporting layer and / or the second supporting layer) prepared by using the carbon film paste can react with oxygen to generate carbon dioxide, thereby removing the supporting layer to expose the external electrode (the first external electrode 101 and / or the second external electrode 102). After the degassing treatment, the laminated body placed on the sintering plate is sintered; during the sintering process, the other surface of the second supporting layer opposite to the second external electrode 102 of the laminated body is in contact with the sintering plate. The sintering is performed in an oxygen-containing atmosphere, and the highest temperature during the sintering is 850-900°C, and the holding time is 15-120 min. The “highest temperature” refers to the temperature maintained during the holding process; for example, the temperature during the holding process is 850°C, 870°C or 900°C; the holding time is 15 min, 30 min, 45 min, 60 min, 90 min, 100 min or 120 min. After the sintering, the sintered body forms a ceramic body (i.e., a sintered body) having the first external electrode 101 and the second external electrode 102, and the first external electrode 101 and the second external electrode 102 are oppositely arranged. The sintered body can have six external surfaces, two of which are referred to as first external surfaces, and the other four are referred to as second external surfaces; the first external electrode 101 is located on one of the first external surfaces, and the second external electrode 102 is located on the other first external surface.

[0079] In some embodiments, for step S500, the method of preparing an external electrode on the second external surface to obtain a device green body includes:

[0080] Step S501, preparing a conductive layer on the second external surface.

[0081] Step S502, baking the conductive layer to form an external electrode.

[0082] For the second outer surface, the number of which is 4, the 4 second outer surfaces are divided into two subgroups, each of which has two second outer surfaces, and the two second outer surfaces in each subgroup are oppositely arranged. The outer electrodes on the two second outer surfaces in one of the subgroups are the third outer electrode 103 and the fourth outer electrode 104, respectively; the outer electrodes on the two second outer surfaces in the other subgroup are the fifth outer electrode 105 and the sixth outer electrode 106, respectively. In this way, the outer electrodes are prepared on the second outer surface to obtain the component blank, and the preparation of the four outer electrodes is achieved; and the preparation of the third outer electrode 103, the fourth outer electrode 104, the fifth outer electrode 105 and the sixth outer electrode 106 all need steps S501 and S502, that is, when the outer electrodes are prepared on the second outer surface, steps S501 and S502 need to be repeatedly executed, for example, when the third outer electrode 103 is prepared, steps S501 and S502 need to be executed, and when the fourth outer electrode 104 is prepared, steps S501 and S502 also need to be executed. It should be noted that the third outer electrode 103, the fourth outer electrode 104, the fifth outer electrode 105 and the sixth outer electrode 106 can be connected to the inner electrode as needed. The first outer electrode 101, the second outer electrode 102, the third outer electrode 103, the fourth outer electrode 104, the fifth outer electrode 105 and the sixth outer electrode 106 can be connected to each other or not, and the specific design can be made as needed, which is not limited in the present application.

[0083] For step S501, when the conductive layer is prepared on the second outer surface, the sintered body with the first outer electrode 101 and the second outer electrode 102 can be fixed in a tooling fixture, so as to ensure the accuracy of the position during the preparation of the conductive layer; the tooling fixture includes but is not limited to a paper tape, a thin rubber plate and a jig bakelite plate (JIG plate). When the tooling fixture is designed as a paper tape or a thin rubber plate, the size of the hole position for placing the sintered body on the tooling fixture is 30-100 pm smaller than the size of the sintered body, and the size of the hole position for placing the sintered body on the tooling fixture is 30 pm, 50 pm, 60 pm or 100 pm smaller than the size of the sintered body; when the tooling fixture is designed as a JIG plate, the size of the hole position for placing the sintered body on the tooling fixture is 5-20 pm larger than the size of the sintered body, and the size of the hole position for placing the sintered body on the tooling fixture is 5 pm, 10 pm, 15 pm or 20 pm larger than the size of the sintered body. The shape of the hole position is matched with the shape of the sintered body. The accuracy of the size of the hole position is controlled within ±3 pm, that is, the actual size of the hole position is within the range of the design size of the hole position ±3 pm.

[0084] In some embodiments, for step S501, the method for preparing the conductive layer on the second outer surface comprises: coating silver paste on the second outer surface to prepare the conductive layer. For example, the silver paste can be coated on the second outer surface by a rolling coating process or a sticking coating process, so as to achieve the preparation of the conductive layer.

[0085] After the conductive layer is prepared, the sintered body with the conductive layer is taken off from the fixture, and then step S502 is performed to bake the conductive layer to volatilize the organic solvent in the silver paste. It can be understood that the pattern of the outer electrode can be designed as regular as needed. The pattern shapes of the third outer electrode 103, the fourth outer electrode 104, the fifth outer electrode 105 and the sixth outer electrode 106 can be seen from the drawings. Figures 6 to 9 When the conductive layer is baked, the baking temperature is 100-140°C, and the time is 10-40 minutes, that is, the baking is continued for 10-40 minutes at the baking temperature; for example, the baking temperature is 100°C, 110°C, 120°C, 130°C or 140°C; and the time can be 10 minutes, 15 minutes, 20 minutes, 25 minutes, 30 minutes, 35 minutes or 40 minutes.

[0086] In some embodiments, before step S600 is performed, that is, before the surface metal layer is prepared on the first outer electrode 101, the second outer electrode 102 and the outer electrodes, the manufacturing method of the chip component further comprises step S510 of performing a sintering operation on the component blank.

[0087] When the outer electrodes are prepared on the second outer surface, the third outer electrode 103 and the fourth outer electrode 104 can be prepared first, and then the fifth outer electrode 105 and the sixth outer electrode 106 are prepared. After the third outer electrode 103 and the fourth outer electrode 104 are prepared, a primary sintering operation can be performed on the third outer electrode 103 and the fourth outer electrode 104; and when the fifth outer electrode 105 and the sixth outer electrode 106 are prepared, that is, after the outer electrodes are prepared on the second outer surface, a sintering operation is performed on the third outer electrode 103, the fourth outer electrode 104, the fifth outer electrode 105 and the sixth outer electrode 106. The sintering operation is to completely decompose the organic components in the paste for preparing the outer electrodes by using high temperature (450-750°C) to realize good connection between the outer electrodes and the inner electrodes.

[0088] The preparation of the outer electrodes on the second outer surface and the sintering operation will be described in detail in combination with the above description of steps S501, S502 and S510.

[0089] 1. Preparation of the third outer electrode 103 and the fourth outer electrode 104

[0090] Step S501, the sintered body with the first outer electrode 101 and the second outer electrode 102 is fixed in the fixture; the silver paste is coated on one second outer surface by a roll coating process or a paste coating process to prepare a conductive layer for forming the third outer electrode 103.

[0091] Step S502, baking the conductive layer for forming the third external electrode 103 to dry the silver paste, so that the conductive layer forms the third external electrode 103; the baking temperature is 100-130°C, and the baking time is 10-40 minutes. Exemplarily, the baking temperature is 100°C, 110°C, 120°C, 125°C or 130°C; and the baking time can be 10 minutes, 15 minutes, 20 minutes, 25 minutes, 30 minutes, 35 minutes or 40 minutes.

[0092] Step S501, with the second external surface with the third external electrode 103 facing downward and the other second external surface facing upward, coating the silver paste on the upward-facing second external surface by a roll coating process or a paste coating process to prepare a conductive layer for forming the fourth external electrode 104.

[0093] Step S502, baking the conductive layer for forming the fourth external electrode 104 to dry the silver paste, so that the conductive layer forms the fourth external electrode 104; the baking temperature is 100-130°C, and the baking time is 10-40 minutes. Exemplarily, the baking temperature is 100°C, 110°C, 120°C, 125°C or 130°C; and the baking time can be 10 minutes, 15 minutes, 20 minutes, 25 minutes, 30 minutes, 35 minutes or 40 minutes.

[0094] Step S510, after the preparation of the third external electrode 103 and the fourth external electrode 104, performing a primary firing of the third external electrode 103 and the fourth external electrode 104 by using a tunnel furnace. The number of firing temperature zones is 7-9, the firing temperature is 450-600°C, and the holding time is 10-30 minutes. The firing temperature zone refers to a temperature control region in the tunnel furnace for sintering the external electrode. The tunnel furnace is a continuous heat treatment equipment, and the inside thereof is usually divided into multiple temperature zones, each of which can independently control the temperature to realize the step-by-step heating, holding and cooling of the product. The number of firing temperature zones being 7-9 means that the firing process section of the tunnel furnace is divided into 7 to 9 independent temperature control regions. The firing temperature being 450-600°C means that the primary firing of the third external electrode 103 and the fourth external electrode 104 needs to be performed at this temperature, and the holding is performed at this temperature; exemplarily, the firing temperature is 450°C, 500°C, 550°C, 575°C or 600°C; and the holding time is 10 minutes, 15 minutes, 20 minutes, 25 minutes or 30 minutes.

[0095] 2. Preparation of the fifth external electrode 105 and the sixth external electrode 106

[0096] Step S501, fixing the sintered body with the first external electrode 101, the second external electrode 102, the third external electrode 103 and the fourth external electrode 104 in a fixture. A conductive layer for forming the fifth external electrode 105 is prepared by coating silver paste on one of the second external surfaces by a rolling process or a sticking process.

[0097] Step S502, baking the conductive layer for forming the fifth external electrode 105 to dry the silver paste, so that the conductive layer forms the fifth external electrode 105. The baking temperature is 100-140°C, and the baking time is 10-40 minutes. Exemplarily, the baking temperature is 100°C, 110°C, 120°C, 130°C or 140°C; and the baking time can be 10 minutes, 15 minutes, 20 minutes, 25 minutes, 30 minutes, 35 minutes or 40 minutes.

[0098] Step S501, fixing the sintered body with the first external electrode 101, the second external electrode 102, the third external electrode 103 and the fourth external electrode 104 in a fixture. A conductive layer for forming the fifth external electrode 105 is prepared by coating silver paste on one of the second external surfaces by a rolling process or a sticking process.

[0099] Step S502, baking the conductive layer for forming the fifth external electrode 105 to dry the silver paste, so that the conductive layer forms the fifth external electrode 105. The baking temperature is 100-140°C, and the baking time is 10-40 minutes. Exemplarily, the baking temperature is 100°C, 110°C, 120°C, 130°C or 140°C; and the baking time can be 10 minutes, 15 minutes, 20 minutes, 25 minutes, 30 minutes, 35 minutes or 40 minutes.

[0100] Step S510, after the fifth external electrode 105 and the sixth external electrode 106 are prepared, a tunnel furnace is used to perform final firing on the third external electrode 103, the fourth external electrode 104, the fifth external electrode 105 and the sixth external electrode 106. The number of firing temperature zones is 7-9, the firing temperature is 620-720°C, and the holding time is 10-30 minutes. Exemplarily, the firing temperature is 620°C, 650°C, 680°C, 700°C or 720°C; and the holding time is 10 minutes, 15 minutes, 20 minutes, 25 minutes or 30 minutes.

[0101] Thus, the preparation of the external electrodes on the second external surfaces and the firing operation are completed by repeating the steps S501, S502 and S510.

[0102] In some embodiments, for step S600, the method for preparing the surface metal layer on the surfaces of the first external electrode 101, the second external electrode 102 and the external electrodes includes:

[0103] Step S601, a first metal layer is prepared on the surface of the first outer electrode 101, the second outer electrode 102 and the outer electrodes. Exemplarily, the first metal layer is prepared on the surface of the first outer electrode 101, the second outer electrode 102, the third outer electrode 103, the fourth outer electrode 104, the fifth outer electrode 105 and the sixth outer electrode 106 by electroplating metal, and the material of the first metal layer is nickel; the electroplating time is 60min-120min, and specifically, the electroplating time can be 60min, 80min, 90min, 100min, 110min or 120min; the thickness of the first metal layer is 2μm-8μm, and specifically, the thickness of the first metal layer is 2μm, 3μm, 4μm, 5μm, 6μm or 8μm.

[0104] Step S602, a second metal layer is prepared on the surface of the first metal layer, wherein the surface metal layer includes the first metal layer and the second metal layer, so that the chip component 100 is formed after the second metal layer is prepared. Exemplarily, after the first metal layer is prepared on the surface of the first outer electrode 101, the second outer electrode 102, the third outer electrode 103, the fourth outer electrode 104, the fifth outer electrode 105 and the sixth outer electrode 106, the second metal layer is prepared on the first metal layer by electroplating metal; the material of the second metal layer is tin; the electroplating time is 60min-120min, and specifically, the electroplating time can be 60min, 80min, 90min, 100min, 110min or 120min; the thickness of the second metal layer is 6μm-12μm, and specifically, the thickness of the second metal layer is 6μm, 7μm, 8μm, 9μm, 10μm or 12μm.

[0105] The embodiment of the present application provides a chip component 100 prepared by the manufacturing method of the chip component provided by any of the above embodiments. Figure 2 and Figure 3 As shown in FIGS. 1-3, the chip component 100 includes a ceramic body and a first outer electrode 101, a second outer electrode 102, a third outer electrode 103, a fourth outer electrode 104, a fifth outer electrode 105 and a sixth outer electrode 106 arranged on the outer surface of the ceramic body.

[0106] In summary, the chip component 100 and the manufacturing method thereof provided by the embodiment of the present application can reduce the production process, improve the automation degree and production efficiency by starting to prepare the first outer electrode 101 and the second outer electrode 102 after preparing the bearing layer, and then preparing the third outer electrode 103, the fourth outer electrode 104, the fifth outer electrode 105 and the sixth outer electrode 106 by using the automatic coating method of roll coating and / or dip coating. In addition, the roll coating and / or dip coating process, combined with a high-precision tool clamp, can ensure the alignment accuracy of the outer electrodes, and the size of the prepared outer electrodes is uniform, and the situation of exposed ceramic can be reduced.

[0107] It should be understood that, in the embodiments of the present application, unless otherwise explicitly specified and limited, the terms "connected", "fixedly connected", "contacted" and the like should be understood in a broad sense. Those skilled in the art can understand the specific meanings of the above-mentioned various terms in the embodiments of the present application according to specific circumstances.

[0108] Exemplarily, for "connected", it can be various connection modes such as fixed connection, rotary connection, flexible connection, sliding connection, integral molding, electrical connection, contact connection and the like; it can be directly connected, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements or the interaction relationship of two elements.

[0109] Exemplarily, for "fixedly connected", one element can be directly or indirectly fixedly connected to another element; the fixed connection can include mechanical connection, welding, bonding or integral molding and the like, wherein the mechanical connection can include riveting, bolt connection, threaded connection, key pin connection, buckle connection, lock connection, plug-in and the like, and the bonding can include adhesive bonding and solvent bonding and the like.

[0110] It should also be understood that "parallel" or "perpendicular" described in the embodiments of the present application can be understood as "approximately parallel" or "approximately perpendicular".

[0111] It should also be understood that the terms "first", "second" are only for descriptive purpose, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. The features limited by "first", "second" can explicitly or implicitly include one or more of the features.

[0112] In the embodiments of the present application, unless otherwise explicitly specified and limited, the first feature is "on" or "under" the second feature can be that the first feature and the second feature are in direct contact, or the first feature and the second feature are indirectly in contact through an intermediate medium. Moreover, the first feature "above", "over" and "on" the second feature can be that the first feature is directly above or obliquely above the second feature, or only indicates that the horizontal height of the first feature is higher than that of the second feature. The first feature "under", "below" and "under" the second feature can be that the first feature is directly below or obliquely below the second feature, or only indicates that the horizontal height of the first feature is less than that of the second feature.

[0113] It should also be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, if any, are used for description only and that devices and elements of one embodiment can be located at positions other than those specifically associated with the described terms.

[0114] The above description is only the preferred embodiment of the present application, but the protection scope of the present application is not limited to this. Any modification or replacement within the technical range disclosed by the present application can be easily thought by those skilled in the art, and should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims. In summary, the above description is only the preferred embodiment of the technical solution of the present application, and is not used to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A method for manufacturing a surface-mount component, characterized in that, include: An inner layer structure is fabricated, the inner layer structure including a dielectric layer and an internal electrode disposed on the surface of the dielectric layer; A first outer layer structure and a second outer layer structure are prepared. The first outer layer structure includes a first carrier layer and a first external electrode disposed on a surface of the first carrier layer. The second outer layer structure includes a second carrier layer and a second external electrode disposed on a surface of the second carrier layer. The second outer layer structure, the inner layer structure, and the first outer layer structure are stacked to prepare a stacked monomer; The stacked monomers are sintered to obtain a sintered body, which includes two first outer surfaces disposed opposite to each other and a plurality of second outer surfaces without electrodes. The two first outer surfaces are respectively provided with first outer electrodes and second outer electrodes. An external electrode is fabricated on the second outer surface to obtain a component blank; A surface metal layer is prepared on the surface of the first external electrode, the second external electrode, and the external electrode.

2. The method for manufacturing a surface-mount component as described in claim 1, characterized in that, The preparation of the first outer layer structure and the second outer layer structure includes: The first support layer is prepared using ceramic slurry or carbon film slurry, and a first external electrode is prepared on one surface of the first support layer; The second carrier layer is prepared using carbon film slurry, and a second external electrode is prepared on one surface of the second carrier layer.

3. The method for manufacturing a surface-mount component as described in claim 2, characterized in that, The step of stacking the second outer layer structure, the inner layer structure, and the first outer layer structure to prepare a stacked monomer includes: The second outer layer structure, the inner layer structure, and the first outer layer structure are stacked sequentially from bottom to top to form a stacked blank. The laminated blank is cut to form multiple laminated units.

4. The method for manufacturing a surface-mount component as described in claim 3, characterized in that, The step of stacking the second outer layer structure, the inner layer structure, and the first outer layer structure sequentially from bottom to top to form a stacked blank includes: The inner layer structure is stacked on the surface of the second carrier layer where the second outer electrode is located, so that the other surface of the second carrier layer facing away from the second outer electrode is exposed. The first outer layer structure is stacked on top of the inner layer structure to form a preliminary stack; Pressure is applied to the preliminary laminate using an isostatic pressing method to form the laminated blank.

5. The method for manufacturing a surface-mount component as described in any one of claims 2-4, characterized in that, The sintering of the laminated monomers includes: The laminated monomers are sintered in an oxygen atmosphere.

6. The method for manufacturing a surface-mount component as described in claim 1, characterized in that, The step of fabricating an external electrode on the second outer surface to obtain a component blank includes: A conductive layer is prepared on the second outer surface; The conductive layer is baked to form the external electrode.

7. The method for manufacturing a surface-mount component as described in claim 6, characterized in that, The preparation of a conductive layer on the second outer surface includes: The conductive layer is prepared by coating silver paste onto the second outer surface.

8. The method for manufacturing a surface-mount component as described in claim 6 or 7, characterized in that, Before forming the surface metal layer on the surfaces of the first external electrode, the second external electrode, and the external electrode, the manufacturing method further includes: The component blank is subjected to a firing operation.

9. The method for manufacturing a surface-mount component as described in any one of claims 1-4, 6, and 7, characterized in that, The preparation of the inner layer structure includes: The dielectric layer is prepared using a ceramic slurry; An internal electrode is fabricated on the surface of the dielectric layer.

10. A surface-mount component, characterized in that, It is manufactured using the manufacturing method of any one of claims 1-9 for a surface mount component.

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