Vacuum type semiconductor detector and process manufacturing flow thereof

Abstract

The invention provides a vacuum type semiconductor detector and a process manufacturing flow thereof, and relates to the field of semiconductor detectors. The frame refresh rate of the vacuum type semiconductor detector is larger than or equal to 1 kHz, the dynamic range is larger than or equal to 10 < 4 > ph. / pixel / pulse (at) 12 keV, single photon sensitivity is achieved, S / N is larger than or equal to 5 (at) 12 keV, the pixel size is smaller than or equal to 200 micrometers * 200 micrometers, the number of pixels is larger than or equal to 65536, the sensitive area is larger than or equal to 2.5 cm * 10.2 cm, the quantum efficiency is larger than or equal to 80% (at) 12 keV, and the response energy region is 6 keV to 20 keV.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor detectors, and particularly to a vacuum type semiconductor detector and a process manufacturing flow thereof. BACKGROUND

[0002] Area detector is a kind of two-dimensional detector commonly used in advanced light source large scientific facilities (such as synchrotron radiation light source SR, X-ray free electron laser XFEL, etc.). Detectors with similar naming methods also include point detector (i.e. zero-dimensional detector, such as photodiode, silicon drift chamber, etc.) and line detector (i.e. one-dimensional detector, such as silicon microstrip detector). Currently, the area detector widely used in advanced light sources, unless otherwise specified, generally refers to pixel array detector (PAD). It is a kind of high-pixel semiconductor detector, which can realize the segmentation of the sensitive unit of the detector, the extraction of the detector signal, the high-speed processing and transmission of the signal in the interval of hundreds of microns or even microns, and has high spatial resolution (intrinsic resolution ≤ 10 μm), fast time response (signal scale ≤ 10 ns), strong anti-radiation and other excellent performances.

[0003] The scientific experiments on advanced light source large scientific facilities can be roughly divided into three categories: imaging, scattering and spectroscopy. To date, PAD has become an indispensable main detector for scattering, imaging scientific experiments, and is also a commonly used detector for grating or crystal-based spectroscopy experiments. In specific scientific applications, PAD is a key core equipment for many frontier scientific researches such as small molecule chemical reaction control and observation, biological molecule structure research and molecular dynamic imaging, dynamic, structure and function of biological assembly in near-real environment, and atomic scale time resolution of biological molecules. In particular, combined with XFEL with full coherence and high repetition frequency, PAD can help to realize atomic level spatial resolution and femtosecond level time resolution of single molecule / single particle, realize molecular level dynamic three-dimensional imaging and structure analysis. Further, combined with pump laser, PAD can help to realize real-time observation of chemical reactions at atomic scale, study the energy and charge transfer rules at femtosecond level and instantaneous structure imaging.

[0004] These new, frontier scientific experiments have general requirements for the area detector: on the one hand, it needs to have a high enough spatial resolution to accurately measure the position of the diffraction spot; on the other hand, it needs to have a large enough detection area to obtain diffraction data at a large angle. This requires the area detector to have a small pixel size to obtain high spatial resolution, and a large number of pixels to obtain a large detection area. In theory, to reduce the detection dead zone, the detection panel of the area detector is preferably filled with a pixel array throughout the panel. However, due to limitations of integrated circuit processing and packaging processes, the detection panel cannot be made from a single wafer, and a tile-like method is generally used to obtain a large detection area. The "tile" used for tiling is called a front-end module (FEM). The FEM is also a basic functional unit of the PAD.

[0005] Compared with SR, the photon characteristics of XFEL are super-short and super-high brightness pulses. The XFEL photon pulse width is in the order of femtoseconds to hundreds of femtoseconds, the number of photons in a single pulse can reach 10 12 photons, and the number of photons hitting a single pixel of the detector in a single pulse can reach 10 4 photons. Therefore, the single-photon counting PAD widely used on SR cannot be applied to XFEL. XFEL requires a PAD that can match the pulse-type photon detection. Currently, there is no mature commercial product for such detectors. Major XFEL devices around the world are conducting independent research and development of PADs for the beam characteristics of their respective devices.

[0006] Considering the design of scientific experiments on advanced light sources and experimental conditions such as sample environment, the area detector often needs to work in an ultra-high vacuum environment. In particular, scientific experiments in the soft X-ray energy region (photon energy ≤ 6 keV) are generally carried out in a vacuum environment because soft X-rays are easily attenuated and blocked by air. In addition, heat dissipation cannot be achieved through convection in a vacuum, and a special cooling scheme needs to be designed to reduce the noise of the detector. Therefore, in addition to the conventional atmospheric environment area detector, a specific area detector suitable for working in a vacuum environment also needs to be developed. SUMMARY

[0007] To solve the above problems, the present application provides a vacuum-type semiconductor detector, comprising a front-end module, the front-end module is prepared by a front-end module process flow, the front-end module process flow comprises the following steps:

[0008] Step 1): connecting Sensor and ASIC to form Chip Assembly;

[0009] Step 2): fixing Holder to Mounting Block;

[0010] Step 3): mounting the Mounting Block fixed with the Holder to a positioning and pressing tool, fixing the positioning and pressing tool to a glue dispenser, and dispensing glue on the surface of the Holder by using the glue dispenser;

[0011] Step 4): placing the Wire Bonding Board on the glue of the Holder by using a tool, and applying uniform pressure on the surface of the Wire Bonding Board by using a torque wrench; then, drying the Wire Bonding Board and naturally cooling it to room temperature;

[0012] Step 5): dispensing glue on the surface of the Mounting Block in step 4) by using a glue dispenser;

[0013] Step 6): placing the Chip Assembly in step 1) on the surface of the Wire Bonding Board in step 5) by using a chip mounter;

[0014] Step 7): drying the Mounting Block in step 6) and naturally cooling it to room temperature;

[0015] Step 8): wire bonding the Mounting Block in step 7) by using a wire bonder;

[0016] Step 9): taking the Holder off the Mounting Block by using a tool, and thus completing the production of the front-end module.

[0017] The process flow for producing the front-end module provided by the application further comprises at least one of the following technical features:

[0018] In step 1), the Sensor is subjected to quality screening and is recorded in a front-end module database, and preferably, the screening standard for the Sensor is that the breakdown voltage of the current collecting ring is greater than or equal to 200 V;

[0019] In step 1), the ASIC is subjected to quality screening and is recorded in a front-end module database, and preferably, the screening standard for the ASIC is that the number of bad pixels is less than or equal to 50;

[0020] In step 1), the Chip Assembly is subjected to quality screening and is recorded in a front-end module database, and preferably, the screening standard for the Chip Assembly is that the number of failed pixel rows and columns is less than or equal to 5;

[0021] In step 1), the pixel size of the Sensor is less than or equal to 200 μm x 200 μm, the number of pixels of the Sensor is greater than or equal to 65536, and the actual effective area of the Sensor is greater than or equal to 106 mm x 28 mm;

[0022] In step 1), the pixel size of the ASIC is ≤200μm×200μm, the number of pixels of the ASIC is ≥4096, and the size of the ASIC is ≥12.8mm×14.4mm;

[0023] In step 1), a plurality of ASICs are sequentially flip-chip bonded to the Sensor, preferably, the flip-chip bonding solder bumps are copper column tin caps, preferably, the ASICs are 2X8, preferably, the flip-chip bonding solder bumps have a diameter of 20-40μm, a height of 40-50μm, and a minimum spacing between adjacent solder bumps of 50-70μm;

[0024] In step 2), the number of the Holder is recorded in the front-end module database;

[0025] In step 2), the Holder is ultrasonically cleaned with alcohol, preferably, the ultrasonic frequency is 20-60kHz, and the ultrasonic time is 10-20min;

[0026] In step 2), the MountingBlock is ultrasonically cleaned with alcohol, preferably, the ultrasonic frequency is 20-60kHz, and the ultrasonic time is 10-20min;

[0027] In step 4), the WireBondingBoard and the positioning and pressing tool are placed together in an oven for drying, preferably, the oven temperature is 90℃, and the drying time is 30min;

[0028] In step 4), the size of the Holder is the size of the WireBondingBoard with a redundancy of ≤100μm on each side;

[0029] In step 4), the size of the Holder is ≥107.26mm×30.76mm;

[0030] In step 4), the Holder is made of aluminum;

[0031] In step 4), the Holder further has steps on two long sides;

[0032] In step 4), the Holder is laser-engraved to indicate the position and number of each ASIC chip;

[0033] In step 4), the torque of the torque wrench is ≥5N*m;

[0034] In step 4), the bending degree of the WireBondingBoard is ≤50μm;

[0035] In step 4), the size of the WireBondingBoard is ≥107.06mm×30.56mm;

[0036] The process flow of the front-end module provided by the application further comprises at least one of the following technical features:

[0037] In step 5), the glue is selected as high-strength, high-thermal-conductivity and non-conductive glue;

[0038] In step 5), the groove in the Holder adopts a back-shaped dispensing, and the surface of the Holder adopts linear dispensing.

[0039] In step 6), the front surface of the WireBondingBoard is provided with wire-bonding pads corresponding to the pads of the ASICs, and preferably, each ASIC is connected to 111 wire-bonding pads;

[0040] In step 6), the wire of the ASIC is gold wire;

[0041] In step 6), the wire-bonding between the ASIC and the WireBondingBoard is completed by ultrasonic heat pressure welding;

[0042] In step 6), the back surface of the WireBondingBoard is provided with a large connector, and preferably, the number of pins of the large connector is 180Pin;

[0043] In step 6), the back surface of the WireBondingBoard is provided with LDOs consistent with the number of the ASICs.

[0044] In step 7), the MountingBlock is placed in an oven for drying, the temperature of the oven is 80-100℃, and the drying time is 20-40min, and preferably, the temperature of the oven is 90℃, and the drying time is 30min;

[0045] In step 8), the bottom surface of the MountingBlock is provided with positioning holes capable of matching the wire-bonding fixture of the wire-bonding machine, the positioning hole on one side of the bottom surface of the MountingBlock is connected with the wire-bonding fixture, and the ASICs on one half of the MountingBlock are wire-bonded, then the positioning hole on the other side of the bottom surface of the MountingBlock is connected with the wire-bonding fixture, and the ASICs on the other half of the MountingBlock are wire-bonded;

[0046] In step 8), after the wire-bonding of all the ASICs on the MountingBlock is completed, the wire-bonding of the ASICs is checked under a microscope.

[0047] In step 9), the quality screening standard of the front-end module is that there is no large-area bad point, and the number of invalid pixel rows and columns on a single ASIC is less than or equal to 5.

[0048] In step 9), the front-end module is subjected to X-ray testing, and the front-end module is subjected to quality grading.

[0049] In an embodiment, the vacuum semiconductor detector further comprises a detector vacuum cavity, a detector rear cavity, a vacuum mechanism and a water cooling mechanism; a first support frame is arranged in the inner cavity of the detector vacuum cavity, a front panel is arranged on the first support frame, and the front-end module is arranged in the front panel; the water cooling mechanism comprises a water cooling pipe, one end of the water cooling pipe is connected with the front panel, the other end of the water cooling pipe penetrates out of the detector vacuum cavity and is externally connected with a pump body; the vacuum mechanism comprises a vacuum pump group and a vacuum gauge arranged on the side wall of the detector vacuum cavity; a second support frame is arranged in the detector rear cavity, a rear-end readout panel is arranged on the second support frame, and rear-end electronic components are arranged on the rear-end readout panel; the front-end module penetrates out of the embedded inner cavity of the detector vacuum cavity through a vacuum cable and is connected with the rear-end readout panel in the detector rear cavity.

[0050] In an embodiment, two ends of the detector vacuum cavity are respectively provided with a front-end flange and a rear-end flange, the front-end flange is suitable for being connected with a sealing plate, and the rear-end flange is connected with the detector rear cavity; the embodiment further comprises a detector first support and a detector second support, the front-end flange is arranged on the detector first support, and the rear-end flange is arranged on the detector second support.

[0051] In an embodiment, the front panel comprises a first panel and a second panel, a first slot is arranged in the first panel, and the front-end module is arranged in the first slot; a second slot for a connector and a vacuum cable to penetrate through is arranged in the second panel; a water cooling passage surrounding the second slot is further arranged in the second panel, and the water cooling pipe comprises a water cooling inlet pipe and a water cooling outlet pipe, and the water cooling inlet pipe and the water cooling outlet pipe are both connected with the water cooling passage.

[0052] In an embodiment, a vacuum electrode module is arranged in the rear-end flange, the vacuum electrode module comprises a flexible adapter plate, an atmospheric end fixing member, a vacuum end fixing member, an atmospheric adapter assembly, a vacuum adapter assembly and a vacuum flange; the flexible adapter plate is arranged in the rear-end flange and the vacuum flange, and the flexible adapter plate is arranged on the atmospheric end fixing member and the vacuum end fixing member respectively; the atmospheric adapter assembly is arranged on the flexible adapter plate and is suitable for adapting signals between the flexible adapter plate and the rear-end readout panel; the vacuum adapter assembly is arranged on the flexible adapter plate and is suitable for adapting signals between the flexible adapter plate and the front-end module.

[0053] In an implementation of the front-end module provided by the embodiment, a relay adapter module for relaying signals between the front-end module and the flexible adapter plate is further included; the first support frame is provided with a first shelf and a second shelf, the relay adapter module is arranged on the first shelf, and the vacuum adapter assembly is arranged on the second shelf.

[0054] In an implementation of the front-end module provided by the embodiment, the front-end module serves as a detection element of a vacuum-type semiconductor detector; and / or, a frame refresh rate of the vacuum-type semiconductor detector is greater than or equal to 1 kHz; a dynamic range of the vacuum-type semiconductor detector is greater than or equal to 10 4 ph. / pixel / pulse@12keV; the vacuum-type semiconductor detector is single-photon sensitive and has a signal-to-noise ratio (S / N) greater than or equal to 5@12keV; a pixel size of the vacuum-type semiconductor detector is less than or equal to 200 μm×200 μm; a number of pixels of the vacuum-type semiconductor detector is greater than or equal to 65536; a sensitive area of the vacuum-type semiconductor detector is greater than or equal to 2.5 cm×10.2 cm; a quantum efficiency of the vacuum-type semiconductor detector is greater than or equal to 80%@12keV; and a response energy range of the vacuum-type semiconductor detector is 6 keV-20 keV.

[0055] The embodiment further provides an assembly method of the vacuum-type semiconductor detector, and the assembly method comprises the following steps:

[0056] Step 1), installing a first support frame and a second support frame in an inner cavity of a detector vacuum cavity;

[0057] Step 2), installing a front panel and a rear readout panel on the first support frame and the second support frame respectively, and installing a front-end module in the front panel;

[0058] Step 3), installing a cooling mechanism and connecting a water-cooling pipe to the front panel;

[0059] Step 4), connecting the front-end module and the rear readout panel through a vacuum cable;

[0060] Step 5), installing a vacuum pump set and a vacuum gauge on a side wall of the detector vacuum cavity;

[0061] Step 6), installing other components in a rear cavity of the detector.

[0062] The vacuum-type detector provided by the embodiment has the following beneficial effects:

[0063] 1) Technically, the vacuum type semiconductor detector provided by the application adopts a hybrid scheme. Compared with a monolithic scheme (a typical representative is a CMOS imaging sensor and a charge coupled device), a signal sensing unit (Sensor) and a signal processing unit (ASIC) are divided into two independent chips. The advantage of the hybrid scheme is that the two chips can be optimized by using different semiconductor processes and methods.

[0064] 2) The Sensor adopts a silicon planar process. A body silicon type and pixel type PhotoDiode array is made of a high resistance and high purity silicon wafer. The pixel size is ≤200 μm×200 μm, and is preferably 200 μm×200 μm. The number of pixels is ≥512 (X) ×128 (Y), and is preferably 512 (X) ×128 (Y). In order to obtain a high quantum efficiency (≥80% @12keV), the thickness of the Sensor chip is designed to be ≥500 μm, and is preferably 500 μm. In order to weaken the space charge effect caused by the incidence of high flux photons (corresponding to a large dynamic range), the working voltage of the Sensor is designed to be ≥200V (conventionally generally 120V). In order to obtain a large working voltage, the number of guard rings of the Sensor is designed to be 8 (conventionally 4-5). At the same time, the distance from the outside of the guard ring to the scribe line is further increased to 300 μm.

[0065] 3) The frame refresh rate of the vacuum type semiconductor detector is ≥1 kHz; the dynamic range of the vacuum type semiconductor detector is ≥10 4 ph. / pixel / pulse @12keV; the vacuum type semiconductor detector has single photon sensitivity and S / N≥5 @12keV; the pixel size of the vacuum type semiconductor detector is ≤200 μm×200 μm; the number of pixels of the vacuum type semiconductor detector is ≥65536; the sensitive area of the vacuum type semiconductor detector is ≥2.5 cm×10.2 cm; the quantum efficiency of the vacuum type semiconductor detector is ≥80% @12keV; and the response energy region of the vacuum type semiconductor detector is 6keV-20keV.

[0066] 4) The ASIC adopts a commercial 130nm CMOS process to reduce the cost of tape-out. Considering the signal integrity, power integrity and other limiting factors, the pixel size of the ASIC is ≤200 μm×200 μm, and is preferably 200 μm×200 μm. The number of pixels is ≥64 (X) ×64 (Y), and is preferably 64 (X) ×64 (Y).

[0067] 5) In order to obtain high frame refresh frequency, a pixel-level digitization scheme is used in the ASIC, the analog signal is converted into digital signal at the pixel end, so as to reduce the attenuation and interference of analog signal transmission, and high-speed transmission is realized through the digital signal.

[0068] 6) In order to realize single photon sensitivity, a pixel-level, high-sensitivity charge-sensitive preamplifier is used in the ASIC, and the signal input by the sensor is amplified in time.

[0069] 7) In order to realize large dynamic range, the charge-sensitive preamplifier adopts a three-stage gain adaptive design:

[0070] (1) The preamplifier works in a high gain state by default, and the feedback capacitance is about 10 fF. It corresponds to the case that the number of incident photons is small and the signal is small. Small feedback capacitance can realize large signal multiplication, obtain good signal-to-noise ratio, and realize single photon sensitivity.

[0071] (2) When the number of incident photons increases and the signal exceeds the discriminator threshold of the gain switching circuit, the preamplifier automatically connects a feedback capacitance of 1 pF, and switches from the high gain state to the medium gain state.

[0072] (3) When the number of incident photons further increases, the preamplifier will automatically connect a feedback capacitance of 10 pF, and switch from the medium gain state to the low gain state.

[0073] The vacuum type semiconductor detector adopts a charge integration readout signal processing method, which can be applied to instantaneous (≤100 fs) pulse type photon detection. At the same time, the detector has the advantages of high frame refresh frequency (≥1 kHz), single photon sensitivity (@12keV), large dynamic range (≥10 4 photons / pixel / frame @12keV). BRIEF DESCRIPTION OF DRAWINGS

[0074] Figure 1 It is a structure assembly drawing of the front end module in the application.

[0075] Figure 2 It is an exploded view of the structure of the front end module in the application.

[0076] Figure 3 It is a process flow chart of the vacuum type semiconductor detector in the application.

[0077] Figure 4 It is a single photon spectrum of a single pixel of the detector in the application.

[0078] Figure 5 It is an X-ray imaging picture of the detector in the application.

[0079] Figure 6 It is a whole structure view of the vacuum type semiconductor detector in the application.

[0080] Figure 7 A sectional view of the vacuum-type semiconductor detector in the present application.

[0081] Figure 8 A partial view of the vacuum-type semiconductor detector in the present application.

[0082] Figure 9 A structural schematic diagram of the front panel in the present application.

[0083] Figure 10 A sectional schematic diagram of the front panel in the present application.

[0084] Figure 11 A structural schematic diagram of the vacuum electrode assembly in the present application.

[0085] Figure 12 A back view schematic diagram of the front-end module in the present application.

[0086] Figure 13 A front view schematic diagram of the front-end module in the present application.

[0087] Reference signs

[0088] Detector vacuum cavity 1

[0089] First support frame 11

[0090] First stand 11.1

[0091] Second stand 11.2

[0092] Front-end flange 12

[0093] Rear-end flange 13

[0094] Detector rear cavity 2

[0095] Second support frame 21

[0096] Rear-end readout board 22

[0097] Rear-end electronics assembly 23

[0098] Vacuum mechanism 3

[0099] Vacuum pump set 31

[0100] Vacuum gauge 32

[0101] Water cooling mechanism 4

[0102] Water cooling pipe 41

[0103] Front panel 5

[0104] First panel 51

[0105] Second panel 52

[0106] Vacuum electrode module 6

[0107] Intermediate adapter module 7

[0108] Detector first support 71

[0109] Detector second support 72

[0110] Front end module 8 DETAILED DESCRIPTION

[0111] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of protection of the present application. In the description of the present application, it should be noted that the terms "left side", "right side", "upper side", "lower side", "upper", "lower" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first" and "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance.

[0112] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connection" should be understood broadly, for example, it can be fixed connection, or detachable connection, or integral connection; it can be mechanical connection, or electrical connection; it can be direct connection, or indirect connection through intermediate medium, or internal communication of two elements. For those of ordinary skill in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0113] In addition, in the description of the present application, unless otherwise specified, the meaning of "a plurality of" is two or more.

[0114] Before the embodiments of the present application are described, the content related to the priority text will be briefly described: the vacuum type semiconductor detector described in the present application is equivalent to the vacuum type detector in the priority document, only the name is slightly different.

[0115] The embodiment of the application provides a process manufacturing procedure of a front-end module, comprising a front-end module, wherein the front-end module is prepared by the process manufacturing procedure of the front-end module, and the process manufacturing procedure of the front-end module comprises the following steps, and the front-end module can be referred to Figures 1-3 :

[0116] Step 1): connecting the Sensor and the ASIC to form a Chip Assembly. As an illustration, the Sensor is a sensor chip, which realizes conversion of an incident photon signal into an electric signal. The ASIC is an electronic front-end readout chip, which realizes further amplification, filtering, shaping and digitization of the electric signal. The Chip Assembly is a chip module obtained by packaging the Sensor and the ASIC together.

[0117] Step 2): fixing the Holder to the Mounting Block. As an illustration, the Holder is a mechanical support, which can play a supporting role and serve as a heat dissipation module. The Mounting Block is an operating tool of the front-end module, and details are shown in the patent , with the patent application number 202410706453X.

[0118] Step 3): mounting the Mounting Block with the fixed Holder to a positioning and pressing tool, then fixing the positioning and pressing tool to a dispensing machine, and dispensing glue on the surface of the Holder by using the dispensing machine. As an illustration, the positioning and pressing tool is shown in the patent , with the patent application number 202410706453X. The purpose of the glue on the surface of the Holder has two aspects. The first purpose is to firmly paste the Wire Bonding Board to the Holder, because the center of the Wire Bonding Board is a large connector, and therefore the center of the Holder needs to be hollowed out to accommodate the large connector. In addition, the Holder is also designed with a groove to accommodate the low dropout regulator (LDO), resistor or filter capacitor and other components on the back of the Wire Bonding Board. Therefore, the gluing position on the surface of the Holder is limited. In addition, the large connector has a large number of pins, and the force is large when plugging the cable. Therefore, a glue with sufficient viscosity needs to be selected to ensure that the Wire Bonding Board does not loosen after being pasted to the Holder due to frequent plugging and unplugging of the cable. The second purpose is to achieve good heat conduction. The heat of the heating components on the ASIC and the Wire Bonding Board is dissipated through the Holder. Therefore, a glue with high thermal conductivity needs to be selected.

[0119] Step 4): Place the WireBondingBoard on the glue of the Holder with a tool, and apply uniform pressure on the surface of the WireBondingBoard with a torque wrench; then, dry the WireBondingBoard and wait for it to cool naturally to room temperature. As an illustration, the WireBondingBoard is a wire bonding board that realizes the connection of the signals of the ASIC to the electronics back-end readout board through leads and high-density connectors. The front side of the WireBondingBoard has no components, only wire bonding pads corresponding to the ASIC pads, and pads for introducing high voltage to the Sensor. The back side of the WireBondingBoard has multiple components, including low dropout linear regulators (LDOs), resistors, or filter capacitors, etc.

[0120] Step 5): Apply glue to the surface of the MountingBlock in step 4) using a dispensing machine. As an illustration, two points need to be noted in this step, the first point is that the glue coverage area should be large enough to fully contact the ASIC chip to improve heat dissipation. The second point is that the glue thickness should be large enough to adjust and buffer the warpage of the WireBondingBoard and the chip, reducing the stress on flip-chip soldering. Therefore, the final choice is a "hui" type glue coating, rather than a regular "mi" type glue coating. The glue area covers the ASIC size as much as possible without spilling out of the ASIC joint.

[0121] Step 6): Place the ChipAssembly in step 1) on the surface of the WireBondingBoard with glue in step 5) using a placement machine. As an illustration, the placement machine is described in detail in the patent , patent application number: 2024110246406.

[0122] Step 7): Dry the MountingBlock in step 6) and wait for it to cool naturally to room temperature.

[0123] Step 8): Wire the MountingBlock in step 7) using a wire bonder.

[0124] Step 9): Remove the Holder from the MountingBlock with a tool, and the front-end module is completed.

[0125] The process flow of the front-end module provided by the embodiment of the application further includes at least one of the following technical features:

[0126] In step 1), the Sensor is subjected to quality screening and is recorded in the front-end module database. Preferably, the screening standard for the Sensor is that the breakdown voltage of the current collection ring is ≥200V.

[0127] In step 1), the ASIC is subjected to quality screening and recorded in the front-end module database, preferably, the screening standard of the ASIC is that the number of bad pixels is less than or equal to 50;

[0128] In step 1), the ChipAssembly is subjected to quality screening and recorded in the front-end module database, preferably, the screening standard of the ChipAssembly is that the number of failed pixel rows and columns is less than or equal to 5;

[0129] In step 1), the pixel size of the Sensor is less than or equal to 200 μm x 200 μm, the number of pixels of the Sensor is greater than or equal to 65536, and the actual effective area of the Sensor is greater than or equal to 106 mm x 28 mm;

[0130] In step 1), the pixel size of the ASIC is less than or equal to 200 μm x 200 μm, the number of pixels of the ASIC is greater than or equal to 4096, and the size of the ASIC is greater than or equal to 12.8 mm x 14.4 mm;

[0131] In step 1), a plurality of ASICs are sequentially flip-chip bonded to the Sensor, preferably, the flip-chip bonding solder bumps are copper column tin caps, preferably, the ASICs are 2X8, preferably, the flip-chip bonding solder bumps have a diameter of 20-40 μm, a height of 40-50 μm, and a minimum spacing between adjacent solder bumps of 50-70 μm.

[0132] In step 2), the number of the Holder is recorded in the front-end module database;

[0133] In step 2), the Holder is subjected to ultrasonic cleaning with alcohol, preferably, the ultrasonic frequency is 20-60 kHz, and the ultrasonic time is 10-20 min;

[0134] In step 2), the MountingBlock is subjected to ultrasonic cleaning with alcohol, preferably, the ultrasonic frequency is 20-60 kHz, and the ultrasonic time is 10-20 min;

[0135] In step 4), the WireBondingBoard and the positioning and pressing tool are placed together in an oven for drying, preferably, the oven temperature is 90°C, and the drying time is 30 min;

[0136] In step 4), the size of the Holder is the size of the WireBondingBoard with a redundancy of less than or equal to 100 μm on each side;

[0137] In step 4), the size of the Holder is greater than or equal to 107.26 mm x 30.76 mm;

[0138] In step 4), the Holder is made of aluminum;

[0139] In step 4), steps are arranged on the two long edges of the Holder;

[0140] In step 4), laser marking is performed on the Holder to mark the position and number of each ASIC chip;

[0141] In step 4), the torque of the torque wrench is greater than or equal to 5 N*m;

[0142] In step 4), the bending degree of the WireBondingBoard is less than or equal to 50 microns;

[0143] In step 4), the size of the WireBondingBoard is greater than or equal to 107.06 mm x 30.56 mm.

[0144] In the process flow of the front-end module provided in the embodiment of the application, step 5) further comprises any one of the following technical features:

[0145] In step 5), the glue is selected to be non-conductive glue with high bonding strength and high thermal conductivity;

[0146] In step 5), the groove in the Holder adopts a back-to-back shape for glue dispensing, and the surface of the Holder adopts linear glue dispensing.

[0147] In the process flow of the front-end module provided in the application, step 6) further comprises any one of the following technical features:

[0148] In step 6), the front surface of the WireBondingBoard is provided with wire bonding pads corresponding to the ASIC pads, and preferably, each ASIC leads out 111 leads to the wire bonding pads;

[0149] In step 6), the leads of the ASIC are gold leads;

[0150] In step 6), the wire bonding between the ASIC and the WireBondingBoard is completed by ultrasonic heat compression welding;

[0151] In step 6), the back surface of the WireBondingBoard is provided with a large connector, and preferably, the number of pins of the large connector is 180 Pin;

[0152] In step 6), the back surface of the WireBondingBoard is provided with LDOs consistent with the number of ASICs.

[0153] As an illustration, if step 6) adopts the chip mounter in the application number 2024110246406, named , the specific mounting process in step 6) is as follows:

[0154] Start: Turn on compressed air, turn on power, start computer, and open operation software.

[0155] Loading: Place ChipAssembly on the loading unit with anti-static vacuum tweezers, so that the long and short edges of ChipAssembly are close to the first positioning pins respectively. Place WireBondingBoard (actually a sample module with mechanical support) on the stage, so that the long and short edges of WireBondingBoard are close to the second positioning pins respectively. Turn on the vacuum generator to adsorb WireBondingBoard.

[0156] Suction: Control the suction nozzle to move above the loading unit along the first guide rail (X-axis); make the suction nozzle press down along the second guide rail (Z-axis) to adsorb ChipAssembly on the loading unit. Usually, the suction nozzle is set to stop near the surface of ChipAssembly and then slowly press down on ChipAssembly to prevent damage to ChipAssembly caused by overshoot.

[0157] Taking: After ChipAssembly is adsorbed by the suction nozzle and lifted along the second guide rail (Z-axis), move along the first guide rail (X-axis) to the stage position.

[0158] Moving into WireBondingBoard: Adjust the position of the stage on the third guide rail (Y-axis) to roughly align WireBondingBoard with ChipAssembly.

[0159] Moving into spectrometer prism control cylinder piston structure: make the piston pop out two spectrometer prisms to the working position, and turn on the LED lights at the upper and lower ends of the two spectrometer prisms.

[0160] Coarse alignment: observe the positioning marks (Mark, a pair of upper and lower corners) of ChipAssembly and WireBondingBoard on the display, and adjust the positions of ChipAssembly and WireBondingBoard through the first guide rail (X-axis), the third guide rail (Y-axis), and the rotating unit (U-axis) to make the reference points of ChipAssembly and WireBondingBoard align at both ends of the same long side, thereby achieving overall alignment of ChipAssembly pads and WireBondingBoard pads.

[0161] Moving out spectrometer prism: control the cylinder piston structure to retract the piston and drive the spectrometer prisms to retract.

[0162] Pressing down: press down the suction nozzle to the set position on the second guide rail (Z-axis) through the software end.

[0163] Fine alignment: after the coarse alignment of the Chip Assembly and the Wire Bonding Board is completed, the LED light on the gradient microscope is turned on to further observe the image of the Chip Assembly and the Wire Bonding Board on the display, and the position of the Chip Assembly and the Wire Bonding Board is adjusted through the first guide rail (X-axis), the third guide rail (Y-axis) and the rotating unit (U-axis) so that the reference points of the Chip Assembly and the reference points of the Wire Bonding Board are aligned at the positioning marks at two opposite corners in the long direction, the pad alignment, the pad spacing and the wireability are confirmed, and the fine alignment is completed.

[0164] Pasting: the suction nozzle is pressed downward along the second guide rail (Z-axis) through the control module, and the suction nozzle is pressed downward to the Chip Assembly and the Wire Bonding Board. When the suction nozzle is pressed downward, the pressure of the suction nozzle is detected through the pressure sensor of the suction nozzle, and when the monitoring pressure is reached, the downward pressing of the suction nozzle is automatically stopped to avoid damage to the Chip Assembly.

[0165] Releasing: after the pasting is completed, the vacuum generator is turned off, the sample is taken out and placed in an oven to dry the glue.

[0166] In step 7), the Mounting Block is placed in an oven for drying, preferably, the temperature of the oven is 90 DEG C, and the drying time is 30 minutes.

[0167] In step 8), the bottom surface of the Mounting Block is provided with positioning holes capable of matching the wire bonding clamp of the wire bonding machine, the positioning hole on one side of the bottom surface of the Mounting Block is connected with the wire bonding clamp, the wire bonding of the ASIC on one half of the Mounting Block is performed, then the positioning hole on the other side of the bottom surface of the Mounting Block is connected with the wire bonding clamp, and the wire bonding of the ASIC on the other half of the Mounting Block is performed.

[0168] In step 8), after the wire bonding of all the ASICs on the Mounting Block is completed, the wire bonding of the ASIC is checked under a microscope.

[0169] In step 9), the front-end module is subjected to X-ray testing, and the front-end module is subjected to quality grading, preferably, the quality screening standard of the front-end module is that there is no large area of bad points, and the number of invalid pixel rows and columns on a single ASIC is less than 5.

[0170] In the vacuum type semiconductor detector provided by the embodiment of the present application, referring to Figure 6 and Figure 7Also include a detector vacuum cavity 1, a detector rear cavity 2, a vacuum mechanism 3 and a water cooling mechanism 4, as an illustration, the atmosphere environment in the detector vacuum cavity 1 and the detector rear cavity 2 is mutually isolated, the detector vacuum cavity 1 is a vacuum environment, and the detector rear cavity 2 is a near normal pressure environment. Figure 8 , the inner cavity of the detector vacuum cavity 1 is provided with a first support frame 11, generally, both ends of the detector vacuum cavity 1 are provided with a sealing flange, the first support frame 11 extends along one of the sealing flanges to the other sealing flange, the first support frame 11 is provided with a front panel 5, the front panel 5 is generally perpendicular to the first support frame 11, and the front end module 8 is arranged in the front panel 5, as an illustration, the front end module 8 is a core functional unit of the vacuum type semiconductor detector, can realize conversion of incident X-ray photons into digitized electrical signals, and continuously transmit to the rear end, and a structural schematic diagram of the front end module 8 can be referred to Figure 12 and Figure 13 , in a specific embodiment, the first support frame 11 is provided with an openwork to reduce the weight of the first support frame 11. Figure 8 , the water cooling mechanism 4 includes a water cooling pipe 41, one end of the water cooling pipe 41 is connected with the front panel 5, the other end of the water cooling pipe 41 penetrates out of the detector vacuum cavity 1 and is connected with a pump body, the vacuum mechanism 3 includes a vacuum pump group 31 and a vacuum gauge 32 arranged on the side wall of the detector vacuum cavity 1, in a specific embodiment, the vacuum pump group 31 includes a molecular pump and a mechanical pump connected in series, the model of the molecular pump is preferably PFEIFFER VACUUM HIPACE 300, and the vacuum gauge 32 can test and monitor the vacuum environment in the inner cavity of the detector vacuum cavity 1, and the model of the vacuum gauge 32 is preferably PKR251. Figure 7 , the second support frame 21 is provided with a rear end readout board 22, the rear end readout board 22 is provided with a rear end electronics assembly 23, as an illustration, the rear end electronics assembly 23 includes a high-performance FPGA, receives the digitized signal transmitted from the front end module 8, decodes, re-encodes, packs and high-speed transmits the digitized signal, and simultaneously transmits the configuration information of the upper computer to the front end module 8, and the front end module 8 penetrates out of the detector vacuum cavity 1 through a vacuum cable and is connected with the rear end readout board 22 in the detector rear cavity 2, in a specific embodiment, the second support frame 21 is provided with an openwork to reduce the weight of the second support frame 21.

[0171] In the vacuum type semiconductor detector provided by the embodiment of the application, referring to Figures 6-8The two ends of the detector vacuum cavity 1 are respectively provided with a front end flange 12 and a rear end flange 13, the front end flange 12 is suitable for being connected with a sealing plate, and the rear end flange 13 is connected with a detector rear cavity 2, in a specific embodiment, the front end flange 12 is connected with the sealing plate through a screw, and the rear end flange 13 is connected with the detector rear cavity 2 through a screw, generally, the sealing plate cannot be detached from the front end flange 12, except for special cases, in addition, the sealing plate is selected from a transparent material. Figure 6 and Figure 7 Further comprising a detector first support 71 and a detector second support 72, the front end flange 12 is arranged on the detector first support 71, and the rear end flange 13 is arranged on the detector second support 72.

[0172] In the vacuum type semiconductor detector provided by the embodiment of the present application, referring to Figure 9 and Figure 10 The front panel 5 comprises a first panel 51 and a second panel 52, the first panel 51 is provided with a first slot, and the front end module 8 is arranged in the first slot, and the second panel 52 is provided with a second slot for the connector and the vacuum cable to pass through, in a specific embodiment, the first panel 51 and the second panel 52 are connected through a screw. The second panel 52 is also provided with a water cooling channel surrounding the second slot, the water cooling pipe 41 comprises a water cooling inlet pipe and a water cooling outlet pipe, and the water cooling inlet pipe and the water cooling outlet pipe are connected with the water cooling channel, in a preferred embodiment, the water cooling pipe 41 is a vacuum bellows.

[0173] In the vacuum type semiconductor detector provided by the embodiment of the present application, referring to Figure 11 The rear end flange 13 is provided with a vacuum electrode module 6, the vacuum electrode module 6 comprises a flexible adapter plate, an atmospheric end fixing part, a vacuum end fixing part, an atmospheric adapter assembly, a vacuum adapter assembly and a vacuum flange; the flexible adapter plate is arranged in the rear end flange 13 and the vacuum flange, and the flexible adapter plate is arranged on the atmospheric end fixing part and the vacuum end fixing part respectively; the atmospheric adapter assembly is arranged on the flexible adapter plate and is suitable for adapting signals between the flexible adapter plate and the rear end readout plate 22; the vacuum adapter assembly is arranged on the flexible adapter plate and is suitable for adapting signals between the flexible adapter plate and the front end module 8. As an illustration, the structure of the vacuum electrode module 6 will not be described here, and the specific structure can be referred to the vacuum electrode module 6 in the patent with the application date of June 28, 2024, the patent name of a vacuum electrode, a vacuum electrode system and an assembling method thereof, and the application number of 2024108574116.

[0174] In the vacuum type semiconductor detector provided by the embodiment of the present application, referring to Figure 7 and 8It also includes a relay module 7 for transferring signals between the front-end module 8 and the flexible adapter board. The first support frame 11 is provided with a first platform 11.1 and a second platform 11.2. The relay module 7 is located on the first platform 11.1, and the vacuum adapter assembly is located on the second platform 11.2.

[0175] In the vacuum semiconductor detector provided in the embodiments of the present invention, please refer to Figure 4 The frame refresh rate of the vacuum semiconductor detector is ≥1kHz; the dynamic range of the vacuum semiconductor detector is ≥10. 4 The vacuum semiconductor detector has a pixel size ≤ 200μm × 200μm, preferably 200μm × 200μm; the vacuum semiconductor detector has single-photon sensitivity and S / N ≥ 5 @ 12keV; the vacuum semiconductor detector has a pixel number ≥ 65536, preferably 65536; the vacuum semiconductor detector has a sensitive area ≥ 2.5cm × 10.2cm, preferably 2.5cm × 10.2cm; the vacuum semiconductor detector has a quantum efficiency ≥ 80% @ 12keV; the vacuum semiconductor detector has a response energy range of 6keV to 20keV; the single-photon energy spectrum of the vacuum semiconductor detector is as follows: Figure 5 As shown.

[0176] The vacuum semiconductor detector provided in this invention employs a hybrid approach, unlike the monolithic approach (typically represented by CMOS Imaging Sensors and Charge Coupled Devices). In this hybrid approach, the signal sensing unit (Sensor) and the signal processing unit (ASIC) are separated into two independent chips. The advantage of this hybrid approach is that the two chips can be optimized using different semiconductor processes and methods.

[0177] The sensor employs silicon planar technology to fabricate a bulk silicon, pixel-based PhotoDiode array on a high-resistivity, high-purity silicon wafer. The pixel size is ≤200μm × 200μm, and the number of pixels is ≥512(X) × 128(Y). To achieve high quantum efficiency (≥80% @ 12keV), the sensor chip thickness is designed to be ≥500μm. To mitigate the space charge effect caused by high-throughput photon incidence (corresponding to a large dynamic range), the sensor's operating voltage is designed to be ≥200V (compared to the conventional 120V). Furthermore, to achieve this high operating voltage, the number of guard rings is designed to be greater than the conventional 4-5, preferably 8; simultaneously, the distance from the outer edge of the guard ring to the scribe line is further increased to ≥300μm.

[0178] The ASIC adopts a commercial 130nm CMOS process to reduce the cost of tape-out.

[0179] To obtain a high frame refresh frequency, a pixel-level digitization scheme is adopted in the ASIC, and the analog signal is converted into a digital signal at the pixel end to reduce the attenuation and interference of analog signal transmission, and high-speed transmission is realized through the digital signal.

[0180] To realize a large dynamic range, the charge-sensitive preamplifier adopts a three-stage gain adaptive design:

[0181] (1) The preamplifier works in a high-gain state by default, and the feedback capacitance is about 10fF. It corresponds to the case that the number of incident photons is small and the signal is small. Small feedback capacitance can realize large signal multiplication, obtain good signal-to-noise ratio, and realize single-photon sensitivity.

[0182] (2) When the number of incident photons increases and the signal exceeds the discriminator threshold of the gain switching circuit, the preamplifier automatically connects a feedback capacitor of about 1pF, and switches from a high-gain state to a medium-gain state.

[0183] (3) When the number of incident photons further increases, the preamplifier will automatically connect a feedback capacitor of about 10pF, and switch from a medium-gain state to a low-gain state.

[0184] The vacuum semiconductor detector adopts a charge integration readout signal processing method, which can be applied to instantaneous (≤100fs) pulse type photon detection. At the same time, the vacuum semiconductor detector has the advantages of high frame refresh frequency (≥1kHz), single-photon sensitivity (@12keV), large dynamic range (≥10 4 photons / pixel / frame @12keV).

[0185] The embodiment of the present application also provides an assembly method of the vacuum semiconductor detector, which further comprises the following steps:

[0186] Step 1) mounting the first support frame 11 and the second support frame 21 in the inner cavity of the detector vacuum cavity 1; before step 1), it can further comprise: first mounting the detector first support 71 and the detector second support 72 in a clean environment; and assembling the vacuum electrode module 6;

[0187] Step 2) mounting the front panel 5 and the back end readout board 22 on the first support frame 11 and the second support frame 21 respectively, and mounting the front end module 8 in the front panel 5, and a shielding plate is usually detachably mounted on the working end of the front end module 8; before Step 2), Step 1) can further include mounting the first support frame 11 and the second support frame 21 to the two sides of the back end flange 13 respectively; and mounting the vacuum electrode module 6 in the back end flange 13;

[0188] Step 3) mounting the cooling mechanism 4, and connecting the water cooling pipe 41 with the front panel 5;

[0189] Step 4) connecting the front end module 8 and the back end readout board 22 through a vacuum cable; further, connecting the front end module 8 and the vacuum electrode module 6 through a high-density vacuum cable, and connecting the back end readout board 22 and the vacuum electrode module 6 through a high-density cable;

[0190] Step 5) mounting the vacuum pump group 31 and the vacuum gauge 32 to the sidewall of the detector vacuum cavity 1;

[0191] Step 6) mounting the back end electronics assembly 23. The above is only the preferred embodiment of the present application, and it should be noted that for those skilled in the art, several improvements and replacements can be made without departing from the technical principles of the present application, and these improvements and replacements should also be considered as the protection scope of the present application.

Claims

1. A vacuum-type semiconductor detector, characterized by, The front-end module is prepared by a process flow of the front-end module, and the process flow of the front-end module comprises the following steps: Step 1): connecting the Sensor and the ASIC to form a Chip Assembly; Step 2): fixing the Holder to the Mounting Block; Step 3): mounting the Mounting Block with the fixed Holder to a positioning and pressing tool, fixing the positioning and pressing tool to a dispensing machine, and dispensing glue on the surface of the Holder by the dispensing machine; Step 4): placing the Wire Bonding Board on the glue of the Holder by a tool, and applying uniform pressure on the surface of the Wire Bonding Board by a torque wrench; then, drying the Wire Bonding Board and naturally cooling it to room temperature; Step 5): dispensing glue on the surface of the Mounting Block in step 4) by a dispensing machine; Step 6): placing the Chip Assembly in step 1) on the surface of the Wire Bonding Board with the dispensed glue in step 5) by a chip mounter; Step 7): drying the Mounting Block in step 6) and naturally cooling it to room temperature; Step 8): wire bonding the Mounting Block in step 7) by a wire bonding machine; Step 9): taking the Holder off the Mounting Block by a tool, and thus the front-end module is completed.

2. The vacuum-type semiconductor detector according to claim 1, characterized in that The front-end module further comprises at least one of the following technical features: In step 1), the Sensor is subjected to quality screening and recorded in a front-end module database, and preferably, the screening standard of the Sensor is that the breakdown voltage of the current collecting ring is greater than or equal to 200 V; In step 1), the ASIC is subjected to quality screening and recorded in the front-end module database, and preferably, the screening standard of the ASIC is that the number of defective pixels is less than or equal to 50; In step 1), the Chip Assembly is subjected to quality screening and recorded in the front-end module database, and preferably, the screening standard of the Chip Assembly is that the number of defective pixel rows and columns is less than or equal to 5; In step 1), the pixel size of the Sensor is less than or equal to 200 μm x 200 μm, the number of pixels of the Sensor is greater than or equal to 65536, and the actual effective area of the Sensor is greater than or equal to 106 mm x 28 mm; In step 1), the pixel size of the ASIC is less than or equal to 200 μm x 200 μm, the number of pixels of the ASIC is greater than or equal to 4096, and the size of the ASIC is greater than or equal to 12.8 mm x 14.4 mm; In step 1), a plurality of ASICs are flip-chip bonded to the Sensor in sequence, preferably, the flip-chip bonding soldering bumps are copper column tin caps, preferably, the ASICs are 2X8, preferably, the flip-chip bonding soldering bumps have a diameter of 20-40 μm, a height of 40-50 μm, and a minimum spacing between adjacent soldering bumps of 50-70 μm. In step 2), the number of the Holder is recorded in the front-end module database. In step 2), the Holder is ultrasonically cleaned with alcohol, preferably at a frequency of 20-60 kHz for 10-20 minutes; In step 2), the Mounting Block is ultrasonically cleaned with alcohol, preferably at a frequency of 20-60 kHz for 10-20 minutes; In step 4), the Wire Bonding Board and the positioning and pressing tool are placed in an oven for drying, preferably at a temperature of 90°C for 30 minutes; In step 4), the size of the Holder is 107.26 mm x 30.76 mm, with a redundancy of ≤100 μm on each side; In step 4), the size of the Holder is 107.26 mm x 30.76 mm; In step 4), the Holder is made of aluminum; In step 4), the Holder has steps on the two long sides; In step 4), the Holder is laser-engraved to indicate the position and number of each ASIC chip; In step 4), the torque of the torque wrench is ≥5 N*m; In step 4), the bending degree of the Wire Bonding Board is ≤50 μm; In step 4), the size of the Wire Bonding Board is 107.06 mm x 30.56 mm.

3. The vacuum-type semiconductor detector according to claim 1, characterized in that At least one of the following technical features is also included: In step 5), the glue is selected to be a non-conductive glue with high adhesion strength and high thermal conductivity; In step 5), the recess in the Holder is filled with a back-shaped glue, and the surface of the Holder is filled with a linear glue. In step 6), the front surface of the Wire Bonding Board is provided with wire bonding pads corresponding to the ASIC pads, preferably with 111 leads from each ASIC to the wire bonding pads; In step 6), the leads of the ASIC are gold wires; In step 6), the wire bonding between the ASIC and the Wire Bonding Board is completed by ultrasonic thermal compression welding; In step 6), the back surface of the Wire Bonding Board is provided with a large connector, preferably with 180 pins; In step 6), the back surface of the Wire Bonding Board is provided with LDOs consistent with the number of ASICs. In step 7), the Mounting Block is placed in an oven for drying, at a temperature of 80-100°C for 20-40 minutes, preferably at a temperature of 90°C for 30 minutes; In step 8), the bottom surface of the Mounting Block is provided with positioning holes on both sides that can match the wire bonding clamps of the wire bonding machine, the positioning holes on one side of the bottom surface of the Mounting Block are connected with the wire bonding clamps to wire bond the ASICs on one half of the Mounting Block, and then the positioning holes on the other side of the bottom surface of the Mounting Block are connected with the wire bonding clamps to wire bond the ASICs on the other half of the Mounting Block. In step 8), after all the ASICs on the mounting block are wire-bonded, the wire-bonding of the ASICs is checked under a microscope. In step 9), the quality screening standard of the front-end module is that there is no large area of bad points, and the number of failed pixel rows and columns on a single ASIC is less than or equal to 5. In step 9), the front-end module is subjected to X-ray testing, and the front-end module is graded in quality.

4. The vacuum-type semiconductor detector according to any one of claims 1 to 3, characterized in that: The vacuum type semiconductor detector further comprises a detector vacuum cavity, a detector rear cavity, a vacuum mechanism and a water cooling mechanism; The inner cavity of the detector vacuum cavity is provided with a first support frame, the first support frame is provided with a front panel, and the front-end module is arranged in the front panel; the water cooling mechanism comprises a water cooling pipe, one end of the water cooling pipe is connected with the front panel, the other end of the water cooling pipe penetrates out of the detector vacuum cavity and is connected with a pump body outside; the vacuum mechanism comprises a vacuum pump group and a vacuum gauge arranged on the side wall of the detector vacuum cavity; The inner cavity of the detector rear cavity is provided with a second support frame, the second support frame is provided with a rear readout panel, and the rear readout panel is provided with a rear-end electronics assembly; The front-end module penetrates out of the detector vacuum cavity through a vacuum cable and is connected with the rear readout panel in the detector rear cavity.

5. The vacuum-type semiconductor detector according to claim 4, characterized in that The front-end module serves as a detection element of a vacuum-type semiconductor detector; and / or a frame refresh rate of the vacuum-type semiconductor detector is ≥1 kHz; a dynamic range of the vacuum-type semiconductor detector is ≥10 4 ph. / pixel / pulse@12keV; the vacuum-type semiconductor detector has single-photon sensitivity and a signal-to-noise ratio (S / N) of ≥5@12keV; a pixel size of the vacuum-type semiconductor detector is ≤200μm×200μm; a number of pixels of the vacuum-type semiconductor detector is ≥65536; a sensitive area of the vacuum-type semiconductor detector is ≥2.5cm×10.2cm; a quantum efficiency of the vacuum-type semiconductor detector is ≥80%@12keV; and a response energy region of the vacuum-type semiconductor detector is 6keV-20keV.

6. The vacuum-type semiconductor detector according to claim 4, characterized in that: The two ends of the detector vacuum cavity are respectively provided with a front flange and a rear flange, the front flange is suitable for being connected with a closure plate, and the rear flange is connected with the detector rear cavity; further comprising a detector first support and a detector second support, the front flange is arranged on the detector first support, and the rear flange is arranged on the detector second support.

7. The vacuum-type semiconductor detector according to claim 4, characterized in that: The front panel comprises a first panel and a second panel, the first panel is provided with a first slot, and the front-end module is arranged in the first slot; the second panel is provided with a second slot for the adapter and the vacuum cable to penetrate through; The second panel is further provided with a water cooling passage surrounding the second slot, and the water cooling pipe comprises a water cooling inlet pipe and a water cooling outlet pipe, both of which are in communication with the water cooling passage.

8. The vacuum-type semiconductor detector according to claim 4, characterized in that: The rear flange is provided with a vacuum electrode module, the vacuum electrode module comprises a flexible adapter plate, an atmospheric end fixing piece, a vacuum end fixing piece, an atmospheric adapter assembly, a vacuum adapter assembly and a vacuum flange; The flexible adapter plate penetrates the rear flange and the vacuum flange, and the flexible adapter plate is arranged on the atmospheric end fixing piece and the vacuum end fixing piece respectively; the atmospheric adapter assembly is arranged on the flexible adapter plate and is suitable for adapting the signal between the flexible adapter plate and the rear readout panel; The vacuum adapter assembly is arranged on the flexible adapter plate and is suitable for adapting the signal between the flexible adapter plate and the front-end module.

9. The vacuum-type semiconductor detector according to claim 4, characterized in that: Further comprising a relay adapter module for adapting the signal between the front-end module and the flexible adapter plate; the first support frame is provided with a first support table and a second support table, the relay adapter module is arranged on the first support table, and the vacuum adapter assembly is arranged on the second support table.

10. A method of assembling a vacuum-type semiconductor detector according to any one of claims 1 to 9, characterized in that, Further comprising the following steps: Step 1), installing the first support frame and the second support frame in the inner cavity of the detector vacuum cavity; Step 2), installing the front panel and the rear readout panel on the first support frame and the second support frame respectively, and installing the front-end module in the front panel; Step 3) Install cooling mechanism and connect water cooled tube to front faceplate; Step 4) Connect front end module to back end readout board via vacuum cable; Step 5) Install vacuum pump set and vacuum gauge to side wall of detector vacuum chamber; Step 6) Install other components in the back chamber of the detector.

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