Atmospheric semiconductor detector and manufacturing process thereof
By employing charge integration readout technology and a hybrid PAD design, the challenge of pulsed photon detection on the XFEL device was solved, achieving high frame refresh rate, single-photon sensitivity, and large dynamic range photon detection performance.
Patent Information
- Application Number
- CN202411880945.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-10-10
- Filing Date
- 2024-12-19
- Publication Date
- 2025-11-18
AI Technical Summary
Existing surface detectors are not suitable for ultra-short, ultra-high brightness pulsed photon detection, especially in XFEL devices, where there is a lack of commercially available PADs that can match pulsed photon detection.
The PAD design employs charge integration readout and uses a hybrid approach to separate the sensor and ASIC into two independent chips. The sensor uses a silicon planar process, while the ASIC uses a commercial 130nm CMOS process. Pixel-level digital signal processing and a three-level gain adaptive design are implemented within the ASIC.
It achieves efficient detection of instantaneous pulse photons, and features high frame refresh rate, single-photon sensitivity and large dynamic range, making it suitable for XFEL devices.
Smart Images
Figure CN120980993A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of semiconductor detectors, in particular to an atmospheric semiconductor detector and a process manufacturing flow thereof. BACKGROUND
[0002] Area detector is a kind of common two-dimensional detector on advanced light source large science facilities (such as synchrotron radiation light source SR, X-ray free electron laser XFEL, etc.). Detectors with similar naming methods also include point detector (i.e. zero-dimensional detector, such as photodiode, silicon drift chamber, etc.) and line detector (i.e. one-dimensional detector, such as silicon microstrip detector). Currently, the area detector widely used on advanced light sources, unless otherwise specified, generally refers to pixel array detector (PAD). It is a kind of high-granularity semiconductor detector, which can realize the segmentation of the sensitive unit of the detector, the extraction of the detector signal, the high-speed processing and transmission of the signal in the interval of hundreds of microns or even microns, and has high spatial resolution (intrinsic resolution ≤ 10 μm), fast time response (signal scale ≤ 10 ns), strong anti-radiation and other excellent performances.
[0003] The scientific experiments on advanced light source large science facilities can be roughly divided into three categories: imaging, scattering and spectroscopy. To date, PAD has become an indispensable main detector for scattering, imaging scientific experiments, and is also a commonly used detector for grating or crystal-based spectroscopy experiments. In specific scientific applications, PAD is a key core equipment for many frontier scientific researches such as small molecule chemical reaction control and observation, biological molecule structure research and molecular dynamic imaging, dynamic, structure and function of biological assembly in near-real environment, and atomic scale time resolution of biological molecules. In particular, combined with XFEL with full coherence and high repetition frequency, PAD can help to realize atomic level spatial resolution and femtosecond level time resolution of single molecule / single particle, realize molecular level dynamic three-dimensional imaging and structure analysis. Further, combined with pump laser, PAD can help to realize real-time observation of chemical reactions on atomic scale, study energy and charge transfer rules on femtosecond scale and instantaneous structure imaging.
[0004] These new and frontier scientific experiments have the following general requirements for the area detector: on the one hand, it is required to have a high enough spatial resolution to accurately measure the position of the diffraction spot; on the other hand, it is required to have a large enough detection area to obtain diffraction data at a large angle. This requires that the area detector has both a small pixel size to obtain a high spatial resolution and a large number of pixels to obtain a large detection area. In theory, to reduce the detection dead zone, the detection panel of the area detector is preferably filled with a pixel array throughout the panel. However, due to the limitations of integrated circuit processing and packaging technology, the detection panel cannot be made from a single wafer, and a tile-like method is generally used to obtain a large detection area. The "tile" used for tiling is called a front-end module (FEM). The FEM is also a basic functional unit of the PAD.
[0005] Compared with SR, the photon characteristics of XFEL are super-short and super-high brightness pulses. The photon pulse width of XFEL is in the order of femtoseconds to hundreds of femtoseconds, the number of photons in a single pulse can reach 10 12 photons, and the number of photons hitting a single pixel of the detector in a single pulse can reach 10 4 photons. Therefore, the single-photon counting PAD widely used on SR cannot be applied to XFEL. XFEL requires a PAD that can match the pulse-type photon detection. At present, there is no mature commercial product for such detectors. Major XFEL devices around the world are developing PADs independently for the beam characteristics of their respective devices. Under this background, the present application proposes a charge-integrating readout PAD that can be applied to the instantaneous (≤100 fs) pulse-type photon detection of XFEL devices. SUMMARY
[0006] To solve the above problems, the first aspect of the present application provides a process flow for manufacturing a front-end module, comprising the following steps:
[0007] Step 1): connecting Sensor and ASIC to form Chip Assembly;
[0008] Step 2): fixing Holder to Mounting Block;
[0009] Step 3): mounting Mounting Block with fixed Holder to a positioning and pressing tool, then fixing the positioning and pressing tool to a dispensing machine, and dispensing on the surface of Holder using the dispensing machine;
[0010] Step 4): placing the WireBondingBoard on the glue of the Holder by using a tool, and applying uniform pressure on the surface of the WireBondingBoard by using a torque wrench; then, drying the WireBondingBoard and waiting for it to naturally cool to room temperature;
[0011] Step 5): dispensing glue on the surface of the MountingBlock in step 4) by using a dispensing machine;
[0012] Step 6): placing the ChipAssembly in step 1) on the surface of the WireBondingBoard in step 5) which has been dispensed with glue by using a chip mounter;
[0013] Step 7): drying the MountingBlock in step 6) and waiting for it to naturally cool to room temperature;
[0014] Step 8): wire bonding the MountingBlock in step 7) by using a wire bonder;
[0015] Step 9): taking the Holder off the MountingBlock by using a tool, and thus the front-end module is completed.
[0016] The process flow of the front-end module provided by the embodiment of the application further comprises at least one of the following technical features:
[0017] In step 1), the Sensor is subjected to quality screening and is recorded in a front-end module database, and preferably, the screening standard of the Sensor is that the breakdown voltage of the current collecting ring is greater than or equal to 200 V.
[0018] In step 1), the ASIC is subjected to quality screening and is recorded in a front-end module database, and preferably, the screening standard of the ASIC is that the number of bad pixels is less than or equal to 50.
[0019] In step 1), the ChipAssembly is subjected to quality screening and is recorded in a front-end module database, and preferably, the screening standard of the ChipAssembly is that the number of failed pixel rows and columns is less than or equal to 5.
[0020] In step 1), the pixel size of the Sensor is less than or equal to 200 μm x 200 μm, the number of pixels of the Sensor is greater than or equal to 65536, and the actual effective area of the Sensor is greater than or equal to 106 mm x 28 mm.
[0021] In step 1), the pixel size of the ASIC is less than or equal to 200 μm x 200 μm, the number of pixels of the ASIC is greater than or equal to 4096, and the size of the ASIC is greater than or equal to 12.8 mm x 14.4 mm.
[0022] In step 1), a plurality of ASICs are flip-chip bonded to the Sensor, preferably, the flip-chip bonding solder bumps are copper pillar tin caps, preferably, the ASICs are 2X8, preferably, the flip-chip bonding solder bumps have a diameter of 20-40 μm, a height of 40-50 μm, and a minimum spacing between adjacent solder bumps of 50-70 μm.
[0023] In step 2), the number of the Holder is recorded in the front-end module database.
[0024] In step 2), the Holder is ultrasonically cleaned with alcohol, preferably, the ultrasonic frequency is 20-60 kHz, and the ultrasonic time is 10-20 min.
[0025] In step 2), the Mounting Block is ultrasonically cleaned with alcohol, preferably, the ultrasonic frequency is 20-60 kHz, and the ultrasonic time is 10-20 min.
[0026] In the process flow of the front-end module provided in the embodiments of the application, step 4) further comprises at least one of the following technical features:
[0027] 1) The Wire Bonding Board and the positioning and pressing tool are placed together in an oven for drying, preferably, the oven temperature is 90°C, and the drying time is 30 min.
[0028] 2) The size of the Holder is 107.26 mm x 30.76 mm, with a redundancy of ≤100 μm on each side of the size of the Wire Bonding Board.
[0029] 3) The size of the Holder is ≥107.26 mm x 30.76 mm.
[0030] 4) The Holder is made of aluminum.
[0031] 5) The Holder further has steps on two long sides.
[0032] 6) The Holder is laser-engraved to indicate the position and number of each ASIC chip.
[0033] 7) The torque of the torque wrench is ≥5 N*m.
[0034] 8) The bending degree of the Wire Bonding Board is ≤50 μm.
[0035] 9) The size of the Wire Bonding Board is ≥107.06 mm x 30.56 mm.
[0036] In the process flow of the front-end module provided in the embodiments of the application, further comprises at least one of the following technical features:
[0037] In step 5), the glue is selected as a non-conductive glue with high bonding strength and high thermal conductivity;
[0038] In step 5), the groove in the Holder is filled with glue in a back-to-back shape, and the surface of the Holder is filled with glue in a linear shape.
[0039] In step 6), the front surface of the WireBondingBoard is provided with wire bonding pads corresponding to the pads of the ASICs, and preferably, each ASIC is connected to 111 wire bonding pads.
[0040] In step 6), the wire of the ASIC is gold wire.
[0041] In step 6), the wire bonding between the ASIC and the WireBondingBoard is completed by ultrasonic thermal compression welding.
[0042] In step 6), the back surface of the WireBondingBoard is provided with a large connector, and preferably, the number of pins of the large connector is 180Pin.
[0043] In step 6), the back surface of the WireBondingBoard is provided with LDOs consistent with the number of ASICs.
[0044] In step 7), the MountingBlock is placed in an oven for drying, the temperature of the oven is 80-100℃, and the drying time is 20-40min, and preferably, the temperature of the oven is 90℃, and the drying time is 30min.
[0045] In step 8), the bottom surface of the MountingBlock is provided with positioning holes on both sides, which can match the wire bonding clamp of the wire bonding machine, the positioning hole on one side of the bottom surface of the MountingBlock is connected with the wire bonding clamp, and the wire bonding of the ASICs on one half of the MountingBlock is performed, then the positioning hole on the other side of the bottom surface of the MountingBlock is connected with the wire bonding clamp, and the wire bonding of the ASICs on the other half of the MountingBlock is performed.
[0046] In step 8), after the wire bonding of all the ASICs on the MountingBlock is completed, the wire bonding of the ASICs is checked under a microscope.
[0047] In step 9), the quality screening standard of the front-end module is that there is no large area of bad points, and the number of failed pixel rows and columns on a single ASIC is ≤5.
[0048] In step 9), the front-end module is subjected to X-ray testing, and the quality of the front-end module is graded.
[0049] The second aspect of the present application provides a front-end module prepared by the process manufacturing procedure of the first aspect of the present application.
[0050] The third aspect of the present application provides an atmospheric semiconductor detector comprising the front-end module of the second aspect of the present application.
[0051] In an embodiment of the present application, the atmospheric semiconductor detector comprises a detector housing and a front panel located at one end of the detector housing, the front panel comprises a first panel and a second panel, the first panel is provided with a first slot, and the front-end module is arranged in the first slot; the second panel is provided with a second slot for the connector and the vacuum cable to pass through; the atmospheric semiconductor detector is provided with a back-end readout panel on the bottom plate, and the back-end readout panel is provided with a back-end electronic component; the front-end module is connected with the back-end readout panel through a high-density cable; and the first panel is provided with a plurality of adaptive holes, each adaptive hole is adapted to be connected with a sample component or a shielding plate.
[0052] In an embodiment of the present application, the front-end module serves as a detection element of the atmospheric semiconductor detector; and / or, the frame refresh rate of the atmospheric semiconductor detector is ≥1 kHz; the dynamic range of the atmospheric semiconductor detector is ≥10 4 ph. / pixel / pulse@12keV; the atmospheric semiconductor detector has single-photon sensitivity and S / N≥5@12keV; the pixel size of the atmospheric semiconductor detector is ≤200μm×200μm; the number of pixels of the atmospheric semiconductor detector is ≥65536; the sensitive area of the atmospheric semiconductor detector is ≥2.5cm×10.2cm; the quantum efficiency of the atmospheric semiconductor detector is ≥80%@12keV; and the response energy region of the atmospheric semiconductor detector is 6keV-20keV.
[0053] The fourth aspect of the present application provides a use of the front-end module of the second aspect of the present application as a detection element of the atmospheric semiconductor detector of the third aspect of the present application.
[0054] The fifth aspect of the present application provides an assembly method of the atmospheric semiconductor detector of the third aspect of the present application, further comprising the following steps:
[0055] Step 1) installing the front-end module of the second aspect of the present application on the front panel by using a tool;
[0056] Step 2) inserting a high-density signal cable into the front-end module;
[0057] Step 3) installing a back-end readout panel into the inner cavity of the atmospheric semiconductor detector;
[0058] Step 4) mounting the front panel to the atmospheric semiconductor detector;
[0059] Step 5) mounting the back-end electronics components on the back-end readout board;
[0060] Step 6) connecting the front-end module and the back-end readout board with high-density signal cables;
[0061] Step 7) mounting other parts in the inner cavity of the atmospheric semiconductor detector;
[0062] Step 8) inserting power supply cables, optical fiber cables and the like.
[0063] The present application has the following advantages:
[0064] 1) In terms of technical route, the atmospheric semiconductor detector provided by the present application adopts a hybrid scheme (Hybrid), and compared with a monolithic scheme (Monolithic, typical representatives are CMOS Imaging Sensor and Charge Coupled Device), a signal sensing unit (Sensor) and a signal processing unit (ASIC) are divided into two independent chips. The advantage of the hybrid scheme is that the two chips can be optimized in design by using different semiconductor processes and methods.
[0065] 2) The Sensor adopts a silicon planar process, and a body silicon type, pixel type PhotoDiode array is made on a high-resistance, high-purity silicon wafer, the pixel size is ≤200μm×200μm, and the pixel size is preferably 200μm×200μm, the number of pixels is ≥512(X)×128(Y), and the number of pixels is preferably 512(X)×128(Y). In order to obtain high quantum efficiency (≥80% @ 12keV), the thickness of the Sensor chip is designed to be ≥500μm, and the thickness of the Sensor chip is preferably 500μm. In order to weaken the space charge effect caused by the incidence of high-flux photons (corresponding to a large dynamic range), the working voltage of the Sensor is designed to be ≥200V (conventionally generally 120V). In order to obtain a large working voltage, the number of guard rings of the Sensor is designed to be 8 (conventionally 4-5); at the same time, the distance from the outside of the guard ring to the scribe line is further increased to ≥300μm.
[0066] 3) The frame refresh rate of the atmospheric semiconductor detector is ≥1kHz; the dynamic range of the atmospheric semiconductor detector is ≥10 4ph. / pixel / pulse@12keV; the atmospheric semiconductor detector has single photon sensitivity and S / N≥5@12keV; the pixel size of the atmospheric semiconductor detector is ≤200μm×200μm; the pixel number of the atmospheric semiconductor detector is ≥65536; the sensitive area of the atmospheric semiconductor detector is ≥2.5cm×10.2cm; the quantum efficiency of the atmospheric semiconductor detector is ≥80%@12keV; and the response energy region of the atmospheric semiconductor detector is 6keV-20keV.
[0067] 4) The ASIC adopts a commercial 130nm CMOS process to reduce the cost of tape-out. Considering the signal integrity, power integrity and other limiting factors, the pixel size of the ASIC is ≤200μm×200μm, preferably 200μm×200μm, and the pixel number is ≥64(X)×64(Y), preferably 64(X)×64(Y).
[0068] 5) In order to obtain a high frame refresh frequency, a pixel-level digitization scheme is adopted in the ASIC, and the analog signal is converted into a digital signal at the pixel end, so as to reduce the attenuation and interference of the analog signal transmission, and to realize high-speed transmission through the digital signal.
[0069] 6) In order to realize single photon sensitivity, a pixel-level, high-sensitivity charge-sensitive preamplifier is adopted in the ASIC to amplify the signal input by the Sensor in time.
[0070] 7) In order to realize a large dynamic range, the charge-sensitive preamplifier adopts a three-stage gain adaptive design:
[0071] (1) The preamplifier works in a high-gain state by default, and the feedback capacitance is about 10fF. It corresponds to the case that the number of incident photons is small and the signal is small. Small feedback capacitance can realize large signal multiplication, obtain good signal-to-noise ratio, and realize single photon sensitivity.
[0072] (2) When the number of incident photons increases and the signal exceeds the discriminator threshold of the gain switching circuit, the preamplifier automatically connects a feedback capacitor of 1pF, and switches from the high-gain state to the medium-gain state.
[0073] (3) When the number of incident photons further increases, the preamplifier will automatically connect a feedback capacitor of 10pF, and switch from the medium-gain state to the low-gain state.
[0074] The atmospheric semiconductor detector adopts a charge integration readout signal processing method, which can be applied to instantaneous (≤100fs) pulse type photon detection. At the same time, the atmospheric semiconductor detector has high frame refresh frequency (≥1kHz), single photon sensitivity (@12keV), large dynamic range (≥10 4Advantages include photons / pixels / frames (@12keV). Attached Figure Description
[0075] Figure 1 This is a structural assembly diagram of the front-end module in this invention.
[0076] Figure 2 This is an exploded view of the front-end module in this invention.
[0077] Figure 3 This is a process flow diagram of the atmospheric semiconductor detector in this invention.
[0078] Figure 4 This is the single-photon energy spectrum of a single pixel in the atmospheric semiconductor detector of this invention.
[0079] Figure 5 This is an X-ray image of the atmospheric semiconductor detector in this invention.
[0080] Figure 6 This is an overall structural view of the atmospheric semiconductor detector in this invention.
[0081] Figure 7 This is a front view of the atmospheric semiconductor detector in this invention.
[0082] Figure 8 For the present invention Figure 7 A cross-sectional view along the BB direction.
[0083] Figure Labels
[0084] Front-end module 1
[0085] Atmospheric semiconductor detector 2
[0086] Detector housing 21
[0087] Front panel 3
[0088] First panel 31
[0089] Adapter hole 31.1
[0090] Second panel 32
[0091] Backend Reader Board 4
[0092] Backend electronics components 41 Detailed Implementation
[0093] With reference to the accompanying drawings, the technical solutions in the embodiments of the present application will be clearly and completely described in the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative efforts belong to the scope of the present application. In the description of the present application, it should be noted that the terms "left side", "right side", "upper side", "lower side", "upper", "lower" and the like indicate the orientation or positional relationship shown in the drawings, and are only used for the purpose of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the device or element indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance.
[0094] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connection" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0095] In addition, in the description of the present application, unless otherwise specified, the meaning of "a plurality of" is two or more.
[0096] Before the embodiments of the present application are described, the contents related to the priority text will be briefly described: the atmospheric type semiconductor detector described in the present application is equivalent to the atmospheric type detector in the priority document, only the name is slightly different.
[0097] Embodiment one
[0098] The embodiment of the present application provides a process manufacturing flow of a front-end module, which can refer to Figures 1-3 , comprising the following steps:
[0099] Step 1): connecting Sensor and ASIC to form ChipAssembly. As an illustration, Sensor is a sensor chip, which realizes the conversion of incident photon signal into electrical signal. ASIC is an electronic front-end readout chip, which realizes the further amplification, filtering, shaping and digitization of the electrical signal. ChipAssembly is a chip module after Sensor and ASIC are packaged together.
[0100] Step 2): Fix Holder to Mounting Block. As an illustration, Holder is a mechanical support that can play a supporting role and act as a heat dissipation module. Mounting Block is an operating tool of the front-end module, which is described in the patent , patent application number: 202410706453X.
[0101] Step 3): Install Mounting Block with Holder fixed to the positioning and pressing tool, then fix the positioning and pressing tool to the glue dispenser, and use the glue dispenser to glue on the surface of Holder. As an illustration, the positioning and pressing tool is described in the patent , patent application number: 202410706453X. The purpose of the glue on the surface of Holder is twofold. The first purpose is to firmly paste WireBondingBoard to Holder, because the center of WireBondingBoard is a large connector, so the center of Holder needs to be hollowed out to accommodate the large connector. In addition, Holder is also designed with a groove to accommodate the low dropout regulator (LDO), resistor or filter capacitor and other components on the back of WireBondingBoard. Therefore, the gluing position on the surface of Holder is limited. In addition, the large connector has a large number of pins and requires a large force when plugging in the cable. Therefore, a strong enough glue should be selected to ensure that WireBondingBoard does not loosen after being pasted to Holder due to frequent plugging and unplugging of the cable. The second purpose is to achieve good heat conduction. The heat of the heating components on ASIC and WireBondingBoard is dissipated through Holder. Therefore, a glue with high thermal conductivity needs to be selected.
[0102] Step 4): Place WireBondingBoard on the glue of Holder with the tool, and apply uniform pressure on the surface of WireBondingBoard with a torque wrench; then, dry WireBondingBoard and let it cool naturally to room temperature. As an illustration, WireBondingBoard is a wire bonding board that connects the signals of ASIC to the electronic backend readout board through lead wires and high-density connectors. The front side of WireBondingBoard has no components, only wire bonding pads corresponding to the pads of ASIC, and pads for introducing high voltage to Sensor. The back side of WireBondingBoard has multiple components, including low dropout regulator (LDO), resistor or filter capacitor, etc.
[0103] Step 5): Mounting Block surface in step 4) is glued by using a glue dispenser. As an illustration, two points need to be noted in this step, the first point is that the glue coverage area is large enough to fully contact the ASIC chip to improve the heat dissipation effect. The second point is that the glue thickness is large enough to adjust and buffer the Wire Bonding Board and the chip warpage, and reduce the stress on flip-chip bonding. Therefore, the final choice is "Hui" type glue coating, instead of the conventional "Mi" type glue coating. The glue area covers the ASIC size as much as possible without spilling out of the ASIC joint.
[0104] Step 6): Chip Assembly in step 1) is placed on the surface of the Wire Bonding Board with glue in step 5) by using a chip mounter. As an illustration, the chip mounter is described in the patent , patent application number: 2024110246406.
[0105] Step 7): Mounting Block in step 6) is dried and naturally cooled to room temperature.
[0106] Step 8): Mounting Block in step 7) is wire-bonded by using a wire bonder.
[0107] Step 9): Holder is removed from Mounting Block by using a tool, and the front-end module is completed.
[0108] The process flow of the front-end module provided by the embodiment of the application further includes at least one of the following technical features:
[0109] In step 1), Sensor is quality-screened and recorded in the front-end module database, and preferably, the screening standard of Sensor is that the breakdown voltage of the current collecting ring is greater than or equal to 200 V.
[0110] In step 1), ASIC is quality-screened and recorded in the front-end module database, and preferably, the screening standard of ASIC is that the number of bad pixels is less than or equal to 50.
[0111] In step 1), Chip Assembly is quality-screened and recorded in the front-end module database, and preferably, Chip Assembly is visually screened, and the screening standard of Chip Assembly is that the number of failed pixel rows and columns is less than or equal to 5.
[0112] In step 1), the pixel size of the Sensor is ≤200μm×200μm, preferably 200μm×200μm, the number of pixels of the Sensor is ≥65536, preferably 65536, and the actual effective area of the Sensor is ≥106mm×28mm, preferably 106mm×28mm. As an illustration, in order to reduce the splicing dead zone, the design of the Sensor is as large as possible, and generally, only 5 pieces of Sensor can be placed on a 8-inch wafer.
[0113] In step 1), the pixel size of the ASIC is ≤200μm×200μm, preferably 200μm×200μm, the number of pixels of the ASIC is ≥4096, preferably 4096, and the size of the ASIC is ≥12.8mm×14.4mm, preferably 12.8mm×14.4mm.
[0114] In step 1), the pixels of the Sensor and the pixels of the ASIC are electrically interconnected by flip-chip, because the size of the ASIC is smaller than that of the Sensor, a plurality of ASICs are sequentially flip-chip connected to the Sensor, preferably 2×8 ASICs are sequentially flip-chip connected. Further, the flip-chip welding bumps between the Sensor and the ASIC are copper column tin caps, the diameter of the flip-chip welding bumps is 20-40μm, preferably 30μm, the height is 40-50μm, preferably 47μm, and the minimum spacing between adjacent flip-chip welding bumps is 50-70μm, preferably 60μm.
[0115] In step 2), the number of the Holder is recorded in the front-end module database.
[0116] In step 2), the Holder is ultrasonically cleaned with alcohol, preferably, the ultrasonic frequency is 20-60kHz, and the ultrasonic time is 10-20min.
[0117] In step 2), the MountingBlock is ultrasonically cleaned with alcohol, preferably, the ultrasonic frequency is 20-60kHz, and the ultrasonic time is 10-20min.
[0118] In the process flow of the front-end module provided by the embodiment of the application, step 4) further comprises at least one of the following technical features:
[0119] 1) The WireBondingBoard and the positioning and pressing tool are placed in an oven for drying, preferably, the oven temperature is 90℃, and the drying time is 30min.
[0120] 2) The size of the Holder is four edges of the size of the WireBondingBoard with redundancy ≤100μm, preferably 100μm.
[0121] 3) The size of the Holder is ≥ 107.26mm*30.76mm, preferably 107.26mm*30.76mm;
[0122] 4) The Holder is made of aluminum;
[0123] 5) The Holder is further provided with steps on two long edges;
[0124] 6) The Holder is provided with laser marking to indicate the position and number of each ASIC chip;
[0125] 7) The torque of the torque wrench is ≥ 5N*m;
[0126] 8) The bending degree of the WireBondingBoard is ≤ 50μm;
[0127] 9) The size of the WireBondingBoard is ≥ 107.06mm*30.56mm, preferably 107.06mm*30.56mm, which is a circuit board with a large aspect ratio.
[0128] The process flow of the front-end module provided by the embodiment of the application further comprises at least one of the following technical features:
[0129] In step 5), the glue is selected to be non-conductive glue with high adhesive strength and high thermal conductivity;
[0130] In step 5), the groove in the Holder adopts a back-to-back shape for glue dispensing, and the surface of the Holder adopts linear glue dispensing.
[0131] In step 6), the front surface of the WireBondingBoard is provided with wire bonding pads corresponding to the ASIC pads, and preferably, each ASIC leads out 111 leads to the wire bonding pads;
[0132] In step 6), the leads of the ASIC are gold wires;
[0133] In step 6), the wire bonding between the ASIC and the WireBondingBoard is completed by ultrasonic hot-press welding;
[0134] In step 6), the back surface of the WireBondingBoard is provided with a large connector, and preferably, the number of pins of the large connector is 180Pin;
[0135] In step 6), the back surface of the WireBondingBoard is provided with LDOs consistent with the number of ASICs.
[0136] As an illustration, if step 6) adopts the chip mounter in the application No. 2024110246406, named , the specific patching process in step 6) is as follows:
[0137] Start-up: turn on compressed air, turn on power, start computer, and open operation software.
[0138] Loading: place ChipAssembly on the loading unit with anti-static vacuum tweezers, so that the long and short edges of ChipAssembly are respectively close to the first positioning pins. Place WireBondingBoard (actually a sample module with mechanical support) on the stage, so that the long and short edges of WireBondingBoard are respectively close to the second positioning pins, and turn on the vacuum generator to adsorb WireBondingBoard.
[0139] Suction: control the suction nozzle to move above the loading unit along the first guide rail (X-axis); make the suction nozzle press down along the second guide rail (Z-axis) to adsorb ChipAssembly on the loading unit. Usually, the suction nozzle is set to stop near the surface of ChipAssembly first, and then slowly press on ChipAssembly to prevent damage to ChipAssembly caused by overshoot.
[0140] Material taking: after ChipAssembly is adsorbed by the suction nozzle and lifted along the second guide rail (Z-axis), move along the first guide rail (X-axis) to the stage position.
[0141] Move into WireBondingBoard: adjust the position of the stage on the third guide rail (Y-axis) to roughly align WireBondingBoard with ChipAssembly.
[0142] Move into the spectrometer prism control piston structure: make the piston pop out two spectrometer prisms to the working position, and turn on the LED lights at the upper and lower ends of the two spectrometer prisms.
[0143] Coarse alignment: observe the positioning marks (Mark, a pair of marks on the upper and lower corners) of ChipAssembly and WireBondingBoard on the display, and adjust the positions of ChipAssembly and WireBondingBoard through the first guide rail (X-axis), the third guide rail (Y-axis), and the rotating unit (U-axis) to make the reference points of ChipAssembly and WireBondingBoard align at both ends of the same long side, so as to achieve the overall alignment of ChipAssembly pads and WireBondingBoard pads.
[0144] Move out the spectrometer prism: operate the cylinder piston structure, retract the piston, and retract the spectrometer prism.
[0145] Downward pressing: press the suction nozzle to the set position on the second guide rail (Z axis) through the software end.
[0146] Fine alignment: after the coarse alignment of the Chip Assembly and the Wire Bonding Board is completed, turn on the LED light on the gradient microscope to further observe the image of the Chip Assembly and the Wire Bonding Board on the display, and adjust the position of the Chip Assembly and the Wire Bonding Board through the first guide rail (X axis), the third guide rail (Y axis), and the rotation unit (U axis) so that the reference points of the Chip Assembly and the Wire Bonding Board are aligned with the positioning marks at the two opposite corners in the long direction, and the pad alignment, the pad spacing, and the wireability are checked to complete the fine alignment.
[0147] Pasting: press the suction nozzle to the Chip Assembly and the Wire Bonding Board through the control module to make the suction nozzle press down to the Chip Assembly and the Wire Bonding Board. When the suction nozzle is pressed down, the pressure sensor of the suction nozzle detects the pressure when the suction nozzle is pressed down, and when the monitoring pressure is reached, the suction nozzle is automatically stopped to avoid damage to the Chip Assembly.
[0148] Releasing: after the pasting is completed, the vacuum generator is turned off, the sample is taken out, and the sample is placed in an oven to dry the glue.
[0149] In step 7), the Mounting Block is placed in an oven to dry, and preferably, the temperature of the oven is 90°C, and the drying time is 30 minutes.
[0150] In step 8), the bottom surface of the Mounting Block is provided with positioning holes that can match the wire bonding clamps of a wire bonding machine, the positioning hole on one side of the bottom surface of the Mounting Block is connected with the wire bonding clamp, and the wire bonding is performed on the upper half of the ASIC on the Mounting Block, and then the positioning hole on the other side of the bottom surface of the Mounting Block is connected with the wire bonding clamp, and the wire bonding is performed on the other half of the ASIC on the Mounting Block.
[0151] In step 8), after the wire bonding of all the ASICs on the Mounting Block is completed, the wire bonding of the ASICs is checked under a microscope.
[0152] In step 9): X-ray testing is performed on the front-end module, and the front-end module is graded in terms of quality. Preferably, the quality screening criteria for the front-end module is that there are no large-area bad spots, and the number of failed pixel rows and columns on a single ASIC is <5.
[0153] Example 2
[0154] A front-end module, see below. Figure 1 and Figure 2 It is prepared by the process flow of the front-end module described in Embodiment 1 of the present invention.
[0155] Example 3
[0156] An atmospheric semiconductor detector includes a front-end module 1 as described in Embodiment 2 of the present invention. Referring to the atmospheric semiconductor detector provided in this embodiment of the present invention... Figure 6 and Figure 7 The atmospheric semiconductor detector 2 includes a detector housing 21 and a front panel 3 located at one end of the detector housing 21. The front panel 3 includes a first panel 31 and a second panel 32. The first panel 31 has a first slot in which the front-end module 1 is disposed. The second panel 32 has a second slot for the adapter and vacuum cable to pass through. In a specific embodiment, the first panel 31 and the second panel 32 are connected by screws. (Continue reading) Figure 8 The atmospheric semiconductor detector 2 has a back-end readout board 4 on its base plate, and a back-end electronics component 41 is mounted on the back-end readout board 4. The front-end module 1 is connected to the back-end readout board 4 via a high-density cable. In the above embodiment, the high-density cable is led out from the adapter of the front-end module 1 and connected to the back-end readout board 4. (Continue reading...) Figure 7 The first panel 31 is provided with a variety of adapter holes 31.1, each adapter hole 31.1 being suitable for connection with a sample assembly or a shield. For illustration, when the atmospheric semiconductor detector 2 is not in operation, the shield can be installed onto the shielding module using screws, forming a sealed space between the first panel 31, the second panel 32, and the shield, thereby sealing the front-end module 1. When the atmospheric semiconductor detector 2 needs to be used, the sample assembly can first be installed onto the front panel 3 using screws. In one specific embodiment, the sample assembly also includes a fixing plate and a sample. The shape of the fixing plate is similar to that of the front panel 3, both having a slot in the middle. The sample is fixed in the slotted position of the fixing plate. In use, the fixing plate and the front panel 3 are installed using screws. A schematic diagram of the sample can be found in the diagram. Figure 7 .
[0157] In the atmospheric semiconductor detector provided in the embodiments of the present invention, please refer to Figure 4, the frame refresh rate of the atmospheric semiconductor detector is ≥1 kHz; the dynamic range of the atmospheric semiconductor detector is ≥10 4 ph. / pixel / pulse@12keV; the pixel size of the atmospheric semiconductor detector is ≤200 μm×200 μm, preferably 200 μm×200 μm; the atmospheric semiconductor detector is single-photon sensitive and has an S / N≥5@12keV; the number of pixels of the atmospheric semiconductor detector is ≥65536, preferably 65536; the sensitive area of the atmospheric semiconductor detector is ≥2.5 cm×10.2 cm, preferably 2.5 cm×10.2 cm; the quantum efficiency of the atmospheric semiconductor detector is ≥80%@12keV; the response energy region of the atmospheric semiconductor detector is 6keV-20keV; and the X-ray imaging picture of the atmospheric semiconductor detector can be as shown in Figure 5
[0158] In the atmospheric semiconductor detector provided by the embodiment of the present application, in the technical route, the atmospheric semiconductor detector provided by the present application adopts a hybrid scheme (Hybrid), and compared with a monolithic scheme (Monolithic, typical representatives are CMOS Imaging Sensor and Charge Coupled Device), a signal sensing unit (Sensor) and a signal processing unit (ASIC) are divided into two independent chips. The advantage of the hybrid scheme is that the two chips can be optimized and designed by using different semiconductor processes and methods.
[0159] The Sensor adopts a silicon planar process, and a body silicon type, pixel type PhotoDiode array is made of a high-resistance, high-purity silicon wafer, the pixel size is ≤200 μm×200 μm, and the number of pixels is ≥512(X)×128(Y). In order to obtain a high quantum efficiency (≥80%@12keV), the thickness of the Sensor chip is designed to be ≥500 μm. In order to weaken the space charge effect caused by the incidence of high-flux photons (corresponding to a large dynamic range), the working voltage of the Sensor is designed to be ≥200V (conventionally generally 120V). In order to obtain a large working voltage, the number of guard rings of the Sensor is designed to be greater than the conventional 4-5, and is preferably 8; at the same time, the distance from the outside of the guard ring to the scribe line is further increased to 300 μm.
[0160] The ASIC adopts a commercial 130nm CMOS process to reduce the cost of tape-out. Considering the signal integrity, power integrity and other limiting factors, the pixel size of the ASIC is ≤200 μm×200 μm, and the number of pixels is ≥64(X)×64(Y).
[0161] In order to obtain high frame refresh frequency, a pixel-level digitization scheme is used in the ASIC, and the analog signal is converted into a digital signal at the pixel end, so as to reduce the attenuation and interference of the analog signal transmission, and realize high-speed transmission through the digital signal. In order to realize single-photon sensitivity, a pixel-level, high-sensitivity charge-sensitive preamplifier is used in the ASIC to amplify the signal input by the sensor in time.
[0162] In order to realize a large dynamic range, the charge-sensitive preamplifier is designed with three-stage gain self-adaption:
[0163] (1) The preamplifier works in a high-gain state by default, and the feedback capacitance is about 10 fF. It corresponds to the case that the number of incident photons is small and the signal is small. Small feedback capacitance can realize large signal multiplication, obtain good signal-to-noise ratio, and realize single-photon sensitivity.
[0164] (2) When the number of incident photons increases and the signal exceeds the discriminator threshold of the gain switching circuit, the preamplifier automatically connects a feedback capacitance of about 1 pF, and switches from the high-gain state to the medium-gain state.
[0165] (3) When the number of incident photons further increases, the preamplifier will automatically connect a feedback capacitance of about 10 pF, and switch from the medium-gain state to the low-gain state.
[0166] The large-area semiconductor detector adopts a charge integration readout signal processing method, which can be applied to instantaneous (≤100 fs) pulse type photon detection. At the same time, the large-area semiconductor detector has the advantages of high frame refresh frequency (≥1 kHz), single-photon sensitivity (@12 keV), large dynamic range (≥10 4 photons / pixel / frame @12 keV)
[0167] Example Four
[0168] The front-end module according to the embodiment two of the present application is used as the detection element of the large-area semiconductor detector according to the embodiment three.
[0169] Example Five
[0170] An assembly method of the large-area semiconductor detector according to the embodiment three of the present application further comprises the following steps:
[0171] Step 1) The front-end module 1 according to the embodiment two is installed on the front panel 3 by using a tool; further, the front-end module 1 is installed in the first slot of the first panel 31, and a shielding plate is detachably installed on the working end of the front-end module 1.
[0172] Step 2) The high-density signal cable is inserted into the front-end module 1; further, the adapter and the high-density signal cable pass through the second slot of the second panel 32.
[0173] Step 3) Mounting the back-end readout board 4 to the bottom plate of the atmospheric semiconductor detector 2;
[0174] Step 4) Mounting the front-end board 3 to one end of the atmospheric semiconductor detector 2;
[0175] Step 5) Mounting the back-end electronics assembly 41 on the back-end readout board 4;
[0176] Step 6) Connecting the front-end module 1 and the back-end readout board 4 with high-density signal cables;
[0177] Step 7) Mounting other parts in the inner cavity of the atmospheric semiconductor detector 2;
[0178] Step 8) Inserting power supply cables, optical fiber cables, etc.
[0179] The above description is only the preferred embodiment of the present application, and it should be noted that for those skilled in the art, without departing from the technical principles of the present application, a number of improvements and replacements can be made, and these improvements and replacements should be considered as the protection scope of the present application.
Claims
1. A process flow for fabricating a front end module, the process flow comprising: The method comprises the following steps: Step 1): connecting Sensor and ASIC to form Chip Assembly; Step 2): fixing Holder to Mounting Block; Step 3): mounting Mounting Block with Holder to positioning and pressing tool, fixing the positioning and pressing tool to glue dispenser, and dispensing glue on the surface of Holder by glue dispenser; Step 4): placing Wire Bonding Board on the glue of Holder by tool, and applying uniform pressure on the surface of Wire Bonding Board by torque wrench; then, drying Wire Bonding Board and naturally cooling it to normal temperature; Step 5): dispensing glue on the surface of Mounting Block in step 4) by glue dispenser; Step 6): placing Chip Assembly in step 1) on the surface of Wire Bonding Board with glue in step 5) by chip mounter; Step 7): drying Mounting Block in step 6) and naturally cooling it to normal temperature; Step 8): wire bonding Mounting Block in step 7) by wire bonder; Step 9): taking Holder off Mounting Block by tool, and thus the front-end module is completed.
2. The process flow for fabricating a front-end module according to claim 1, wherein, The method further comprises at least one of the following technical features: In step 1), Sensor is subjected to quality screening and recorded in the database of front-end module, preferably, the screening standard of Sensor is that the breakdown voltage of current collection ring is greater than or equal to 200V; In step 1), ASIC is subjected to quality screening and recorded in the database of front-end module, preferably, the screening standard of ASIC is that the number of bad pixels is less than or equal to 50; In step 1), Chip Assembly is subjected to quality screening and recorded in the database of front-end module, preferably, the screening standard of Chip Assembly is that the number of failed pixel rows and columns is less than or equal to 5; In step 1), the pixel size of Sensor is less than or equal to 200μm×200μm, the number of pixels of Sensor is greater than or equal to 65536, and the actual effective area of Sensor is greater than or equal to 106mm×28mm; In step 1), the pixel size of ASIC is less than or equal to 200μm×200μm, the number of pixels of ASIC is greater than or equal to 4096, and the size of ASIC is greater than or equal to 12.8mm×14.4mm; In step 1), a plurality of ASICs are flip-chip bonded to Sensor in sequence, preferably, the flip-chip bonding bump is copper column tin cap, preferably, the number of ASICs is 2X8, preferably, the diameter of flip-chip bonding bump is 20-40μm, the height of flip-chip bonding bump is 40-50μm, and the minimum distance between adjacent flip-chip bonding bumps is 50-70μm. In step 2), the number of Holder is recorded in the database of front-end module; In step 2), Holder is subjected to ultrasonic cleaning by alcohol, preferably, the ultrasonic frequency is 20-60kHz, and the ultrasonic time is 10-20min; In step 2), the Mounting Block is ultrasonically cleaned with alcohol, preferably at a frequency of 20-60 kHz for 10-20 minutes.
3. The process flow for fabricating a front-end module according to claim 1, wherein, In step 4), at least one of the following technical features is included: 1) The Wire Bonding Board and the positioning and pressing tool are placed in an oven for drying, preferably at a temperature of 90°C for 30 minutes; 2) The size of the Holder is 107.26mm x 30.76mm, with a redundancy of ≤100μm on each side; 3) The size of the Holder is ≥107.26mm x 30.76mm; 4) The Holder is made of aluminum; 5) The Holder has steps on its two long sides; 6) The Holder has laser-engraved characters indicating the position and number of each ASIC chip; 7) The torque of the torque wrench is ≥5N*m; 8) The bending degree of the Wire Bonding Board is ≤50μm; 9) The size of the Wire Bonding Board is ≥107.06mm x 30.56mm.
4. The process flow for fabricating a front-end module of claim 1, wherein, At least one of the following technical features is included: In step 5), the glue is selected to be a non-conductive glue with high adhesion strength and high thermal conductivity; In step 5), the recess in the Holder is filled with a back-shaped glue, and the surface of the Holder is filled with a linear glue. In step 6), the front surface of the Wire Bonding Board is provided with wire pads corresponding to the ASIC pads, and preferably each ASIC has 111 leads connected to the wire pads; In step 6), the leads of the ASIC are gold wires; In step 6), the wire bonding between the ASIC and the Wire Bonding Board is completed by ultrasonic thermal compression welding; In step 6), the back surface of the Wire Bonding Board is provided with a large connector, and preferably the large connector has 180 pins; In step 6), the back surface of the Wire Bonding Board is provided with LDOs consistent with the number of ASICs. In step 7), the Mounting Block is placed in an oven for drying, and the temperature of the oven is 80-100°C for 20-40 minutes, and preferably the temperature of the oven is 90°C for 30 minutes; In step 8), the bottom surface of the Mounting Block is provided with positioning holes that can match the wire bonding fixture of the wire bonding machine, and the positioning holes on one side of the bottom surface of the Mounting Block are connected to the wire bonding fixture to bond the wires of the ASICs on one half of the Mounting Block, and then the positioning holes on the other side of the bottom surface of the Mounting Block are connected to the wire bonding fixture to bond the wires of the ASICs on the other half of the Mounting Block; In step 8), after the wire bonding of all the ASICs on the Mounting Block is completed, the wire bonding of the ASICs is checked under a microscope. In step 9), the quality screening criteria of the front-end module is that there is no large area of bad points, and the number of failed pixel rows and columns on a single ASIC is less than or equal to 5. In step 9), the front-end module is subjected to X-ray testing, and the front-end module is graded in quality.
5. A front-end module prepared by the process flow of any one of claims 1-4.
6. An atmospheric semiconductor detector comprising the front-end module of claim 5.
7. The atmospheric semiconductor detector according to claim 6, characterized in that: The atmospheric semiconductor detector comprises a detector housing and a front panel located at one end of the detector housing, the front panel comprising a first panel and a second panel, the first panel being provided with a first slot, and the front-end module being arranged in the first slot; the second panel being provided with a second slot for a connector and a vacuum cable to pass through; The back-end readout board is arranged on the bottom plate of the atmospheric semiconductor detector, and the back-end electronics assembly is arranged on the back-end readout board; the front-end module is connected to the back-end readout board through a high-density cable; The first panel is provided with a plurality of adapter holes, each adapter hole being adapted to be connected to a sample assembly or a shielding plate.
8. The atmospheric semiconductor detector according to claim 7, characterized in that The front-end module serves as a detection element of an atmospheric semiconductor detector; and / or a frame refresh rate of the atmospheric semiconductor detector is ≥1 kHz; a dynamic range of the atmospheric semiconductor detector is ≥10 4 ph. / pixel / pulse@12keV; the atmospheric semiconductor detector has single-photon sensitivity and a signal-to-noise ratio (S / N) of ≥5@12keV; a pixel size of the atmospheric semiconductor detector is ≤200μm×200μm; a number of pixels of the atmospheric semiconductor detector is ≥65536; a sensitive area of the atmospheric semiconductor detector is ≥2.5cm×10.2cm; a quantum efficiency of the atmospheric semiconductor detector is ≥80%@12keV; and a response energy region of the atmospheric semiconductor detector is 6keV-20keV.
9. Use of the front-end module of claim 6 as a detection element of the atmospheric semiconductor detector of claim 7.
10. A method of assembling an atmospheric semiconductor detector as claimed in claim 7 or 8, characterized in that, Further comprising the following steps: Step 1) mounting the front-end module of claim 6 to the front panel by using a tool; Step 2) inserting a high-density signal cable into the front-end module; Step 3) mounting a back-end readout board into the inner cavity of the atmospheric semiconductor detector; Step 4) mounting the front panel to the atmospheric semiconductor detector; Step 5) mounting a back-end electronics assembly on the back-end readout board; Step 6) connecting the front-end module and the back-end readout board by using a high-density signal cable; Step 7) mounting other parts in the inner cavity of the atmospheric semiconductor detector; Step 8) inserting power cables, optical fibers and other cables.