Solar cell and photovoltaic module

Abstract

The application relates to a solar cell and a photovoltaic module. The solar cell comprises a substrate, a first surface comprising a first region, a second region and a transition region between the first region and the second region, the second region comprising a first sub-region and a second sub-region, the first sub-region being connected between the transition region and the second sub-region, and the surface of the first sub-region being an inclined surface; a first passivation layer arranged on the first region; a first doped semiconductor layer arranged on the side of the first passivation layer away from the substrate; a dielectric layer arranged on the transition region and part of the first region, the dielectric layer of the first region covering the side of the first doped semiconductor layer away from the first passivation layer; a second passivation layer arranged on the second region, the transition region and part of the first region, the second passivation layer of the first region covering the side of the dielectric layer away from the substrate; and a second doped semiconductor layer arranged on the side of the second passivation layer away from the substrate. The application can reduce the leakage channel of the solar cell.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solar cells, in particular to a solar cell and a photovoltaic module. BACKGROUND

[0002] With the development of solar cell technology, the Heterojunction Back Contact (HBC) cell combines the high open-circuit voltage of the Heterojunction (HJT) cell and the high short-circuit current advantage of the Interdigitated Back Contact (IBC) cell, and has a high photoelectric conversion efficiency.

[0003] However, the positive and negative electrodes of the HBC cell are both on the back surface of the cell, which makes it very difficult to achieve insulation of the positive and negative electrodes, increases the leakage channel, and causes the cell to fail and the power loss of the module. SUMMARY

[0004] Therefore, the embodiments of the present application provide a solar cell and a photovoltaic module, which can reduce the leakage channel of the solar cell and reduce the power loss of the solar cell and the photovoltaic module.

[0005] In one aspect, the embodiments of the present application provide a solar cell, comprising:

[0006] a substrate, the substrate having opposite first and second surfaces, the first surface including a first region, a second region and a transition region, the transition region being located between the first region and the second region, the surface of the first region and the second surface having a first distance, the surface of the second region and the second surface having a second distance, the second distance being less than the first distance; the second region including a first sub-region and a second sub-region, the first sub-region being connected between the transition region and the second sub-region, the surface of the first sub-region being an inclined surface;

[0007] a first passivation layer provided in the first region;

[0008] a first doped semiconductor layer provided on a side of the first passivation layer away from the substrate;

[0009] a dielectric layer provided in the transition region and part of the first region, the dielectric layer of the first region covering a side of the first doped semiconductor layer away from the first passivation layer;

[0010] a second passivation layer provided in the second region, the transition region and part of the first region, the second passivation layer of the first region covering a side of the dielectric layer away from the substrate;

[0011] a second doped semiconductor layer provided on a side of the second passivation layer away from the substrate.

[0012] In an implementation, along the thickness direction of the substrate, the medium layer has a third distance between the end of the medium layer close to the second region and the surface of the first doped semiconductor layer away from the side surface of the substrate, and the third distance is greater than or equal to the doping depth of the first doped semiconductor layer.

[0013] In an implementation, the third distance is less than or equal to the distance between the end of the first sub-region toward the transition region and the surface of the first doped semiconductor layer away from the side surface of the substrate.

[0014] In an implementation, the transition region includes a third sub-region, the third sub-region is adjacent to the first region, and the distance between the surface of the third sub-region and the second surface is equal to the first distance.

[0015] The end of the medium layer toward the substrate is connected to the surface of the third sub-region, and the medium layer covers at least the first passivation layer and the sidewall of the first doped semiconductor layer toward the third sub-region.

[0016] In an implementation, the transition region further includes a fourth sub-region, the fourth sub-region is adjacent to the third sub-region, and the fourth sub-region is located on the side of the third sub-region toward the second region; the surface of the fourth sub-region is an inclined surface.

[0017] The end of the medium layer toward the substrate extends to the fourth sub-region.

[0018] In an implementation, the surface of the fourth sub-region is a polished surface.

[0019] In an implementation, the surface of the fourth sub-region is a matte surface.

[0020] In an implementation, the transition region further includes a fifth sub-region, the fifth sub-region is located between the fourth sub-region and the first sub-region, and the surface of the first sub-region and the surface of the fourth sub-region both have an included angle with the surface of the fifth sub-region.

[0021] The end of the medium layer toward the second region extends to the fifth sub-region.

[0022] In an implementation, the surface of the fifth sub-region is parallel to the surface of any one of the first region and the second sub-region.

[0023] In an implementation, the surface of the fifth sub-region is a polished surface.

[0024] In an implementation, the surface of the fifth sub-region is a matte surface.

[0025] In an implementation, the medium layer includes:

[0026] The first dielectric layer is arranged in the transition region and the first region, and the first dielectric layer of the first region covers the side of the first doped semiconductor layer away from the first passivation layer.

[0027] The second dielectric layer is arranged on the side of the first dielectric layer away from the substrate; the second passivation layer of the first region covers the side of the second dielectric layer away from the substrate; and the material of the first dielectric layer is different from the material of the second dielectric layer.

[0028] In an implementation manner, the first dielectric layer includes any one of aluminum oxide or silicon oxide; the second dielectric layer includes silicon nitride, and the thickness of the first dielectric layer is less than the thickness of the second dielectric layer.

[0029] In an implementation manner, the thickness of the first dielectric layer is 5 nm-15 nm; and the thickness of the second dielectric layer is 60 nm-100 nm.

[0030] In an implementation manner, the solar cell further includes:

[0031] The conductive layer is arranged on the side of the first doped semiconductor layer and the second doped semiconductor layer away from the substrate, and the conductive layer is provided with an isolation groove, the projection of the isolation groove on the substrate is located in the first region, and at least part of the isolation groove penetrates to the surface of the side of the second doped semiconductor layer away from the substrate.

[0032] In an implementation manner, the solar cell further includes:

[0033] The first electrode is located in the first region in the projection of the substrate, and the first electrode is electrically connected with the conductive layer of the first region.

[0034] The second electrode is located in the second region in the projection of the substrate, and the second electrode is electrically connected with the conductive layer of the second region.

[0035] In another aspect, the embodiments of the present application provide a photovoltaic module, which includes the solar cell of any one of the foregoing embodiments of the present application.

[0036] The solar cell and the photovoltaic module provided by the embodiments of the present application, the solar cell comprises a substrate, the substrate has opposite first and second surfaces, the first surface comprises a first region, a second region and a transition region, the transition region is located between the first region and the second region; the first distance is between the surface of the first region and the second surface, the second distance is between the surface of the second region and the second surface, and the second distance is less than the first distance; the second region comprises a first sub-region and a second sub-region, the first sub-region is connected between the transition region and the second sub-region, and the surface of the first sub-region is an inclined surface; a first passivation layer is arranged in the first region, and a first doped semiconductor layer is arranged on the side of the first passivation layer away from the substrate; a medium layer is arranged in the transition region and part of the first region, and the medium layer in the first region covers the side of the first doped semiconductor layer away from the first passivation layer; a second passivation layer is arranged in the second region, the transition region and part of the first region, the second passivation layer in the first region covers the side of the medium layer away from the substrate, and a second doped semiconductor layer is arranged on the side of the second passivation layer away from the substrate. In this way, the medium layer can insulate the first doped semiconductor layer and the second doped semiconductor layer with different conductive types between the first doped semiconductor layer and the second passivation layer, can reduce the leakage channel of the solar cell, and reduces the power loss of the solar cell and the photovoltaic module.

[0037] In addition, the end of the medium layer towards the second region can be only in the transition region, the medium layer can be separated from the second region in the arrangement direction of the first region and the second region through the first sub-region, the size of the extension of the medium layer to the second region can be reduced, the influence of the medium layer on the collection of the carriers in the second region can be reduced, and the collection efficiency of the carriers in the second region can be improved. BRIEF DESCRIPTION OF DRAWINGS

[0038] Figure 1 FIG. 1 is a structural schematic diagram of a solar cell provided by some embodiments of the present application.

[0039] Figure 2 FIG. 2 is another structural schematic diagram of a solar cell provided by some embodiments of the present application.

[0040] Figure 3 FIG. 3 is still another structural schematic diagram of a solar cell provided by some embodiments of the present application.

[0041] Figure 4 FIG. 4 is yet another structural schematic diagram of a solar cell provided by some embodiments of the present application.

[0042] Figure 5 FIG. 5 is still another structural schematic diagram of a solar cell provided by some embodiments of the present application.

[0043] Figure 6is another structural schematic diagram of a solar cell provided by some embodiments of the present application.

[0044] Figure 7 is a preparation flowchart of a solar cell provided by some embodiments of the present application.

[0045] Legend of reference signs:

[0046] 10 - substrate; 20 - first passivation layer; 30 - first doped semiconductor layer; 40 - dielectric layer; 50 - second passivation layer; 60 - second doped semiconductor layer; 70 - conductive layer; 80 - first electrode; 90 - second electrode;

[0047] 11 - first surface; 12 - second surface; 41 - first dielectric layer; 42 - second dielectric layer; 71 - isolation groove;

[0048] 111 - first region; 112 - second region; 113 - transition region;

[0049] 1121 - first sub-region; 1122 - second sub-region; 1131 - third sub-region; 1132 - fourth sub-region; 1133 - fifth sub-region. DETAILED DESCRIPTION

[0050] In order to make the above objectives, features and advantages of the present application more apparent, specific embodiments of the present application will be described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, the present application can be practiced in a number of different ways beyond the specific embodiments described and it is to be understood that the present application is not limited to the specific embodiments described below.

[0051] In the description of the present application, it should be understood that if there are terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0052] In addition, if there are these terms "first", "second", these terms are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first", "second" can be explicitly or implicitly included at least one of the features. In the description of the present application, if the term "a plurality of" appears, the meaning of "a plurality of" is at least two, such as two, three, etc., unless otherwise specifically limited.

[0053] In the present application, unless otherwise expressly specified and limited, if the terms "mounting", "connecting", "connecting", "fixing" and the like appear, these terms should be interpreted broadly. For example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise expressly limited. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0054] In the present application, unless otherwise expressly specified and limited, if the first feature is described as "on" or "below" the second feature and the like, it can mean that the first and second features are in direct contact, or the first and second features are indirectly in contact through an intermediate medium. Moreover, the first feature "above", "above" and "above" the second feature can be the first feature directly above or obliquely above the second feature, or it can only mean that the first feature is higher in horizontal height than the second feature. The first feature "below", "below" and "below" the second feature can be the first feature directly below or obliquely below the second feature, or it can only mean that the first feature is lower in horizontal height than the second feature.

[0055] It should be noted that if an element is referred to as "fixed to" or "provided on" another element, it can be directly on another element or there can be a middle element. If an element is considered to be "connected" to another element, it can be directly connected to another element or there can be a middle element. If present, the terms "vertical", "horizontal", "up", "down", "left", "right" and similar expressions used in the present application are only for the purpose of illustration, and do not represent the only implementation.

[0056] With the development of solar cell technology, HBC cells combine the advantages of high open-circuit voltage of HJT cells and high short-circuit current of IBC cells, and have high photoelectric conversion efficiency. The highest conversion efficiency in the laboratory has reached 27.81%, which is the closest to the theoretical limit of single-crystal silicon cells.

[0057] However, the positive and negative electrodes of the HBC battery are both on the back of the battery, making it very difficult to achieve insulation between the positive and negative electrodes, increasing leakage paths, and causing battery failure and module power loss.

[0058] Figure 1 This is a schematic diagram of a solar cell structure provided in some embodiments of this application.

[0059] In some examples, refer to Figure 1 As shown, in view of the technical problems existing in the related art, this application provides a solar cell. The solar cell may include a substrate 10. The substrate 10 may include a silicon substrate 10.

[0060] In some examples, the silicon substrate 10 can be a silicon wafer. The substrate 10 can have opposing first surfaces 11 and second surfaces 12. The first surface 11 and the second surface 12 can be two opposing surfaces of the substrate 10 along the thickness direction. That is, one of the surfaces along the thickness direction of the substrate 10 can be the first surface 11, and the other surface can be the second surface 12.

[0061] In some examples, refer to Figure 1 As shown, the first surface 11 may include a first region 111. The surface of the first region 111 may be flush with the first surface 11. That is, the first surface 11 may be the surface of the first region 111.

[0062] In some examples, the first surface 11 may include a second region 112. The second region 112 may be located on one side of the first region 111. The second region 112 and the first region 111 may be located on the first surface 11 along a first direction (e.g., Figure 1 Arranged in the direction shown by the x-axis.

[0063] In some examples, the first surface 11 may include a transition region 113. The transition region 113 may be located between the first region 111 and the second region 112. That is, on the first surface 11, the first region 111, the transition region 113, and the second region 112 may be arranged along a first direction x.

[0064] In some examples, refer to Figure 1 As shown, the surface of the first region 111 and the second surface 12 may have a first distance L1. The surface of the second region 112 and the second surface 12 may have a second distance L2. The second distance L2 may be less than the first distance L1. That is, the surface of the second region 112 may be recessed relative to the first surface 11, thereby forming an uneven structure on the first surface 11; wherein, the surface of the first region 111 is flush with the first surface 11, and the surface of the second region 112 is recessed in the first surface 11.

[0065] In some examples, refer toFigure 1 As shown, the second region 112 can include a first sub-region 1121 and a second sub-region 1122. The first sub-region 1121 can be connected between the transition region 113 and the second sub-region 1122. That is, the first sub-region 1121 and the second sub-region 1122 can be arranged along the first direction x, and an end of the first sub-region 1121 away from the second sub-region 1122 is connected to the transition region 113. The second sub-region 1122 is located at an end of the first sub-region 1121 away from the transition region 113.

[0066] In some examples, a surface of the first sub-region 1121 can be an inclined surface. That is, the surface of the first sub-region 1121 can be inclined with respect to any one of the first surface 11 or the second surface 12. The distance between the transition region 113 and the second surface 12 is greater than the distance between the second sub-region 1122 and the second surface 12 along the thickness direction of the substrate 10 (for example, the direction indicated by the y-axis in the figure). Figure 1 The distance between the end of the first sub-region 1121 away from the second sub-region 1122 and the second surface 12 is greater than the distance between the second sub-region 1122 and the second surface 12.

[0067] In some examples, with reference to Figure 1 As shown, the solar cell can include a first passivation layer 20. The first passivation layer 20 can be disposed in the first region 111.

[0068] In some examples, the first passivation layer 20 can include a tunneling oxide layer. For example, the first passivation layer 20 can include silicon oxide. It can be understood that the specific material of the first passivation layer 20 in some examples of the embodiments of the present application is only shown as some specific examples, and is not a limitation on the specific material of the first passivation layer 20.

[0069] In some examples, the first passivation layer 20 can cover the first region 111.

[0070] In some examples, the solar cell can include a first doped semiconductor layer 30. The first doped semiconductor layer 30 can be disposed on a side of the first passivation layer 20 away from the substrate 10. The first doped semiconductor layer 30 can cover the side of the first passivation layer 20 away from the substrate 10.

[0071] In some examples, the first doped semiconductor layer 30 can include doped polysilicon.

[0072] In some examples, with reference to Figure 1 As shown, in some examples of the embodiments of the present application, the solar cell can include a dielectric layer 40. The dielectric layer 40 can be disposed in the transition region 113 and part of the first region 111. Among them, the dielectric layer 40 located in the first region 111 covers a side of the first doped semiconductor layer 30 away from the first passivation layer 20.

[0073] In some examples, refer to Figure 1 As shown, the dielectric layer 40 has a continuous hierarchical structure between the first region 111 and the transition region 113. That is, from the first region 111 to the transition region 113, the dielectric layer 40 has no discontinuities or grooves.

[0074] In some examples, refer to Figure 1 As shown, the dielectric layer 40 can cover the sidewalls of the first passivation layer 20 and the first doped semiconductor layer 30 facing the second region 112.

[0075] In some examples, dielectric layer 40 may include an insulating layer.

[0076] In some examples, refer to Figure 1 As shown, the solar cell may include a second passivation layer 50. The second passivation layer 50 may be disposed in the second region 112, the transition region 113, and a portion of the first region 111. Specifically, the second passivation layer 50 in the first region 111 may cover the side of the dielectric layer 40 facing away from the substrate 10.

[0077] In some examples, the second passivation layer 50 may include intrinsic amorphous silicon.

[0078] In some examples, the solar cell may include a second doped semiconductor layer 60. The second doped semiconductor layer 60 may be disposed on the side of the second passivation layer 50 facing away from the substrate 10. The second doped semiconductor layer 60 may cover the side of the second passivation layer 50 facing away from the substrate 10. That is, the second doped semiconductor layer 60 may be disposed in the second region 112, the transition region 113, and a portion of the first region 111. Specifically, the second doped semiconductor layer 60 in the first region 111 may cover the side of the second passivation layer 50 facing away from the substrate 10.

[0079] In some examples, the conductivity type of the second doped semiconductor layer 60 may be opposite to that of the first doped semiconductor layer 30.

[0080] In some examples, the second doped semiconductor layer 60 may include a doped amorphous silicon layer.

[0081] In some examples, the doping type of the second doped semiconductor layer 60 may be the opposite of the doping type of the first doped semiconductor layer 30.

[0082] The solar cell provided by the embodiment of the present application comprises a substrate 10, the substrate 10 has opposite first and second surfaces 11 and 12, the first surface 11 comprises a first region 111, a second region 112 and a transition region 113, the transition region 113 is located between the first region 111 and the second region 112; the first distance L1 is between the surface of the first region 111 and the second surface 12, the second distance L2 is between the surface of the second region 112 and the second surface 12, and the second distance L2 is less than the first distance L1; the second region 112 comprises a first sub-region 1121 and a second sub-region 1122, the first sub-region 1121 is connected between the transition region 113 and the second sub-region 1122, and the surface of the first sub-region 1121 is an inclined surface; the first passivation layer 20 is arranged in the first region 111, and the first doped semiconductor layer 30 is arranged on the side of the first passivation layer 20 away from the substrate 10; the dielectric layer 40 is arranged in the transition region 113 and part of the first region 111, and the dielectric layer 40 in the first region 111 covers the side of the first doped semiconductor layer 30 away from the first passivation layer 20; the second passivation layer 50 is arranged in the second region 112, the transition region 113 and part of the first region 111, the second passivation layer 50 in the first region 111 covers the side of the dielectric layer 40 away from the substrate 10, and the second doped semiconductor layer 60 is arranged on the side of the second passivation layer 50 away from the substrate 10. In this way, the dielectric layer 40 can insulate the first doped semiconductor layer 30 and the second doped semiconductor layer 60 with different conductive types between the first doped semiconductor layer 30 and the second passivation layer 50, thereby reducing the leakage channel of the solar cell and reducing the power loss of the solar cell and the photovoltaic module.

[0083] In addition, one end of the dielectric layer 40 towards the second region 112 can be only in the transition region 113, the dielectric layer 40 can be separated from the second region 112 in the arrangement direction of the first region 111 and the second region 112 through the first sub-region 1121, the size of the dielectric layer 40 extending to the second region 112 can be reduced, thereby the influence of the dielectric layer 40 on the collection of carriers in the second region 112 can be reduced, and the collection efficiency of the carriers in the second region 112 can be improved.

[0084] In some examples, referring to Figure 1 As shown in the figure, along the thickness direction y of the substrate 10, the third distance L3 can be between one end of the dielectric layer 40 close to the second region 112 and the side surface of the first doped semiconductor layer 30 away from the substrate 10. That is, the distance of the dielectric layer 40 extending from the side surface of the first doped semiconductor layer 30 away from the substrate 10 towards the substrate 10 along the thickness direction y of the substrate 10 can be the third distance L3.

[0085] In some examples, the third distance L3 can be greater than or equal to a doping depth of the first doped semiconductor layer 30 and the first passivation layer 20. In other words, a portion of the dielectric layer 40 extending from the first doped semiconductor layer 30 away from the side surface of the substrate 10 along the thickness direction y of the substrate 10 can cover the doping depth of the first doped semiconductor layer 30 along the thickness direction y of the substrate 10.

[0086] In some examples, the third distance L3 can be greater than or equal to a sum of thicknesses of the first doped semiconductor layer 30 and the first passivation layer 20.

[0087] In some examples, the third distance L3 can be greater than a sum of thicknesses of the first doped semiconductor layer 30 and the first passivation layer 20.

[0088] In some examples, the third distance L3 can be equal to a sum of thicknesses of the first doped semiconductor layer 30 and the first passivation layer 20.

[0089] In other words, along the thickness direction y of the substrate 10, the dielectric layer 40 can completely cover the side walls of the first doped semiconductor layer 30 and the first passivation layer 20, thereby effectively insulating the first doped semiconductor layer 30 and the second doped semiconductor layer 60 and reducing the leakage path between the first doped semiconductor layer 30 and the second doped semiconductor layer 60.

[0090] In some examples of the embodiments of the present application, along the thickness direction y of the substrate 10, the distance between the end of the dielectric layer 40 close to the second region 112 and the side surface of the first doped semiconductor layer 30 away from the substrate 10 is set as the third distance L3, and the third distance L3 is set to be greater than or equal to the thickness of the first doped semiconductor layer 30 and the first passivation layer 20. In this way, along the thickness direction y of the substrate 10, the extension distance of the dielectric layer 40 to the substrate 10 can be greater than or equal to the diffusion depth of the first doped semiconductor layer 30 along the thickness direction y of the substrate 10, which can effectively insulate the first doped semiconductor layer 30 and the second doped semiconductor layer 60, reduce the leakage path of the solar cell, and reduce the power loss of the solar cell.

[0091] In some examples, referring to FIG. 1, the third distance L3 can be less than or equal to the distance between the end of the first sub-region 1121 toward the transition region 113 and the side surface of the first doped semiconductor layer 30 away from the substrate 10. Figure 1

[0092] ​In some examples, the third distance L3 can be less than a distance between an end of the first sub-region 1121 facing the transition region 113 and a surface of the first doped semiconductor layer 30 away from the substrate 10. That is, an end of the dielectric layer 40 facing the first sub-region 1121 can be spaced apart from the end of the first sub-region 1121.

[0093] In some examples, the third distance L3 can be equal to a distance between an end of the first sub-region 1121 facing the transition region 113 and a surface of the first doped semiconductor layer 30 away from the substrate 10. That is, an end of the dielectric layer 40 facing the first sub-region 1121 can extend to the end of the first sub-region 1121 connecting with the transition region 113, and can be in contact with the end of the first sub-region 1121.

[0094] In some examples of the embodiments, the third distance L3 is set to be less than or equal to a distance between an end of the first sub-region 1121 facing the transition region 113 and a surface of the first doped semiconductor layer 30 away from the substrate 10. In this way, the dielectric layer 40 can terminate at the end of the first sub-region 1121 facing the transition region 113, so that neither the first sub-region 1121 nor the second sub-region 1122 is covered by the dielectric layer 40, and the dielectric layer 40 can avoid affecting the carrier collection of the first sub-region 1121 and the second sub-region 1122, and the carrier collection efficiency of the second region 112 can be improved, thereby improving the photoelectric conversion efficiency of the solar cell.

[0095] In some examples, referring to FIG. 1, the transition region 113 can include a third sub-region 1131. The third sub-region 1131 can be adjacent to the first region 111. The third sub-region 1131 can be connected with the first region 111. Figure 1 In some examples, a distance between a surface of the third sub-region 1131 and the second surface 12 can be equal to the first distance L1. That is, the surface of the third sub-region 1131 can be flush with the surface of the first region 111. The first surface 11 can include the surface of the first region 111 and the surface of the third sub-region 1131.

[0096] In some examples, an end of the dielectric layer 40 facing the substrate 10 can be connected with the surface of the third sub-region 1131. That is, in the thickness direction y of the substrate 10, the dielectric layer 40 can extend toward the substrate 10 and extend to the surface of the third sub-region 1131.

[0097]

[0098] ​In some examples, the dielectric layer 40 may at least cover the sidewall of the first passivation layer 20 facing the third sub-region 1131, and the dielectric layer 40 may at least cover the sidewall of the first doped semiconductor layer 30 facing the third sub-region 1131.

[0099] In some examples of embodiments of this application, the third sub-region 1131 of the transition region 113 is configured to be adjacent to the first region 111, and the distance between the surface of the third sub-region 1131 and the second surface 12 is set to be equal to the first distance L1. Thus, when the dielectric layer 40 is deposited, it can be deposited in the third sub-region 1131, such that the dielectric layer 40 at least covers the sidewalls of the first passivation layer 20 and the first doped semiconductor layer 30 facing the third sub-region 1131. The dielectric layer 40 can insulate the first doped semiconductor layer 30 and the second doped semiconductor layer 60, reducing leakage paths in the solar cell and lowering power losses in the solar cell and photovoltaic module.

[0100] Furthermore, since the dielectric layer 40 covers the sidewalls of the first doped semiconductor layer 30 and the first passivation layer 20 facing the third sub-region 1131, compared to extending the dielectric layer 40 entirely to the bottom wall of the second region 112, the sidewalls of the second region 112 are exposed. This reduces the impact of the dielectric layer 40 on the collection of charge carriers in the second region 112, thereby improving the collection efficiency of charge carriers in the second region 112. Moreover, it saves on the amount of dielectric layer 40 used, reducing the processing and manufacturing costs of the solar cell.

[0101] In some examples, refer to Figure 1 As shown, the transition region 113 may include a fourth sub-region 1132. The fourth sub-region 1132 may be adjacent to the third sub-region 1131. The fourth sub-region 1132 may be located on the side of the third sub-region 1131 facing the second region 112. That is, the fourth sub-region 1132 may be connected to the side of the third sub-region 1131 away from the first region 111.

[0102] In some examples, the surface of the fourth sub-region 1132 can be an inclined surface. That is, the end of the fourth sub-region 1132 facing the third sub-region 1131 can be connected to the third sub-region 1131, and the end of the fourth sub-region 1132 away from the third sub-region 1131 can extend toward the second sub-region 1122, thereby making the surface of the fourth sub-region 1132 an inclined surface.

[0103] In some examples, the end of the dielectric layer 40 towards the base 10 can extend to the fourth sub-region 1132. That is, after the end of the dielectric layer 40 towards the second region 112 extends to the surface of the third sub-region 1131 in the thickness direction y of the base 10, the end of the dielectric layer 40 can continue to extend to the surface of the fourth sub-region 1132 in the inclined direction of the fourth sub-region 1132.

[0104] In some examples of the embodiments of the present application, by connecting the fourth sub-region 1132 to the third sub-region 1131 on the side of the third sub-region 1131 towards the second region 112, the surface of the fourth sub-region 1132 is an inclined surface. In this way, the end of the dielectric layer 40 towards the base 10 can extend to the fourth sub-region 1132. In this way, the size of the dielectric layer 40 covered in the thickness direction y of the base 10 can be greater than the diffusion depth of the first doped semiconductor layer 30 in the thickness direction y of the base 10, which can improve the insulation performance of the dielectric layer 40 on the first doped semiconductor layer 30 and the second doped semiconductor layer 60, reduce the leakage channel between the first doped semiconductor layer 30 and the second doped semiconductor layer 60, and reduce the power loss of the solar cell and the photovoltaic module.

[0105] In some examples, referring to FIG. 11B, the surface of the fourth sub-region 1132 can be a polished surface. That is, after the fourth sub-region 1132 is formed by grooving the first surface 11 with a laser, the surface of the fourth sub-region 1132 can be polished. Figure 1

[0106] In some examples of the embodiments of the present application, by polishing the surface of the fourth sub-region 1132, the surface of the fourth sub-region 1132 is formed as a polished surface. In this way, the roughness of the surface of the fourth sub-region 1132 can be reduced, the smoothness of the surface of the fourth sub-region 1132 can be improved, and the dangling bonds on the surface of the fourth sub-region 1132 can be reduced, which can improve the passivation effect.

[0107] Figure 2 FIG. 12 is another structural schematic diagram of a solar cell provided by some embodiments of the present application.

[0108] In some examples, referring to FIG. 11B, the surface of the fourth sub-region 1132 can be a polished surface. That is, after the fourth sub-region 1132 is formed by grooving the first surface 11 with a laser, the surface of the fourth sub-region 1132 can be polished. Figure 2

[0109] In some examples of the embodiments of the present application, the surface of the fourth sub-region 1132 is set as a textured surface. In this way, the reflectivity of the fourth sub-region 1132 can be reduced. When the fourth sub-region 1132 is grooved with a laser, the light absorption rate of the textured surface is relatively high, and only a laser with a relatively low energy is required to groove, which can simplify the laser grooving process and improve the laser grooving efficiency.

[0110] ​​Figure 3 is another structural schematic diagram of a solar cell provided by some embodiments of the present application.

[0111] In some examples, referring to FIG. 1 1, the transition region 1 13 can include a fifth sub-region 1 133. The fifth sub-region 1 133 can be located between the fourth sub-region 1 132 and the first sub-region 1 121. That is, one end of the fifth sub-region 1 133 can be connected with the fourth sub-region 1 132, and the other end of the fifth sub-region 1 133 can be connected with the first sub-region 1 121. Figure 3 As shown in FIG. 1 1, the transition region 1 13 can include a fifth sub-region 1 133. The fifth sub-region 1 133 can be located between the fourth sub-region 1 132 and the first sub-region 1 121. That is, one end of the fifth sub-region 1 133 can be connected with the fourth sub-region 1 132, and the other end of the fifth sub-region 1 133 can be connected with the first sub-region 1 121.

[0112] In some examples, the surface of the fifth sub-region 1 133 can have an included angle with the surface of the first sub-region 1 121, and the surface of the fifth sub-region 1 133 can have an included angle with the surface of the fourth sub-region 1 132. That is, along the arrangement direction x of the first region 1 1 1 and the second region 1 12, the extension direction of the fifth sub-region 1 133 can be different from the extension direction of the first sub-region 1 121 and the fourth sub-region 1 132. Wherein, the inclination direction of the fourth sub-region 1 132 and the inclination direction of the first sub-region 1 121 can be the same; that is, the surface of the fourth sub-region 1 132 can be parallel to the surface of the first sub-region 1 121. Or, the inclination direction of the fourth sub-region 1 132 and the inclination direction of the first sub-region 1 121 can be different; that is, the surface of the fourth sub-region 1 132 can be not parallel to the surface of the first sub-region 1 121.

[0113] It can be understood that the "parallel" mentioned in some examples of the embodiments of the present application can mean approximately parallel. Those skilled in the art can understand that due to the limitation of the processing technology, there can be a certain error between the surface of the fourth sub-region 1 132 and the surface of the first sub-region 1 121, which can be negligible for those skilled in the art.

[0114] In some examples, referring to FIG. 1 1, the transition region 1 13 can include a fifth sub-region 1 133. The fifth sub-region 1 133 can be located between the fourth sub-region 1 132 and the first sub-region 1 121. That is, one end of the fifth sub-region 1 133 can be connected with the fourth sub-region 1 132, and the other end of the fifth sub-region 1 133 can be connected with the first sub-region 1 121. Figure 3 As shown in FIG. 1 1, the transition region 1 13 can include a fifth sub-region 1 133. The fifth sub-region 1 133 can be located between the fourth sub-region 1 132 and the first sub-region 1 121. That is, one end of the fifth sub-region 1 133 can be connected with the fourth sub-region 1 132, and the other end of the fifth sub-region 1 133 can be connected with the first sub-region 1 121.

[0115] In some examples of the embodiments of the present application, by arranging the fifth sub-region 1 133 between the fourth sub-region 1 132 and the first sub-region 1 121, the surface of the fifth sub-region 1 133 has an included angle with the surface of the first sub-region 1 121 and the fourth sub-region 1 132. In this way, it is convenient to perform laser grooving in the second region 1 12. And the one end of the medium layer 40 towards the second region 1 12 extends to the fifth sub-region 1 133. In this way, the insulation performance of the medium layer 40 for insulating the first doped semiconductor layer 30 and the second doped semiconductor layer 60 can be improved, and the leakage channel of the solar cell is reduced.

[0116] In addition, in some examples of the embodiments of the present application, the fifth sub-region 1133 is arranged between the fourth sub-region 1132 and the first sub-region 1121, so that when the second region 112 is formed by laser grooving, the laser window of the laser grooving can extend to the fifth sub-region 1133 to perform laser grooving, which can widen the process window of the laser process and facilitate the formation of the second region 112 by laser grooving.

[0117] In some examples, referring to FIG. 11, the surface of the fifth sub-region 1133 can be parallel to the surface of any one of the first region 111 and the second sub-region 1122. That is, the surface of the fifth sub-region 1133 can be parallel to the surface of the first region 111. Alternatively, the surface of the fifth sub-region 1133 can be parallel to the surface of the second sub-region 1122. Alternatively, the surface of the fifth sub-region 1133 can be parallel to the surfaces of the first region 111 and the second sub-region 1122. Figure 3

[0118] It can be understood that, in some examples of the embodiments of the present application, the “parallel” mentioned can mean approximately parallel. Those skilled in the art can understand that, due to the limitation of the processing technology, there can be a certain error between the surface of the fifth sub-region 1133 and the surface of the first region 111 (or the second sub-region 1122), which can be negligible for those skilled in the art.

[0119] In some examples, the “parallel” can mean that the surface of the fifth sub-region 1133 is consistent with the extension direction of the surface of the first region 111 (or the second sub-region 1122).

[0120] In some examples of the embodiments of the present application, the surface of the fifth sub-region 1133 is arranged to be parallel to the surface of any one of the first region 111 and the second sub-region 1122. In this way, the processing of the fifth sub-region 1133 can be facilitated, and the production and processing difficulty of the solar cell can be reduced.

[0121] In some examples, referring to FIG. 11, the surface of the fifth sub-region 1133 can be a polished surface. That is, after the fifth sub-region 1133 is formed by laser grooving on the first surface 11, the surface of the fifth sub-region 1133 can be polished. Figure 3 In some examples of the embodiments of the present application, by arranging the surface of the fifth sub-region 1133 to be a polished surface, the roughness of the surface of the fifth sub-region 1133 can be reduced, the smoothness of the surface of the fifth sub-region 1133 can be improved, the dangling bonds on the surface of the fifth sub-region 1133 can be reduced, and the passivation effect can be improved.

[0122]

[0123] Figure 4 ​​Fig. 6 is another structural schematic diagram of a solar cell provided by some embodiments of the present application.

[0124] In some examples, referring to Fig. 1, the surface of the fourth sub-region 1132 can be a matte surface. Figure 4 As shown in Fig. 1, the surface of the fifth sub-region 1133 can be a matte surface. For example, the surface of the fifth sub-region 1133 can have a pyramidal matte surface structure.

[0125] In some examples of the embodiments of the present application, the surface of the fifth sub-region 1133 is set as a matte surface. In this way, the light reflectivity of the fifth sub-region 1133 can be reduced. When the fifth sub-region 1133 is laser grooved, the light absorption rate of the matte surface is relatively high, and only a low-energy laser is needed to groove, which can simplify the laser grooving process and improve the laser grooving efficiency.

[0126] Figure 5 Fig. 7 is another structural schematic diagram of a solar cell provided by some embodiments of the present application. Figure 6 Fig. 8 is another structural schematic diagram of a solar cell provided by some embodiments of the present application.

[0127] In some examples, referring to Fig. 1, the surface of the fourth sub-region 1132 can be a matte surface. Figure 5 As shown in Fig. 1, the surface of the fifth sub-region 1133 can be a matte surface. For example, the surface of the fifth sub-region 1133 can have a pyramidal matte surface structure.

[0128] In some examples, referring to Fig. 1, the surface of the fourth sub-region 1132 can be a matte surface. Figure 6 As shown in Fig. 1, the surface of the fifth sub-region 1133 can be a polished surface.

[0129] In some examples, referring to Fig. 1, the surface of the fourth sub-region 1132 can be a polished surface. Figure 4 As shown in Fig. 1, the surface of the fifth sub-region 1133 can be a matte surface. For example, the surface of the fifth sub-region 1133 can have a pyramidal matte surface structure.

[0130] In some examples, referring to Fig. 1, the surface of the fourth sub-region 1132 can be a polished surface. Figure 3 As shown in Fig. 1, the surface of the fifth sub-region 1133 can be a polished surface.

[0131] In some examples, referring to Fig. 1, the surface of the fourth sub-region 1132 can be a polished surface. Figures 1-6 As shown in Fig. 1, the surface of the fifth sub-region 1133 can be a matte surface. For example, the surface of the fifth sub-region 1133 can have a pyramidal matte surface structure.

[0132] In some examples, the first dielectric layer 41 of the first region 111 can cover the side of the first doped semiconductor layer 30 away from the first passivation layer 20.

[0133] It can be understood that, in some examples of the embodiments of the present application, the first medium layer 41 can be arranged in the same, similar or analogous manner as the medium layer 40 in the foregoing embodiments of the present application in the transition region 113 and the partial first region 111. For details, reference can be made to the foregoing detailed description of the medium layer 40 in the foregoing embodiments of the present application, which will not be repeated herein.

[0134] In some examples, the medium layer 40 can include a second medium layer 42, which can be located on the side of the first medium layer 41 away from the substrate 10. The second passivation layer 50 of the first region 111 can be covered on the side of the second medium layer 42 away from the substrate 10.

[0135] In some examples, the material of the first medium layer 41 can be different from the material of the second medium layer 42. In this way, the first medium layer 41 with better adhesion can be used to cover the third sub-region 1131 and the fourth sub-region 1132 of the transition region 113 first. The adhesion of the medium layer 40 as a whole can be improved. The medium layer 40 can be facilitated to sufficiently cover the sidewalls of the first doped semiconductor layer 30 and the first passivation layer 20, and the leakage channel of the solar cell can be reduced.

[0136] In addition, the second medium layer 42 with better anti-humidity and heat effect can be used to block the humid and hot water vapor, and the anti-humidity and heat performance of the first doped layer of the first region 111 can be improved.

[0137] In some examples, the first medium layer 41 can include any one of aluminum oxide or silicon oxide.

[0138] In some examples, the second medium layer 42 can include silicon nitride.

[0139] In some examples, the thickness of the first medium layer 41 can be less than the thickness of the second medium layer 42.

[0140] In some examples of the embodiments of the present application, any one of aluminum oxide or silicon oxide is used as the first medium layer 41, and the thickness of the first medium layer 41 is set to be less than the second medium layer 42. In this way, the amount of hydrogen gas overflow during the subsequent heating process after the deposition of the first medium layer 41 can be reduced, the risk of the second medium layer 42 being blown can be reduced, the integrity of the second medium layer 42 can be ensured, the effectiveness of the second medium layer 42 in insulating the first doped semiconductor layer 30 and the second doped semiconductor layer 60 can be ensured, the leakage channel of the solar cell can be reduced, the power loss of the solar cell and the photovoltaic module can be reduced. In addition, the yield of the solar cell can be improved.

[0141] In some examples, the thickness of the first medium layer 41 can be 5-15 nm.

[0142] In some examples, the first dielectric layer 41 can have a thickness of 7-12 nm.

[0143] In some examples, the first dielectric layer 41 can have a thickness of 5-12 nm.

[0144] In some examples, the first dielectric layer 41 can have a thickness of 7-15 nm.

[0145] In some examples of the present application, the thickness of the first dielectric layer 41 is set to 5-15 nm. In this way, on the one hand, the good coverage of aluminum oxide or silicon oxide can be utilized in atomic layer deposition, which can effectively cover the sidewalls of the first doped semiconductor layer 30 and the first passivation layer 20, the third sub-region 1131, the fourth sub-region 1132, and the fifth sub-region 1133, etc. regions, which can improve the insulation performance of the first doped semiconductor layer 30 and the second doped semiconductor layer 60, and reduce the leakage channel. On the other hand, the thickness of the first dielectric layer 41 is set to 5-15 nm. In this way, the release of hydrogen gas after the deposition of the first dielectric layer 41 is completed and subsequent heating can be reduced, which can reduce the risk of the second dielectric layer 42 being blown off, improve the yield of the solar cell, and thus ensure the effectiveness of the second dielectric layer 42 in insulating the first doped semiconductor layer 30 and the second doped semiconductor layer 60. This can reduce the leakage channel of the solar cell and reduce the power loss of the solar cell and the photovoltaic module.

[0146] In some examples, the second dielectric layer 42 can have a thickness of 60-100 nm.

[0147] In some examples, the second dielectric layer 42 can have a thickness of 80-100 nm.

[0148] In some examples of the present application, the thickness of the second dielectric layer 42 is set to 60-100 nm. In this way, the heat resistance, moisture resistance, and alkali resistance of the second dielectric layer 42 can be ensured, which can reduce the risk of the moisture and heat of the external environment penetrating from the second dielectric layer 42 to the first doped semiconductor layer 30, and can enhance the moisture resistance and heat resistance of the first doped semiconductor layer 30 and the reliability of the solar cell.

[0149] In some examples, referring to Figures 1-6 As shown in FIG. 7, the solar cell can include a conductive layer 70. The conductive layer 70 can be disposed on the side of the first doped semiconductor layer 30 and the second doped semiconductor layer 60 away from the substrate 10.

[0150] In some examples, the conductive layer 70 can be a transparent conductive layer 70. For example, the conductive layer 70 can include indium tin oxide (Indium Tin Oxide; abbreviated as ITO).

[0151] In some examples, referring to Figures 1-6 As shown in FIG. 7, the conductive layer 70 can be provided with an isolation groove 71. The projection of the isolation groove 71 on the base 10 can be located in the first region 111.

[0152] In some examples, at least part of the isolation groove 71 can penetrate to the side surface of the second doped semiconductor layer 60 facing away from the base 10. In this way, the conductive layer 70 of the first region 111 and the conductive layer 70 of the second region 112 can be isolated by the isolation groove 71, thereby physically ensuring that the conductive layer 70 of the first region 111 and the conductive layer 70 of the second region 112 are insulated, and avoiding the formation of a leakage channel between the conductive layer 70 of the first region 111 and the conductive layer 70 of the second region 112.

[0153] In some examples of the embodiments of the present application, the conductive layer 70 is provided on the side of the first doped semiconductor layer 30 and the second doped semiconductor layer 60 facing away from the base 10, and the isolation groove 71 is provided on the conductive layer 70. The projection of the isolation groove 71 on the base 10 is located in the first region 111, and at least part of the isolation groove 71 penetrates to the surface of the second doped semiconductor layer 60 facing away from the base 10. In this way, the first region 111 can collect carriers through the conductive layer 70 in the entire first doped semiconductor layer 30, and similarly, the second region 112 can collect carriers through the conductive layer 70 in the entire second doped semiconductor layer 60, which can improve the collection efficiency of the carriers and improve the photoelectric conversion efficiency of the solar cell.

[0154] In some examples, referring to Figures 1-6 As shown in FIG. 7, the solar cell can include a first electrode 80. The projection of the first electrode 80 on the base 10 can be located in the first region 111. The first electrode 80 can be electrically connected to the conductive layer 70 of the first region 111.

[0155] In some examples, referring to Figures 1-6 As shown in FIG. 7, the solar cell can include a second electrode 90. The projection of the second electrode 90 on the base 10 can be located in the second region 112. The second electrode 90 can be electrically connected to the conductive layer 70 of the second region 112.

[0156] In some examples of the embodiments of the present application, the first electrode 80 is provided in the first region 111, and the first electrode 80 is electrically connected to the conductive layer 70 of the first region 111. The second electrode 90 is provided in the second region 112, and the second electrode 90 is electrically connected to the conductive layer 70 of the second region 112. In this way, it is convenient to lead out the photo-generated current generated by the solar cell.

[0157] In some examples, the surface of the second sub-region 1122 can be a polished surface.

[0158] In some examples, the surface of the second sub-region 1122 can be a textured surface.

[0159] In some examples of the present application, a photovoltaic module is provided, which includes the solar cell provided by the foregoing embodiments of the present application.

[0160] It can be understood that the photovoltaic module provided by the embodiments of the present application has the same or corresponding technical features as the solar cell provided by the foregoing embodiments of the present application. Therefore, the photovoltaic module provided by the embodiments of the present application can have the same or similar technical effects as the solar cell provided by the foregoing embodiments.

[0161] Figure 7 is a flow chart of a preparation process of the solar cell provided by some embodiments of the present application.

[0162] In some examples, referring to FIG. 1, the solar cell provided by the embodiments of the present application can be prepared according to the following preparation method. Figure 7

[0163] s701, polishing the substrate 10. For example, the first surface 11 can be polished.

[0164] s702, sequentially depositing the first passivation layer 20 and the intrinsic polysilicon layer on the first surface 11. Then, the intrinsic polysilicon layer is subjected to diffusion treatment to form the first doped semiconductor layer 30; and a phosphosilicate glass layer is formed at the same time. The phosphosilicate glass layer can be removed, or can be partially retained, or can be entirely retained.

[0165] s703, depositing a mask layer on the side of the first doped semiconductor layer 30 away from the substrate 10. The mask layer can include silicon nitride.

[0166] s704, removing the mask layer in the preset area of the first surface 11 by using a laser process, and removing the first doped semiconductor layer 30 and the first passivation layer 20 in the preset area by using a wet process.

[0167] In this way, the second area 112 and the transition area 113 can be formed in the preset area of the first surface 11. After the initial structure of the first area 111, the second area 112 and the transition area 113 is formed, the around-plating of the mask layer can be removed by a chain machine.

[0168] s705, removing the laser damage in the slotted area by using a wet process, and completing the preparation of the texturing of the second surface 12 and the texturing of the second area 112. Then, the mask layer can be removed by using hydrogen fluoride (HF).

[0169] s706, depositing to form the first dielectric layer 41 in an atomic layer deposition (ALD) device. At the same time, the preparation of aluminum oxide or silicon oxide of the second surface 12 can be completed. ​

[0170] s707, the second dielectric layer 42 is prepared in a plasma-enhanced chemical vapor deposition (PECVD) furnace. Meanwhile, the silicon nitride and the sacrificial layer of the second surface 12 can be prepared. Alternatively, the silicon nitride, the silicon oxynitride and the sacrificial layer of the second surface 12 can be prepared simultaneously.

[0171] s708, the second trenching is performed on the second region 112 by a laser process. The position of the trenching can be at the position where the second region 112 meets the transition region 113. Alternatively, the position of the trenching can be at the transition region 113.

[0172] Then, the second trenching region can be removed by a wet process to polish the position of the second trenching.

[0173] s709, the intrinsic amorphous silicon layer and the doped amorphous silicon layer are deposited on the second surface 12. Then, the doped amorphous silicon, the intrinsic amorphous silicon and the dielectric layer 40 on the first region 111 are removed (or partially removed) by a laser process, thereby forming the second passivation layer 50 and the second doped semiconductor layer 60.

[0174] s710, the oxide layer generated by the laser is removed by a chain machine.

[0175] s711, the conductive layer 70 is prepared on the second surface 12 in a physical vapor deposition (PVD) device. Then, the isolation groove 71 is formed on the conductive layer 70 by a laser process, thereby isolating the conductive layer 70 of the first region 111 and the second region 112.

[0176] s712, the first electrode 80 is formed on the first region 111 and the second electrode 90 is formed on the second region 112 by a screen printing and sintering process. Thus, the solar cell is prepared.

[0177] In some examples, the main grid lines can be printed by screen printing. The main grid lines can include at least two. One of the two main grid lines can be electrically connected to the first electrode 80; the other of the two main grid lines can be electrically connected to the second electrode 90.

[0178] The technical features of the above-described embodiments can be combined in any manner. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described, however, as long as the combinations of the technical features do not contradict each other, they shall be considered within the scope of the present disclosure.

[0179] The above embodiments only express several implementation ways of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation to the patent scope of the application. It should be pointed out that for ordinary skilled persons in the art, several modifications and improvements can be made without departing from the concept of the present application, which all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A solar cell, characterized in that, include: A substrate (10) has opposing first surfaces (11) and second surfaces (12). The first surface (11) includes a first region (111), a second region (112), and a transition region (113). The transition region (113) is located between the first region (111) and the second region (112). The surface of the first region (111) and the second surface (12) have a first distance, and the surface of the second region (112) and the second surface (12) have a second distance, the second distance being less than the first distance. The second region (112) includes a first sub-region (1121) and a second sub-region (1122). The first sub-region (1121) is connected between the transition region (113) and the second sub-region (1122). The surface of the first sub-region (1121) is an inclined surface. A first passivation layer (20) is disposed in the first region (111); A first doped semiconductor layer (30) is disposed on the side of the first passivation layer (20) away from the substrate (10); A dielectric layer (40) is disposed in the transition region (113) and a portion of the first region (111), wherein the dielectric layer (40) in the first region (111) covers the side of the first doped semiconductor layer (30) away from the first passivation layer (20); A second passivation layer (50) is disposed in the second region (112), the transition region (113) and part of the first region (111), wherein the second passivation layer (50) in the first region (111) covers the side of the dielectric layer (40) away from the substrate (10); A second doped semiconductor layer (60) is disposed on the side of the second passivation layer (50) away from the substrate (10); The transition region (113) includes a third sub-region (1131) and a fourth sub-region (1132). The third sub-region (1131) is adjacent to the first region (111), and the distance between the surface of the third sub-region (1131) and the second surface (12) is equal to the first distance. The dielectric layer (40) is connected to the surface of the third sub-region (1131) at one end facing the substrate (10), and the dielectric layer (40) covers at least the sidewalls of the first passivation layer (20) and the first doped semiconductor layer (30) facing the third sub-region (1131). The fourth sub-region (1132) is adjacent to the third sub-region (1131), and the fourth sub-region (1132) is located on the side of the third sub-region (1131) facing the second region (112); the surface of the fourth sub-region (1132) is an inclined surface; The dielectric layer (40) extends from one end toward the substrate (10) to the fourth sub-region (1132).

2. The solar cell according to claim 1, characterized in that, Along the thickness direction of the substrate (10), there is a third distance between one end of the dielectric layer (40) near the second region (112) and the side surface of the first doped semiconductor layer (30) away from the substrate (10), the third distance being greater than or equal to the doping depth of the first doped semiconductor layer (30).

3. The solar cell according to claim 2, characterized in that, The third distance is less than or equal to the distance between the end of the first sub-region (1121) facing the transition region (113) and the surface of the first doped semiconductor layer (30) on the side away from the substrate (10).

4. The solar cell according to claim 1, characterized in that, The surface of the fourth sub-region (1132) is polished.

5. The solar cell according to claim 1, characterized in that, The surface of the fourth sub-region (1132) is velvety.

6. The solar cell according to claim 1, characterized in that, The transition region (113) further includes a fifth sub-region (1133), which is located between the fourth sub-region (1132) and the first sub-region (1121). The surfaces of the first sub-region (1121) and the fourth sub-region (1132) are both at an angle to the surface of the fifth sub-region (1133). The dielectric layer (40) extends from one end toward the second region (112) to the fifth sub-region (1133).

7. The solar cell according to claim 6, characterized in that, The surface of the fifth sub-region (1133) is parallel to the surface of either the first region (111) or the second sub-region (1122).

8. The solar cell according to claim 6, characterized in that, The surface of the fifth sub-region (1133) is polished.

9. The solar cell according to claim 6, characterized in that, The surface of the fifth sub-region (1133) is velvety.

10. The solar cell according to any one of claims 1-9, characterized in that, The dielectric layer (40) includes: A first dielectric layer (41) is disposed in the transition region (113) and a portion of the first region (111), and the first dielectric layer (41) in the first region (111) covers the side of the first doped semiconductor layer (30) away from the first passivation layer (20). A second dielectric layer (42) is located on the side of the first dielectric layer (41) away from the substrate (10); the second passivation layer (50) of the first region (111) covers the side of the second dielectric layer (42) away from the substrate (10); wherein the material of the first dielectric layer (41) is different from the material of the second dielectric layer (42).

11. The solar cell according to claim 10, characterized in that, The first dielectric layer (41) comprises either aluminum oxide or silicon oxide; the second dielectric layer (42) comprises silicon nitride, and the thickness of the first dielectric layer (41) is less than the thickness of the second dielectric layer (42).

12. The solar cell according to claim 10, characterized in that, The thickness of the first dielectric layer (41) is 5nm-15nm; the thickness of the second dielectric layer (42) is 60nm-100nm.

13. The solar cell according to any one of claims 1-3, characterized in that, The solar cell also includes: A conductive layer (70) is disposed on the side of the first doped semiconductor layer (30) and the second doped semiconductor layer (60) away from the substrate (10). The conductive layer (70) is provided with an isolation trench (71). The orthographic projection of the isolation trench (71) on the substrate (10) is located in the first region (111), and at least a portion of the isolation trench (71) extends to the surface of the second doped semiconductor layer (60) away from the substrate (10).

14. The solar cell according to claim 13, characterized in that, The solar cell also includes: A first electrode (80) is located in the first region (111) on the substrate (10) and is electrically connected to the conductive layer (70) of the first region (111). The second electrode (90) is located in the second region (112) on the orthographic projection of the substrate (10), and is electrically connected to the conductive layer (70) of the second region (112).

15. A photovoltaic module, characterized in that, Includes the solar cell according to any one of claims 1-14.

Images