Display device

Abstract

The invention provides a display device, comprising: a display panel comprising M display areas and a display chip, each display area comprising a plurality of pixel units, the display chip being coupled to the pixel units, M being an integer greater than 1; the backlight source comprises at least two light-emitting areas and a backlight chip, the light-emitting areas and the display area are oppositely arranged, and each light-emitting area comprises a plurality of light-emitting units; the backlight chip is coupled with the light emitting unit; the frame comprises M display time periods which are arranged at intervals, and a display interval time period is arranged between the two display time periods; the display device further comprises a control chip, and in the display interval time period, the control chip obtains sub-backlight data through calculation; the control chip is electrically connected with the backlight chip and transmits the sub backlight data to the backlight chip. The embodiment of the invention provides a display device to reduce the time delay of backlight luminescence.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display device. BACKGROUND

[0002] Under the trend of the existing vehicle display market, in order to open up a differentiated market and improve product competitiveness, Mini-LED products are widely used in instruments, HUD, central control and co-pilot. Under the current mainstream Mini-LED display system architecture, the control chip will first analyze the algorithm data according to the front-end video stream, and then set different duty cycle values for different regions of Mini-LED backlight according to the gray scale data of different pixel regions of the video stream.

[0003] The existing algorithm can only achieve global picture processing, that is, one frame of picture data processing (under the condition of 60bps, one frame = 16.7ms), and the display driving and backlight driving have a delay greater than or equal to one frame when the control chip is output. When driving at high speed, the overall vehicle speed is fast, and the delay of the Mini-LED display scheme backlight and display data is greater than or equal to one frame, which may cause certain driving safety hazards. Similarly, there is a functional safety risk in reversing image or other auxiliary driving. SUMMARY

[0004] The embodiment of the present application provides a display device to reduce the delay of backlight emission.

[0005] The embodiment of the present application provides a display device, which comprises:

[0006] A display panel comprising M display regions and a display chip, the display region comprising a plurality of pixel units, the display chip being coupled to the pixel units, M being an integer greater than 1;

[0007] A backlight source comprising at least two light emitting regions and a backlight chip, the light emitting region being arranged opposite to the display region, the light emitting region comprising a plurality of light emitting units; the backlight chip being coupled to the light emitting units;

[0008] A frame comprises M display periods arranged at intervals, and a display interval period is arranged between two display periods; the display device further comprises a control chip, the control chip calculating sub-backlight data in the display interval period; the control chip is electrically connected to the backlight chip, and the sub-backlight data is transmitted to the backlight chip.

[0009] Optionally, the control chip is electrically connected to the display chip, and sub-display data is transmitted to the display chip;

[0010] In the i-th display period, the display chip controls the light-emitting state of the pixel unit in the i-th display region according to the i-th sub-display data, 1≤i≤M.

[0011] The i-th display interval period is located after the i-th display period.

[0012] Optionally, the display interval period includes a calculation sub-period, in which the control chip calculates the sub-backlight data.

[0013] The frame further includes a light-emitting period, in which the backlight chip controls the light-emitting brightness of the light-emitting unit according to the sub-backlight data.

[0014] The i-th light-emitting period is located after the i-th calculation sub-period.

[0015] Optionally, the i-th light-emitting period is located in the i-th display interval period.

[0016] Optionally, the signal received by the control chip includes a row synchronization signal, and the period in which the row synchronization signal is located includes a plurality of row blanking intervals.

[0017] The calculation sub-period overlaps with the period in which at least one row blanking interval is located.

[0018] Optionally, the i-th calculation sub-period is located in the first row blanking interval after the i-th display period.

[0019] Optionally, the backlight source includes M backlight chips, which are located in the light-emitting region one by one and are electrically connected with the light-emitting unit in the light-emitting region.

[0020] Optionally, the control chip is electrically connected with the display chip and sequentially transmits M sub-display data to the display chip.

[0021] The control chip sequentially transmits M sub-backlight data to M backlight chips, respectively.

[0022] Optionally, the signal received by the control chip includes video stream data, and the control chip obtains display data of at least one frame according to the video stream data, the display data including at least two sub-display data.

[0023] The control chip calculates the sub-backlight data according to the sub-display data.

[0024] Optionally, the display panel further comprises a plurality of gate lines, the gate lines being electrically connected with the plurality of pixel units along a first direction; the M display regions are arranged along a second direction, the first direction intersecting the second direction.

[0025] The display chip is coupled with the gate lines.

[0026] In the embodiment of the present application, the display panel comprises M display regions, and a frame comprises M display periods arranged at intervals, in one display period, the light-emitting state of each pixel unit in one display region is controlled. In this way, in the M display periods, the light-emitting state of each pixel unit in the display region is controlled one by one in time division. In the display interval period, the control chip calculates the sub-backlight data and transmits the sub-backlight data to the backlight chip. Between the control of the light-emitting state of each pixel unit in the display panel according to the sub-display data and the backlight source light-emitting, there is a second delay time length, the second delay time length is short, and the delay of the backlight light-emitting is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 It is a timing diagram of a display device;

[0028] Figure 2 It is an exploded structural schematic diagram of a display device;

[0029] Figure 3 It is a structural schematic diagram of a display panel;

[0030] Figure 4 It is a structural schematic diagram of a backlight source;

[0031] Figure 5 It is a connection structural schematic diagram of a control chip;

[0032] Figure 6 It is a timing diagram of another display device. DETAILED DESCRIPTION

[0033] The present application will be further described below in conjunction with the drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present application, and not to limit the present application. In addition, it should be noted that, in order to facilitate the description, only the parts related to the present application are shown in the drawings, and not all the structures.

[0034] Figure 1 It is a timing diagram of a display device, referring to Figure 1The display chip first controls the light-emitting state of each pixel unit in the display panel according to the display data. For example, the pixel unit includes liquid crystal molecules, the display chip first controls the tilt state of each liquid crystal molecule in the display panel according to the display data, so as to control the light transmission intensity of each pixel unit, and then the light-emitting brightness of each pixel unit can be controlled when the backlight passes through the display panel. Then, the control chip calculates the backlight data. After the backlight data is calculated, the backlight chip can control the light-emitting brightness of the light-emitting unit. In this way, between the control of the light-emitting state of each pixel unit in the display panel according to the display data and the light-emitting of the backlight source, there is a first delay time T1, the first delay time T1 is relatively long, which affects the driving safety.

[0035] The first image Im1 is displayed in the Nth frame, and the second image Im2 is displayed in the N+1th frame. It can be understood that in order to display the first image Im1, not only the display panel needs to configure the light-emitting state of each pixel unit according to the display data corresponding to the first image Im1, but also the control chip needs to calculate the backlight data corresponding to the first image Im1, and the backlight chip needs to control the light-emitting brightness of each light-emitting unit by using the backlight data.

[0036] Figure 2 It is an exploded structural schematic view of a display device; Figure 3 It is a structural schematic view of a display panel; Figure 4 It is a structural schematic view of a backlight source; Figure 5 It is a connection structural schematic view of a control chip; Figure 6 It is a timing diagram of another display device. Referring to Figures 2-6 The display device includes a display panel 110 and a backlight source 120. The display panel 110 includes M display regions 210 and a display chip 220, the display region 210 includes a plurality of pixel units 230, the display chip 220 is coupled with the pixel unit 230, and M is an integer greater than 1.

[0037] The backlight source 120 includes at least two light-emitting regions 310 and a backlight chip 320, and the light-emitting region 310 is arranged opposite to the display region 210. In one example, the light-emitting region 310 is arranged one by one with the display region 210, and the light-emitting region 310 overlaps with the display region 210 along the light-emitting direction. The light-emitting region 310 includes a plurality of light-emitting units 330; and the backlight chip 320 is coupled with the light-emitting unit 330.

[0038] The display device displays a picture frame by frame. A frame includes M display periods 510 arranged at intervals, and a display interval period 520 is arranged between two display periods 510; the display device further includes a control chip 420, which calculates sub-backlight data in the display interval period 520; the control chip 420 is electrically connected to the backlight chip 320, and the control chip 420 transmits the sub-backlight data to the backlight chip 320. The backlight chip 320 controls different light-emitting areas 310 to emit light in time according to the sub-backlight data obtained in sequence.

[0039] In the embodiment of the application, the display panel 110 includes M display areas 210, and a frame includes M display periods 510 arranged at intervals, and in one display period 510, the light-emitting state of each pixel unit 230 in one display area 210 is controlled. In this way, in the M display periods 510, the light-emitting state of each pixel unit 230 in the display area 210 is controlled in time one by one. In the display interval period 520, the control chip 420 calculates sub-backlight data, and transmits the sub-backlight data to the backlight chip 320. Between the control of the light-emitting state of each pixel unit 230 in the display panel according to the sub-display data and the control of the backlight source to emit light, there is a second delay duration T2, and the second delay duration T2 is short, thereby reducing the delay of the backlight to emit light.

[0040] For example, the complete display data is no longer displayed in its entirety before the backlight source is controlled to emit light. Instead, the display data is divided into M sub-display data, and after the display of the first sub-display data is completed, the corresponding light-emitting area 310 of the backlight source can emit light. In this way, the delay duration is shortened to about one Mth of the original delay duration. Figure 6 Taking an example in which M is equal to 4, the delay duration is shortened to one fourth of the original delay duration. The delay risk of the backlight and the display is reduced.

[0041] Optionally, with reference to Figure 3 , Figure 5 and Figure 6 , the control chip 420 is electrically connected to the display chip 220, and the control chip 420 transmits the sub-display data to the display chip 220; in the ith display period 510, the display chip 220 controls the light-emitting state of the pixel unit 230 in the ith display area 210 according to the ith sub-display data, and 1≤i≤M; the ith display interval period 520 is located after the ith display period 510. That is, the light-emitting state of the pixel unit 230 in the ith display area 210 is first controlled in the ith display period 510, and then the control chip 420 calculates the ith sub-backlight data in the ith display interval period 520, and the control chip 420 transmits the ith sub-backlight data to the backlight chip 320. The backlight chip 320 controls the light-emitting area 310 to emit light according to the ith sub-backlight data in the subsequent process.

[0042] Exemplarily, the four display time periods 510 include a first display time period 511, a second display time period 512, a third display time period 513 and a fourth display time period 514 arranged in sequence. The four display interval time periods 520 include a first display interval time period 521, a second display interval time period 522, a third display interval time period 523 and a fourth display interval time period 524 arranged in sequence. The first display interval time period 521 is located between the first display time period 511 and the second display time period 512, the second display interval time period 522 is located between the second display time period 512 and the third display time period 513, the third display interval time period 523 is located between the third display time period 513 and the fourth display time period 514, and the fourth display interval time period 524 is located after the fourth display time period 514.

[0043] Optionally, the display interval time period 520 includes a calculation sub-period t, during which the control chip 420 calculates the sub-backlight data; the frame further includes a light-emitting time period 530, during which the backlight chip 320 controls the light-emitting brightness of the light-emitting unit 330 according to the sub-backlight data; the i th light-emitting time period 530 is located after the i th calculation sub-period t. That is, the control chip 420 first calculates the i th sub-backlight data during the i th calculation sub-period t, and then, during the i th light-emitting time period 530, the backlight chip 320 controls the light-emitting region 310 to emit light according to the i th sub-backlight data.

[0044] Exemplarily, the four calculation sub-periods t include a first calculation sub-period t1, a second calculation sub-period t2, a third calculation sub-period t3 and a fourth calculation sub-period t4. The four light-emitting time periods 530 include a first light-emitting time period 531, a second light-emitting time period 532, a third light-emitting time period 533 and a fourth light-emitting time period 534. The first light-emitting time period 531 is located after the first calculation sub-period t1, the second light-emitting time period 532 is located after the second calculation sub-period t2, the third light-emitting time period 533 is located after the third calculation sub-period t3, and the fourth light-emitting time period 534 is located after the fourth calculation sub-period t4.

[0045] Optionally, the i th light-emitting time period 530 is located in the i th display interval time period 520. The i th display interval time period 520 includes the i th calculation sub-period t and the i th light-emitting time period 530. In the display interval time period 520, both the calculation of the backlight data and the control of the light-emitting region 310 to emit light according to the calculated sub-backlight data are performed.

[0046] Exemplarily, reference is made to FIG. 4. Figure 6The first light-emitting time interval 531 is located in the first display interval time interval 521, the second light-emitting time interval 532 is located in the second display interval time interval 522, the third light-emitting time interval 533 is located in the third display interval time interval 523, and the fourth light-emitting time interval 534 is located in the fourth display interval time interval 524.

[0047] For example, referring to Figure 6 , the i th light-emitting time interval 530 does not overlap with the i+1 th display time interval 510, and the i+1 th display time interval 510 is located after the i th light-emitting time interval 530. In other embodiments, the i th light-emitting time interval 530 and the i+1 th display time interval 510 can at least partially overlap.

[0048] Optionally, referring to Figures 2-6 , the signal received by the control chip 420 includes a horizontal synchronization signal H-sync, and the time interval of the horizontal synchronization signal H-sync includes a plurality of horizontal blanking intervals; the horizontal blanking interval corresponds to Figure 6 the time interval of the low level of the horizontal synchronization signal H-sync. The calculation sub-time interval t overlaps with the time interval of at least one horizontal blanking interval. In an embodiment of the present application, the control chip 420 performs the calculation of the backlight data by using the time interval of at least one horizontal blanking interval. The delay of backlight emission is reduced.

[0049] In the display panel 100, a pixel scanning circuit (not shown in the figure) scans a row of pixel units 230 from left to right along the horizontal dashed arrow in the figure, and then needs to quickly return to the leftmost end of the next row to start a new scan. Figure 3 The horizontal synchronization signal H-sync is used to control the pixel scanning circuit to perform line-by-line scanning. Figure 3

[0050] For example, the signal received by the control chip 420 includes a vertical synchronization signal V-sync, and the pixel scanning circuit needs to quickly return to the top left corner of the screen to start scanning the next frame after scanning all the rows of an entire frame of image from top to bottom along the vertical dashed arrow in the figure. Figure 3 The vertical synchronization signal V-sync is used to control the pixel scanning circuit to perform frame-by-frame scanning.

[0051] Optionally, the i th calculation sub-time interval t is located in the first horizontal blanking interval after the i th display time interval 510. Thus, the control chip 420 can perform the calculation of the backlight data in the first horizontal blanking interval after the i th display time interval 510. The time interval between the display time interval 510 and the calculation sub-time interval t is shortened, and thus the time interval between the display time interval 510 and the light-emitting time interval 530 is shortened, and the delay of backlight emission is reduced.

[0052] Optionally, referring to Figure 4 and Figure 5 ​The backlight 120 includes M backlight chips 320, and the backlight chips 320 are located in the light emitting areas 310 one by one, and the backlight chips 320 are electrically connected with the light emitting units 330 in the light emitting areas 310.

[0053] Exemplarily, the four backlight chips 320 include a first backlight chip Driver1, a second backlight chip Driver2, a third backlight chip Driver3 and a fourth backlight chip Driver4. The four light emitting areas 310 include a first light emitting area 311, a second light emitting area 312, a third light emitting area 313 and a fourth light emitting area 314. The first backlight chip Driver1 is located in the first light emitting area 311, and the first backlight chip Driver1 is electrically connected with the light emitting units 330 in the first light emitting area 311 to drive the light emitting units 330 in the first light emitting area 311 to emit light. The second backlight chip Driver2 is located in the second light emitting area 312, and the second backlight chip Driver2 is electrically connected with the light emitting units 330 in the second light emitting area 312 to drive the light emitting units 330 in the second light emitting area 312 to emit light. The third backlight chip Driver3 is located in the third light emitting area 313, and the third backlight chip Driver3 is electrically connected with the light emitting units 330 in the third light emitting area 313 to drive the light emitting units 330 in the third light emitting area 313 to emit light. The fourth backlight chip Driver4 is located in the fourth light emitting area 314, and the fourth backlight chip Driver4 is electrically connected with the light emitting units 330 in the fourth light emitting area 314 to drive the light emitting units 330 in the fourth light emitting area 314 to emit light.

[0054] Exemplarily, referring to Figure 3 and Figure 4 The first display area 211 is located above the first light emitting area 311, and the first light emitting area 311 provides backlight for the first display area 211. The second display area 212 is located above the second light emitting area 312, and the second light emitting area 312 provides backlight for the second display area 212. The third display area 213 is located above the third light emitting area 313, and the third light emitting area 313 provides backlight for the third display area 213. The fourth display area 214 is located above the fourth light emitting area 314, and the fourth light emitting area 314 provides backlight for the fourth display area 214.

[0055] Optionally, the control chip 420 is electrically connected with the display chip 220, and the control chip 420 sequentially transmits M sub-display data to the display chip 220; and the control chip 420 sequentially transmits M sub-backlight data to the M backlight chips 320 respectively.

[0056] Exemplarily, before the first display period 511, the control chip 420 transmits the first sub-display data Im11 to the display chip 220. In the first display period 511, the display chip 220 controls the light-emitting state of the pixel unit 230 in the first display area 211 according to the first sub-display data Im11. In the first calculation sub-period t1, the control chip 420 calculates the first sub-backlight data according to the first sub-display data Im11. The control chip 420 transmits the first sub-backlight data to the first backlight chip Driver1. In the first light-emitting period 531, the first backlight chip Driver1 controls the light-emitting brightness of each light-emitting unit 330 in the first light-emitting area 311 according to the first sub-backlight data.

[0057] In the second display period 512, the display chip 220 controls the light-emitting state of the pixel unit 230 in the second display area 212 according to the second sub-display data Im12. In the second calculation sub-period t2, the control chip 420 calculates the second sub-backlight data according to the second sub-display data Im12. The control chip 420 transmits the second sub-backlight data to the second backlight chip Driver2. In the second light-emitting period 532, the second backlight chip Driver2 controls the light-emitting brightness of each light-emitting unit 330 in the second light-emitting area 312 according to the second sub-backlight data.

[0058] In the third display period 513, the display chip 220 controls the light-emitting state of the pixel unit 230 in the third display area 213 according to the third sub-display data Im13. In the third calculation sub-period t3, the control chip 420 calculates the third sub-backlight data according to the third sub-display data Im13. The control chip 420 transmits the third sub-backlight data to the third backlight chip Driver3. In the third light-emitting period 533, the third backlight chip Driver3 controls the light-emitting brightness of each light-emitting unit 330 in the third light-emitting area 313 according to the third sub-backlight data.

[0059] In the fourth display period 514, the display chip 220 controls the light-emitting state of the pixel unit 230 in the fourth display area 214 according to the fourth sub-display data Im14. In the fourth calculation sub-period t4, the control chip 420 calculates the fourth sub-backlight data according to the fourth sub-display data Im14. The control chip 420 transmits the fourth sub-backlight data to the fourth backlight chip Driver4. In the fourth light-emitting period 534, the fourth backlight chip Driver4 controls the light-emitting brightness of each light-emitting unit 330 in the fourth light-emitting area 314 according to the fourth sub-backlight data.

[0060] Optionally, the signal received by the control chip 420 includes video stream data. The control chip 420 obtains at least one frame of display data based on the video stream data. The display data includes at least two sub-display data. In one example, the display data is split into M sub-display data and transmitted to the display chip 220 in a time-division manner. The control chip 420 calculates the sub-backlight data based on the sub-display data.

[0061] Optionally, the display panel 110 further includes multiple gate lines 111 along a first direction X, the gate lines 111 being electrically connected to multiple pixel units 230; M display areas 210 arranged along a second direction Y, the first direction X intersecting the second direction Y; and a display chip 220 coupled to the gate lines 111.

[0062] For example, the display panel 110 also includes a plurality of data lines 112. The plurality of data lines 112 extend along the second direction Y. By interleaving the arrays of gate lines 111 and data lines 112, individual pixel units 230 are defined at the intersections. The gate lines 111 are used to output an enable signal for the pixel unit 230, and the data lines 112 are used to output data signals for the pixel unit 230.

[0063] For example, such as Figure 3 As shown, gate line 111 is connected to the gate of the transistor, data line 112 is connected to the first terminal of the transistor, and pixel unit 230 is connected to the second terminal of the transistor. When gate line 111 controls the transistor to be turned on, the data signal on data line 112 can be transmitted to pixel unit 230 through the transistor.

[0064] For example, the gate lines 111 in the first display area 211 include gate lines G1 to G(Y1-1). The gate lines 111 in the second display area 212 include gate lines GY1 to G(Y2-1). The gate lines 111 in the third display area 213 include gate lines GY2 to G(Y3-1). The gate lines 111 in the fourth display area 214 include gate lines GY3 to GY4. Multiple data lines 112 include data lines S1, S2, S3, ..., S(n-1), S(n). Wherein, 1 is less than Y1, Y1 is less than Y2, Y2 is less than Y3, and Y3 is less than Y4. n is greater than 1.

[0065] When the display chip 220 controls the light-emitting state of the pixel unit 230 in the first display area 211 according to the first sub-display data Im11, it scans from the gate line G1 to the gate line G (Y1-1) in turn. When the display chip 220 controls the light-emitting state of the pixel unit 230 in the second display area 212 according to the second sub-display data Im12, it scans from the gate line GY1 to the gate line G (Y2-1) in turn. When the display chip 220 controls the light-emitting state of the pixel unit 230 in the third display area 213 according to the third sub-display data Im13, it scans from the gate line GY2 to the gate line G (Y3-1) in turn. When the display chip 220 controls the light-emitting state of the pixel unit 230 in the fourth display area 214 according to the fourth sub-display data Im14, it scans from the gate line GY3 to the gate line GY4 in turn.

[0066] Exemplarily, when the display area 210 has display data of a gray scale greater than Level 0, the light-emitting unit 330 in the corresponding light-emitting area 310 will be turned on. The light-emitting unit 330 includes a light-emitting diode, and specifically, the light-emitting diode can include a Mini-LED. The sub-backlight data includes LED duty cycle data.

[0067] Exemplarily, referring to Figure 2 , the display device further includes an optical film 130 and a rear shell 140. The optical film 130 is located between the display panel 110 and the backlight 120, and is used to perform light homogenization and the like on the backlight emitted by the backlight 120, so as to increase the spatial distribution uniformity of the light projected to the display panel 110 and improve the backlight brightness uniformity of the light projected to the display panel 110. The rear shell 140 is located on the side of the backlight 120 away from the display panel 110, and is used to provide support and protection for the backlight 120 and the like.

[0068] Exemplarily, referring to Figure 6 , the signal received by the control chip 420 includes a data valid signal DE. When the data valid signal DE is at a high level, it indicates that the data signal on the data line 112 at this time is valid, and these data are applied to the corresponding pixel unit 230. When the data valid signal DE is at a low level, it indicates that at this time it is in a blanking interval, and the data signal on the data line 112 is invalid and should be ignored. The display period 510 is located in the period in which the data valid signal DE is at a high level.

[0069] Note that the above merely describes preferred embodiments of the present application and the principles of the technology applied. Those skilled in the art will understand that the present application is not limited to the specific embodiments described herein, and that various obvious changes, modifications, combinations and substitutions can be made by those skilled in the art without departing from the scope of the present application. Therefore, although the present application has been described in detail through the above embodiments, the present application is not limited to the above embodiments, and can include more other equivalent embodiments without departing from the concept of the present application, and the scope of the present application is determined by the scope of the claims.

Claims

1. A display device, characterized by comprising: The display panel comprises M display regions and a display chip, the display region comprises a plurality of pixel units, the display chip is coupled with the pixel unit, and M is an integer greater than 1. The backlight source comprises at least two light emitting regions and a backlight chip, the light emitting region is arranged opposite to the display region, the light emitting region comprises a plurality of light emitting units, and the backlight chip is coupled with the light emitting unit. The frame comprises M display periods arranged at intervals, and a display interval period is arranged between two display periods. The display device further comprises a control chip, in the display interval period, the control chip calculates sub-backlight data, the control chip is electrically connected with the backlight chip, and the sub-backlight data is transmitted to the backlight chip. The control chip is electrically connected with the display chip, and sub-display data is transmitted to the display chip.

2. The display device according to claim 1, wherein In the i-th display period, the display chip controls the light emitting state of the pixel unit in the i-th display region according to the i-th sub-display data, 1≤i≤M. The i-th display interval period is located after the i-th display period. The display interval period comprises a calculation sub-period, in the calculation sub-period, the control chip calculates the sub-backlight data.

3. The display device according to claim 2, wherein The frame further comprises a light emitting period, in the light emitting period, the backlight chip controls the light emitting brightness of the light emitting unit according to the sub-backlight data. The i-th light emitting period is located after the i-th calculation sub-period. The i-th light emitting period is located in the i-th display interval period.

4. The display device according to claim 3, wherein The signal received by the control chip comprises a row synchronization signal, and the period in which the row synchronization signal is located comprises a plurality of row blanking intervals.

5. The display device according to claim 3, wherein The calculation sub-period overlaps with the period in which at least one row blanking interval is located. The i-th calculation sub-period is located in the first row blanking interval after the i-th display period.

6. The display device according to claim 5, wherein The backlight source comprises M backlight chips, the backlight chip is located in the light emitting region one by one, and is electrically connected with the light emitting unit in the light emitting region.

7. The display device according to claim 1, wherein The control chip is electrically connected with the display chip, and M sub-display data is transmitted to the display chip in sequence.

8. The display device according to claim 7, wherein The control chip transmits M sub-backlight data to M backlight chips in sequence respectively. The signal received by the control chip comprises video stream data, the control chip obtains display data of at least one frame according to the video stream data, and the display data comprises at least two sub-display data.

9. The display device according to claim 1, wherein The control chip calculates the sub-backlight data according to the sub-display data. The display panel further comprises a plurality of gate lines, the gate line is electrically connected with a plurality of pixel units along a first direction, the M display regions are arranged along a second direction, and the first direction intersects with the second direction.

10. The display device according to claim 1, wherein The display chip is coupled with the gate line. ​

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