Capacitive MEMS device and manufacturing method thereof

By setting a groove structure on the wafer substrate to form an air flow channel, the problem of film electrode collapse caused by air pressure during the manufacturing process of capacitive MEMS devices is solved, achieving air pressure balance and improving yield.

CN121005368APending Publication Date: 2025-11-25AAC ACOUSTIC TECH (SHENZHEN) CO LTD

Patent Information

Application Number
CN202511151826.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-15
Publication Date
2025-11-25

AI Technical Summary

Technical Problem

During the manufacturing process of existing capacitive MEMS devices, the collapse of the membrane electrode structure due to air pressure causes inaccurate testing and makes it impossible to assess whether it meets design specifications, thus affecting the yield rate.

Method used

A groove structure is set on the wafer substrate to form an air flow channel. The groove structure connects to the outside world through the cavity structure to achieve air pressure balance and avoid deformation of the film electrode.

Benefits of technology

It achieves air pressure balance for capacitive MEMS devices, avoids the influence of air pressure on the devices, improves yield, and enables electrical testing and defective chip screening before assembly.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a capacitive MEMS device and a manufacturing method thereof. The capacitive MEMS device comprises at least one MEMS chip, each MEMS chip comprises a wafer substrate and a structural layer arranged on the top surface of the wafer substrate, and a first cavity structure is formed in the wafer substrate. The structural layer covers the first cavity structure and comprises a vibrating diaphragm fixed on the top surface of the wafer substrate and a back polar plate which is fixed on the wafer substrate and is spaced from the vibrating diaphragm to form a capacitor, the bottom surface of the wafer substrate is provided with a groove structure which is sunken towards the direction of the structural layer, and the groove structure partially penetrates through the wafer substrate; the first cavity structure penetrates through the groove bottom of the groove structure and the top surface of the wafer substrate along a first direction; the groove structure and the first cavity structure jointly form an air flowing channel, and the groove structure is communicated with the first cavity structure and the outside of the MEMS chip. According to the capacitive MEMS device, balance control over the air pressure in the device is achieved, and the influence of the air pressure on the capacitive MEMS device is avoided.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a capacitive MEMS device and its manufacturing method. Background Technology

[0002] Capacitive MEMS devices (MEMS stands for microelectromechanical system) are miniaturized devices based on capacitive sensing or actuation principles, combining microelectronics and micromachining technologies. Their core function is to measure physical quantities or perform specific actions by detecting or controlling changes in capacitance. Capacitive MEMS devices generally include at least two electrical conductors, comprising at least one movable film electrode and a fixed backplane electrode, with an air gap forming between them. The film electrode structure may include vent holes or not. In the manufacturing process of existing capacitive MEMS devices, the wafer substrate is back-side ground to thin it, and... A cavity is formed by etching the interior of the sacrificial layer to release the flexible membrane. The thinned wafer is then bonded to a support structure such as tape and a metal frame for electrical testing and operation. The wafer bonding and metal frame mounting are typically performed in an environment below atmospheric pressure to ensure low particulate contamination, good sealing, and adhesion between the tape and the substrate. During operation, atmospheric pressure causes the non-venting membrane electrode structure to collapse towards the substrate. This collapse will result in inaccurate capacitance testing of the installed MEMS device, making it impossible to assess and screen whether the MEMS device meets design specifications.

[0003] Therefore, it is necessary to provide a capacitive MEMS device capable of balancing air pressure and its manufacturing method. Summary of the Invention

[0004] The purpose of this invention is to provide a capacitive MEMS device and its manufacturing method. The structural design of the capacitive MEMS device can balance the air pressure inside the device, and can avoid structural deformation of the membrane electrode during the installation of tape or bracket, thereby improving the yield rate.

[0005] The technical solution of the present invention is as follows:

[0006] In a first aspect, the present invention provides a capacitive MEMS device, comprising at least one MEMS chip. Each MEMS chip includes a wafer substrate and a structural layer disposed on the top surface of the wafer substrate. A first cavity structure is formed inside the wafer substrate. The structural layer covers the first cavity structure and includes a diaphragm fixed to the top surface of the wafer substrate and a back electrode plate fixed to the wafer substrate and spaced apart from the diaphragm to form a capacitor. A groove structure recessed towards the structural layer is formed on the bottom surface of the wafer substrate. The groove structure partially penetrates the wafer substrate. The first cavity structure penetrates the bottom of the groove structure and the top surface of the wafer substrate along a first direction. The groove structure and the first cavity structure together form an airflow channel, and the groove structure connects the first cavity structure and the outside of the MEMS chip.

[0007] Optionally, the groove structure includes a first groove structure and a second groove structure connected to the first groove structure. The first groove structure is coaxially arranged with and connected to the first cavity structure, and the second groove structure is arranged along the circumference of the first groove structure and penetrates the groove wall of the first groove structure.

[0008] Optionally, the second groove structure includes multiple grooves that are equally spaced from each other along the circumference of the first groove structure.

[0009] Optionally, adjacent wafer substrates are interconnected via at least a portion of the second trench structure.

[0010] Optionally, the cross-sectional area of ​​the first groove structure perpendicular to the first direction is greater than or equal to the cross-sectional area of ​​the first cavity structure perpendicular to the first direction.

[0011] Optionally, the MEMS chip includes a test MEMS chip and at least one effective MEMS chip connected in sequence. The diaphragm of the effective MEMS chip is a thin-film electrode with a non-porous structure or a thin-film electrode with a slit structure. The diaphragm of the test MEMS chip has at least one vent hole. The first cavity structure of the effective MEMS chip is connected to the outside through the slot structure, the first cavity structure of the test MEMS chip and the vent hole in sequence.

[0012] Optionally, the capacitive MEMS device further includes a PCB, the bottom surface of the wafer substrate is connected to the PCB, the wafer substrate and the PCB are connected by an adhesive structure, the adhesive structure fills the groove structure, and the maximum depth of the groove structure is less than the thickness of the adhesive structure used in the PCB assembly process.

[0013] Secondly, the present invention provides a method for manufacturing a capacitive MEMS device, which is used to fabricate a capacitive MEMS device as described above; the capacitive MEMS device includes at least one MEMS chip, and the manufacturing of each MEMS chip includes the steps of: providing at least one wafer substrate; forming a first cavity structure disposed along a first direction inside each wafer substrate; forming a groove structure on the bottom surface of the wafer substrate; the groove structure communicating with the first cavity structure; the groove structure partially penetrating the wafer substrate; the groove structure and the first cavity structure together forming an airflow channel; forming a structural layer on the top surface of the wafer substrate; the structural layer covering the first cavity structure and including a diaphragm fixed to the top surface of the wafer substrate and a back electrode plate fixed to the top surface of the wafer substrate and spaced apart from the diaphragm to form a capacitor; the groove structure extending from the bottom surface of the wafer substrate toward the structural layer; the groove structure communicating with the first cavity structure and the outside of the MEMS chip.

[0014] Optionally, a testing step is included after the MEMS chip manufacturing step: the testing step includes attaching the wafer substrate to a support; attaching the bottom surface of the wafer substrate to the support; and the depth of the groove structure is greater than the thickness of the adhesive used for attachment.

[0015] Optionally, after the MEMS chip manufacturing step, there is also an assembly and packaging step, wherein the assembly step and the packaging step include assembling the wafer substrate onto the PCB, and the maximum depth of the groove structure is less than the thickness of the adhesive structure used during assembly.

[0016] The beneficial effects of this invention are as follows:

[0017] The capacitive MEMS device of this invention includes a groove structure disposed on the wafer substrate. The groove structure partially penetrates the wafer substrate, allowing the wafer substrate to communicate with the outside world. The groove structure, through a first cavity structure connected to the wafer substrate, forms a connection path for each chip disposed on the wafer substrate, ultimately enabling the MEMS chips to communicate with each other through the groove structure. The airflow channel formed by the groove structure and the first cavity structure allows air to flow smoothly within the capacitive MEMS device, achieving balanced control of the air pressure in the capacitive MEMS device and avoiding the influence of air pressure on the capacitive MEMS device. The configuration of the groove structure involves a design change to the wafer substrate, without involving a design change to the membrane electrode, and has no impact on the design and operation of the overall MEMS system. It enables electrical capacitance testing and defective chip screening before assembly and packaging, improving the yield rate of MEMS devices. Attached Figure Description

[0018] Figure 1This is a schematic diagram of the bottom surface structure when MEMS chips are interconnected.

[0019] Figure 2 For the present invention, the following are used: Figure 1 The diagram shows a cross-sectional view of the capacitive MEMS device obtained by the arrangement shown along AA.

[0020] Figure 3 In order to adopt such Figure 1 The diagram shows a cross-sectional view along the AA direction of the MEMS chips arranged in this way when mounted on the support.

[0021] Figure 4 In order to adopt such Figure 1 The diagram shows a cross-sectional view along the BB direction of the MEMS chips arranged in this way when mounted on the support.

[0022] Figure 5 To adopt such Figure 1 The diagram shows the airflow path when the MEMS chips are arranged and mounted on the support. The dashed lines represent the airflow path.

[0023] Figure 6 This is a schematic diagram of the structure of the wafer substrate of the present invention.

[0024] Figure 7 This is a schematic diagram of the first possible structure of the groove structure of the present invention.

[0025] Figure 8 This is a schematic diagram of the second structure of the groove structure of the present invention.

[0026] Figure 9 This is a schematic diagram of the third possible structure of the groove structure of the present invention.

[0027] Figure 10 This is a schematic diagram of the fourth structure of the groove structure of the present invention.

[0028] Figure 11 This is a schematic diagram of the fifth possible structure of the groove structure of the present invention.

[0029] Figure 12 This is a schematic diagram of the sixth structure of the groove structure of the present invention. Detailed Implementation

[0030] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0031] It should be noted that the bottom surface a and the top surface b refer to the two surfaces of the wafer substrate 1 that are arranged opposite each other along the first direction z; unless otherwise specified, the cross-sectional area mentioned in this invention refers to the cross-sectional area along a plane perpendicular to the first direction z.

[0032] Example:

[0033] In a first aspect, the present invention provides a capacitive MEMS device, see [link to previous document]. Figures 1 to 5 The capacitive MEMS device includes at least one MEMS chip 100. Each MEMS chip 100 includes a wafer substrate 1 and a structural layer 2 disposed on the top surface b of the wafer substrate 1. A first cavity structure 11 is formed inside the wafer substrate 1. The structural layer 2 covers the first cavity structure 11 and includes a diaphragm 21 fixed to the top surface b of the wafer substrate 1 and a back electrode plate 22 fixed to the top surface b of the wafer substrate 1 and spaced apart from the diaphragm 21 to form a capacitor. A groove structure 12 is formed on the bottom surface a of the wafer substrate 1, which is recessed towards the structural layer 2. The groove structure 12 partially penetrates the wafer substrate 1. The first cavity structure 11 penetrates the bottom of the groove structure and the top surface of the wafer substrate along a first direction. The groove structure 12 and the first cavity structure 11 together form an airflow channel. The groove structure connects the first cavity structure 11 and the outside of the MEMS chip 100.

[0034] The capacitive MEMS device of the present invention includes the groove structure 12, which penetrates the wafer substrate 1, allowing the wafer substrate 1 to communicate with the outside world. The groove structure 12, through a first cavity structure 11 connected to the wafer substrate 1, forms a connection path for each chip disposed on the wafer substrate 1, ultimately enabling the MEMS chips 100 to communicate with each other through the groove structure 12. The air flow channel formed by the groove structure 12 and the first cavity structure 11 allows air to flow smoothly within the capacitive MEMS device, achieving balanced control of the air pressure in the capacitive MEMS device and avoiding the influence of air pressure on the capacitive MEMS device. The configuration of the groove structure 12 is a design change to the wafer substrate 1, without involving changes to the design of the membrane electrode, and has no impact on the overall design and operation of the MEMS system. It enables electrical capacitance testing and defective chip screening before assembly and packaging, improving the yield of MEMS devices.

[0035] See Figure 6As shown, the groove structure 12 includes a first groove structure 121 and a second groove structure 122 connected to the first groove structure 121. The first groove structure 121 is coaxially arranged with and connected to the first cavity structure 11. The second groove structure 122 is arranged along the circumference of the first groove structure 121 and penetrates the groove wall of the first groove structure 121. The arrangement of the second groove structure 122 connects the wafer substrate 1 to the external environment. During operation, the air in the capacitive MEMS device flows through the first groove structure 121 and / or the MEMS chip 100 connected to the first cavity structure 11, thereby ensuring that the air pressure of the capacitive MEMS device remains balanced and avoiding deformation due to inconsistent air pressure and uneven stress on both sides of the diaphragm 21 during operation. The number of second groove structures 122 and the distribution method of the second groove structures 122 along the first groove structure 121 are optional. The second groove structure includes multiple structures that are equally spaced along the circumference of the first groove structure. Specifically, the shape of the second groove structure 122, as an option, can be a regular rectangle, a curve, or any other arbitrary shape. The structural configuration of the first groove structure 121 and the second groove structure 122 is not limited to that in this invention. Figures 7 to 12 As shown, the present invention Figures 7 to 12 The structures shown are merely illustrative examples of the first groove structure 121 and the second groove structure 122 in the groove structure 12, and should not be construed as the only limitation.

[0036] Furthermore, adjacent wafer substrates 1 are interconnected via at least a portion of the second trench structure 122. For example, in some embodiments, the number of second trench structures 122 is two, for example... Figure 7 and Figure 9 As shown, the second groove structure 122 is symmetrically arranged on both sides of the first groove structure 121. The second groove structures 122 on two adjacent wafer substrates 1 are aligned, and the adjacent wafer substrates 1 are interconnected through all the second groove structures 122. This allows air in the capacitive MEMS device to flow freely to the outside through the outermost second groove structure 122, thereby achieving pressure balance and regulation in the capacitive MEMS device. In other embodiments, the number of second groove structures 122 is greater than two, with at least two second groove structures 122 symmetrically arranged on both sides of the first groove structure 121, for example... Figure 10 and Figure 12As shown, the second groove structures 122 on two adjacent wafer substrates 1 are aligned, and the adjacent wafer substrates 1 are interconnected through the symmetrically arranged second groove structures 122, that is, the adjacent wafer substrates 1 are interconnected through a portion of the second groove structures 122. The arrangement of the second groove structures 122 allows air in the capacitive MEMS device to flow to the outside through the non-interconnected second groove structures 122, and also allows air in the capacitive MEMS device to flow freely to the outside through the outermost second groove structure 122, thereby achieving pressure balance regulation in the capacitive MEMS device, increasing the airflow path, and improving the pressure balance effect of the capacitive MEMS device.

[0037] Optionally, the cross-sectional area of ​​the first groove structure 121 along the direction perpendicular to the first direction is greater than or equal to the cross-sectional area of ​​the first cavity structure 11 along the direction perpendicular to the first direction. The cross-sectional area of ​​the first groove structure 121 is not less than the cross-sectional area of ​​the first cavity structure 11. While ensuring that the arrangement of the first groove structure 121 does not affect the first cavity structure 11, a larger cross-sectional area of ​​the first groove structure 121 results in better airflow in the MEMS device.

[0038] See Figures 1 to 3 As shown, the MEMS chip 100 includes a test MEMS chip 101 and at least one active MEMS chip 102 connected in sequence. The diaphragm 21 of the active MEMS chip 102 is a thin-film electrode with a non-porous structure or a thin-film electrode with a slit structure. The diaphragm 21 of the test MEMS chip 101 has at least one vent hole 23. The first cavity structure 11 of the active MEMS chip 102 communicates with the outside world through the slot structure, the first cavity structure 11 of the test MEMS chip 101, and the vent hole 23 in sequence. That is, both the test MEMS chip 101 and the active MEMS chip 102 are provided with the structural layer 2, the diaphragm 21, and the back electrode plate 224. The structures of the structural layer 2 and the back electrode plate 22 are the same for both. The difference is that the diaphragm 21 of the active MEMS chip 102 is a thin-film electrode with a non-porous structure or a thin-film electrode with a slit structure, while the diaphragm 21 of the test MEMS chip 101 is a thin-film electrode with the vent hole 23. See also Figure 4 As shown, during the installation of the support 103, in addition to flowing through the path formed by the groove structure 12 and the first cavity structure 11, air can also flow in the flow channel formed by the groove structure 12 and the vent 23.

[0039] See Figure 5As shown, the capacitive MEMS device also includes a PCB 3. The bottom surface a of the wafer substrate 1 is connected to the PCB 3. The wafer substrate 1 and the PCB 3 are connected by an adhesive structure 4. The adhesive structure 4 fills the groove structure 12, and the maximum depth of the groove structure 12 is less than the thickness of the adhesive structure 4 used in the assembly of the PCB 3. Optionally, the adhesive structure 4 is a silicone adhesive mechanism. The groove structure 12 is filled and sealed by the adhesive structure 4 used to attach the MEMS chip 100 to the PCB 3, ensuring the overall sealing of the device and avoiding any impact on the capacitive MEMS device.

[0040] In a second aspect, the present invention provides a method for manufacturing a capacitive MEMS device, which is used to fabricate the capacitive MEMS device as described above; the capacitive MEMS device includes at least one MEMS chip 100, and the manufacturing of each MEMS chip 100 includes the steps of: providing at least one wafer substrate 1; forming a first cavity structure 11 disposed along a first direction z inside each wafer substrate 1; forming a groove structure 12 on the bottom surface a of the wafer substrate 1; the groove structure 12 communicating with the first cavity structure 11; the groove structure 12 partially penetrating the wafer substrate 1; the groove structure 12 and the first cavity structure 11 together forming an airflow channel; and forming a structural layer 2 on the top surface b of the wafer substrate 1; the structural layer covering the first cavity structure 11 and including a diaphragm fixed to the top surface of the wafer substrate and a back electrode plate fixed to the top surface of the wafer substrate and spaced apart from the diaphragm to form a capacitor; the groove structure 12 extending from the bottom surface a of the wafer substrate 1 toward the structural layer 2; and the groove structure communicating with the first cavity structure 11 and the outside of the MEMS chip 100.

[0041] Following the MEMS chip manufacturing steps, a testing step is also included. This testing step involves attaching the wafer substrate 1 to a support 103 to fix, support, and protect the wafer substrate 1; the bottom surface a of the wafer substrate 1 is attached to the support 103; and the depth of the groove structure 12 is greater than the thickness of the adhesive used for attachment. Optionally, the support 103 may include mounting tape or a mounting bracket.

[0042] Following the MEMS chip manufacturing steps, an assembly and packaging step is included. This assembly and packaging step involves assembling the wafer substrate 1 onto the PCB 3. The maximum depth of the trench structure 12 is less than the thickness of the adhesive structure used during assembly to ensure the sealing of the silicon trench, thereby not affecting the device operation of the membrane. It should be noted that the depth refers to the thickness extending along the first direction z.

[0043] The above description is merely an embodiment of the present invention. It should be noted that those skilled in the art can make improvements without departing from the inventive concept of the present invention, but these improvements all fall within the protection scope of the present invention.

Claims

1. A capacitive MEMS device, characterized in that, The capacitive MEMS device includes at least one MEMS chip. Each MEMS chip includes a wafer substrate and a structural layer disposed on the top surface of the wafer substrate. A first cavity structure is formed inside the wafer substrate. The structural layer covers the first cavity structure and includes a diaphragm fixed to the top surface of the wafer substrate and a back electrode plate fixed to the wafer substrate and spaced apart from the diaphragm to form a capacitor. A groove structure is formed on the bottom surface of the wafer substrate, which is recessed towards the structural layer. The groove structure partially penetrates the wafer substrate. The first cavity structure penetrates the bottom of the groove structure and the top surface of the wafer substrate along a first direction. The groove structure and the first cavity structure together form an airflow channel, and the groove structure connects the first cavity structure and the outside of the MEMS chip.

2. The capacitive MEMS device according to claim 1, characterized in that: The groove structure includes a first groove structure and a second groove structure connected to the first groove structure. The first groove structure is coaxially arranged with and connected to the first cavity structure. The second groove structure is arranged along the circumference of the first groove structure and penetrates the groove wall of the first groove structure.

3. The capacitive MEMS device according to claim 2, characterized in that: The second groove structure includes multiple grooves that are equally spaced from each other along the circumference of the first groove structure.

4. The capacitive MEMS device according to claim 3, characterized in that: The adjacent wafer substrates are interconnected by at least a portion of the second trench structure.

5. The capacitive MEMS device according to claim 2, characterized in that: The cross-sectional area of ​​the first groove structure perpendicular to the first direction is greater than or equal to the cross-sectional area of ​​the first cavity structure perpendicular to the first direction.

6. The capacitive MEMS device according to claim 1, characterized in that: The MEMS chip includes a test MEMS chip and at least one effective MEMS chip connected in sequence. The diaphragm of the effective MEMS chip is a thin-film electrode with a non-porous structure or a thin-film electrode with a slit structure. The diaphragm of the test MEMS chip has at least one vent hole. The first cavity structure of the effective MEMS chip is connected to the outside world in sequence through the slot structure, the first cavity structure of the test MEMS chip and the vent hole.

7. The capacitive MEMS device according to claim 6, characterized in that: The capacitive MEMS device also includes a PCB, the bottom surface of the wafer substrate is connected to the PCB, the wafer substrate and the PCB are connected by an adhesive structure, the adhesive structure fills the groove structure, and the maximum depth of the groove structure is less than the thickness of the adhesive structure used in the PCB assembly process.

8. A method for manufacturing a capacitive MEMS device, characterized in that: It is used to fabricate a capacitive MEMS device as described in any one of claims 1-7; the capacitive MEMS device includes at least one MEMS chip, and the fabrication of each MEMS chip includes the steps of: providing at least one wafer substrate; forming a first cavity structure disposed along a first direction inside each wafer substrate; forming a groove structure on the bottom surface of the wafer substrate; the groove structure communicating with the first cavity structure; the groove structure partially penetrating the wafer substrate; and the groove structure and the first cavity structure together forming an airflow channel; forming a structural layer on the top surface of the wafer substrate; the structural layer covering the first cavity structure and including a diaphragm fixed to the top surface of the wafer substrate and a back electrode plate fixed to the wafer substrate and spaced apart from the diaphragm to form a capacitor; the groove structure extending from the bottom surface of the wafer substrate toward the structural layer; and the groove structure communicating with the first cavity structure and the outside of the MEMS chip.

9. The method for manufacturing a capacitive MEMS device according to claim 8, characterized in that: The MEMS chip manufacturing process includes a testing step, which involves attaching the wafer substrate to a support; attaching the bottom surface of the wafer substrate to the support; and ensuring that the depth of the groove structure is greater than the thickness of the adhesive used for attachment.

10. The method for manufacturing a capacitive MEMS device according to claim 8, characterized in that: The MEMS chip manufacturing process includes an assembly and packaging step, which involves assembling a wafer substrate onto a PCB, wherein the maximum depth of the groove structure is less than the thickness of the adhesive structure used during assembly.

Citation Information

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