Solar cell and photovoltaic module

Abstract

The invention relates to the field of solar cells, in particular to a solar cell and a photovoltaic module. The solar cell comprises a silicon substrate, a P-type doped region and an N-type doped region, wherein the P-type doped region and the N-type doped region are arranged on the backlight surface of the silicon substrate and are arranged in an interdigital manner; a separation region and a conduction region are respectively arranged between the P-type doped regions and between the N-type doped regions, the separation region has a first width, and the conduction region has a second width; wherein the first width is greater than 30 [mu] m and less than or equal to 100 [mu] m, and the second width is less than or equal to 30 [mu] m and greater than 0 [mu] m; wherein the number of the separation regions is N1, the number of the conduction regions is N2, and 0.25% < = N2 / (N1 + N2) < = 14%.

Description

Technical Field

[0001] This application relates to the field of solar cell technology, and more particularly to a solar cell and photovoltaic module. Background Technology

[0002] A solar cell is a battery that converts sunlight into electrical energy for energy storage. There are many types of solar cells, among which back-contact solar cells have metal electrodes positioned on the back side of the cell, while the sun-receiving side is unshielded. This structural characteristic gives back-contact solar cells a relatively high theoretical photoelectric conversion efficiency, which theoretically allows for higher output power.

[0003] In practical applications, solar cells generally experience localized temperature increases and power reductions when exposed to certain shade, and there are even potential safety hazards. This makes it difficult for solar modules, especially high-efficiency modules, to demonstrate their high power output advantage in practical applications. Summary of the Invention

[0004] To address the aforementioned technical problems, this application discloses a solar cell and photovoltaic module that can effectively solve a series of problems, such as the decrease in output power of back-contact solar cells when they encounter shading.

[0005] In a first aspect, this application provides a solar cell, the solar cell comprising a silicon substrate, a P-type doped region and an N-type doped region disposed on the back surface of the silicon substrate and arranged interdigitally among them;

[0006] A separation region and a conductive region are respectively provided between the P-type doped regions and between the N-type doped regions. The separation region has a first width and the conductive region has a second width.

[0007] Wherein, the first width is greater than 30μm and less than or equal to 100μm, and the second width is less than or equal to 30μm and greater than 0μm;

[0008] Wherein, the number of the separating regions is N1, the number of the conducting regions is N2, and 0.25% ≤ N2 / (N1+N2) ≤ 14%.

[0009] Furthermore, the second width is less than or equal to 10 μm and greater than 0 μm.

[0010] Preferably, 2.5% ≤ N2 / (N1+N2) ≤ 7.5%.

[0011] Furthermore, the conductive area is uniformly distributed on the back surface of the solar cell.

[0012] Furthermore, the conductive area is provided near the edge of the solar cell.

[0013] Optionally, the P-type doped region includes a plurality of horizontally arranged and parallel first P-type doped sub-regions, and the N-type doped region includes a plurality of horizontally arranged and parallel first N-type doped sub-regions, with adjacent first P-type doped sub-regions and first N-type doped sub-regions arranged in an interdigitated pattern.

[0014] The adjacent first P-type doped sub-region and the first N-type doped sub-region have a first vertical distance, part of which is the first width and the other part of which is the second width.

[0015] Optionally, the P-type doped region includes a plurality of horizontally arranged and parallel first P-type doped sub-regions and a plurality of vertically arranged and perpendicular to the first P-type doped sub-regions; the N-type doped region includes a plurality of horizontally arranged and parallel first N-type doped sub-regions and a plurality of vertically arranged and perpendicular to the first N-type doped sub-regions; wherein, adjacent first P-type doped sub-regions and first N-type doped sub-regions are arranged in an interdigitated pattern, the vertical second P-type doped sub-regions divide the horizontal first N-type doped sub-regions into several segments, and the vertical second N-type doped sub-regions divide the horizontal first N-type doped sub-regions into several segments;

[0016] The adjacent first P-type doped sub-region and the first N-type doped sub-region have a first vertical distance, the adjacent first P-type doped sub-region and the second N-type doped sub-region have a second horizontal distance, and the adjacent first N-type doped sub-region and the second P-type doped sub-region have a third horizontal distance. A portion of the first distance, the second distance, and the third distance is the second width, and the remaining distance is the first width.

[0017] Furthermore, the solar cell also includes:

[0018] A first passivation layer is disposed on the light-receiving surface of the silicon substrate;

[0019] The second passivation layer is disposed on the surface of the P-type doped region and the N-type doped region away from the silicon substrate;

[0020] The first electrode makes ohmic contact with the P-type doped region;

[0021] The second electrode makes ohmic contact with the N-type doped region.

[0022] Furthermore, the P-type doped region includes a P-type doped polysilicon layer, and a dielectric layer is further provided between the P-type doped polysilicon layer and the silicon substrate; the N-type doped region includes an N-type doped polysilicon layer, and the dielectric layer is also provided between the N-type doped polysilicon layer and the silicon substrate; the second passivation layer is disposed on the side of the N-type doped polysilicon layer and the P-type doped polysilicon layer facing away from the dielectric layer; the first electrode penetrates the second passivation layer to make ohmic contact with the P-type doped polysilicon layer, and the second electrode penetrates the second passivation layer to make ohmic contact with the N-type doped polysilicon layer;

[0023] Alternatively, the P-type doped region includes a P-type diffusion layer formed on the surface of the silicon substrate by diffusion, and the N-type doped region includes an N-type diffusion layer formed on the surface of the silicon substrate by diffusion. The second passivation layer is disposed on the surfaces of the P-type diffusion layer and the N-type diffusion layer opposite to the silicon substrate. The first electrode penetrates the second passivation layer to make ohmic contact with the P-type diffusion layer, and the second electrode penetrates the second passivation layer to make ohmic contact with the N-type diffusion layer.

[0024] Secondly, this application provides a photovoltaic module, the photovoltaic module comprising:

[0025] A solar cell string, which is obtained by connecting solar cells in series and / or in parallel as described in the first aspect.

[0026] Compared with the prior art, this application has at least the following beneficial effects:

[0027] This application provides an improved back-contact solar cell that effectively solves problems such as power reduction under shading, ensuring that the back-contact solar cell can fully utilize its high photoelectric conversion efficiency. Based on a separator between the P-type and N-type doped regions, this application further adds a specific proportion of conductive regions as a conduction and leakage design. On one hand, when the photovoltaic module experiences hot spots due to shading, this conduction and leakage design at the shading location allows the current supplied by the normally functioning cells in the string to flow through the conductive region at the shading location, instead of causing charge accumulation at the ends of the shaded cells or the cell string, leading to continuous heating in the shading area and avoiding its adverse effects on the photovoltaic module. On the other hand, by controlling the proportion of the conductive region within the range of 0.25% to 14%, it ensures photoelectric conversion efficiency, effectively solves the hot spot problem under shading, and improves tolerance to hot spot effects. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of a back-contact solar cell (top view).

[0030] Figure 2 This is a schematic diagram (side view) of the structure of a solar cell according to an embodiment of this application;

[0031] Figure 3 This is a schematic diagram (top view) of the structure of a solar cell according to an embodiment of this application;

[0032] Figure 4 yes Figure 3 Enlarged schematic diagram of the structure at point B;

[0033] Figures 5 to 11 This is a schematic diagram of the structure of the solar cell in different fabrication steps according to the embodiments of this application.

[0034] Explanation of reference numerals in the attached figures:

[0035] 1. Silicon substrate; 2. P-type doped region; 201. First P-type doped sub-region; 202. Second P-type doped sub-region; 21. P-type doped polysilicon layer; 3. N-type doped region; 301. First N-type doped sub-region; 302. Second N-type doped sub-region; 31. N-type doped polysilicon layer; 4. Separator region; 4a. First width; 5. Conducting region; 5a. Second width; 6. Passivation layer; 61. First passivation layer; 611. First alumina layer; 612. First silicon nitride layer; 62. Second passivation layer; 621. Second alumina layer; 622. Second silicon nitride layer; 7. Electrode; 71. First electrode; 72. Second electrode; 8. Dielectric layer; 81. First dielectric layer; 82. Second dielectric layer; 91. BSG layer; 92. Mask layer; L1. First distance; L2. Second distance; L3. Third distance. Detailed Implementation

[0036] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0037] In this application, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "vertical," "horizontal," "lateral," and "longitudinal" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing this application and its embodiments, and are not intended to limit the indicated device, element, or component to having a specific orientation, or to be constructed and operated in a specific orientation.

[0038] Furthermore, in addition to indicating location or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in some cases to indicate a certain dependency or connection relationship. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0039] Furthermore, the terms "installation," "setup," "equipped with," "connection," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0040] Furthermore, the terms "first," "second," etc., are primarily used to distinguish different devices, elements, or components (which may be the same or different in specific type and construction), and are not intended to indicate or imply the relative importance or quantity of the indicated devices, elements, or components. Unless otherwise stated, "a plurality of" means two or more.

[0041] When photovoltaic (PV) modules are used outdoors, they inevitably encounter shading. Common shading materials include leaves, bird droppings, dust, buildings, and clouds. When solar cells are shaded (e.g., by leaves covering them), the PV module experiences a hot spot effect. If the shading area is insufficient to activate the bypass diodes, the localized shading area becomes a hot spot with concentrated heat, leading to excessively high temperatures. Over time, this can cause module aging and reduced power output. Conversely, if the shading area is large enough to activate the bypass diodes, all cells in the string will be short-circuited, affecting power generation.

[0042] Compared to other types of solar cells, in back-contact solar cells, both the P-type and N-type doped regions are located on the back surface of the cell, and the two different types of conductive regions are arranged in an interdigitated pattern. For example... Figure 1As shown in the schematic diagram of the back contact solar cell, from a top-down view, the arrangement of P-type doped region 2 and N-type doped region 3 on the back surface of silicon substrate 1 reveals that the P-type doped region 2 and N-type doped region 3 are arranged in a cross-coordinated manner. Due to this cross-coordinated arrangement, the P-type doped region 2 and N-type doped region 3 of the back contact solar cell can be regarded as being composed of many small-area P-type doped sub-regions and N-type doped sub-regions arranged in a reciprocating alternation.

[0043] After in-depth analysis and extensive research on the impact mechanism of shading on back-contact solar cells, this application proposes a new inventive concept to solve a series of problems caused by shading of back-contact solar cells.

[0044] Unlike related technologies that mainly focus on improving solar cell strings and photovoltaic modules, this application starts with improving the structure of the smallest unit of photovoltaic modules—the solar cell itself—to alleviate the hot spot effect caused by shading on the back-contact solar cell itself.

[0045] The first aspect is the combination Figure 2 , Figure 3 , Figure 4 As shown, Figure 2 This is a schematic diagram (side view) of the structure of the solar cell according to an embodiment of this application. Figure 3 This is a schematic diagram of the structure of a solar cell according to an embodiment of this application (top view, showing only the arrangement of the P-type doped region 2 and the N-type doped region 3). Figure 4 yes Figure 3 An enlarged schematic diagram of the structure at point B. This application provides a solar cell, including:

[0046] A silicon substrate 1, and P-type doped regions 2 and N-type doped regions 3 disposed on the back surface of the silicon substrate 1 and arranged in an interdigitated manner;

[0047] A separation region 4 and a conductive region 5 are respectively provided between the P-type doped regions 2 and between the N-type doped regions 3. The separation region 4 has a first width 4a and the conductive region 5 has a second width 5a. The first width is greater than 30 μm and less than or equal to 100 μm, and the second width is less than or equal to 30 μm and greater than 0 μm.

[0048] Among them, the number of separation zones 4 is N1, the number of conduction zones 5 is N2, and 0.25% ≤ N2 / (N1+N2) ≤ 14%.

[0049] The first width of the separator 4 is greater than 30 μm and less than or equal to 100 μm, enabling it to provide insulation against leakage for the P-type doped region 2 and N-type doped region 3 located on either side. The second width of the conductive region 5 is smaller than the first width, meaning that the overall reverse conduction voltage of the cell in the conductive region 5 is lower than that in the separator 4. This embodiment of the solar cell, by adding a small number of conductive regions 5 with low reverse conduction voltages between the P-type doped region 2 and N-type doped region 3 on the back surface of the silicon substrate 1, can effectively alleviate the hot spot problem of back-contact solar cells under shading.

[0050] The solar cell in this embodiment is a back-contact solar cell in which P-type doped regions 2 and N-type doped regions 3 are arranged in an interdigitated manner on the back surface of a silicon substrate 1. On one hand, a separation region 4 is provided between the P-type doped regions 2 and N-type doped regions 3. By setting the first width 4a of the separation region 4 to a larger width corresponding to a larger reverse conduction voltage, the leakage-proof insulation design of the N-region and P-region in the back-contact cell is better realized. On the other hand, a conduction region 5 is also provided between the P-type doped regions 2 and N-type doped regions 3. By setting the second width 5a of the conduction region 5 to a smaller width corresponding to a smaller conduction voltage, when the photovoltaic module experiences a hot spot phenomenon due to shading, the conduction leakage design at the shading location allows the current supplied by the normal cells in the string of cells to flow through the conduction region at the shading location, instead of causing charge accumulation at the ends of the shaded cells or the cell string, which would lead to continuous heating in the shading area and avoid its adverse effects on the photovoltaic module.

[0051] Meanwhile, through extensive research and verification, this application has found that the number of conductive regions 5 needs to be controlled within a specific range to achieve the aforementioned effect. Only when the number of conductive regions 5 and the number of separating regions 4 satisfy the relationship of 0.25% ≤ N2 / (N1+N2) ≤ 14% can the hot spot effect under shading be resolved while ensuring photoelectric conversion efficiency. When the proportion of conductive regions 5 is greater than 14%, although the ability to resist shading is stronger, it is easy to cause serious recombination problems in the N and P regions of the solar cell, reducing the output power of the photovoltaic module. When the proportion of conductive regions 5 is less than 0.25%, although the photoelectric conversion efficiency of the solar cell is relatively ideal, it cannot improve the problems of excessively high local temperature and low tolerance of hot spot effect caused by hot spot effect.

[0052] More importantly, this application also discovered that when a back-contact solar cell, in addition to having a separating region 4, also has a conducting region 5 in the aforementioned proportion, the back-contact solar cell exhibits excellent reversible properties. These reversible properties mean that when the solar cell is shaded (e.g., leaves cover it), the conducting region 5 enables it to conduct earlier, suppressing rapid temperature rise. After the shading disappears (e.g., the leaves are blown away by the wind, leaving the solar cell surface unshaded), the N-type doped region 3 and P-type doped region 2 located on either side of the conducting region 5 can resume normal power generation, providing output power to the load.

[0053] In this context, the number of separating regions 4 (N1) and the number of conducting regions 5 (N2) are both positive integers. Their specific numbers can be reasonably set according to the specifications and dimensions of the solar cell, the number of grid lines on the positive electrode 7 and the negative electrode 7, etc., as long as 0.25% ≤ N2 / (N1+N2) ≤ 14%. There are no restrictions on the numerical range of N1 and N2. A more detailed explanation will follow with specific embodiments. The condition 0.25% ≤ N2 / (N1+N2) ≤ 14% includes any value within this range; for example, N2 / (N1+N2) can be 0.25%, 0.5%, 1%, 1.5%, 2%, 5%, 8%, 10%, 12%, or 14%.

[0054] In this application, when the distance between the P-type doped region 2 and the N-type doped region 3 in the back-contact solar cell is greater than 30 μm, the reverse conduction voltage of the back-contact solar cell is greater than 10V. When the distance between the P-type doped region 2 and the N-type doped region 3 in the back-contact solar cell is less than or equal to 30 μm, the reverse conduction voltage of the back-contact solar cell is less than or equal to 10V. When the distance between the P-type doped region 2 and the N-type doped region 3 in the back-contact solar cell is further less than or equal to 10 μm, the reverse conduction voltage of the back-contact solar cell is less than 7V.

[0055] In other words, setting the distance between the P-type doped region 2 and the N-type doped region 3 to be greater than 30 μm is beneficial for increasing the reverse conduction voltage and preventing significant recombination between the P-type doped region 2 and the N-type doped region 3. Correspondingly, in the embodiments of this application, setting the distance between the P-type doped region 2 and the N-type doped region 3 on both sides of the separator 4 to be greater than 30 μm, that is, setting the first width 4a of the separator 4 to be greater than 30 μm, enables a larger maximum conduction voltage corresponding to the separator 4 (greater than 10V is needed to achieve the conduction voltage between the P-type doped region 2 and the N-type doped region 3). This facilitates better electrical isolation between adjacent P-type doped regions 2 and N-type doped regions 3, preventing severe recombination of charge carriers in the N / P contact region.

[0056] Conversely, setting the distance between the P-type doped region 2 and the N-type doped region 3 to less than or equal to 30 μm helps reduce the reverse conduction voltage. Corresponding to the embodiment of this application, setting the distance between the P-type doped region 2 and the N-type doped region 3 on both sides of the conducting region 5 to less than or equal to 30 μm, that is, setting the second width 5a of the conducting region 5 to less than or equal to 30 μm, can reduce the overall reverse conduction voltage of the battery. A reverse bias voltage of less than or equal to 10V is sufficient to enable conduction between the P-type doped region 2 and the N-type doped region 3 on both sides. Utilizing this characteristic of a specific ratio of conducting regions 5, it is possible to effectively alleviate problems such as localized hot spots caused to back-contact solar cells under shading conditions.

[0057] Specifically, when the back-contact solar cell in a photovoltaic module is reverse-biased due to a small area of ​​shading, the P-type doped region 2 and N-type doped region 3 located on both sides of the conduction region 5 have lower reverse conduction voltages. Therefore, they can quickly achieve reverse conduction under relatively low reverse bias voltage conditions. At this time, the P-type doped region 2 and N-type doped region 3 on both sides of the conduction region 5 act as conductors, conducting current and preventing continuous heating at the shaded area of ​​the back-contact solar cell, thus avoiding continuous power consumption of the photovoltaic module. When the shading is removed, the back-contact solar cell is no longer reverse-biased, so no reverse bias voltage is applied to both sides of the conduction region 5, and charge will not accumulate at the conduction region 5.

[0058] In a preferred embodiment, the second width 5a of the conductive region 5 is less than or equal to 10 μm and greater than 0 μm. When the second width 5a of the conductive region 5 is less than 10 μm, the reverse conduction voltage of the cell corresponding to this region is lower, and reverse conduction can be achieved as long as it is less than 7V. This makes the conductive region 5 of the back-contact solar cell more responsive to the reverse bias voltage generated by shading, and can alleviate the local hot spot problem more quickly through the current conduction of the conductive region 5.

[0059] In this embodiment, the conductive region 5 can be formed either by controlling the distance between the P-type doped region 2 and the N-type doped region 3, or by direct contact between the P-type doped region 2 and the N-type doped region 3. In the former method of forming the conductive region 5, as mentioned above, the second width 5a of the conductive region 5 is less than 30 μm and greater than 0 μm. Within this second width 5a, the second reverse conduction voltage between the P-type doped region 2 and the N-type doped region 3 at both ends of the conductive region 5 is relatively small. Under shading conditions, it can be turned on earlier without continuously accumulating potential difference and generating heat. Preferably, the second width 5a of the conductive region 5 is less than 30 μm, and more preferably, the second width 5a is less than 10 μm and greater than 0 μm. This conductive region 5 not only plays a good shunting role under shading conditions, avoiding local hot spot problems and output power reduction in the shaded area, but also does not affect the initial power of the component product.

[0060] It should be noted that, for those skilled in the art, it is generally understood that when designing back-contact solar cells, the P-type doped region 2 and the N-type doped region 3 need to be separated, and the wider the separation region 4 between them, the better. A wider separation region 4 indicates a higher reverse conduction voltage between adjacent N-type doped region 3 and P-type doped region 2, making them less prone to breakdown. This is intended to ensure the structural stability of the back-contact solar cell and prevent it from being damaged by a low reverse bias voltage. However, a wider separation region 4 also means a smaller area left for the N-type doped region 3 and P-type doped region 2, which affects the photoelectric conversion efficiency of the back-contact solar cell. Therefore, the width of the separation region 4 cannot be too large. For example, the first width 4a of the separator 4 can be set to be greater than 30μm and less than or equal to 100μm. When the first width 4a is greater than 30μm, the corresponding reverse conduction voltage is greater than 10V. The level of this reverse conduction voltage can better meet the stability of the solar cell. When the first width 4a is less than or equal to 100μm, it is beneficial to ensure the area of ​​the N-type doped region 3 and the P-type doped region 2 in the back contact solar cell.

[0061] One of the technical contributions of this application lies precisely in overcoming the aforementioned misconceptions. In addition to the separation region 4 on the back surface of the back-contact solar cell, this application also includes a conductive region 5 with a specific ratio. By reducing the width of the conductive region 5, a lower on-state voltage is achieved between the N-type doped region 3 and the P-type doped region 2 located on either side of the conductive region 5. This allows for easier conduction like a wire under shading, rather than continuous heating of the hot spot area. More importantly, this specific ratio of the conductive region 5 does not damage the structural characteristics of the P-type doped region 2 and the N-type doped region 3 on either side of the conductive region 5. Even without shading, the P-type doped region 2 and the N-type doped region 3 can still generate electricity normally, ensuring the output power level of the photovoltaic module.

[0062] Preferably, in the embodiments of this application, 2.5% ≤ N2 / (N1+N2) ≤ 7.5%. When N2 / (N1+N2) ≤ 7.5%, it can solve the problem of excessively high local hot spot temperature caused by shading, and also ensure that the photoelectric conversion efficiency of the solar cell is maintained at a relatively high level of over 25.8%.

[0063] Furthermore, the conductive area 5 is evenly distributed on the back surface of the solar cell. Since shading is relatively random, this embodiment distributes the conductive area 5 relatively evenly in various areas of the back surface of the solar cell according to the required proportion, thereby ensuring that when shading occurs in different areas, there is a corresponding conductive area 5 that can play a role in conduction and current shunting under reverse bias.

[0064] Furthermore, the conductive area 5 is positioned close to the edge of the solar cell. Edge cracks and other defects are prone to occur at the edges of solar cells, especially when the edge of the back-contact solar cell is shaded, where excessively high local hot spot temperatures can accelerate or exacerbate edge defects. This application, by providing the conductive area 5 at the edge of the solar cell, can alleviate the problem of excessively high local hot spot temperatures at the shaded edge, thereby reducing the probability and severity of defects such as cracks at the solar cell edge.

[0065] The following section will further explain the conduction region 5 in conjunction with the structural configuration of the P-type doped region 2 and the N-type doped region 3.

[0066] The back contact solar cell of this application embodiment can adopt a gridless design and a grid-without design in terms of the grid lines of electrode 7. The positions of P-type doped region 2 and N-type doped region 3 correspond to the grid lines of electrode 7, so it can also be divided into two different graphical settings.

[0067] When the gate line of electrode 7 adopts a gateless design (not shown in the figure), the P-type doped region and the N-type doped region are arranged as follows: the P-type doped region includes several horizontally arranged and parallel first P-type doped sub-regions, and the N-type doped region includes several horizontally arranged and parallel first N-type doped sub-regions, with adjacent first P-type doped sub-regions and first N-type doped sub-regions arranged in an interdigitated pattern. Adjacent first P-type doped sub-regions and first N-type doped sub-regions have a first vertical distance, part of which is a first width and another part is a second width.

[0068] See also Figure 3 and Figure 4As shown, when the gate line of electrode 7 adopts a main gate design, the P-type doped region 2 and N-type doped region 3 are arranged as follows: the P-type doped region 2 includes several horizontally arranged and parallel first P-type doped sub-regions 201 and several vertically arranged and perpendicular to the first P-type doped sub-regions 201; the N-type doped region 3 includes several horizontally arranged and parallel first N-type doped sub-regions 301 and several vertically arranged and perpendicular to the first N-type doped sub-regions 301; wherein, the adjacent first P-type doped sub-regions 201 and first N-type doped sub-regions 301 are arranged in an interdigitated pattern, the vertical second P-type doped sub-regions 202 divide the horizontal first N-type doped sub-regions 301 into several segments, and the vertical second N-type doped sub-regions 302 divide the horizontal first N-type doped sub-regions 301 into several segments.

[0069] Adjacent first P-type doped sub-regions 201 and 301 are separated by a first vertical distance L1, adjacent first P-type doped sub-regions 201 and 302 are separated by a second horizontal distance L2, and adjacent first N-type doped sub-regions 301 and 202 are separated by a third horizontal distance L3. A portion of the first distance L1, second distance L2, and third distance L3 is a second width 5a, and the remaining distances are a first width 4a. For example... Figure 4 As shown, L1, L2 and L3 near the upper part have a second width 5a, and L1, L2 and L3 near the lower part have a first width 4a.

[0070] The other structures of solar cells will be explained below.

[0071] See also Figure 2 As shown, the solar cell in this embodiment may also include a passivation layer 6, an electrode 7, and other structures.

[0072] by Figure 2 As shown in the example, the solar cell further includes a first passivation layer 61 disposed on the light-receiving surface of the silicon substrate 1. The first passivation layer 61 includes one or more composite layers selected from aluminum oxide, silicon nitride, silicon oxynitride, and silicon oxide. Preferably, along the direction away from the silicon substrate 1, the first passivation layer 61 sequentially includes a first aluminum oxide layer 611 and a first silicon nitride layer 612 stacked on the silicon substrate 1.

[0073] The solar cell further includes a second passivation layer 62 disposed on the surfaces of the P-type doped region 2 and the N-type doped region 3 facing away from the silicon substrate 1. The second passivation layer 62 comprises one or more composite layers selected from aluminum oxide, silicon nitride, silicon oxynitride, and silicon oxide. Preferably, along the direction facing away from the silicon substrate 1, the second passivation layer 62 sequentially comprises a second aluminum oxide layer 621 and a second silicon nitride layer 622 stacked on the P-type doped region 2 and the N-type doped region 3.

[0074] The solar cell also includes a first electrode 71 that makes ohmic contact with the P-type doped region 2 and a second electrode 72 that makes ohmic contact with the N-type doped region 3.

[0075] In this application, the P-type doped region 2 and the N-type doped region 3 can be P-type doped polysilicon layer 21 and N-type doped polysilicon layer 31 deposited on the surface of silicon substrate 1 by processes such as PECVD or LPCVD, or they can be P-type diffusion layer and N-type diffusion layer obtained by high-temperature diffusion on the surface of silicon substrate 1. In the former case, a first dielectric layer 81 is also provided between the P-type doped polysilicon layer 21 and silicon substrate 1, and the first dielectric layer 81 and the P-type doped polysilicon layer 21 form a passivation contact structure; a second dielectric layer 82 is provided between the N-type doped polysilicon layer 31 and silicon substrate 1, and the second dielectric layer 82 and the N-type doped polysilicon layer 31 also form a passivation contact structure. The second passivation layer 62 is disposed on the side of the N-type doped polysilicon layer 31 and the P-type doped polysilicon layer 21 facing away from the dielectric layer 8. The first electrode 71 penetrates the second passivation layer 62 to make ohmic contact with the P-type doped polysilicon layer 21, and the second electrode 72 penetrates the second passivation layer 62 to make ohmic contact with the N-type doped polysilicon layer 31. In the latter case, the second passivation layer is located on the surface of the P-type diffusion layer and the N-type diffusion layer facing away from the silicon substrate, the first electrode penetrates the second passivation layer to make ohmic contact with the P-type diffusion layer, and the second electrode penetrates the second passivation layer to make ohmic contact with the N-type diffusion layer.

[0076] It should be noted that the solar cells in the embodiments of this application can be prepared using common back-contact solar cell preparation methods, and this application does not impose any restrictions on this.

[0077] In one optional embodiment, the solar cell of this application is a back-contact solar cell with a passivated contact structure on the back side, and the method for manufacturing the solar cell includes the following steps:

[0078] Combination Figures 5 to 11 As shown, this embodiment provides a solar cell, the preparation method of which includes the following steps:

[0079] (1) Polish and clean the silicon substrate 1. See [link to relevant documentation]. Figure 5 As shown, N-type monocrystalline silicon was used as the silicon substrate 11, and polishing was performed using a KOH solution with a concentration of 5% wt at a polishing temperature of 80℃. Cleaning was then performed using a solution containing hydrofluoric acid, followed by water washing and drying processes.

[0080] (2) Formation of the film structure of P-type doped region 2. See also Figure 6As shown, a thin silicon oxide dielectric layer of 1 nm to 3 nm is formed on the back surface of silicon substrate 1 using LPCVD, followed by a P-type crystalline silicon layer of 200 nm to 450 nm. Boron diffusion is then performed on the back surface using a diffusion furnace tube, thereby sequentially forming a first dielectric layer 81, a P-type doped polycrystalline silicon layer 21, and a BSG layer 91 on the back surface.

[0081] (3) First graphical processing. See [link / reference] Figure 7 As shown, the backlight surface is patterned and polished using a KOH solution, cleaned using a hydrofluoric acid solution, and then washed and dried to form patterned films of the first dielectric layer 81, the P-type doped polysilicon layer 21, and the BSG layer 91. The patterning process can be performed using laser etching or chemical etching.

[0082] (4) Formation of the N-type doped region 3 film structure. See also Figure 8 As shown, a 1nm-3nm tunneling silicon oxide dielectric layer, a 100nm-300nm phosphorus-doped silicon layer, and an outermost 20nm-50nm mask silicon oxide layer are sequentially deposited on the back surface of silicon substrate 1 and the surface of BSG layer 91 using PECVD. The layers are then annealed at 850℃-980℃ for 20min-60min using a high-temperature furnace tube, thereby sequentially forming a second dielectric layer 82, an N-type doped polysilicon layer 31, and a mask layer 92 on the back surface and BSG layer 91.

[0083] (5) Secondary graphical processing. See [link to documentation]. Figure 9 As shown, the backlight surface undergoes secondary patterning and polishing with a KOH solution, followed by cleaning with a hydrofluoric acid solution and a water washing and drying process, thereby forming a P-type doped region 2 and an N-type doped region 3, as well as a separation region 4 and a conductive region 5 located between the P-type doped region 2 and the N-type doped region 3. The patterning process can be performed using laser etching or chemical etching.

[0084] Taking laser processing as an example, before laser patterning, the pattern is first set. This includes, but is not limited to, determining the following parameters: the number of main gates for the first and second electrodes, the width and number of partition regions, the width and number of conductive regions, etc. After confirming the above parameters, a second patterning process is performed to form partition regions with a first width and conductive regions with a second width between the P-type doped region and the N-type doped region, respectively, and the number of conductive regions is controlled within the range of 1% to 5% of the total.

[0085] (6) Forming an oxide protective layer on the back surface and texturing the light-receiving surface. The coating layer on the light-receiving surface of the silicon substrate 11 is removed using a chain acid polishing equipment. The light-receiving surface is texturized using a 2% alkaline solution, and then cleaned with a mixed solution of HF and HCl, followed by a water washing and drying process.

[0086] (7) Formation of passivation layer 6. See also Figure 10 As shown, a first aluminum oxide layer 611 and a second aluminum oxide layer 621 with a thickness of 2 nm to 8 nm are fabricated on the light-receiving side and the back-light-receiving side of the silicon substrate 1, respectively, using ALD (Atomic Layer Deposition). A first silicon nitride layer 612 and a second silicon nitride layer 622 are fabricated on the aluminum oxide layer surfaces of the light-receiving side and the back-light-receiving side, respectively, using tubular PECVD. The thickness of the first silicon nitride layer 612 on the light-receiving side is 60 nm to 90 nm, and the thickness of the second silicon nitride layer 622 on the back-light-receiving side is 70 nm to 120 nm. The first aluminum oxide layer 611 and the first silicon nitride layer 612 on the light-receiving side are the first passivation layer 61, and the second aluminum oxide layer 621 and the second silicon nitride layer 622 on the back-light-receiving side are the second passivation layer 62.

[0087] (8) Forming electrodes. See also Figure 11 As shown, a first electrode 71 and a second electrode 72 are screen-printed and sintered on the backlight side so that the first electrode 71 makes ohmic contact with the P-type doped polysilicon layer 21 and the second electrode 72 makes ohmic contact with the N-type doped polysilicon layer 31.

[0088] Further integration with Figures 2 to 4 As shown below, taking a solar cell with 10 main grids as an example, the process of determining the number of partition regions 4 and conduction regions 5 in the embodiments of this application will be further explained.

[0089] In a solar cell with 10 main grids, the first electrode 71 and the second electrode 72 each have 5 grid lines, totaling 10. Corresponding to the grid line pattern of electrode 7, the P-type doped region 2 includes several horizontally arranged and parallel first P-type doped sub-regions 201 and several vertically arranged and perpendicular to the first P-type doped sub-regions 201. The N-type doped polycrystalline silicon layer 31 includes several horizontally arranged and parallel first N-type doped sub-regions 301 and several vertically arranged and perpendicular to the first N-type doped sub-regions 301. Specifically, in the vertical direction, there are 5 second P-type doped sub-regions 202 and 5 second N-type doped sub-regions 302; in the horizontal direction, there are 16 first P-type doped sub-regions 201 and 15 first N-type doped sub-regions 301.

[0090] Dividing any two adjacent second P-type doped sub-regions 202 and 302 into a vertical region results in a solar cell with 10 main grids being divided into 9 vertical regions. Within any vertical region, there are 30 areas to be designed between any two oppositely positioned first P-type doped sub-regions 201 and 301; there are also 31 areas to be designed between any two opposite first P-type doped sub-regions 201 and 302, and between any two opposite first N-type doped sub-regions 301 and 202. These areas to be designed refer to regions to be designated as either separating regions 4 or conducting regions 5.

[0091] As described above, the total number of areas to be designed in any given vertical region is 61. Therefore, the total number of areas to be designed in the nine vertical regions is 549, which is also the total number of separation areas 4 and conductive areas 5 is 549. In this embodiment, the proportion of conductive areas 5 is 0.25% to 14% of the total number, so the number of conductive areas 5 is approximately 2 to 77. When the proportion of conductive areas 5 is preferably 2.5% to 7.5%, the number of conductive areas 5 is approximately 14 to 41.

[0092] It is understood that this application may also use other numbers of main gates, such as 12 or 16 main gates, and the number of sub-gates may be adjusted to create other numbers of regions to be designed between the P-type and N-type doped regions. This application does not limit this. As long as the ratio of the conducting region to the total region meets the above-mentioned range of this application, it falls within the above-mentioned protection scope of this application.

[0093] Secondly, embodiments of this application provide a photovoltaic module, which includes:

[0094] Solar cell strings are obtained by connecting solar cells in series and / or in parallel as described in the first aspect.

[0095] Furthermore, the photovoltaic module may also include a bypass diode connected in parallel across the solar cell string.

[0096] When a solar cell or solar cell string is reverse-biased due to extensive shading, its parallel-connected bypass diode can conduct under certain conditions, allowing the output current of the normally operating solar cell to flow through the bypass diode. Although the shaded solar cell or solar cell string no longer generates electricity, at least the unshaded solar cell or solar cell string can still generate electricity normally, preventing the entire photovoltaic module from shutting down. Therefore, the protection mechanism of the bypass diode determines that its impact on the solar cell string is irreversible in the short term. That is, while the bypass diode can improve the temperature rise caused by shading after activation, it also prevents the shaded solar cell string from generating electricity.

[0097] By combining the solar cell of this application embodiment with a bypass diode, the above-mentioned problems can be effectively solved, avoiding the bypass diode from starting up under low shading area. Because the solar cell of this application embodiment has a specific proportion of conductive area structure, on the one hand, when the photovoltaic module experiences hot spot phenomena due to shading, the conductive leakage design at the shading location ensures that the current supplied by the normal cells in the string flows through the conductive area at the shading location, rather than causing charge accumulation at the ends of the shaded cells or the battery string, leading to continuous heating in the shading area, thus avoiding its adverse effects on the photovoltaic module; moreover, the technical solution of this application can increase the shading area for starting the bypass diode, i.e., it has a higher tolerance for the hot spot effect caused by shading, and to a certain extent avoids the output power attenuation problem caused by short-circuiting the battery string circuit due to starting the bypass diode.

[0098] With the above settings, the solar cell strings and photovoltaic modules composed of back-contact solar cells can better utilize the advantage of having no metal electrodes blocking the light-receiving surface to demonstrate a higher output power than other types of cells, effectively mitigating the impact of shading on back-contact solar cells.

[0099] The solar cells and photovoltaic modules of this application will be further described below with reference to more specific embodiments.

[0100] Example 1

[0101] This embodiment provides a solar cell, which is a back-contact solar cell. The solar cell includes:

[0102] The silicon substrate is an N-type silicon wafer with a size of 182mm × 182mm.

[0103] A first dielectric layer and a P-type doped polysilicon layer (i.e., P-type doped region) are sequentially disposed on the back surface of a silicon substrate, and a second dielectric layer and an N-type doped polysilicon layer (i.e., N-type doped region) are sequentially disposed on the back surface of a silicon substrate; wherein, the N-type doped polysilicon layer and the P-type doped polysilicon layer are arranged in an interdigitated pattern, the N-type doped polysilicon layer includes several horizontally arranged and parallel first P-type doped sub-regions and several vertically arranged and perpendicular to the first P-type doped sub-regions, and the N-type doped polysilicon layer includes several horizontally arranged and parallel first N-type doped sub-regions and several vertically arranged and perpendicular to the first N-type doped sub-regions;

[0104] A separation region and a conduction region are respectively provided between the P-type doped polysilicon layer and the N-type doped polysilicon layer;

[0105] The first passivation layer includes an aluminum oxide layer and a silicon nitride layer sequentially disposed on the light-receiving surface of the silicon substrate;

[0106] The second passivation layer includes an aluminum oxide layer and a silicon nitride layer sequentially disposed on the back surface of the silicon substrate and on the P-type doped polycrystalline silicon layer and the N-type doped polycrystalline silicon layer.

[0107] The first electrode is located on the back surface of the silicon substrate and makes an ohmic contact with the P-type doped polycrystalline silicon layer after penetrating the second passivation layer.

[0108] The second electrode is located on the back surface of the silicon substrate and makes an ohmic contact with the N-type doped polycrystalline silicon layer after penetrating the second passivation layer.

[0109] The first and second electrodes each have 8 main gate lines, totaling 16. There are 8 vertically arranged second P-type doped sub-regions and 8 vertically arranged second N-type doped sub-regions. The widths of the horizontally arranged first P-type doped sub-regions are 525 μm and the widths of the first N-type doped sub-regions are 625 μm. The first width of the separator region is 50 μm, and the second width of the conductive region is 10 μm. Between any two adjacent second P-type and second N-type doped sub-regions, there are 151 first P-type doped sub-regions and 150 first N-type doped sub-regions. This structure results in a total of approximately 9000 separator and conductive regions, with conductive regions accounting for 5%, or approximately 450 conductive regions, which are evenly distributed on the backlight surface. By dividing any two adjacent second P-type doped sub-regions and second N-type doped sub-regions into a vertical region, this embodiment has 15 vertical regions. Within each vertical region, 30 conductive regions are uniformly arranged vertically. Since the fabricated solar cell can be subsequently sliced ​​into half-cells, each half-cell is divided into 15 relatively independent vertical regions, totaling 30 regions. Therefore, for each half-cell, any vertical region contains 15 uniformly arranged conductive regions vertically.

[0110] In addition, this embodiment also includes two conductive areas near the edge of the solar cell. Since the total number of separating and conductive areas is large, and the proportion of conductive areas is small, the few conductive areas added near the edge of the solar cell will not significantly affect the photoelectric conversion efficiency of the solar cell.

[0111] Examples 2 to 7

[0112] Except for the ratio of the number of conductive areas adjusted according to Table 1, the rest is the same as in Example 1.

[0113] Comparative Examples 1 to 2

[0114] Except for the ratio of the number of conductive areas adjusted according to Table 1, the rest is the same as in Example 1.

[0115] Table 1: Parameters of the conducting and separating regions in each embodiment and comparative example

[0116] district Percentage of conductive zones / % Second width of the conduction region / μm First width of the dividing area / μm Example 1 5 10 50 Example 2 1.25 10 50 Example 3 2.5 10 50 Example 4 3.75 10 50 Example 5 7.5 10 50 Example 6 8.75 10 50 Example 7 12.5 10 50 Comparative Example 1 0 10 50 Comparative Example 2 15 10 50

[0117] Performance testing:

[0118] Hot spot test: The solar cells of Examples 1 to Comparative Examples 3 were processed into half-cell cells, and 12 half-cell cells were wired together to form a solar cell string. This solar cell string was added to a photovoltaic module with 72-cell half-cell solar cells, and a hot spot test was performed (the hot spot test was conducted according to IEC 61215). The test results are shown in Table 2 below.

[0119] Photovoltaic conversion efficiency testing: Photovoltaic conversion efficiency is tested using a Halm testing and sorting system. The Halm system simulates sunlight and is equipped with electronic loads, data acquisition and computing devices to test the electrical performance of photovoltaic devices (including solar cells). The silicon wafers used for the controlled test are 182mm in size, and the calibrated light intensity is 1000±5W / m². 2 The test results are shown in Table 2 below.

[0120] Table 2: Parameters and performance test results of each embodiment and comparative example

[0121] Photoelectric conversion efficiency / % Area covered / Number of half-panels Photovoltaic module hotspot temperature / ℃ Example 1 25.88 3 pieces 118 Example 2 25.92 2 pieces 129 Example 3 25.90 3 pieces 120 Example 4 25.88 3 pieces 123 Example 5 25.85 3 pieces 115 Example 6 25.71 5 pieces 121 Example 7 25.65 5 pieces 116 Comparative Example 1 25.93 35% of 1 piece 172 Comparative Example 2 25.53 5 pieces 113

[0122] The experimental results show that in Comparative Example 1 without a conductive area, the maximum shading area of ​​the photovoltaic module is 35% of the area of ​​a single half-cell, with a hot spot temperature as high as 172℃. However, with the addition of a conductive area, the solar cell's resistance to shading is significantly improved. This indicates that when the proportion of conductive areas reaches 0.25% or more, it can effectively alleviate the problem of excessively high local hot spot temperatures when back-contact solar cells are shaded. However, when the proportion of conductive areas increases to over 14%, as in Comparative Example 2, although the thermal resistance to shading is improved, it also leads to a decrease in photoelectric conversion efficiency. For solar cells used in industrial applications, a decrease in photoelectric conversion efficiency of a single solar cell exceeding 0.1% will amplify the efficiency problem when it is made into a photovoltaic module. Therefore, the proportion of conductive areas should not exceed 14%. In summary, a conductive area proportion of 0.25% to 14% can solve the problem of excessively high local hot spot temperatures when shaded, while also ensuring good photoelectric conversion efficiency. In particular, when the proportion of conductive areas is 2.5% to 7.5%, the photoelectric conversion efficiency of solar cells can be maintained at a level of over 25.7%.

[0123] The technical solutions disclosed in the embodiments of this application have been described in detail above. Specific examples have been used in this article to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core inventive points of the embodiments of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A solar cell, characterized in that, The solar cell includes a silicon substrate, and P-type doped regions and N-type doped regions disposed on the back surface of the silicon substrate and arranged in an interdigitated manner. A separation region and a conductive region are respectively provided between the P-type doped regions and between the N-type doped regions. The separation region has a first width and the conductive region has a second width. Wherein, the first width is greater than 30μm and less than or equal to 100μm, and the second width is less than or equal to 30μm and greater than 0μm; Wherein, the number of the separating regions is N1, the number of the conducting regions is N2, and 0.25% ≤ N2 / (N1+N2) ≤ 14%.

2. The solar cell according to claim 1, characterized in that, The second width is less than or equal to 10 μm and greater than 0 μm.

3. The solar cell according to claim 1, characterized in that, 2.5%≤N2 / (N1+N2)≤7.5%.

4. The solar cell according to claim 1, characterized in that, The conductive area is uniformly distributed on the back surface of the solar cell.

5. The solar cell according to claim 1, characterized in that, The conductive area is provided near the edge of the solar cell.

6. The solar cell according to any one of claims 1 to 5, characterized in that, The P-type doped region includes a plurality of horizontally arranged and parallel first P-type doped sub-regions, and the N-type doped region includes a plurality of horizontally arranged and parallel first N-type doped sub-regions, with adjacent first P-type doped sub-regions and first N-type doped sub-regions arranged in an interdigitated pattern. The adjacent first P-type doped sub-region and the first N-type doped sub-region have a first vertical distance, part of which is the first width and the other part of which is the second width.

7. The solar cell according to any one of claims 1 to 5, characterized in that, The P-type doped region includes several horizontally arranged and parallel first P-type doped sub-regions and several vertically arranged and perpendicular to the first P-type doped sub-regions. The N-type doped region includes several horizontally arranged and parallel first N-type doped sub-regions and several vertically arranged and perpendicular to the first N-type doped sub-regions. Adjacent first P-type doped sub-regions and first N-type doped sub-regions are arranged in an interdigitated pattern. The vertical second P-type doped sub-regions divide the horizontal first N-type doped sub-regions into several segments, and the vertical second N-type doped sub-regions divide the horizontal first N-type doped sub-regions into several segments. The adjacent first P-type doped sub-region and the first N-type doped sub-region have a first vertical distance, the adjacent first P-type doped sub-region and the second N-type doped sub-region have a second horizontal distance, and the adjacent first N-type doped sub-region and the second P-type doped sub-region have a third horizontal distance. A portion of the first distance, the second distance, and the third distance is the second width, and the remaining distance is the first width.

8. The solar cell according to any one of claims 1 to 5, characterized in that, The solar cell also includes: A first passivation layer is disposed on the light-receiving surface of the silicon substrate; The second passivation layer is disposed on the surface of the P-type doped region and the N-type doped region away from the silicon substrate; The first electrode makes ohmic contact with the P-type doped region; The second electrode makes ohmic contact with the N-type doped region.

9. The solar cell according to claim 8, characterized in that, The P-type doped region includes a P-type doped polysilicon layer, and a dielectric layer is further provided between the P-type doped polysilicon layer and the silicon substrate. The N-type doped region includes an N-type doped polysilicon layer, and the dielectric layer is also provided between the N-type doped polysilicon layer and the silicon substrate. The second passivation layer is disposed on the side of the N-type doped polysilicon layer and the P-type doped polysilicon layer opposite to the dielectric layer. The first electrode penetrates the second passivation layer to make ohmic contact with the P-type doped polysilicon layer, and the second electrode penetrates the second passivation layer to make ohmic contact with the N-type doped polysilicon layer; Alternatively, the P-type doped region includes a P-type diffusion layer formed on the surface of the silicon substrate by diffusion, the N-type doped region includes an N-type diffusion layer formed on the surface of the silicon substrate by diffusion, and the second passivation layer is disposed on the surfaces of the P-type diffusion layer and the N-type diffusion layer opposite to the silicon substrate. The first electrode penetrates the second passivation layer to make ohmic contact with the P-type diffusion layer, and the second electrode penetrates the second passivation layer to make ohmic contact with the N-type diffusion layer.

10. A photovoltaic module, characterized in that, The photovoltaic module includes: A solar cell string, wherein the solar cell string is obtained by connecting solar cells in series and / or in parallel as described in any one of claims 1 to 9.

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